./Ultimate.py --spec ../../sv-benchmarks/c/MemSafety.prp --file ../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 497bfe83d1a123e7e085e38ee3eed2e663cc023e ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 497bfe83d1a123e7e085e38ee3eed2e663cc023e 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............ Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_932 term size 24 --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 07:36:36,363 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 07:36:36,364 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 07:36:36,370 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 07:36:36,370 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 07:36:36,371 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 07:36:36,371 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 07:36:36,372 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 07:36:36,373 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 07:36:36,374 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 07:36:36,374 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 07:36:36,374 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 07:36:36,375 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 07:36:36,376 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 07:36:36,376 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 07:36:36,377 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 07:36:36,378 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 07:36:36,379 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 07:36:36,380 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 07:36:36,381 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 07:36:36,381 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 07:36:36,382 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 07:36:36,384 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 07:36:36,384 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 07:36:36,384 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 07:36:36,385 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 07:36:36,386 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 07:36:36,386 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 07:36:36,387 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 07:36:36,387 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 07:36:36,388 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 07:36:36,388 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 07:36:36,388 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 07:36:36,388 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 07:36:36,389 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 07:36:36,389 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 07:36:36,390 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-11-10 07:36:36,400 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 07:36:36,401 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 07:36:36,401 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 07:36:36,401 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-10 07:36:36,402 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-10 07:36:36,402 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-10 07:36:36,402 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-10 07:36:36,402 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-10 07:36:36,402 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-10 07:36:36,402 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-10 07:36:36,402 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-10 07:36:36,403 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 07:36:36,403 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 07:36:36,403 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 07:36:36,403 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 07:36:36,403 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-10 07:36:36,403 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 07:36:36,403 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 07:36:36,404 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 07:36:36,404 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-10 07:36:36,404 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-10 07:36:36,404 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-10 07:36:36,404 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 07:36:36,404 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 07:36:36,404 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 07:36:36,405 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-10 07:36:36,405 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 07:36:36,406 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 07:36:36,406 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 497bfe83d1a123e7e085e38ee3eed2e663cc023e [2018-11-10 07:36:36,431 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 07:36:36,440 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 07:36:36,443 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 07:36:36,444 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 07:36:36,444 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 07:36:36,445 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-11-10 07:36:36,489 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/4d58c42e6/1b180912d14d4b0b8e717d3b1902a187/FLAG4ec6a3324 [2018-11-10 07:36:36,874 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 07:36:36,874 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-11-10 07:36:36,884 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/4d58c42e6/1b180912d14d4b0b8e717d3b1902a187/FLAG4ec6a3324 [2018-11-10 07:36:36,894 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/4d58c42e6/1b180912d14d4b0b8e717d3b1902a187 [2018-11-10 07:36:36,896 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 07:36:36,897 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 07:36:36,897 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 07:36:36,897 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 07:36:36,900 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 07:36:36,901 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:36:36" (1/1) ... [2018-11-10 07:36:36,903 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1180c501 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:36, skipping insertion in model container [2018-11-10 07:36:36,903 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:36:36" (1/1) ... [2018-11-10 07:36:36,909 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 07:36:36,938 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 07:36:37,126 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:36:37,133 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 07:36:37,165 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:36:37,188 INFO L193 MainTranslator]: Completed translation [2018-11-10 07:36:37,188 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37 WrapperNode [2018-11-10 07:36:37,188 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 07:36:37,189 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 07:36:37,189 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 07:36:37,189 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 07:36:37,239 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,252 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,276 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 07:36:37,276 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 07:36:37,276 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 07:36:37,276 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 07:36:37,285 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,285 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,292 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,292 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,302 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,306 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,309 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... [2018-11-10 07:36:37,312 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 07:36:37,312 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 07:36:37,313 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 07:36:37,313 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 07:36:37,313 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 07:36:37,349 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 07:36:37,349 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 07:36:37,349 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 07:36:37,349 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 07:36:37,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 07:36:37,350 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 07:36:37,841 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 07:36:37,842 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:36:37 BoogieIcfgContainer [2018-11-10 07:36:37,842 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 07:36:37,842 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 07:36:37,842 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 07:36:37,845 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 07:36:37,845 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 07:36:36" (1/3) ... [2018-11-10 07:36:37,846 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75e08ac5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 07:36:37, skipping insertion in model container [2018-11-10 07:36:37,846 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:36:37" (2/3) ... [2018-11-10 07:36:37,847 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75e08ac5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 07:36:37, skipping insertion in model container [2018-11-10 07:36:37,847 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:36:37" (3/3) ... [2018-11-10 07:36:37,848 INFO L112 eAbstractionObserver]: Analyzing ICFG dll-optional_true-unreach-call_true-valid-memsafety.i [2018-11-10 07:36:37,854 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 07:36:37,859 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 69 error locations. [2018-11-10 07:36:37,872 INFO L257 AbstractCegarLoop]: Starting to check reachability of 69 error locations. [2018-11-10 07:36:37,895 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 07:36:37,895 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-10 07:36:37,895 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 07:36:37,895 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 07:36:37,895 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 07:36:37,896 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 07:36:37,896 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 07:36:37,896 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 07:36:37,909 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states. [2018-11-10 07:36:37,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-11-10 07:36:37,915 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:37,915 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:37,917 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:37,922 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:37,922 INFO L82 PathProgramCache]: Analyzing trace with hash 431779457, now seen corresponding path program 1 times [2018-11-10 07:36:37,924 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:37,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:37,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:37,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:37,960 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:37,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:38,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:38,025 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:38,025 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 07:36:38,025 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:38,028 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:36:38,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:36:38,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:36:38,040 INFO L87 Difference]: Start difference. First operand 172 states. Second operand 3 states. [2018-11-10 07:36:38,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:38,308 INFO L93 Difference]: Finished difference Result 198 states and 210 transitions. [2018-11-10 07:36:38,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:36:38,309 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-11-10 07:36:38,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:38,318 INFO L225 Difference]: With dead ends: 198 [2018-11-10 07:36:38,318 INFO L226 Difference]: Without dead ends: 194 [2018-11-10 07:36:38,319 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:36:38,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-11-10 07:36:38,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 168. [2018-11-10 07:36:38,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-10 07:36:38,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 178 transitions. [2018-11-10 07:36:38,354 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 178 transitions. Word has length 7 [2018-11-10 07:36:38,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:38,355 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 178 transitions. [2018-11-10 07:36:38,355 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:36:38,355 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 178 transitions. [2018-11-10 07:36:38,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-11-10 07:36:38,355 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:38,355 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:38,357 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:38,357 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:38,357 INFO L82 PathProgramCache]: Analyzing trace with hash 500261318, now seen corresponding path program 1 times [2018-11-10 07:36:38,357 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:38,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:38,359 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:38,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:38,359 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:38,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:38,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:38,412 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:38,412 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 07:36:38,412 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:38,413 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:36:38,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:36:38,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:36:38,413 INFO L87 Difference]: Start difference. First operand 168 states and 178 transitions. Second operand 3 states. [2018-11-10 07:36:38,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:38,561 INFO L93 Difference]: Finished difference Result 167 states and 177 transitions. [2018-11-10 07:36:38,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:36:38,561 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-11-10 07:36:38,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:38,562 INFO L225 Difference]: With dead ends: 167 [2018-11-10 07:36:38,563 INFO L226 Difference]: Without dead ends: 167 [2018-11-10 07:36:38,563 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:36:38,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-10 07:36:38,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-11-10 07:36:38,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-11-10 07:36:38,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 177 transitions. [2018-11-10 07:36:38,572 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 177 transitions. Word has length 8 [2018-11-10 07:36:38,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:38,573 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 177 transitions. [2018-11-10 07:36:38,573 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:36:38,573 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 177 transitions. [2018-11-10 07:36:38,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-11-10 07:36:38,573 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:38,573 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:38,575 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:38,575 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:38,575 INFO L82 PathProgramCache]: Analyzing trace with hash -1671768285, now seen corresponding path program 1 times [2018-11-10 07:36:38,575 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:38,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:38,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:38,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:38,581 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:38,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:38,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:38,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:38,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:38,622 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:38,623 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:38,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:38,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:38,623 INFO L87 Difference]: Start difference. First operand 167 states and 177 transitions. Second operand 5 states. [2018-11-10 07:36:38,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:38,861 INFO L93 Difference]: Finished difference Result 235 states and 251 transitions. [2018-11-10 07:36:38,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:38,861 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-11-10 07:36:38,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:38,863 INFO L225 Difference]: With dead ends: 235 [2018-11-10 07:36:38,863 INFO L226 Difference]: Without dead ends: 235 [2018-11-10 07:36:38,863 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:38,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-11-10 07:36:38,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 163. [2018-11-10 07:36:38,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-11-10 07:36:38,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-11-10 07:36:38,869 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 9 [2018-11-10 07:36:38,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:38,870 INFO L481 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-11-10 07:36:38,870 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:38,870 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-11-10 07:36:38,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-10 07:36:38,870 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:38,871 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:38,872 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:38,872 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:38,873 INFO L82 PathProgramCache]: Analyzing trace with hash -285209240, now seen corresponding path program 1 times [2018-11-10 07:36:38,873 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:38,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:38,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:38,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:38,874 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:38,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:38,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:38,905 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:38,905 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:36:38,905 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:38,905 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:36:38,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:36:38,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:36:38,906 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 4 states. [2018-11-10 07:36:39,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:39,034 INFO L93 Difference]: Finished difference Result 167 states and 177 transitions. [2018-11-10 07:36:39,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 07:36:39,034 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-11-10 07:36:39,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:39,035 INFO L225 Difference]: With dead ends: 167 [2018-11-10 07:36:39,035 INFO L226 Difference]: Without dead ends: 167 [2018-11-10 07:36:39,035 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:39,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-10 07:36:39,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 162. [2018-11-10 07:36:39,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-11-10 07:36:39,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-11-10 07:36:39,040 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 10 [2018-11-10 07:36:39,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:39,041 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-11-10 07:36:39,041 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:36:39,041 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-11-10 07:36:39,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-11-10 07:36:39,041 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:39,041 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:39,042 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:39,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:39,043 INFO L82 PathProgramCache]: Analyzing trace with hash 791828778, now seen corresponding path program 1 times [2018-11-10 07:36:39,043 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:39,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:39,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,044 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:39,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:39,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:39,097 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:39,097 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:36:39,098 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:39,098 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:36:39,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:36:39,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:39,099 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 6 states. [2018-11-10 07:36:39,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:39,286 INFO L93 Difference]: Finished difference Result 231 states and 247 transitions. [2018-11-10 07:36:39,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:36:39,287 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-11-10 07:36:39,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:39,287 INFO L225 Difference]: With dead ends: 231 [2018-11-10 07:36:39,287 INFO L226 Difference]: Without dead ends: 231 [2018-11-10 07:36:39,288 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:39,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-11-10 07:36:39,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 159. [2018-11-10 07:36:39,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-11-10 07:36:39,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 169 transitions. [2018-11-10 07:36:39,294 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 169 transitions. Word has length 12 [2018-11-10 07:36:39,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:39,294 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 169 transitions. [2018-11-10 07:36:39,294 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:36:39,294 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 169 transitions. [2018-11-10 07:36:39,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-10 07:36:39,295 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:39,295 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:39,296 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:39,297 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:39,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1223111608, now seen corresponding path program 1 times [2018-11-10 07:36:39,297 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:39,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:39,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,298 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:39,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:39,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:39,337 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:39,337 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:36:39,338 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:39,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:36:39,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:36:39,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:36:39,338 INFO L87 Difference]: Start difference. First operand 159 states and 169 transitions. Second operand 4 states. [2018-11-10 07:36:39,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:39,477 INFO L93 Difference]: Finished difference Result 254 states and 272 transitions. [2018-11-10 07:36:39,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:36:39,478 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-11-10 07:36:39,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:39,479 INFO L225 Difference]: With dead ends: 254 [2018-11-10 07:36:39,479 INFO L226 Difference]: Without dead ends: 254 [2018-11-10 07:36:39,479 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:39,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-11-10 07:36:39,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 156. [2018-11-10 07:36:39,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-11-10 07:36:39,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 166 transitions. [2018-11-10 07:36:39,483 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 166 transitions. Word has length 13 [2018-11-10 07:36:39,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:39,483 INFO L481 AbstractCegarLoop]: Abstraction has 156 states and 166 transitions. [2018-11-10 07:36:39,483 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:36:39,483 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 166 transitions. [2018-11-10 07:36:39,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-10 07:36:39,484 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:39,484 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:39,485 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:39,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:39,485 INFO L82 PathProgramCache]: Analyzing trace with hash 1410785482, now seen corresponding path program 1 times [2018-11-10 07:36:39,485 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:39,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,486 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:39,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,487 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:39,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:39,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:39,555 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:39,555 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:39,555 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:39,556 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:39,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:39,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:39,556 INFO L87 Difference]: Start difference. First operand 156 states and 166 transitions. Second operand 5 states. [2018-11-10 07:36:39,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:39,742 INFO L93 Difference]: Finished difference Result 230 states and 246 transitions. [2018-11-10 07:36:39,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:39,743 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-11-10 07:36:39,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:39,743 INFO L225 Difference]: With dead ends: 230 [2018-11-10 07:36:39,743 INFO L226 Difference]: Without dead ends: 230 [2018-11-10 07:36:39,744 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:39,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-10 07:36:39,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 153. [2018-11-10 07:36:39,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-11-10 07:36:39,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 163 transitions. [2018-11-10 07:36:39,747 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 163 transitions. Word has length 15 [2018-11-10 07:36:39,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:39,747 INFO L481 AbstractCegarLoop]: Abstraction has 153 states and 163 transitions. [2018-11-10 07:36:39,747 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:39,747 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 163 transitions. [2018-11-10 07:36:39,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-10 07:36:39,748 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:39,748 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:39,749 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:39,749 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:39,749 INFO L82 PathProgramCache]: Analyzing trace with hash 784677038, now seen corresponding path program 1 times [2018-11-10 07:36:39,749 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:39,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:39,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:39,751 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:39,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:39,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:39,796 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:39,796 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:39,796 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:39,796 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:39,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:39,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:39,797 INFO L87 Difference]: Start difference. First operand 153 states and 163 transitions. Second operand 5 states. [2018-11-10 07:36:40,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:40,078 INFO L93 Difference]: Finished difference Result 232 states and 251 transitions. [2018-11-10 07:36:40,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:36:40,078 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-10 07:36:40,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:40,079 INFO L225 Difference]: With dead ends: 232 [2018-11-10 07:36:40,079 INFO L226 Difference]: Without dead ends: 232 [2018-11-10 07:36:40,079 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:40,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-11-10 07:36:40,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 152. [2018-11-10 07:36:40,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-11-10 07:36:40,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 162 transitions. [2018-11-10 07:36:40,081 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 162 transitions. Word has length 16 [2018-11-10 07:36:40,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:40,082 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 162 transitions. [2018-11-10 07:36:40,082 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:40,082 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-11-10 07:36:40,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-10 07:36:40,082 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:40,082 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:40,083 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:40,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:40,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1444815540, now seen corresponding path program 1 times [2018-11-10 07:36:40,084 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:40,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:40,084 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:40,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:40,085 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:40,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:40,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:40,122 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:40,123 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:40,123 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:40,123 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:40,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:40,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:40,123 INFO L87 Difference]: Start difference. First operand 152 states and 162 transitions. Second operand 5 states. [2018-11-10 07:36:40,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:40,325 INFO L93 Difference]: Finished difference Result 222 states and 242 transitions. [2018-11-10 07:36:40,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:40,326 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-10 07:36:40,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:40,327 INFO L225 Difference]: With dead ends: 222 [2018-11-10 07:36:40,327 INFO L226 Difference]: Without dead ends: 222 [2018-11-10 07:36:40,328 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:40,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-11-10 07:36:40,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 151. [2018-11-10 07:36:40,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-11-10 07:36:40,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-11-10 07:36:40,332 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 17 [2018-11-10 07:36:40,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:40,334 INFO L481 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-11-10 07:36:40,334 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:40,334 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-11-10 07:36:40,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-10 07:36:40,334 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:40,335 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:40,336 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:40,336 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:40,336 INFO L82 PathProgramCache]: Analyzing trace with hash -1839608720, now seen corresponding path program 1 times [2018-11-10 07:36:40,336 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:40,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:40,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:40,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:40,337 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:40,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:40,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:40,421 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:40,421 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:40,421 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:40,421 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:40,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:40,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:40,422 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 5 states. [2018-11-10 07:36:40,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:40,695 INFO L93 Difference]: Finished difference Result 176 states and 187 transitions. [2018-11-10 07:36:40,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:36:40,698 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-11-10 07:36:40,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:40,698 INFO L225 Difference]: With dead ends: 176 [2018-11-10 07:36:40,699 INFO L226 Difference]: Without dead ends: 176 [2018-11-10 07:36:40,699 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:40,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-11-10 07:36:40,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 150. [2018-11-10 07:36:40,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-11-10 07:36:40,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 160 transitions. [2018-11-10 07:36:40,702 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 160 transitions. Word has length 18 [2018-11-10 07:36:40,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:40,702 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 160 transitions. [2018-11-10 07:36:40,703 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:40,703 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 160 transitions. [2018-11-10 07:36:40,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-10 07:36:40,703 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:40,703 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:40,704 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:40,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:40,707 INFO L82 PathProgramCache]: Analyzing trace with hash -1193295410, now seen corresponding path program 1 times [2018-11-10 07:36:40,707 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:40,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:40,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:40,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:40,708 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:40,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:40,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:40,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:40,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:40,770 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:40,770 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:40,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:40,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:40,771 INFO L87 Difference]: Start difference. First operand 150 states and 160 transitions. Second operand 5 states. [2018-11-10 07:36:41,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:41,016 INFO L93 Difference]: Finished difference Result 216 states and 232 transitions. [2018-11-10 07:36:41,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:41,017 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2018-11-10 07:36:41,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:41,018 INFO L225 Difference]: With dead ends: 216 [2018-11-10 07:36:41,018 INFO L226 Difference]: Without dead ends: 216 [2018-11-10 07:36:41,019 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:41,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-11-10 07:36:41,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 149. [2018-11-10 07:36:41,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-11-10 07:36:41,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 159 transitions. [2018-11-10 07:36:41,022 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 159 transitions. Word has length 19 [2018-11-10 07:36:41,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:41,023 INFO L481 AbstractCegarLoop]: Abstraction has 149 states and 159 transitions. [2018-11-10 07:36:41,023 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:41,023 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 159 transitions. [2018-11-10 07:36:41,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-10 07:36:41,023 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:41,023 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:41,024 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:41,024 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:41,024 INFO L82 PathProgramCache]: Analyzing trace with hash 1601358380, now seen corresponding path program 1 times [2018-11-10 07:36:41,024 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:41,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:41,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,026 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:41,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:41,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:41,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:41,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:36:41,094 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:41,094 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:36:41,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:36:41,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:41,094 INFO L87 Difference]: Start difference. First operand 149 states and 159 transitions. Second operand 7 states. [2018-11-10 07:36:41,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:41,398 INFO L93 Difference]: Finished difference Result 311 states and 336 transitions. [2018-11-10 07:36:41,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:36:41,399 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-11-10 07:36:41,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:41,400 INFO L225 Difference]: With dead ends: 311 [2018-11-10 07:36:41,400 INFO L226 Difference]: Without dead ends: 311 [2018-11-10 07:36:41,400 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:36:41,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2018-11-10 07:36:41,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 162. [2018-11-10 07:36:41,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-11-10 07:36:41,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 180 transitions. [2018-11-10 07:36:41,404 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 180 transitions. Word has length 21 [2018-11-10 07:36:41,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:41,404 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 180 transitions. [2018-11-10 07:36:41,404 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:36:41,404 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 180 transitions. [2018-11-10 07:36:41,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-10 07:36:41,405 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:41,405 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:41,406 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:41,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:41,406 INFO L82 PathProgramCache]: Analyzing trace with hash -1897497670, now seen corresponding path program 1 times [2018-11-10 07:36:41,406 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:41,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,407 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:41,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,407 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:41,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:41,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:41,473 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:41,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:36:41,473 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:41,474 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:36:41,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:36:41,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:41,474 INFO L87 Difference]: Start difference. First operand 162 states and 180 transitions. Second operand 6 states. [2018-11-10 07:36:41,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:41,761 INFO L93 Difference]: Finished difference Result 317 states and 342 transitions. [2018-11-10 07:36:41,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:36:41,761 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-11-10 07:36:41,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:41,762 INFO L225 Difference]: With dead ends: 317 [2018-11-10 07:36:41,762 INFO L226 Difference]: Without dead ends: 317 [2018-11-10 07:36:41,762 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:36:41,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-11-10 07:36:41,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 168. [2018-11-10 07:36:41,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-10 07:36:41,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 189 transitions. [2018-11-10 07:36:41,766 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 189 transitions. Word has length 22 [2018-11-10 07:36:41,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:41,767 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 189 transitions. [2018-11-10 07:36:41,767 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:36:41,767 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 189 transitions. [2018-11-10 07:36:41,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-10 07:36:41,767 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:41,767 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:41,768 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:41,768 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:41,768 INFO L82 PathProgramCache]: Analyzing trace with hash 1307114478, now seen corresponding path program 1 times [2018-11-10 07:36:41,768 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:41,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:41,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,772 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:41,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:41,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:41,810 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:41,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:41,810 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:41,811 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:41,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:41,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:41,811 INFO L87 Difference]: Start difference. First operand 168 states and 189 transitions. Second operand 5 states. [2018-11-10 07:36:41,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:41,956 INFO L93 Difference]: Finished difference Result 200 states and 227 transitions. [2018-11-10 07:36:41,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:36:41,957 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-11-10 07:36:41,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:41,958 INFO L225 Difference]: With dead ends: 200 [2018-11-10 07:36:41,958 INFO L226 Difference]: Without dead ends: 200 [2018-11-10 07:36:41,958 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:41,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-11-10 07:36:41,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 167. [2018-11-10 07:36:41,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-11-10 07:36:41,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 189 transitions. [2018-11-10 07:36:41,960 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 189 transitions. Word has length 23 [2018-11-10 07:36:41,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:41,961 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 189 transitions. [2018-11-10 07:36:41,961 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:41,961 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 189 transitions. [2018-11-10 07:36:41,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 07:36:41,961 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:41,961 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:41,962 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:41,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:41,962 INFO L82 PathProgramCache]: Analyzing trace with hash 1865843260, now seen corresponding path program 1 times [2018-11-10 07:36:41,962 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:41,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:41,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:41,963 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:41,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:42,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:42,015 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:42,015 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:36:42,015 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:42,015 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:36:42,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:36:42,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:42,015 INFO L87 Difference]: Start difference. First operand 167 states and 189 transitions. Second operand 6 states. [2018-11-10 07:36:42,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:42,180 INFO L93 Difference]: Finished difference Result 221 states and 239 transitions. [2018-11-10 07:36:42,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:36:42,181 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-11-10 07:36:42,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:42,182 INFO L225 Difference]: With dead ends: 221 [2018-11-10 07:36:42,182 INFO L226 Difference]: Without dead ends: 221 [2018-11-10 07:36:42,182 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:36:42,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-11-10 07:36:42,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 169. [2018-11-10 07:36:42,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-11-10 07:36:42,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 191 transitions. [2018-11-10 07:36:42,185 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 191 transitions. Word has length 24 [2018-11-10 07:36:42,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:42,186 INFO L481 AbstractCegarLoop]: Abstraction has 169 states and 191 transitions. [2018-11-10 07:36:42,186 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:36:42,186 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 191 transitions. [2018-11-10 07:36:42,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-10 07:36:42,189 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:42,189 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:42,189 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:42,189 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:42,189 INFO L82 PathProgramCache]: Analyzing trace with hash 2011403447, now seen corresponding path program 1 times [2018-11-10 07:36:42,189 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:42,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:42,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:42,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:42,190 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:42,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:42,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:42,240 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:42,240 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:36:42,240 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:42,240 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:36:42,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:36:42,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:42,241 INFO L87 Difference]: Start difference. First operand 169 states and 191 transitions. Second operand 6 states. [2018-11-10 07:36:42,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:42,539 INFO L93 Difference]: Finished difference Result 322 states and 348 transitions. [2018-11-10 07:36:42,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 07:36:42,539 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-11-10 07:36:42,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:42,540 INFO L225 Difference]: With dead ends: 322 [2018-11-10 07:36:42,541 INFO L226 Difference]: Without dead ends: 322 [2018-11-10 07:36:42,541 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-11-10 07:36:42,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-11-10 07:36:42,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 173. [2018-11-10 07:36:42,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-11-10 07:36:42,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 195 transitions. [2018-11-10 07:36:42,545 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 195 transitions. Word has length 25 [2018-11-10 07:36:42,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:42,545 INFO L481 AbstractCegarLoop]: Abstraction has 173 states and 195 transitions. [2018-11-10 07:36:42,545 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:36:42,545 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 195 transitions. [2018-11-10 07:36:42,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-10 07:36:42,546 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:42,546 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:42,546 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:42,546 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:42,546 INFO L82 PathProgramCache]: Analyzing trace with hash 2006566320, now seen corresponding path program 1 times [2018-11-10 07:36:42,547 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:42,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:42,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:42,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:42,547 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:42,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:42,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:42,587 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:42,587 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:42,587 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:42,588 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:42,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:42,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:42,588 INFO L87 Difference]: Start difference. First operand 173 states and 195 transitions. Second operand 5 states. [2018-11-10 07:36:42,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:42,841 INFO L93 Difference]: Finished difference Result 182 states and 196 transitions. [2018-11-10 07:36:42,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:36:42,841 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-11-10 07:36:42,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:42,842 INFO L225 Difference]: With dead ends: 182 [2018-11-10 07:36:42,842 INFO L226 Difference]: Without dead ends: 182 [2018-11-10 07:36:42,843 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:42,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-11-10 07:36:42,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 172. [2018-11-10 07:36:42,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-10 07:36:42,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 194 transitions. [2018-11-10 07:36:42,845 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 194 transitions. Word has length 25 [2018-11-10 07:36:42,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:42,846 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 194 transitions. [2018-11-10 07:36:42,846 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:42,846 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 194 transitions. [2018-11-10 07:36:42,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 07:36:42,846 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:42,846 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:42,847 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:42,847 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:42,847 INFO L82 PathProgramCache]: Analyzing trace with hash -2071002400, now seen corresponding path program 1 times [2018-11-10 07:36:42,847 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:42,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:42,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:42,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:42,848 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:42,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:42,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:42,892 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:42,892 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:42,892 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:42,893 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:42,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:42,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:42,893 INFO L87 Difference]: Start difference. First operand 172 states and 194 transitions. Second operand 5 states. [2018-11-10 07:36:43,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:43,165 INFO L93 Difference]: Finished difference Result 243 states and 261 transitions. [2018-11-10 07:36:43,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:36:43,165 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-11-10 07:36:43,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:43,165 INFO L225 Difference]: With dead ends: 243 [2018-11-10 07:36:43,165 INFO L226 Difference]: Without dead ends: 243 [2018-11-10 07:36:43,166 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:43,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-11-10 07:36:43,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 173. [2018-11-10 07:36:43,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-11-10 07:36:43,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 194 transitions. [2018-11-10 07:36:43,169 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 194 transitions. Word has length 26 [2018-11-10 07:36:43,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:43,169 INFO L481 AbstractCegarLoop]: Abstraction has 173 states and 194 transitions. [2018-11-10 07:36:43,169 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:43,169 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 194 transitions. [2018-11-10 07:36:43,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 07:36:43,169 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:43,170 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:43,170 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:43,170 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:43,170 INFO L82 PathProgramCache]: Analyzing trace with hash 2074013886, now seen corresponding path program 1 times [2018-11-10 07:36:43,170 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:43,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,171 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:43,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,171 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:43,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:43,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:43,218 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:43,218 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:43,218 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:43,218 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:43,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:43,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:43,218 INFO L87 Difference]: Start difference. First operand 173 states and 194 transitions. Second operand 5 states. [2018-11-10 07:36:43,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:43,392 INFO L93 Difference]: Finished difference Result 172 states and 193 transitions. [2018-11-10 07:36:43,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:43,392 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-11-10 07:36:43,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:43,392 INFO L225 Difference]: With dead ends: 172 [2018-11-10 07:36:43,392 INFO L226 Difference]: Without dead ends: 172 [2018-11-10 07:36:43,393 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:43,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-11-10 07:36:43,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-11-10 07:36:43,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-10 07:36:43,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 193 transitions. [2018-11-10 07:36:43,395 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 193 transitions. Word has length 26 [2018-11-10 07:36:43,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:43,395 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 193 transitions. [2018-11-10 07:36:43,395 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:43,395 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 193 transitions. [2018-11-10 07:36:43,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 07:36:43,395 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:43,396 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:43,396 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:43,396 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:43,396 INFO L82 PathProgramCache]: Analyzing trace with hash 223529689, now seen corresponding path program 1 times [2018-11-10 07:36:43,396 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:43,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,397 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:43,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,397 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:43,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:43,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:43,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:43,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:43,425 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:43,425 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:36:43,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:36:43,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:36:43,426 INFO L87 Difference]: Start difference. First operand 172 states and 193 transitions. Second operand 4 states. [2018-11-10 07:36:43,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:43,497 INFO L93 Difference]: Finished difference Result 219 states and 236 transitions. [2018-11-10 07:36:43,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 07:36:43,498 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-11-10 07:36:43,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:43,499 INFO L225 Difference]: With dead ends: 219 [2018-11-10 07:36:43,499 INFO L226 Difference]: Without dead ends: 219 [2018-11-10 07:36:43,500 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:43,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-11-10 07:36:43,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 172. [2018-11-10 07:36:43,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-10 07:36:43,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 191 transitions. [2018-11-10 07:36:43,503 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 191 transitions. Word has length 27 [2018-11-10 07:36:43,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:43,503 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 191 transitions. [2018-11-10 07:36:43,504 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:36:43,504 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 191 transitions. [2018-11-10 07:36:43,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 07:36:43,508 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:43,508 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:43,508 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:43,509 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:43,509 INFO L82 PathProgramCache]: Analyzing trace with hash -130078862, now seen corresponding path program 1 times [2018-11-10 07:36:43,509 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:43,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:43,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,510 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:43,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:43,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:43,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:43,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:36:43,568 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:43,568 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:36:43,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:36:43,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:36:43,569 INFO L87 Difference]: Start difference. First operand 172 states and 191 transitions. Second operand 6 states. [2018-11-10 07:36:43,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:43,738 INFO L93 Difference]: Finished difference Result 196 states and 219 transitions. [2018-11-10 07:36:43,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:36:43,738 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-11-10 07:36:43,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:43,739 INFO L225 Difference]: With dead ends: 196 [2018-11-10 07:36:43,739 INFO L226 Difference]: Without dead ends: 196 [2018-11-10 07:36:43,739 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:36:43,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-11-10 07:36:43,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 166. [2018-11-10 07:36:43,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-10 07:36:43,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 184 transitions. [2018-11-10 07:36:43,749 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 184 transitions. Word has length 27 [2018-11-10 07:36:43,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:43,749 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 184 transitions. [2018-11-10 07:36:43,750 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:36:43,750 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 184 transitions. [2018-11-10 07:36:43,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:36:43,750 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:43,750 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:43,750 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:43,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:43,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1663442398, now seen corresponding path program 1 times [2018-11-10 07:36:43,751 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:43,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:43,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:43,752 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:43,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:43,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:43,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:43,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:36:43,791 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:43,792 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:36:43,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:36:43,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:43,792 INFO L87 Difference]: Start difference. First operand 166 states and 184 transitions. Second operand 7 states. [2018-11-10 07:36:44,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:44,022 INFO L93 Difference]: Finished difference Result 285 states and 310 transitions. [2018-11-10 07:36:44,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 07:36:44,022 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-11-10 07:36:44,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:44,023 INFO L225 Difference]: With dead ends: 285 [2018-11-10 07:36:44,023 INFO L226 Difference]: Without dead ends: 285 [2018-11-10 07:36:44,024 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-11-10 07:36:44,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-11-10 07:36:44,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 183. [2018-11-10 07:36:44,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-11-10 07:36:44,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 207 transitions. [2018-11-10 07:36:44,027 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 207 transitions. Word has length 28 [2018-11-10 07:36:44,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:44,027 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 207 transitions. [2018-11-10 07:36:44,027 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:36:44,027 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 207 transitions. [2018-11-10 07:36:44,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:36:44,027 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:44,027 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:44,028 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:44,028 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:44,028 INFO L82 PathProgramCache]: Analyzing trace with hash 262522688, now seen corresponding path program 1 times [2018-11-10 07:36:44,028 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:44,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:44,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:44,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:44,029 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:44,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:44,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:44,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:44,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:36:44,099 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:44,099 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:36:44,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:36:44,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:36:44,099 INFO L87 Difference]: Start difference. First operand 183 states and 207 transitions. Second operand 7 states. [2018-11-10 07:36:44,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:44,293 INFO L93 Difference]: Finished difference Result 263 states and 288 transitions. [2018-11-10 07:36:44,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:36:44,294 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-11-10 07:36:44,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:44,294 INFO L225 Difference]: With dead ends: 263 [2018-11-10 07:36:44,294 INFO L226 Difference]: Without dead ends: 263 [2018-11-10 07:36:44,295 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:36:44,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-11-10 07:36:44,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 187. [2018-11-10 07:36:44,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-11-10 07:36:44,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 211 transitions. [2018-11-10 07:36:44,298 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 211 transitions. Word has length 28 [2018-11-10 07:36:44,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:44,298 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 211 transitions. [2018-11-10 07:36:44,298 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:36:44,298 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 211 transitions. [2018-11-10 07:36:44,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 07:36:44,298 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:44,298 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:44,299 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:44,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:44,299 INFO L82 PathProgramCache]: Analyzing trace with hash -27106596, now seen corresponding path program 1 times [2018-11-10 07:36:44,299 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:44,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:44,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:44,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:44,301 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:44,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:44,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:44,374 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:44,374 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:44,374 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:44,374 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:44,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:44,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:44,375 INFO L87 Difference]: Start difference. First operand 187 states and 211 transitions. Second operand 5 states. [2018-11-10 07:36:44,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:44,616 INFO L93 Difference]: Finished difference Result 227 states and 246 transitions. [2018-11-10 07:36:44,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:44,616 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-10 07:36:44,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:44,617 INFO L225 Difference]: With dead ends: 227 [2018-11-10 07:36:44,617 INFO L226 Difference]: Without dead ends: 227 [2018-11-10 07:36:44,617 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:44,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-11-10 07:36:44,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 187. [2018-11-10 07:36:44,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-11-10 07:36:44,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 207 transitions. [2018-11-10 07:36:44,621 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 207 transitions. Word has length 29 [2018-11-10 07:36:44,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:44,621 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 207 transitions. [2018-11-10 07:36:44,621 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:44,621 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 207 transitions. [2018-11-10 07:36:44,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 07:36:44,621 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:44,621 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:44,622 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:44,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:44,622 INFO L82 PathProgramCache]: Analyzing trace with hash -451731148, now seen corresponding path program 1 times [2018-11-10 07:36:44,622 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:44,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:44,623 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:44,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:44,623 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:44,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:44,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:44,704 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:44,704 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-10 07:36:44,704 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:44,704 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 07:36:44,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 07:36:44,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:36:44,704 INFO L87 Difference]: Start difference. First operand 187 states and 207 transitions. Second operand 11 states. [2018-11-10 07:36:45,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:45,091 INFO L93 Difference]: Finished difference Result 262 states and 285 transitions. [2018-11-10 07:36:45,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:36:45,091 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-11-10 07:36:45,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:45,092 INFO L225 Difference]: With dead ends: 262 [2018-11-10 07:36:45,092 INFO L226 Difference]: Without dead ends: 262 [2018-11-10 07:36:45,092 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-11-10 07:36:45,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-11-10 07:36:45,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 186. [2018-11-10 07:36:45,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-11-10 07:36:45,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 206 transitions. [2018-11-10 07:36:45,095 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 206 transitions. Word has length 29 [2018-11-10 07:36:45,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:45,096 INFO L481 AbstractCegarLoop]: Abstraction has 186 states and 206 transitions. [2018-11-10 07:36:45,096 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 07:36:45,096 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 206 transitions. [2018-11-10 07:36:45,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 07:36:45,096 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:45,096 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:45,097 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:45,097 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:45,097 INFO L82 PathProgramCache]: Analyzing trace with hash -1118763582, now seen corresponding path program 1 times [2018-11-10 07:36:45,097 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:45,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:45,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,098 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:45,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:45,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:45,213 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:45,214 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-10 07:36:45,214 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:45,214 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 07:36:45,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 07:36:45,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:36:45,214 INFO L87 Difference]: Start difference. First operand 186 states and 206 transitions. Second operand 11 states. [2018-11-10 07:36:45,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:45,736 INFO L93 Difference]: Finished difference Result 279 states and 304 transitions. [2018-11-10 07:36:45,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:36:45,737 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 30 [2018-11-10 07:36:45,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:45,737 INFO L225 Difference]: With dead ends: 279 [2018-11-10 07:36:45,737 INFO L226 Difference]: Without dead ends: 279 [2018-11-10 07:36:45,737 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2018-11-10 07:36:45,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-11-10 07:36:45,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 188. [2018-11-10 07:36:45,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-11-10 07:36:45,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 208 transitions. [2018-11-10 07:36:45,740 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 208 transitions. Word has length 30 [2018-11-10 07:36:45,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:45,740 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 208 transitions. [2018-11-10 07:36:45,740 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 07:36:45,740 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 208 transitions. [2018-11-10 07:36:45,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 07:36:45,741 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:45,741 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:45,741 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:45,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:45,742 INFO L82 PathProgramCache]: Analyzing trace with hash 98972454, now seen corresponding path program 1 times [2018-11-10 07:36:45,742 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:45,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,743 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:45,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,743 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:45,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:45,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:45,766 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:45,766 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:45,766 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:45,767 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:36:45,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:36:45,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:36:45,767 INFO L87 Difference]: Start difference. First operand 188 states and 208 transitions. Second operand 4 states. [2018-11-10 07:36:45,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:45,787 INFO L93 Difference]: Finished difference Result 216 states and 240 transitions. [2018-11-10 07:36:45,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:36:45,787 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-11-10 07:36:45,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:45,788 INFO L225 Difference]: With dead ends: 216 [2018-11-10 07:36:45,788 INFO L226 Difference]: Without dead ends: 216 [2018-11-10 07:36:45,788 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:45,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-11-10 07:36:45,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 192. [2018-11-10 07:36:45,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-11-10 07:36:45,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 212 transitions. [2018-11-10 07:36:45,791 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 212 transitions. Word has length 32 [2018-11-10 07:36:45,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:45,791 INFO L481 AbstractCegarLoop]: Abstraction has 192 states and 212 transitions. [2018-11-10 07:36:45,791 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:36:45,791 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 212 transitions. [2018-11-10 07:36:45,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 07:36:45,792 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:45,792 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:45,792 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:45,792 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:45,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1389974428, now seen corresponding path program 1 times [2018-11-10 07:36:45,793 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:45,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:45,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,794 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:45,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:45,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:45,814 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:45,814 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:45,814 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:45,814 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:45,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:45,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:45,815 INFO L87 Difference]: Start difference. First operand 192 states and 212 transitions. Second operand 5 states. [2018-11-10 07:36:45,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:45,946 INFO L93 Difference]: Finished difference Result 197 states and 215 transitions. [2018-11-10 07:36:45,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:45,946 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-11-10 07:36:45,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:45,947 INFO L225 Difference]: With dead ends: 197 [2018-11-10 07:36:45,947 INFO L226 Difference]: Without dead ends: 197 [2018-11-10 07:36:45,947 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:45,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-11-10 07:36:45,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 189. [2018-11-10 07:36:45,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-11-10 07:36:45,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 209 transitions. [2018-11-10 07:36:45,950 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 209 transitions. Word has length 32 [2018-11-10 07:36:45,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:45,950 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 209 transitions. [2018-11-10 07:36:45,950 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:45,950 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 209 transitions. [2018-11-10 07:36:45,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-10 07:36:45,950 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:45,950 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:45,951 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:45,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:45,951 INFO L82 PathProgramCache]: Analyzing trace with hash -139534183, now seen corresponding path program 1 times [2018-11-10 07:36:45,951 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:45,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:45,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:45,952 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:45,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:46,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:46,074 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:46,074 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-10 07:36:46,075 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:46,075 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-10 07:36:46,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-10 07:36:46,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-11-10 07:36:46,075 INFO L87 Difference]: Start difference. First operand 189 states and 209 transitions. Second operand 13 states. [2018-11-10 07:36:46,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:46,923 INFO L93 Difference]: Finished difference Result 423 states and 460 transitions. [2018-11-10 07:36:46,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-10 07:36:46,923 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 33 [2018-11-10 07:36:46,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:46,924 INFO L225 Difference]: With dead ends: 423 [2018-11-10 07:36:46,924 INFO L226 Difference]: Without dead ends: 423 [2018-11-10 07:36:46,924 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=494, Unknown=0, NotChecked=0, Total=600 [2018-11-10 07:36:46,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-11-10 07:36:46,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 197. [2018-11-10 07:36:46,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-10 07:36:46,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 219 transitions. [2018-11-10 07:36:46,926 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 219 transitions. Word has length 33 [2018-11-10 07:36:46,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:46,927 INFO L481 AbstractCegarLoop]: Abstraction has 197 states and 219 transitions. [2018-11-10 07:36:46,927 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-10 07:36:46,927 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 219 transitions. [2018-11-10 07:36:46,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:36:46,927 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:46,927 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:46,927 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:46,927 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:46,927 INFO L82 PathProgramCache]: Analyzing trace with hash 1816094634, now seen corresponding path program 1 times [2018-11-10 07:36:46,927 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:46,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:46,928 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:46,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:46,928 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:46,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:47,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:47,091 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:47,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-10 07:36:47,091 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:47,092 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 07:36:47,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 07:36:47,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:36:47,092 INFO L87 Difference]: Start difference. First operand 197 states and 219 transitions. Second operand 9 states. [2018-11-10 07:36:47,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:47,632 INFO L93 Difference]: Finished difference Result 293 states and 324 transitions. [2018-11-10 07:36:47,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:36:47,632 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-11-10 07:36:47,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:47,633 INFO L225 Difference]: With dead ends: 293 [2018-11-10 07:36:47,633 INFO L226 Difference]: Without dead ends: 293 [2018-11-10 07:36:47,633 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=176, Unknown=0, NotChecked=0, Total=272 [2018-11-10 07:36:47,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-11-10 07:36:47,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 210. [2018-11-10 07:36:47,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-11-10 07:36:47,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 234 transitions. [2018-11-10 07:36:47,636 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 234 transitions. Word has length 34 [2018-11-10 07:36:47,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:47,636 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 234 transitions. [2018-11-10 07:36:47,636 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 07:36:47,636 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 234 transitions. [2018-11-10 07:36:47,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-10 07:36:47,637 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:47,637 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:47,637 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:47,637 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:47,637 INFO L82 PathProgramCache]: Analyzing trace with hash -948359621, now seen corresponding path program 1 times [2018-11-10 07:36:47,637 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:47,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:47,638 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:47,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:47,638 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:47,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:47,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:47,809 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:47,809 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-10 07:36:47,809 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:47,810 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-10 07:36:47,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-10 07:36:47,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:36:47,810 INFO L87 Difference]: Start difference. First operand 210 states and 234 transitions. Second operand 14 states. [2018-11-10 07:36:48,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:48,917 INFO L93 Difference]: Finished difference Result 380 states and 414 transitions. [2018-11-10 07:36:48,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-10 07:36:48,917 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 35 [2018-11-10 07:36:48,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:48,918 INFO L225 Difference]: With dead ends: 380 [2018-11-10 07:36:48,918 INFO L226 Difference]: Without dead ends: 380 [2018-11-10 07:36:48,919 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=204, Invalid=918, Unknown=0, NotChecked=0, Total=1122 [2018-11-10 07:36:48,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2018-11-10 07:36:48,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 207. [2018-11-10 07:36:48,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-11-10 07:36:48,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 231 transitions. [2018-11-10 07:36:48,922 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 231 transitions. Word has length 35 [2018-11-10 07:36:48,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:48,922 INFO L481 AbstractCegarLoop]: Abstraction has 207 states and 231 transitions. [2018-11-10 07:36:48,922 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-10 07:36:48,922 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 231 transitions. [2018-11-10 07:36:48,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:36:48,923 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:48,923 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:48,923 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:48,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:48,923 INFO L82 PathProgramCache]: Analyzing trace with hash -1479627176, now seen corresponding path program 1 times [2018-11-10 07:36:48,923 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:48,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:48,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:48,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:48,924 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:48,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:48,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:48,940 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:48,940 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:48,940 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:48,940 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:36:48,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:36:48,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:36:48,941 INFO L87 Difference]: Start difference. First operand 207 states and 231 transitions. Second operand 4 states. [2018-11-10 07:36:48,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:48,973 INFO L93 Difference]: Finished difference Result 219 states and 243 transitions. [2018-11-10 07:36:48,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:36:48,974 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2018-11-10 07:36:48,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:48,975 INFO L225 Difference]: With dead ends: 219 [2018-11-10 07:36:48,975 INFO L226 Difference]: Without dead ends: 219 [2018-11-10 07:36:48,975 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:48,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-11-10 07:36:48,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 211. [2018-11-10 07:36:48,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-11-10 07:36:48,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 235 transitions. [2018-11-10 07:36:48,978 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 235 transitions. Word has length 36 [2018-11-10 07:36:48,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:48,978 INFO L481 AbstractCegarLoop]: Abstraction has 211 states and 235 transitions. [2018-11-10 07:36:48,978 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:36:48,978 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 235 transitions. [2018-11-10 07:36:48,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:36:48,978 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:48,979 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:48,979 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:48,979 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:48,979 INFO L82 PathProgramCache]: Analyzing trace with hash -1380171639, now seen corresponding path program 1 times [2018-11-10 07:36:48,979 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:48,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:48,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:48,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:48,981 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:48,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:49,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:49,230 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:49,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-11-10 07:36:49,231 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:49,231 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 07:36:49,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 07:36:49,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-11-10 07:36:49,231 INFO L87 Difference]: Start difference. First operand 211 states and 235 transitions. Second operand 16 states. [2018-11-10 07:36:50,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:50,747 INFO L93 Difference]: Finished difference Result 370 states and 406 transitions. [2018-11-10 07:36:50,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-10 07:36:50,748 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-11-10 07:36:50,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:50,748 INFO L225 Difference]: With dead ends: 370 [2018-11-10 07:36:50,748 INFO L226 Difference]: Without dead ends: 370 [2018-11-10 07:36:50,749 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 292 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=292, Invalid=1040, Unknown=0, NotChecked=0, Total=1332 [2018-11-10 07:36:50,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-11-10 07:36:50,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 225. [2018-11-10 07:36:50,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-11-10 07:36:50,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 251 transitions. [2018-11-10 07:36:50,751 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 251 transitions. Word has length 37 [2018-11-10 07:36:50,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:50,751 INFO L481 AbstractCegarLoop]: Abstraction has 225 states and 251 transitions. [2018-11-10 07:36:50,751 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 07:36:50,751 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 251 transitions. [2018-11-10 07:36:50,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:36:50,751 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:50,752 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:50,752 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:50,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:50,752 INFO L82 PathProgramCache]: Analyzing trace with hash -840524835, now seen corresponding path program 1 times [2018-11-10 07:36:50,752 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:50,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:50,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:50,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:50,765 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:50,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:50,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:50,810 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:50,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:36:50,810 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:50,811 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:36:50,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:36:50,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:36:50,811 INFO L87 Difference]: Start difference. First operand 225 states and 251 transitions. Second operand 4 states. [2018-11-10 07:36:50,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:50,945 INFO L93 Difference]: Finished difference Result 232 states and 259 transitions. [2018-11-10 07:36:50,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:36:50,945 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-11-10 07:36:50,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:50,946 INFO L225 Difference]: With dead ends: 232 [2018-11-10 07:36:50,946 INFO L226 Difference]: Without dead ends: 232 [2018-11-10 07:36:50,946 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:50,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-11-10 07:36:50,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 224. [2018-11-10 07:36:50,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-11-10 07:36:50,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 250 transitions. [2018-11-10 07:36:50,949 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 250 transitions. Word has length 37 [2018-11-10 07:36:50,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:50,949 INFO L481 AbstractCegarLoop]: Abstraction has 224 states and 250 transitions. [2018-11-10 07:36:50,949 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:36:50,949 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 250 transitions. [2018-11-10 07:36:50,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:36:50,950 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:50,950 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:50,950 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:50,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:50,951 INFO L82 PathProgramCache]: Analyzing trace with hash 164352356, now seen corresponding path program 1 times [2018-11-10 07:36:50,951 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:50,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:50,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:50,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:50,952 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:50,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:51,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:51,315 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:51,315 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-10 07:36:51,315 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:51,315 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-10 07:36:51,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-10 07:36:51,315 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2018-11-10 07:36:51,315 INFO L87 Difference]: Start difference. First operand 224 states and 250 transitions. Second operand 15 states. [2018-11-10 07:36:52,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:52,476 INFO L93 Difference]: Finished difference Result 362 states and 398 transitions. [2018-11-10 07:36:52,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 07:36:52,477 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 38 [2018-11-10 07:36:52,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:52,477 INFO L225 Difference]: With dead ends: 362 [2018-11-10 07:36:52,477 INFO L226 Difference]: Without dead ends: 362 [2018-11-10 07:36:52,478 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=136, Invalid=514, Unknown=0, NotChecked=0, Total=650 [2018-11-10 07:36:52,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2018-11-10 07:36:52,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 225. [2018-11-10 07:36:52,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-11-10 07:36:52,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 251 transitions. [2018-11-10 07:36:52,480 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 251 transitions. Word has length 38 [2018-11-10 07:36:52,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:52,480 INFO L481 AbstractCegarLoop]: Abstraction has 225 states and 251 transitions. [2018-11-10 07:36:52,480 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-10 07:36:52,480 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 251 transitions. [2018-11-10 07:36:52,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:36:52,480 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:52,480 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:52,480 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:52,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:52,481 INFO L82 PathProgramCache]: Analyzing trace with hash 97256020, now seen corresponding path program 1 times [2018-11-10 07:36:52,481 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:52,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:52,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:52,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:52,482 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:52,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:52,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:52,540 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:52,540 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:36:52,540 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:52,540 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:36:52,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:36:52,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:36:52,540 INFO L87 Difference]: Start difference. First operand 225 states and 251 transitions. Second operand 5 states. [2018-11-10 07:36:52,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:52,770 INFO L93 Difference]: Finished difference Result 280 states and 305 transitions. [2018-11-10 07:36:52,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:36:52,770 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2018-11-10 07:36:52,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:52,771 INFO L225 Difference]: With dead ends: 280 [2018-11-10 07:36:52,771 INFO L226 Difference]: Without dead ends: 280 [2018-11-10 07:36:52,772 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:36:52,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2018-11-10 07:36:52,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 226. [2018-11-10 07:36:52,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-11-10 07:36:52,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 251 transitions. [2018-11-10 07:36:52,775 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 251 transitions. Word has length 38 [2018-11-10 07:36:52,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:52,775 INFO L481 AbstractCegarLoop]: Abstraction has 226 states and 251 transitions. [2018-11-10 07:36:52,775 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:36:52,775 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 251 transitions. [2018-11-10 07:36:52,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:36:52,775 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:52,775 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:52,776 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:52,776 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:52,776 INFO L82 PathProgramCache]: Analyzing trace with hash -286465974, now seen corresponding path program 1 times [2018-11-10 07:36:52,776 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:52,777 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:52,777 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:52,777 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:52,777 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:52,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:52,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:52,986 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:52,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-11-10 07:36:52,987 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:52,987 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 07:36:52,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 07:36:52,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-11-10 07:36:52,987 INFO L87 Difference]: Start difference. First operand 226 states and 251 transitions. Second operand 16 states. [2018-11-10 07:36:54,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:54,453 INFO L93 Difference]: Finished difference Result 457 states and 499 transitions. [2018-11-10 07:36:54,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-11-10 07:36:54,453 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-11-10 07:36:54,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:54,454 INFO L225 Difference]: With dead ends: 457 [2018-11-10 07:36:54,454 INFO L226 Difference]: Without dead ends: 457 [2018-11-10 07:36:54,454 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 666 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=473, Invalid=2283, Unknown=0, NotChecked=0, Total=2756 [2018-11-10 07:36:54,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 457 states. [2018-11-10 07:36:54,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 457 to 225. [2018-11-10 07:36:54,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-11-10 07:36:54,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 250 transitions. [2018-11-10 07:36:54,457 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 250 transitions. Word has length 38 [2018-11-10 07:36:54,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:54,458 INFO L481 AbstractCegarLoop]: Abstraction has 225 states and 250 transitions. [2018-11-10 07:36:54,458 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 07:36:54,458 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 250 transitions. [2018-11-10 07:36:54,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:36:54,458 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:54,458 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:54,458 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:54,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:54,458 INFO L82 PathProgramCache]: Analyzing trace with hash -290510465, now seen corresponding path program 1 times [2018-11-10 07:36:54,458 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:54,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:54,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:54,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:54,459 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:54,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:54,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:54,633 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:36:54,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-11-10 07:36:54,633 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:36:54,633 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-10 07:36:54,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-10 07:36:54,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-11-10 07:36:54,634 INFO L87 Difference]: Start difference. First operand 225 states and 250 transitions. Second operand 17 states. [2018-11-10 07:36:56,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:36:56,265 INFO L93 Difference]: Finished difference Result 685 states and 754 transitions. [2018-11-10 07:36:56,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-10 07:36:56,266 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2018-11-10 07:36:56,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:36:56,267 INFO L225 Difference]: With dead ends: 685 [2018-11-10 07:36:56,267 INFO L226 Difference]: Without dead ends: 685 [2018-11-10 07:36:56,267 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 696 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=379, Invalid=2377, Unknown=0, NotChecked=0, Total=2756 [2018-11-10 07:36:56,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 685 states. [2018-11-10 07:36:56,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 685 to 224. [2018-11-10 07:36:56,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-11-10 07:36:56,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 249 transitions. [2018-11-10 07:36:56,270 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 249 transitions. Word has length 39 [2018-11-10 07:36:56,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:36:56,270 INFO L481 AbstractCegarLoop]: Abstraction has 224 states and 249 transitions. [2018-11-10 07:36:56,270 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-10 07:36:56,270 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 249 transitions. [2018-11-10 07:36:56,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:36:56,270 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:36:56,271 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:36:56,271 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:36:56,271 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:56,271 INFO L82 PathProgramCache]: Analyzing trace with hash 1526484793, now seen corresponding path program 1 times [2018-11-10 07:36:56,271 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:36:56,271 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:56,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:56,272 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:36:56,272 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:36:56,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:56,439 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:56,440 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:36:56,440 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:36:56,441 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-11-10 07:36:56,442 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [34], [37], [39], [41], [43], [45], [57], [61], [63], [68], [70], [71], [72], [74], [76], [78], [80], [82], [84], [86], [88], [109], [112], [114], [116], [118], [120], [255], [256], [257] [2018-11-10 07:36:56,487 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:36:56,487 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:36:57,419 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:36:57,420 INFO L272 AbstractInterpreter]: Visited 37 different actions 63 times. Merged at 20 different actions 26 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 56 variables. [2018-11-10 07:36:57,436 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:36:57,437 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:36:57,437 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:36:57,437 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:36:57,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:36:57,445 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:36:57,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:36:57,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:36:57,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:36:57,533 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,540 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,540 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 07:36:57,577 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:36:57,578 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:36:57,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 07:36:57,579 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,588 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-11-10 07:36:57,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:36:57,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:36:57,624 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,628 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,643 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,643 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-11-10 07:36:57,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-11-10 07:36:57,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:36:57,687 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,692 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,697 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:8 [2018-11-10 07:36:57,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-11-10 07:36:57,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-11-10 07:36:57,720 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,722 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,726 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:7 [2018-11-10 07:36:57,836 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:36:57,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 07:36:57,839 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,852 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:36:57,854 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:36:57,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 07:36:57,855 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:36:57,864 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:30, output treesize:14 [2018-11-10 07:36:57,896 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:36:57,896 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:37:02,024 WARN L179 SmtUtils]: Spent 4.07 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-10 07:37:02,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-10 07:37:02,057 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:02,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-11-10 07:37:02,094 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:02,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2018-11-10 07:37:02,099 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:02,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-11-10 07:37:02,117 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:44, output treesize:47 [2018-11-10 07:37:02,220 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:02,221 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:02,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-11-10 07:37:02,221 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:02,231 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:02,232 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:02,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:37:02,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:02,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 07:37:02,240 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-11-10 07:37:02,278 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:02,304 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-10 07:37:02,304 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [12, 13] total 28 [2018-11-10 07:37:02,304 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:37:02,305 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:37:02,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:37:02,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=724, Unknown=0, NotChecked=0, Total=812 [2018-11-10 07:37:02,305 INFO L87 Difference]: Start difference. First operand 224 states and 249 transitions. Second operand 8 states. [2018-11-10 07:37:04,091 WARN L179 SmtUtils]: Spent 1.38 s on a formula simplification. DAG size of input: 52 DAG size of output: 49 [2018-11-10 07:37:05,473 WARN L179 SmtUtils]: Spent 1.26 s on a formula simplification. DAG size of input: 46 DAG size of output: 43 [2018-11-10 07:37:05,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:05,667 INFO L93 Difference]: Finished difference Result 227 states and 253 transitions. [2018-11-10 07:37:05,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:37:05,667 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2018-11-10 07:37:05,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:05,668 INFO L225 Difference]: With dead ends: 227 [2018-11-10 07:37:05,668 INFO L226 Difference]: Without dead ends: 227 [2018-11-10 07:37:05,668 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=154, Invalid=1178, Unknown=0, NotChecked=0, Total=1332 [2018-11-10 07:37:05,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-11-10 07:37:05,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 223. [2018-11-10 07:37:05,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-11-10 07:37:05,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 248 transitions. [2018-11-10 07:37:05,673 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 248 transitions. Word has length 41 [2018-11-10 07:37:05,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:05,673 INFO L481 AbstractCegarLoop]: Abstraction has 223 states and 248 transitions. [2018-11-10 07:37:05,673 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:37:05,673 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 248 transitions. [2018-11-10 07:37:05,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:37:05,673 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:05,674 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:05,674 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:05,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:05,674 INFO L82 PathProgramCache]: Analyzing trace with hash 1625961052, now seen corresponding path program 1 times [2018-11-10 07:37:05,674 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:37:05,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:37:05,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:05,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:37:05,676 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:37:05,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:05,906 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:05,907 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:37:05,907 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:37:05,907 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-11-10 07:37:05,907 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [34], [37], [39], [41], [43], [45], [57], [61], [63], [66], [135], [139], [145], [149], [150], [151], [153], [162], [164], [177], [179], [184], [186], [188], [194], [198], [204], [206], [208], [255], [256], [257] [2018-11-10 07:37:05,909 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:37:05,909 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:37:06,424 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:37:06,424 INFO L272 AbstractInterpreter]: Visited 39 different actions 59 times. Merged at 18 different actions 20 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 66 variables. [2018-11-10 07:37:06,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:06,425 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:37:06,425 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:37:06,426 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:37:06,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:06,432 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:37:06,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:06,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:06,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:06,463 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,468 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,469 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-11-10 07:37:06,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:06,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:06,496 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,498 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:06,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:06,513 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,517 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,525 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,525 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:43, output treesize:32 [2018-11-10 07:37:06,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-11-10 07:37:06,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 18 [2018-11-10 07:37:06,550 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,554 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-11-10 07:37:06,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 18 [2018-11-10 07:37:06,566 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,571 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:06,577 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:45, output treesize:37 [2018-11-10 07:37:06,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:37:06,613 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:06,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:37:06,615 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,618 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:37:06,629 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:06,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:37:06,631 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,635 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,642 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,642 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:49, output treesize:23 [2018-11-10 07:37:06,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-10 07:37:06,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-11-10 07:37:06,761 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,765 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-10 07:37:06,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-11-10 07:37:06,780 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,783 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:06,789 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:06,789 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:12 [2018-11-10 07:37:06,824 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:06,825 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:37:07,364 WARN L179 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 60 [2018-11-10 07:37:07,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-11-10 07:37:07,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:07,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 43 [2018-11-10 07:37:07,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-11-10 07:37:07,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-11-10 07:37:07,475 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:07,481 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:07,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-11-10 07:37:07,493 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 40 [2018-11-10 07:37:07,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2018-11-10 07:37:07,522 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:07,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 28 [2018-11-10 07:37:07,543 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:37:07,565 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-11-10 07:37:07,590 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 4 dim-0 vars, and 5 xjuncts. [2018-11-10 07:37:07,616 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 5 xjuncts. [2018-11-10 07:37:07,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-11-10 07:37:07,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:07,657 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 30 [2018-11-10 07:37:07,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 30 [2018-11-10 07:37:07,695 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:07,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 25 [2018-11-10 07:37:07,707 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-11-10 07:37:07,735 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:07,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-10 07:37:07,736 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:07,759 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-11-10 07:37:07,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 28 [2018-11-10 07:37:07,790 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:07,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2018-11-10 07:37:07,792 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:07,797 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:07,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-11-10 07:37:07,818 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,838 INFO L267 ElimStorePlain]: Start of recursive call 13: 3 dim-1 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-11-10 07:37:07,862 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-11-10 07:37:07,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-11-10 07:37:07,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:07,931 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-11-10 07:37:07,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-11-10 07:37:07,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-10 07:37:07,951 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,955 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 28 [2018-11-10 07:37:07,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-11-10 07:37:07,975 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2018-11-10 07:37:07,986 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:07,992 INFO L267 ElimStorePlain]: Start of recursive call 25: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:07,995 INFO L267 ElimStorePlain]: Start of recursive call 22: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,000 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-11-10 07:37:08,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:08,004 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-11-10 07:37:08,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 28 [2018-11-10 07:37:08,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-11-10 07:37:08,063 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-11-10 07:37:08,087 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 3 xjuncts. [2018-11-10 07:37:08,099 INFO L267 ElimStorePlain]: Start of recursive call 31: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 07:37:08,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-11-10 07:37:08,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-10 07:37:08,120 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,124 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 7 [2018-11-10 07:37:08,135 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,147 INFO L267 ElimStorePlain]: Start of recursive call 30: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:37:08,159 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:37:08,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-11-10 07:37:08,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:08,165 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-11-10 07:37:08,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-11-10 07:37:08,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-10 07:37:08,187 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,193 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 7 [2018-11-10 07:37:08,202 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-11-10 07:37:08,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-10 07:37:08,221 INFO L267 ElimStorePlain]: Start of recursive call 44: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,224 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,227 INFO L267 ElimStorePlain]: Start of recursive call 39: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,232 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-11-10 07:37:08,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:08,237 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-11-10 07:37:08,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 26 [2018-11-10 07:37:08,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-10 07:37:08,261 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,265 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,269 INFO L267 ElimStorePlain]: Start of recursive call 47: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,275 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-11-10 07:37:08,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:08,280 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-11-10 07:37:08,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:37:08,295 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-11-10 07:37:08,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-10 07:37:08,311 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,314 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 26 [2018-11-10 07:37:08,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2018-11-10 07:37:08,336 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:08,347 INFO L267 ElimStorePlain]: Start of recursive call 56: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 07:37:08,357 INFO L267 ElimStorePlain]: Start of recursive call 52: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:37:08,370 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:37:08,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-11-10 07:37:08,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:08,389 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-11-10 07:37:08,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 17 [2018-11-10 07:37:08,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-11-10 07:37:08,416 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,418 INFO L267 ElimStorePlain]: Start of recursive call 61: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:37:08,424 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,425 INFO L267 ElimStorePlain]: Start of recursive call 60: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,430 INFO L267 ElimStorePlain]: Start of recursive call 58: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:08,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 13 xjuncts. [2018-11-10 07:37:08,523 INFO L202 ElimStorePlain]: Needed 63 recursive calls to eliminate 5 variables, input treesize:107, output treesize:194 [2018-11-10 07:37:08,646 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:08,669 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:37:08,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12, 14] total 31 [2018-11-10 07:37:08,669 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:37:08,669 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-10 07:37:08,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-10 07:37:08,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=813, Unknown=0, NotChecked=0, Total=930 [2018-11-10 07:37:08,670 INFO L87 Difference]: Start difference. First operand 223 states and 248 transitions. Second operand 18 states. [2018-11-10 07:37:09,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:09,728 INFO L93 Difference]: Finished difference Result 271 states and 295 transitions. [2018-11-10 07:37:09,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-10 07:37:09,728 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 42 [2018-11-10 07:37:09,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:09,729 INFO L225 Difference]: With dead ends: 271 [2018-11-10 07:37:09,729 INFO L226 Difference]: Without dead ends: 271 [2018-11-10 07:37:09,730 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 390 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=365, Invalid=1705, Unknown=0, NotChecked=0, Total=2070 [2018-11-10 07:37:09,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2018-11-10 07:37:09,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 254. [2018-11-10 07:37:09,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-11-10 07:37:09,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 283 transitions. [2018-11-10 07:37:09,734 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 283 transitions. Word has length 42 [2018-11-10 07:37:09,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:09,734 INFO L481 AbstractCegarLoop]: Abstraction has 254 states and 283 transitions. [2018-11-10 07:37:09,734 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-10 07:37:09,734 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 283 transitions. [2018-11-10 07:37:09,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 07:37:09,735 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:09,735 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:09,735 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:09,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:09,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1926925829, now seen corresponding path program 1 times [2018-11-10 07:37:09,736 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:37:09,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:37:09,736 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:09,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:37:09,737 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:37:09,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:09,866 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:09,866 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:37:09,866 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:37:09,866 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 44 with the following transitions: [2018-11-10 07:37:09,866 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [34], [37], [39], [41], [43], [45], [57], [61], [63], [68], [70], [72], [74], [75], [76], [78], [80], [82], [84], [86], [88], [109], [112], [114], [116], [118], [120], [255], [256], [257] [2018-11-10 07:37:09,872 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:37:09,873 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:37:10,456 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:37:10,456 INFO L272 AbstractInterpreter]: Visited 37 different actions 62 times. Merged at 20 different actions 25 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 56 variables. [2018-11-10 07:37:10,459 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:10,459 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:37:10,459 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:37:10,459 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:37:10,466 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:10,466 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:37:10,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:10,496 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:10,541 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:10,541 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:37:10,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 10 [2018-11-10 07:37:10,544 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:10,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 20 [2018-11-10 07:37:10,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:10,555 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:37:10,555 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:14 [2018-11-10 07:37:10,582 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:10,598 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-10 07:37:10,598 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [13] total 19 [2018-11-10 07:37:10,599 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:37:10,599 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:37:10,599 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:37:10,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=323, Unknown=0, NotChecked=0, Total=380 [2018-11-10 07:37:10,599 INFO L87 Difference]: Start difference. First operand 254 states and 283 transitions. Second operand 6 states. [2018-11-10 07:37:10,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:10,763 INFO L93 Difference]: Finished difference Result 257 states and 287 transitions. [2018-11-10 07:37:10,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 07:37:10,764 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-11-10 07:37:10,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:10,764 INFO L225 Difference]: With dead ends: 257 [2018-11-10 07:37:10,764 INFO L226 Difference]: Without dead ends: 257 [2018-11-10 07:37:10,765 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=89, Invalid=463, Unknown=0, NotChecked=0, Total=552 [2018-11-10 07:37:10,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-11-10 07:37:10,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 253. [2018-11-10 07:37:10,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253 states. [2018-11-10 07:37:10,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253 states to 253 states and 282 transitions. [2018-11-10 07:37:10,768 INFO L78 Accepts]: Start accepts. Automaton has 253 states and 282 transitions. Word has length 43 [2018-11-10 07:37:10,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:10,768 INFO L481 AbstractCegarLoop]: Abstraction has 253 states and 282 transitions. [2018-11-10 07:37:10,768 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:37:10,768 INFO L276 IsEmpty]: Start isEmpty. Operand 253 states and 282 transitions. [2018-11-10 07:37:10,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:37:10,769 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:10,769 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:10,769 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:10,770 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:10,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1269546043, now seen corresponding path program 1 times [2018-11-10 07:37:10,770 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:37:10,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:37:10,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:10,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:37:10,770 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:37:10,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:11,034 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:11,035 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:37:11,035 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:37:11,035 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-11-10 07:37:11,035 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [16], [18], [20], [22], [24], [26], [28], [30], [32], [57], [61], [63], [66], [135], [139], [145], [149], [150], [151], [153], [162], [164], [177], [179], [184], [186], [188], [194], [198], [204], [206], [208], [255], [256], [257] [2018-11-10 07:37:11,036 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:37:11,036 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:37:11,485 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:37:11,485 INFO L272 AbstractInterpreter]: Visited 42 different actions 71 times. Merged at 18 different actions 29 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 69 variables. [2018-11-10 07:37:11,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:11,487 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:37:11,487 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:37:11,487 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:37:11,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:11,495 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:37:11,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:11,524 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:11,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:11,537 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,561 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,561 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-11-10 07:37:11,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:11,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 9 [2018-11-10 07:37:11,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:11,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 9 [2018-11-10 07:37:11,598 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,601 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,610 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:36, output treesize:32 [2018-11-10 07:37:11,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:37:11,639 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:37:11,642 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,646 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:37:11,659 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:37:11,665 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,675 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,693 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:46, output treesize:20 [2018-11-10 07:37:11,722 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,723 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 07:37:11,725 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,732 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:33, output treesize:27 [2018-11-10 07:37:11,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:37:11,758 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-11-10 07:37:11,760 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,765 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:37:11,780 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-11-10 07:37:11,781 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,786 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,795 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,795 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:53, output treesize:37 [2018-11-10 07:37:11,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-11-10 07:37:11,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:37:11,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-11-10 07:37:11,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:37:11,872 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,892 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,907 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:71, output treesize:25 [2018-11-10 07:37:11,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:37:11,973 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:11,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-11-10 07:37:11,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,978 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:37:11,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:37:11,983 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,985 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:11,988 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:7 [2018-11-10 07:37:12,000 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:12,000 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:37:12,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 61 [2018-11-10 07:37:12,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:37:12,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:12,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 7 case distinctions, treesize of input 39 treesize of output 74 [2018-11-10 07:37:12,640 WARN L179 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 153 [2018-11-10 07:37:12,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-11-10 07:37:12,646 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:12,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-11-10 07:37:12,649 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:12,657 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:12,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 46 [2018-11-10 07:37:12,836 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:12,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-11-10 07:37:12,838 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:12,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-11-10 07:37:12,851 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:12,859 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 07:37:13,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 47 [2018-11-10 07:37:13,045 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 48 [2018-11-10 07:37:13,047 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:13,071 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-11-10 07:37:13,080 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:13,106 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:37:13,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 39 treesize of output 63 [2018-11-10 07:37:13,323 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 59 [2018-11-10 07:37:13,325 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:13,383 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 66 [2018-11-10 07:37:13,394 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:13,461 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 61 [2018-11-10 07:37:13,470 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 4 xjuncts. [2018-11-10 07:37:13,552 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 68 [2018-11-10 07:37:13,561 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:13,650 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 53 [2018-11-10 07:37:13,652 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:13,760 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 45 [2018-11-10 07:37:13,761 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:13,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 52 [2018-11-10 07:37:13,768 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:13,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 48 [2018-11-10 07:37:13,883 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-11-10 07:37:13,961 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:13,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 59 [2018-11-10 07:37:13,970 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 4 xjuncts. [2018-11-10 07:37:13,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 54 treesize of output 64 [2018-11-10 07:37:13,983 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 8 xjuncts. [2018-11-10 07:37:14,075 INFO L267 ElimStorePlain]: Start of recursive call 13: 8 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-11-10 07:37:14,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 48 [2018-11-10 07:37:14,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 37 [2018-11-10 07:37:14,414 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:14,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2018-11-10 07:37:14,416 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:14,422 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:14,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 13 [2018-11-10 07:37:14,452 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:14,480 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:37:14,682 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:37:14,682 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_83 term size 32 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:216) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-10 07:37:14,685 INFO L168 Benchmark]: Toolchain (without parser) took 37788.58 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 723.5 MB). Free memory was 957.5 MB in the beginning and 1.4 GB in the end (delta: -449.4 MB). Peak memory consumption was 804.1 MB. Max. memory is 11.5 GB. [2018-11-10 07:37:14,685 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:37:14,685 INFO L168 Benchmark]: CACSL2BoogieTranslator took 290.94 ms. Allocated memory is still 1.0 GB. Free memory was 957.5 MB in the beginning and 933.4 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. [2018-11-10 07:37:14,686 INFO L168 Benchmark]: Boogie Procedure Inliner took 87.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 153.6 MB). Free memory was 933.4 MB in the beginning and 1.1 GB in the end (delta: -214.2 MB). Peak memory consumption was 15.8 MB. Max. memory is 11.5 GB. [2018-11-10 07:37:14,686 INFO L168 Benchmark]: Boogie Preprocessor took 36.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-11-10 07:37:14,686 INFO L168 Benchmark]: RCFGBuilder took 529.29 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. [2018-11-10 07:37:14,686 INFO L168 Benchmark]: TraceAbstraction took 36842.12 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 569.9 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -322.7 MB). Peak memory consumption was 777.2 MB. Max. memory is 11.5 GB. [2018-11-10 07:37:14,687 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 290.94 ms. Allocated memory is still 1.0 GB. Free memory was 957.5 MB in the beginning and 933.4 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 87.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 153.6 MB). Free memory was 933.4 MB in the beginning and 1.1 GB in the end (delta: -214.2 MB). Peak memory consumption was 15.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 36.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 529.29 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 36842.12 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 569.9 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -322.7 MB). Peak memory consumption was 777.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_83 term size 32 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_83 term size 32: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-11-10 07:37:16,170 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 07:37:16,171 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 07:37:16,179 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 07:37:16,179 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 07:37:16,179 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 07:37:16,180 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 07:37:16,181 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 07:37:16,182 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 07:37:16,183 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 07:37:16,184 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 07:37:16,184 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 07:37:16,185 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 07:37:16,185 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 07:37:16,186 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 07:37:16,187 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 07:37:16,187 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 07:37:16,189 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 07:37:16,190 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 07:37:16,192 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 07:37:16,193 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 07:37:16,194 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 07:37:16,195 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 07:37:16,195 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 07:37:16,196 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 07:37:16,197 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 07:37:16,198 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 07:37:16,198 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 07:37:16,199 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 07:37:16,199 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 07:37:16,200 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 07:37:16,201 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 07:37:16,201 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 07:37:16,201 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 07:37:16,202 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 07:37:16,202 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 07:37:16,202 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-11-10 07:37:16,213 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 07:37:16,213 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 07:37:16,214 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 07:37:16,214 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-10 07:37:16,214 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-10 07:37:16,214 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-10 07:37:16,214 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-10 07:37:16,214 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-10 07:37:16,215 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 07:37:16,215 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 07:37:16,215 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 07:37:16,215 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 07:37:16,215 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-10 07:37:16,215 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 07:37:16,215 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 07:37:16,215 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 07:37:16,216 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-10 07:37:16,216 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-10 07:37:16,216 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-10 07:37:16,217 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 07:37:16,217 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-10 07:37:16,217 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-10 07:37:16,217 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 07:37:16,218 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 07:37:16,218 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 07:37:16,218 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-10 07:37:16,219 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 497bfe83d1a123e7e085e38ee3eed2e663cc023e [2018-11-10 07:37:16,249 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 07:37:16,258 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 07:37:16,260 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 07:37:16,261 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 07:37:16,261 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 07:37:16,262 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-11-10 07:37:16,298 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/a83ec8b25/10d5da2afd7247f8be2085bf4be3c5ff/FLAG1e5dd12e7 [2018-11-10 07:37:16,740 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 07:37:16,741 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-11-10 07:37:16,749 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/a83ec8b25/10d5da2afd7247f8be2085bf4be3c5ff/FLAG1e5dd12e7 [2018-11-10 07:37:16,757 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/data/a83ec8b25/10d5da2afd7247f8be2085bf4be3c5ff [2018-11-10 07:37:16,759 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 07:37:16,760 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 07:37:16,760 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 07:37:16,760 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 07:37:16,763 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 07:37:16,764 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:37:16" (1/1) ... [2018-11-10 07:37:16,766 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1b266283 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:16, skipping insertion in model container [2018-11-10 07:37:16,766 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:37:16" (1/1) ... [2018-11-10 07:37:16,775 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 07:37:16,806 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 07:37:17,030 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:37:17,040 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 07:37:17,079 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:37:17,115 INFO L193 MainTranslator]: Completed translation [2018-11-10 07:37:17,115 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17 WrapperNode [2018-11-10 07:37:17,115 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 07:37:17,116 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 07:37:17,116 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 07:37:17,116 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 07:37:17,121 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,131 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,201 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 07:37:17,201 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 07:37:17,201 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 07:37:17,201 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 07:37:17,208 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,208 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,212 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,212 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,222 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,227 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,230 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... [2018-11-10 07:37:17,233 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 07:37:17,234 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 07:37:17,234 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 07:37:17,234 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 07:37:17,235 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 07:37:17,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 07:37:17,283 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 07:37:17,283 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 07:37:17,284 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 07:37:17,284 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 07:37:17,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 07:37:18,060 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 07:37:18,061 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:37:18 BoogieIcfgContainer [2018-11-10 07:37:18,061 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 07:37:18,062 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 07:37:18,062 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 07:37:18,065 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 07:37:18,065 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 07:37:16" (1/3) ... [2018-11-10 07:37:18,066 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18837305 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 07:37:18, skipping insertion in model container [2018-11-10 07:37:18,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:37:17" (2/3) ... [2018-11-10 07:37:18,066 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18837305 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 07:37:18, skipping insertion in model container [2018-11-10 07:37:18,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:37:18" (3/3) ... [2018-11-10 07:37:18,068 INFO L112 eAbstractionObserver]: Analyzing ICFG dll-optional_true-unreach-call_true-valid-memsafety.i [2018-11-10 07:37:18,074 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 07:37:18,080 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 69 error locations. [2018-11-10 07:37:18,090 INFO L257 AbstractCegarLoop]: Starting to check reachability of 69 error locations. [2018-11-10 07:37:18,106 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-11-10 07:37:18,107 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 07:37:18,107 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-10 07:37:18,107 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 07:37:18,107 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 07:37:18,107 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 07:37:18,107 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 07:37:18,107 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 07:37:18,108 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 07:37:18,122 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states. [2018-11-10 07:37:18,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-11-10 07:37:18,129 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:18,130 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:18,133 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:18,137 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:18,138 INFO L82 PathProgramCache]: Analyzing trace with hash -455754976, now seen corresponding path program 1 times [2018-11-10 07:37:18,141 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:18,141 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:18,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:18,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:18,193 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:18,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:18,223 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:18,227 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:18,227 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 07:37:18,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:18,242 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:18,244 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:18,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 07:37:18,247 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:37:18,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:37:18,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:37:18,257 INFO L87 Difference]: Start difference. First operand 171 states. Second operand 3 states. [2018-11-10 07:37:18,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:18,839 INFO L93 Difference]: Finished difference Result 197 states and 209 transitions. [2018-11-10 07:37:18,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:37:18,840 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-11-10 07:37:18,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:18,849 INFO L225 Difference]: With dead ends: 197 [2018-11-10 07:37:18,849 INFO L226 Difference]: Without dead ends: 193 [2018-11-10 07:37:18,850 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:37:18,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-11-10 07:37:18,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 167. [2018-11-10 07:37:18,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-11-10 07:37:18,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 177 transitions. [2018-11-10 07:37:18,884 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 177 transitions. Word has length 7 [2018-11-10 07:37:18,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:18,885 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 177 transitions. [2018-11-10 07:37:18,885 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:37:18,885 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 177 transitions. [2018-11-10 07:37:18,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-11-10 07:37:18,885 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:18,886 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:18,887 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:18,887 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:18,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1243502329, now seen corresponding path program 1 times [2018-11-10 07:37:18,888 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:18,888 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:18,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:18,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:18,935 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:18,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:18,945 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:18,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:18,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-11-10 07:37:18,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:18,967 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:18,968 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:18,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 07:37:18,970 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:37:18,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:37:18,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:37:18,970 INFO L87 Difference]: Start difference. First operand 167 states and 177 transitions. Second operand 3 states. [2018-11-10 07:37:19,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:19,348 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-11-10 07:37:19,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:37:19,350 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-11-10 07:37:19,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:19,351 INFO L225 Difference]: With dead ends: 166 [2018-11-10 07:37:19,351 INFO L226 Difference]: Without dead ends: 166 [2018-11-10 07:37:19,351 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:37:19,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-11-10 07:37:19,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-11-10 07:37:19,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-10 07:37:19,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions. [2018-11-10 07:37:19,360 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 8 [2018-11-10 07:37:19,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:19,360 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions. [2018-11-10 07:37:19,360 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:37:19,361 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions. [2018-11-10 07:37:19,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-11-10 07:37:19,361 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:19,361 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:19,363 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:19,363 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:19,363 INFO L82 PathProgramCache]: Analyzing trace with hash 106133506, now seen corresponding path program 1 times [2018-11-10 07:37:19,364 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:19,364 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:19,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:19,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:19,403 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:19,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:19,410 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:19,418 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:19,418 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:19,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:19,436 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:19,440 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:19,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:19,440 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:19,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:19,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:19,441 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 5 states. [2018-11-10 07:37:20,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:20,024 INFO L93 Difference]: Finished difference Result 233 states and 249 transitions. [2018-11-10 07:37:20,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:37:20,025 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-11-10 07:37:20,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:20,026 INFO L225 Difference]: With dead ends: 233 [2018-11-10 07:37:20,026 INFO L226 Difference]: Without dead ends: 233 [2018-11-10 07:37:20,026 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:37:20,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-11-10 07:37:20,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 162. [2018-11-10 07:37:20,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-11-10 07:37:20,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-11-10 07:37:20,032 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 9 [2018-11-10 07:37:20,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:20,033 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-11-10 07:37:20,033 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:20,033 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-11-10 07:37:20,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-10 07:37:20,033 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:20,034 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:20,035 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:20,035 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:20,035 INFO L82 PathProgramCache]: Analyzing trace with hash -1004828567, now seen corresponding path program 1 times [2018-11-10 07:37:20,035 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:20,035 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:20,057 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:20,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:20,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:20,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:20,088 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:20,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:20,093 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:20,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:20,115 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:20,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:20,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:37:20,116 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:37:20,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:37:20,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:37:20,116 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 4 states. [2018-11-10 07:37:20,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:20,622 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-11-10 07:37:20,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 07:37:20,623 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-11-10 07:37:20,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:20,624 INFO L225 Difference]: With dead ends: 166 [2018-11-10 07:37:20,624 INFO L226 Difference]: Without dead ends: 166 [2018-11-10 07:37:20,624 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:20,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-11-10 07:37:20,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 161. [2018-11-10 07:37:20,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-10 07:37:20,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 171 transitions. [2018-11-10 07:37:20,630 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 171 transitions. Word has length 10 [2018-11-10 07:37:20,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:20,630 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 171 transitions. [2018-11-10 07:37:20,630 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:37:20,630 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 171 transitions. [2018-11-10 07:37:20,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-11-10 07:37:20,631 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:20,631 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:20,632 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:20,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:20,632 INFO L82 PathProgramCache]: Analyzing trace with hash 727390187, now seen corresponding path program 1 times [2018-11-10 07:37:20,633 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:20,633 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:20,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:20,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:20,678 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:20,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:20,685 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:20,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:20,691 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:20,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:20,710 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:20,714 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:20,714 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:20,715 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:20,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:20,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:20,715 INFO L87 Difference]: Start difference. First operand 161 states and 171 transitions. Second operand 5 states. [2018-11-10 07:37:21,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:21,348 INFO L93 Difference]: Finished difference Result 229 states and 245 transitions. [2018-11-10 07:37:21,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:37:21,348 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2018-11-10 07:37:21,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:21,349 INFO L225 Difference]: With dead ends: 229 [2018-11-10 07:37:21,349 INFO L226 Difference]: Without dead ends: 229 [2018-11-10 07:37:21,349 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:21,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-11-10 07:37:21,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 158. [2018-11-10 07:37:21,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-11-10 07:37:21,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 168 transitions. [2018-11-10 07:37:21,354 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 168 transitions. Word has length 12 [2018-11-10 07:37:21,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:21,354 INFO L481 AbstractCegarLoop]: Abstraction has 158 states and 168 transitions. [2018-11-10 07:37:21,354 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:21,354 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 168 transitions. [2018-11-10 07:37:21,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-10 07:37:21,355 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:21,355 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:21,356 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:21,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:21,356 INFO L82 PathProgramCache]: Analyzing trace with hash 1074259367, now seen corresponding path program 1 times [2018-11-10 07:37:21,356 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:21,356 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:21,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:21,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:21,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:21,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:21,416 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:21,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:21,421 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:21,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:21,433 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:21,434 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:21,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:37:21,434 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:37:21,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:37:21,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:37:21,435 INFO L87 Difference]: Start difference. First operand 158 states and 168 transitions. Second operand 4 states. [2018-11-10 07:37:21,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:21,969 INFO L93 Difference]: Finished difference Result 252 states and 270 transitions. [2018-11-10 07:37:21,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:37:21,970 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-11-10 07:37:21,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:21,971 INFO L225 Difference]: With dead ends: 252 [2018-11-10 07:37:21,971 INFO L226 Difference]: Without dead ends: 252 [2018-11-10 07:37:21,971 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:21,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-11-10 07:37:21,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 155. [2018-11-10 07:37:21,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-11-10 07:37:21,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 165 transitions. [2018-11-10 07:37:21,975 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 165 transitions. Word has length 13 [2018-11-10 07:37:21,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:21,975 INFO L481 AbstractCegarLoop]: Abstraction has 155 states and 165 transitions. [2018-11-10 07:37:21,975 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:37:21,975 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 165 transitions. [2018-11-10 07:37:21,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-10 07:37:21,976 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:21,976 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:21,976 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:21,977 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:21,977 INFO L82 PathProgramCache]: Analyzing trace with hash 1571102313, now seen corresponding path program 1 times [2018-11-10 07:37:21,977 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:21,977 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:21,991 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:22,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:22,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:22,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:22,065 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:22,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:22,072 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:22,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:22,077 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-10 07:37:22,095 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:22,096 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:22,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:37:22,097 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:22,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 07:37:22,111 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:22,121 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:22,121 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:34, output treesize:16 [2018-11-10 07:37:22,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:22,130 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:22,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:22,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:37:22,132 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:37:22,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:37:22,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:37:22,133 INFO L87 Difference]: Start difference. First operand 155 states and 165 transitions. Second operand 4 states. [2018-11-10 07:37:22,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:22,727 INFO L93 Difference]: Finished difference Result 228 states and 244 transitions. [2018-11-10 07:37:22,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:37:22,728 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-11-10 07:37:22,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:22,729 INFO L225 Difference]: With dead ends: 228 [2018-11-10 07:37:22,729 INFO L226 Difference]: Without dead ends: 228 [2018-11-10 07:37:22,729 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:22,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-11-10 07:37:22,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 152. [2018-11-10 07:37:22,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-11-10 07:37:22,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 162 transitions. [2018-11-10 07:37:22,731 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 162 transitions. Word has length 15 [2018-11-10 07:37:22,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:22,731 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 162 transitions. [2018-11-10 07:37:22,731 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:37:22,732 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-11-10 07:37:22,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-10 07:37:22,732 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:22,732 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:22,733 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:22,733 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:22,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1459531503, now seen corresponding path program 1 times [2018-11-10 07:37:22,733 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:22,733 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:22,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:22,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:22,798 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:22,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:22,816 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:22,817 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:22,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:22,818 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:22,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:22,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:22,818 INFO L87 Difference]: Start difference. First operand 152 states and 162 transitions. Second operand 5 states. [2018-11-10 07:37:23,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:23,625 INFO L93 Difference]: Finished difference Result 230 states and 249 transitions. [2018-11-10 07:37:23,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:37:23,626 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-10 07:37:23,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:23,627 INFO L225 Difference]: With dead ends: 230 [2018-11-10 07:37:23,627 INFO L226 Difference]: Without dead ends: 230 [2018-11-10 07:37:23,628 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:23,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-10 07:37:23,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 151. [2018-11-10 07:37:23,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-11-10 07:37:23,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-11-10 07:37:23,632 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 16 [2018-11-10 07:37:23,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:23,633 INFO L481 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-11-10 07:37:23,633 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:23,633 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-11-10 07:37:23,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-10 07:37:23,634 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:23,634 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:23,635 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:23,635 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:23,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1999163605, now seen corresponding path program 1 times [2018-11-10 07:37:23,636 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:23,636 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:23,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:23,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:23,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:23,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:23,766 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:23,768 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:23,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:23,768 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:23,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:23,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:23,769 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 5 states. [2018-11-10 07:37:24,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:24,403 INFO L93 Difference]: Finished difference Result 223 states and 243 transitions. [2018-11-10 07:37:24,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:37:24,405 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-11-10 07:37:24,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:24,405 INFO L225 Difference]: With dead ends: 223 [2018-11-10 07:37:24,405 INFO L226 Difference]: Without dead ends: 223 [2018-11-10 07:37:24,405 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:24,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-11-10 07:37:24,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 150. [2018-11-10 07:37:24,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-11-10 07:37:24,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 160 transitions. [2018-11-10 07:37:24,408 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 160 transitions. Word has length 17 [2018-11-10 07:37:24,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:24,408 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 160 transitions. [2018-11-10 07:37:24,408 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:24,408 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 160 transitions. [2018-11-10 07:37:24,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-10 07:37:24,409 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:24,409 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:24,409 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:24,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:24,410 INFO L82 PathProgramCache]: Analyzing trace with hash -1844529551, now seen corresponding path program 1 times [2018-11-10 07:37:24,410 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:24,410 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:24,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:24,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:24,483 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:24,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:24,490 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,509 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-11-10 07:37:24,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:24,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:24,529 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,532 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,536 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:9 [2018-11-10 07:37:24,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:37:24,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:37:24,547 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,548 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:24,549 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:5 [2018-11-10 07:37:24,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:24,557 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:24,558 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:24,558 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:24,558 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:24,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:24,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:24,559 INFO L87 Difference]: Start difference. First operand 150 states and 160 transitions. Second operand 5 states. [2018-11-10 07:37:25,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:25,307 INFO L93 Difference]: Finished difference Result 175 states and 186 transitions. [2018-11-10 07:37:25,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:37:25,307 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-11-10 07:37:25,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:25,308 INFO L225 Difference]: With dead ends: 175 [2018-11-10 07:37:25,308 INFO L226 Difference]: Without dead ends: 175 [2018-11-10 07:37:25,309 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:25,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-11-10 07:37:25,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 149. [2018-11-10 07:37:25,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-11-10 07:37:25,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 159 transitions. [2018-11-10 07:37:25,312 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 159 transitions. Word has length 18 [2018-11-10 07:37:25,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:25,312 INFO L481 AbstractCegarLoop]: Abstraction has 149 states and 159 transitions. [2018-11-10 07:37:25,313 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:25,313 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 159 transitions. [2018-11-10 07:37:25,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-10 07:37:25,313 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:25,313 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:25,314 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:25,314 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:25,315 INFO L82 PathProgramCache]: Analyzing trace with hash -1345841171, now seen corresponding path program 1 times [2018-11-10 07:37:25,315 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:25,315 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:25,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:25,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:25,408 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:25,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:25,413 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,422 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,423 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:17 [2018-11-10 07:37:25,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:25,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:25,461 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,465 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:25,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:25,481 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,484 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,492 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,492 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:30, output treesize:17 [2018-11-10 07:37:25,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:37:25,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:37:25,510 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,512 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:37:25,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:37:25,524 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,526 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:25,531 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:34, output treesize:12 [2018-11-10 07:37:25,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:25,544 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:25,546 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:25,546 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:25,546 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:25,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:25,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:25,547 INFO L87 Difference]: Start difference. First operand 149 states and 159 transitions. Second operand 5 states. [2018-11-10 07:37:26,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:26,403 INFO L93 Difference]: Finished difference Result 214 states and 230 transitions. [2018-11-10 07:37:26,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:37:26,404 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2018-11-10 07:37:26,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:26,405 INFO L225 Difference]: With dead ends: 214 [2018-11-10 07:37:26,405 INFO L226 Difference]: Without dead ends: 214 [2018-11-10 07:37:26,405 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:26,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-11-10 07:37:26,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 148. [2018-11-10 07:37:26,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-10 07:37:26,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-11-10 07:37:26,409 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 19 [2018-11-10 07:37:26,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:26,410 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-11-10 07:37:26,410 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:26,410 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-11-10 07:37:26,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-10 07:37:26,410 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:26,411 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:26,411 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:26,412 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:26,412 INFO L82 PathProgramCache]: Analyzing trace with hash 1003178870, now seen corresponding path program 1 times [2018-11-10 07:37:26,416 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:26,416 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:26,430 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:26,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:26,493 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:26,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:26,496 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:26,499 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:26,499 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:26,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-11-10 07:37:26,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:26,544 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:26,544 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-11-10 07:37:26,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:26,564 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:26,565 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:26,565 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:37:26,566 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:37:26,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:37:26,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:37:26,566 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 6 states. [2018-11-10 07:37:27,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:27,425 INFO L93 Difference]: Finished difference Result 308 states and 333 transitions. [2018-11-10 07:37:27,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:37:27,425 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-11-10 07:37:27,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:27,426 INFO L225 Difference]: With dead ends: 308 [2018-11-10 07:37:27,426 INFO L226 Difference]: Without dead ends: 308 [2018-11-10 07:37:27,427 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:37:27,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2018-11-10 07:37:27,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 160. [2018-11-10 07:37:27,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-11-10 07:37:27,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 178 transitions. [2018-11-10 07:37:27,430 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 178 transitions. Word has length 20 [2018-11-10 07:37:27,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:27,430 INFO L481 AbstractCegarLoop]: Abstraction has 160 states and 178 transitions. [2018-11-10 07:37:27,430 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:37:27,430 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 178 transitions. [2018-11-10 07:37:27,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-10 07:37:27,431 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:27,431 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:27,431 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:27,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:27,432 INFO L82 PathProgramCache]: Analyzing trace with hash 1033773999, now seen corresponding path program 1 times [2018-11-10 07:37:27,432 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:27,432 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:27,446 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:27,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:27,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:27,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:27,535 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:27,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:27,542 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:27,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:27,546 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-10 07:37:27,582 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:27,583 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:27,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:37:27,584 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:27,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 07:37:27,597 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:27,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:27,606 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-11-10 07:37:27,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:27,616 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:27,617 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:27,617 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:27,618 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:27,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:27,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:27,618 INFO L87 Difference]: Start difference. First operand 160 states and 178 transitions. Second operand 5 states. [2018-11-10 07:37:28,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:28,466 INFO L93 Difference]: Finished difference Result 225 states and 241 transitions. [2018-11-10 07:37:28,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:37:28,466 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-10 07:37:28,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:28,467 INFO L225 Difference]: With dead ends: 225 [2018-11-10 07:37:28,467 INFO L226 Difference]: Without dead ends: 225 [2018-11-10 07:37:28,467 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:28,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-11-10 07:37:28,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 161. [2018-11-10 07:37:28,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-10 07:37:28,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 178 transitions. [2018-11-10 07:37:28,470 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 178 transitions. Word has length 21 [2018-11-10 07:37:28,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:28,471 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 178 transitions. [2018-11-10 07:37:28,471 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:28,471 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 178 transitions. [2018-11-10 07:37:28,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-10 07:37:28,471 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:28,471 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:28,472 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:28,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:28,472 INFO L82 PathProgramCache]: Analyzing trace with hash 1982223000, now seen corresponding path program 1 times [2018-11-10 07:37:28,472 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:28,472 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:28,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:28,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:28,545 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:28,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:28,562 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:28,563 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:28,563 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:28,564 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:28,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:28,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:28,564 INFO L87 Difference]: Start difference. First operand 161 states and 178 transitions. Second operand 5 states. [2018-11-10 07:37:29,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:29,117 INFO L93 Difference]: Finished difference Result 189 states and 212 transitions. [2018-11-10 07:37:29,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:37:29,117 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-11-10 07:37:29,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:29,118 INFO L225 Difference]: With dead ends: 189 [2018-11-10 07:37:29,118 INFO L226 Difference]: Without dead ends: 189 [2018-11-10 07:37:29,118 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:37:29,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-10 07:37:29,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 154. [2018-11-10 07:37:29,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-10 07:37:29,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 171 transitions. [2018-11-10 07:37:29,122 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 171 transitions. Word has length 22 [2018-11-10 07:37:29,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:29,122 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 171 transitions. [2018-11-10 07:37:29,122 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:29,122 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 171 transitions. [2018-11-10 07:37:29,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-10 07:37:29,122 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:29,123 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:29,123 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:29,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:29,123 INFO L82 PathProgramCache]: Analyzing trace with hash 1319370961, now seen corresponding path program 1 times [2018-11-10 07:37:29,123 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:29,124 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:29,148 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:29,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:29,216 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:29,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:29,247 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:29,248 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:29,248 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:37:29,248 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:37:29,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:37:29,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:37:29,249 INFO L87 Difference]: Start difference. First operand 154 states and 171 transitions. Second operand 6 states. [2018-11-10 07:37:29,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:29,909 INFO L93 Difference]: Finished difference Result 212 states and 229 transitions. [2018-11-10 07:37:29,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:37:29,910 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-11-10 07:37:29,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:29,911 INFO L225 Difference]: With dead ends: 212 [2018-11-10 07:37:29,911 INFO L226 Difference]: Without dead ends: 212 [2018-11-10 07:37:29,911 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:37:29,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-10 07:37:29,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 161. [2018-11-10 07:37:29,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-10 07:37:29,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 182 transitions. [2018-11-10 07:37:29,914 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 182 transitions. Word has length 23 [2018-11-10 07:37:29,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:29,915 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 182 transitions. [2018-11-10 07:37:29,915 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:37:29,915 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 182 transitions. [2018-11-10 07:37:29,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 07:37:29,916 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:29,917 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:29,917 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:29,917 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:29,918 INFO L82 PathProgramCache]: Analyzing trace with hash -2044335935, now seen corresponding path program 1 times [2018-11-10 07:37:29,918 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:29,918 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:29,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:29,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:29,989 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:29,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:29,993 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:29,998 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:29,998 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:30,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:30,023 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:30,024 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:30,024 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:37:30,024 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:37:30,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:37:30,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:37:30,025 INFO L87 Difference]: Start difference. First operand 161 states and 182 transitions. Second operand 6 states. [2018-11-10 07:37:31,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:31,046 INFO L93 Difference]: Finished difference Result 312 states and 337 transitions. [2018-11-10 07:37:31,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 07:37:31,047 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-11-10 07:37:31,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:31,048 INFO L225 Difference]: With dead ends: 312 [2018-11-10 07:37:31,048 INFO L226 Difference]: Without dead ends: 312 [2018-11-10 07:37:31,049 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:37:31,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-11-10 07:37:31,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 165. [2018-11-10 07:37:31,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-11-10 07:37:31,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 186 transitions. [2018-11-10 07:37:31,052 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 186 transitions. Word has length 24 [2018-11-10 07:37:31,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:31,052 INFO L481 AbstractCegarLoop]: Abstraction has 165 states and 186 transitions. [2018-11-10 07:37:31,052 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:37:31,053 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 186 transitions. [2018-11-10 07:37:31,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 07:37:31,053 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:31,053 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:31,054 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:31,054 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:31,054 INFO L82 PathProgramCache]: Analyzing trace with hash -2049173062, now seen corresponding path program 1 times [2018-11-10 07:37:31,054 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:31,054 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:31,087 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:31,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:31,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:31,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:31,184 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,197 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,197 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-11-10 07:37:31,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:31,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:31,221 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,231 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,238 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:13 [2018-11-10 07:37:31,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:37:31,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:37:31,251 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:31,253 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-11-10 07:37:31,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:31,260 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:31,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:31,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:37:31,267 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:37:31,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:37:31,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:31,268 INFO L87 Difference]: Start difference. First operand 165 states and 186 transitions. Second operand 7 states. [2018-11-10 07:37:32,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:32,114 INFO L93 Difference]: Finished difference Result 212 states and 228 transitions. [2018-11-10 07:37:32,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 07:37:32,114 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-11-10 07:37:32,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:32,115 INFO L225 Difference]: With dead ends: 212 [2018-11-10 07:37:32,115 INFO L226 Difference]: Without dead ends: 212 [2018-11-10 07:37:32,115 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=117, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:37:32,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-10 07:37:32,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 166. [2018-11-10 07:37:32,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-10 07:37:32,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 187 transitions. [2018-11-10 07:37:32,118 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 187 transitions. Word has length 24 [2018-11-10 07:37:32,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:32,118 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 187 transitions. [2018-11-10 07:37:32,118 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:37:32,118 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 187 transitions. [2018-11-10 07:37:32,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-10 07:37:32,119 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:32,119 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:32,119 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:32,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:32,119 INFO L82 PathProgramCache]: Analyzing trace with hash 1050095637, now seen corresponding path program 1 times [2018-11-10 07:37:32,119 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:32,119 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:32,146 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:32,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:32,199 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:32,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:32,202 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:32,205 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:32,205 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:32,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:32,227 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:32,228 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:32,228 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:32,229 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:32,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:32,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:32,229 INFO L87 Difference]: Start difference. First operand 166 states and 187 transitions. Second operand 5 states. [2018-11-10 07:37:33,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:33,003 INFO L93 Difference]: Finished difference Result 235 states and 252 transitions. [2018-11-10 07:37:33,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:37:33,003 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-11-10 07:37:33,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:33,003 INFO L225 Difference]: With dead ends: 235 [2018-11-10 07:37:33,003 INFO L226 Difference]: Without dead ends: 235 [2018-11-10 07:37:33,004 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:33,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-11-10 07:37:33,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 167. [2018-11-10 07:37:33,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-11-10 07:37:33,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 187 transitions. [2018-11-10 07:37:33,006 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 187 transitions. Word has length 25 [2018-11-10 07:37:33,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:33,006 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 187 transitions. [2018-11-10 07:37:33,006 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:33,006 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 187 transitions. [2018-11-10 07:37:33,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-10 07:37:33,007 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:33,007 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:33,007 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:33,007 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:33,007 INFO L82 PathProgramCache]: Analyzing trace with hash 900144627, now seen corresponding path program 1 times [2018-11-10 07:37:33,008 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:33,008 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:33,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:33,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:33,115 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:33,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:33,131 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,150 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,150 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-11-10 07:37:33,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:33,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:33,176 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:33,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:33,190 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,192 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,204 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,204 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:20 [2018-11-10 07:37:33,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:37:33,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:37:33,225 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:37:33,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:37:33,238 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,240 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:33,244 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:14 [2018-11-10 07:37:33,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:33,255 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:33,264 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:33,264 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:37:33,265 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:37:33,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:37:33,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:33,265 INFO L87 Difference]: Start difference. First operand 167 states and 187 transitions. Second operand 7 states. [2018-11-10 07:37:34,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:34,115 INFO L93 Difference]: Finished difference Result 206 states and 223 transitions. [2018-11-10 07:37:34,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:37:34,115 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2018-11-10 07:37:34,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:34,116 INFO L225 Difference]: With dead ends: 206 [2018-11-10 07:37:34,116 INFO L226 Difference]: Without dead ends: 206 [2018-11-10 07:37:34,116 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:37:34,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-11-10 07:37:34,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 168. [2018-11-10 07:37:34,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-10 07:37:34,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 188 transitions. [2018-11-10 07:37:34,118 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 188 transitions. Word has length 25 [2018-11-10 07:37:34,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:34,118 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 188 transitions. [2018-11-10 07:37:34,119 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:37:34,119 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 188 transitions. [2018-11-10 07:37:34,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 07:37:34,119 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:34,119 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:34,120 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:34,120 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:34,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1806678973, now seen corresponding path program 1 times [2018-11-10 07:37:34,120 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:34,120 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:34,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:34,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:34,155 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:34,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:34,161 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:34,162 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:34,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:34,163 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:37:34,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:37:34,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:37:34,163 INFO L87 Difference]: Start difference. First operand 168 states and 188 transitions. Second operand 4 states. [2018-11-10 07:37:34,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:34,383 INFO L93 Difference]: Finished difference Result 212 states and 228 transitions. [2018-11-10 07:37:34,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 07:37:34,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 26 [2018-11-10 07:37:34,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:34,383 INFO L225 Difference]: With dead ends: 212 [2018-11-10 07:37:34,383 INFO L226 Difference]: Without dead ends: 212 [2018-11-10 07:37:34,384 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:34,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-10 07:37:34,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 168. [2018-11-10 07:37:34,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-10 07:37:34,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 186 transitions. [2018-11-10 07:37:34,385 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 186 transitions. Word has length 26 [2018-11-10 07:37:34,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:34,386 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 186 transitions. [2018-11-10 07:37:34,386 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:37:34,386 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 186 transitions. [2018-11-10 07:37:34,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 07:37:34,386 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:34,386 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:34,386 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:34,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:34,387 INFO L82 PathProgramCache]: Analyzing trace with hash -175401481, now seen corresponding path program 1 times [2018-11-10 07:37:34,387 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:34,387 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:34,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:34,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:34,451 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:34,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:34,461 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:34,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:34,467 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:34,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:34,495 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:34,501 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:34,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:37:34,501 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:37:34,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:37:34,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:37:34,502 INFO L87 Difference]: Start difference. First operand 168 states and 186 transitions. Second operand 6 states. [2018-11-10 07:37:35,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:35,407 INFO L93 Difference]: Finished difference Result 284 states and 309 transitions. [2018-11-10 07:37:35,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 07:37:35,408 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-11-10 07:37:35,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:35,409 INFO L225 Difference]: With dead ends: 284 [2018-11-10 07:37:35,409 INFO L226 Difference]: Without dead ends: 284 [2018-11-10 07:37:35,409 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:37:35,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states. [2018-11-10 07:37:35,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 185. [2018-11-10 07:37:35,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-11-10 07:37:35,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 209 transitions. [2018-11-10 07:37:35,412 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 209 transitions. Word has length 27 [2018-11-10 07:37:35,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:35,412 INFO L481 AbstractCegarLoop]: Abstraction has 185 states and 209 transitions. [2018-11-10 07:37:35,413 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:37:35,413 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 209 transitions. [2018-11-10 07:37:35,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 07:37:35,413 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:35,413 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:35,414 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:35,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:35,414 INFO L82 PathProgramCache]: Analyzing trace with hash 1750563605, now seen corresponding path program 1 times [2018-11-10 07:37:35,414 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:35,414 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:35,440 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:35,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:35,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:35,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:35,581 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:35,583 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:35,583 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:37:35,583 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:37:35,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:37:35,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:35,583 INFO L87 Difference]: Start difference. First operand 185 states and 209 transitions. Second operand 7 states. [2018-11-10 07:37:36,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:36,380 INFO L93 Difference]: Finished difference Result 268 states and 293 transitions. [2018-11-10 07:37:36,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:37:36,380 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-11-10 07:37:36,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:36,381 INFO L225 Difference]: With dead ends: 268 [2018-11-10 07:37:36,381 INFO L226 Difference]: Without dead ends: 268 [2018-11-10 07:37:36,382 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:37:36,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-11-10 07:37:36,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 187. [2018-11-10 07:37:36,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-11-10 07:37:36,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 211 transitions. [2018-11-10 07:37:36,384 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 211 transitions. Word has length 27 [2018-11-10 07:37:36,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:36,384 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 211 transitions. [2018-11-10 07:37:36,384 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:37:36,384 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 211 transitions. [2018-11-10 07:37:36,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:37:36,385 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:36,385 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:36,385 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:36,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:36,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1142478426, now seen corresponding path program 1 times [2018-11-10 07:37:36,386 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:36,386 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:36,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:36,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:36,455 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:36,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:37:36,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:37:36,486 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:36,488 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:36,492 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:36,492 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-11-10 07:37:36,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:36,537 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:36,538 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:36,538 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 07:37:36,538 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:37:36,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:37:36,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:36,538 INFO L87 Difference]: Start difference. First operand 187 states and 211 transitions. Second operand 8 states. [2018-11-10 07:37:37,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:37,439 INFO L93 Difference]: Finished difference Result 362 states and 407 transitions. [2018-11-10 07:37:37,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 07:37:37,440 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 28 [2018-11-10 07:37:37,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:37,441 INFO L225 Difference]: With dead ends: 362 [2018-11-10 07:37:37,441 INFO L226 Difference]: Without dead ends: 362 [2018-11-10 07:37:37,441 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:37:37,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2018-11-10 07:37:37,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 197. [2018-11-10 07:37:37,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-10 07:37:37,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 222 transitions. [2018-11-10 07:37:37,444 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 222 transitions. Word has length 28 [2018-11-10 07:37:37,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:37,444 INFO L481 AbstractCegarLoop]: Abstraction has 197 states and 222 transitions. [2018-11-10 07:37:37,444 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:37:37,444 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 222 transitions. [2018-11-10 07:37:37,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:37:37,444 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:37,444 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:37,445 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:37,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:37,445 INFO L82 PathProgramCache]: Analyzing trace with hash -1567102978, now seen corresponding path program 1 times [2018-11-10 07:37:37,445 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:37,445 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:37,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:37,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:37,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:37,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:37,617 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,623 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-11-10 07:37:37,650 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:37,652 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:37,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-10 07:37:37,653 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,664 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,664 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:28, output treesize:26 [2018-11-10 07:37:37,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:37,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:37,684 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,686 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,698 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:34 [2018-11-10 07:37:37,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-10 07:37:37,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:37,749 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,760 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,776 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:49, output treesize:30 [2018-11-10 07:37:37,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:37:37,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:37:37,805 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,810 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:37,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:37,818 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 [2018-11-10 07:37:37,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:37,840 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:37,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:37,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-10 07:37:37,842 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 07:37:37,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 07:37:37,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:37:37,843 INFO L87 Difference]: Start difference. First operand 197 states and 222 transitions. Second operand 10 states. [2018-11-10 07:37:39,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:39,394 INFO L93 Difference]: Finished difference Result 297 states and 323 transitions. [2018-11-10 07:37:39,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 07:37:39,395 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 28 [2018-11-10 07:37:39,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:39,395 INFO L225 Difference]: With dead ends: 297 [2018-11-10 07:37:39,395 INFO L226 Difference]: Without dead ends: 297 [2018-11-10 07:37:39,396 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:37:39,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-11-10 07:37:39,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 198. [2018-11-10 07:37:39,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-11-10 07:37:39,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 223 transitions. [2018-11-10 07:37:39,398 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 223 transitions. Word has length 28 [2018-11-10 07:37:39,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:39,398 INFO L481 AbstractCegarLoop]: Abstraction has 198 states and 223 transitions. [2018-11-10 07:37:39,398 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 07:37:39,398 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 223 transitions. [2018-11-10 07:37:39,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:37:39,399 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:39,399 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:39,399 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:39,399 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:39,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1486276656, now seen corresponding path program 1 times [2018-11-10 07:37:39,400 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:39,400 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:39,412 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:39,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:39,468 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:39,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:37:39,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:37:39,488 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:39,489 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:39,493 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:39,493 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-11-10 07:37:39,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:39,529 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:39,532 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:39,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 07:37:39,533 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:37:39,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:37:39,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:39,533 INFO L87 Difference]: Start difference. First operand 198 states and 223 transitions. Second operand 8 states. [2018-11-10 07:37:40,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:40,611 INFO L93 Difference]: Finished difference Result 372 states and 418 transitions. [2018-11-10 07:37:40,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 07:37:40,612 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 28 [2018-11-10 07:37:40,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:40,613 INFO L225 Difference]: With dead ends: 372 [2018-11-10 07:37:40,613 INFO L226 Difference]: Without dead ends: 372 [2018-11-10 07:37:40,613 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:37:40,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372 states. [2018-11-10 07:37:40,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372 to 198. [2018-11-10 07:37:40,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-11-10 07:37:40,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 223 transitions. [2018-11-10 07:37:40,616 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 223 transitions. Word has length 28 [2018-11-10 07:37:40,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:40,616 INFO L481 AbstractCegarLoop]: Abstraction has 198 states and 223 transitions. [2018-11-10 07:37:40,616 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:37:40,616 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 223 transitions. [2018-11-10 07:37:40,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 07:37:40,616 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:40,616 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:40,617 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:40,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:40,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1335551945, now seen corresponding path program 1 times [2018-11-10 07:37:40,617 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:40,617 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:40,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:40,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:40,821 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:40,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:40,824 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,829 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:40,852 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:40,854 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:40,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:37:40,855 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:40,873 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,887 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,887 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:22 [2018-11-10 07:37:40,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:40,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:40,919 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,922 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:40,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:40,954 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,957 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:40,971 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-11-10 07:37:41,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-10 07:37:41,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:41,040 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,049 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-11-10 07:37:41,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:41,075 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,085 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,101 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-11-10 07:37:41,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:37:41,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:37:41,125 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,127 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:37:41,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:37:41,140 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,144 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:41,151 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-11-10 07:37:41,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:41,169 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:41,170 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:41,170 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 07:37:41,171 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 07:37:41,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 07:37:41,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:37:41,171 INFO L87 Difference]: Start difference. First operand 198 states and 223 transitions. Second operand 9 states. [2018-11-10 07:37:42,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:42,951 INFO L93 Difference]: Finished difference Result 225 states and 243 transitions. [2018-11-10 07:37:42,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 07:37:42,952 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-11-10 07:37:42,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:42,952 INFO L225 Difference]: With dead ends: 225 [2018-11-10 07:37:42,952 INFO L226 Difference]: Without dead ends: 225 [2018-11-10 07:37:42,953 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-11-10 07:37:42,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-11-10 07:37:42,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 199. [2018-11-10 07:37:42,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-11-10 07:37:42,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 224 transitions. [2018-11-10 07:37:42,956 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 224 transitions. Word has length 29 [2018-11-10 07:37:42,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:42,956 INFO L481 AbstractCegarLoop]: Abstraction has 199 states and 224 transitions. [2018-11-10 07:37:42,956 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 07:37:42,956 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 224 transitions. [2018-11-10 07:37:42,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 07:37:42,957 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:42,957 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:42,957 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:42,957 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:42,957 INFO L82 PathProgramCache]: Analyzing trace with hash 1595593327, now seen corresponding path program 1 times [2018-11-10 07:37:42,958 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:42,958 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:42,982 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:43,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:43,005 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:43,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:43,011 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:43,012 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:43,012 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:43,012 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:37:43,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:37:43,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:37:43,012 INFO L87 Difference]: Start difference. First operand 199 states and 224 transitions. Second operand 4 states. [2018-11-10 07:37:43,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:43,035 INFO L93 Difference]: Finished difference Result 227 states and 258 transitions. [2018-11-10 07:37:43,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:37:43,035 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-10 07:37:43,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:43,036 INFO L225 Difference]: With dead ends: 227 [2018-11-10 07:37:43,036 INFO L226 Difference]: Without dead ends: 227 [2018-11-10 07:37:43,036 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:43,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-11-10 07:37:43,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 203. [2018-11-10 07:37:43,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-10 07:37:43,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 228 transitions. [2018-11-10 07:37:43,038 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 228 transitions. Word has length 30 [2018-11-10 07:37:43,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:43,039 INFO L481 AbstractCegarLoop]: Abstraction has 203 states and 228 transitions. [2018-11-10 07:37:43,039 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:37:43,039 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 228 transitions. [2018-11-10 07:37:43,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 07:37:43,039 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:43,039 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:43,039 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:43,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:43,039 INFO L82 PathProgramCache]: Analyzing trace with hash 1621874851, now seen corresponding path program 1 times [2018-11-10 07:37:43,039 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:43,040 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:43,052 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:43,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:43,139 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:43,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:43,251 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:43,252 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:43,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 07:37:43,252 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 07:37:43,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 07:37:43,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:37:43,252 INFO L87 Difference]: Start difference. First operand 203 states and 228 transitions. Second operand 9 states. [2018-11-10 07:37:44,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:44,593 INFO L93 Difference]: Finished difference Result 243 states and 262 transitions. [2018-11-10 07:37:44,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 07:37:44,594 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-11-10 07:37:44,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:44,595 INFO L225 Difference]: With dead ends: 243 [2018-11-10 07:37:44,595 INFO L226 Difference]: Without dead ends: 243 [2018-11-10 07:37:44,595 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=89, Invalid=183, Unknown=0, NotChecked=0, Total=272 [2018-11-10 07:37:44,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-11-10 07:37:44,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 203. [2018-11-10 07:37:44,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-10 07:37:44,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 224 transitions. [2018-11-10 07:37:44,597 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 224 transitions. Word has length 31 [2018-11-10 07:37:44,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:44,597 INFO L481 AbstractCegarLoop]: Abstraction has 203 states and 224 transitions. [2018-11-10 07:37:44,597 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 07:37:44,597 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 224 transitions. [2018-11-10 07:37:44,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-10 07:37:44,598 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:44,598 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:44,598 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:44,598 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:44,599 INFO L82 PathProgramCache]: Analyzing trace with hash 729806201, now seen corresponding path program 1 times [2018-11-10 07:37:44,599 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:44,599 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:44,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:44,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:44,698 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:44,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:37:44,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:37:44,703 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:44,704 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:44,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:44,705 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-11-10 07:37:44,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:44,715 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:44,716 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:44,716 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:44,717 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:44,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:44,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:44,717 INFO L87 Difference]: Start difference. First operand 203 states and 224 transitions. Second operand 5 states. [2018-11-10 07:37:45,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:45,221 INFO L93 Difference]: Finished difference Result 207 states and 226 transitions. [2018-11-10 07:37:45,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:37:45,221 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2018-11-10 07:37:45,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:45,221 INFO L225 Difference]: With dead ends: 207 [2018-11-10 07:37:45,221 INFO L226 Difference]: Without dead ends: 207 [2018-11-10 07:37:45,222 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:45,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-11-10 07:37:45,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 200. [2018-11-10 07:37:45,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-11-10 07:37:45,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 221 transitions. [2018-11-10 07:37:45,224 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 221 transitions. Word has length 31 [2018-11-10 07:37:45,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:45,224 INFO L481 AbstractCegarLoop]: Abstraction has 200 states and 221 transitions. [2018-11-10 07:37:45,224 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:45,224 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 221 transitions. [2018-11-10 07:37:45,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 07:37:45,225 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:45,225 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:45,225 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:45,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:45,225 INFO L82 PathProgramCache]: Analyzing trace with hash 1149155875, now seen corresponding path program 1 times [2018-11-10 07:37:45,225 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:45,225 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:45,246 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:45,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:45,425 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:45,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:45,428 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,432 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:45,445 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:45,448 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:45,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:37:45,449 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:45,460 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,470 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,470 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:22 [2018-11-10 07:37:45,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:45,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:45,496 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,499 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:45,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:45,528 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,531 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,546 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-11-10 07:37:45,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-10 07:37:45,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:45,623 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,631 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-11-10 07:37:45,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:45,658 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,669 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,685 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,685 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-11-10 07:37:45,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:37:45,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:37:45,707 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,709 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:37:45,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:37:45,721 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,725 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:45,732 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-11-10 07:37:45,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:45,783 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:45,785 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:45,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-10 07:37:45,785 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 07:37:45,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 07:37:45,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:37:45,786 INFO L87 Difference]: Start difference. First operand 200 states and 221 transitions. Second operand 11 states. [2018-11-10 07:37:48,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:48,237 INFO L93 Difference]: Finished difference Result 363 states and 393 transitions. [2018-11-10 07:37:48,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-10 07:37:48,237 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-11-10 07:37:48,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:48,238 INFO L225 Difference]: With dead ends: 363 [2018-11-10 07:37:48,238 INFO L226 Difference]: Without dead ends: 363 [2018-11-10 07:37:48,238 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2018-11-10 07:37:48,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 363 states. [2018-11-10 07:37:48,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 363 to 208. [2018-11-10 07:37:48,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-11-10 07:37:48,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 231 transitions. [2018-11-10 07:37:48,240 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 231 transitions. Word has length 32 [2018-11-10 07:37:48,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:48,240 INFO L481 AbstractCegarLoop]: Abstraction has 208 states and 231 transitions. [2018-11-10 07:37:48,240 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 07:37:48,240 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 231 transitions. [2018-11-10 07:37:48,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 07:37:48,240 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:48,240 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:48,241 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:48,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:48,241 INFO L82 PathProgramCache]: Analyzing trace with hash 532204837, now seen corresponding path program 1 times [2018-11-10 07:37:48,241 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:48,241 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:48,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:48,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:48,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:48,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:48,516 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,519 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:48,535 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:48,536 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:48,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-10 07:37:48,537 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:48,557 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,570 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,570 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:34 [2018-11-10 07:37:48,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:48,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:48,598 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,600 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:48,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:48,626 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,629 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,645 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:55, output treesize:50 [2018-11-10 07:37:48,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-10 07:37:48,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:48,728 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,738 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 57 [2018-11-10 07:37:48,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:37:48,772 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,785 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,807 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:86, output treesize:48 [2018-11-10 07:37:48,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:37:48,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:37:48,834 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,837 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2018-11-10 07:37:48,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 15 [2018-11-10 07:37:48,852 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,857 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:48,865 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:58, output treesize:28 [2018-11-10 07:37:48,926 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:48,927 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:48,928 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:48,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-11-10 07:37:48,928 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 07:37:48,949 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,967 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:48,967 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:45, output treesize:16 [2018-11-10 07:37:48,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:48,986 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:48,988 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:48,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-10 07:37:48,988 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 07:37:48,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 07:37:48,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:37:48,988 INFO L87 Difference]: Start difference. First operand 208 states and 231 transitions. Second operand 11 states. [2018-11-10 07:37:51,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:51,291 INFO L93 Difference]: Finished difference Result 324 states and 352 transitions. [2018-11-10 07:37:51,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-10 07:37:51,292 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 34 [2018-11-10 07:37:51,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:51,293 INFO L225 Difference]: With dead ends: 324 [2018-11-10 07:37:51,293 INFO L226 Difference]: Without dead ends: 324 [2018-11-10 07:37:51,293 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=136, Invalid=416, Unknown=0, NotChecked=0, Total=552 [2018-11-10 07:37:51,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-11-10 07:37:51,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 204. [2018-11-10 07:37:51,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-11-10 07:37:51,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 227 transitions. [2018-11-10 07:37:51,296 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 227 transitions. Word has length 34 [2018-11-10 07:37:51,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:51,296 INFO L481 AbstractCegarLoop]: Abstraction has 204 states and 227 transitions. [2018-11-10 07:37:51,296 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 07:37:51,296 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 227 transitions. [2018-11-10 07:37:51,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-10 07:37:51,297 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:51,297 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:51,297 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:51,297 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:51,297 INFO L82 PathProgramCache]: Analyzing trace with hash 1468198061, now seen corresponding path program 1 times [2018-11-10 07:37:51,298 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:51,298 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:51,313 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:51,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:51,335 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:51,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:51,341 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:51,342 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:51,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:37:51,343 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:51,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:51,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:51,343 INFO L87 Difference]: Start difference. First operand 204 states and 227 transitions. Second operand 5 states. [2018-11-10 07:37:51,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:51,376 INFO L93 Difference]: Finished difference Result 228 states and 251 transitions. [2018-11-10 07:37:51,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:37:51,377 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-11-10 07:37:51,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:51,377 INFO L225 Difference]: With dead ends: 228 [2018-11-10 07:37:51,377 INFO L226 Difference]: Without dead ends: 228 [2018-11-10 07:37:51,378 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:51,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-11-10 07:37:51,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 208. [2018-11-10 07:37:51,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-11-10 07:37:51,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 231 transitions. [2018-11-10 07:37:51,380 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 231 transitions. Word has length 35 [2018-11-10 07:37:51,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:51,381 INFO L481 AbstractCegarLoop]: Abstraction has 208 states and 231 transitions. [2018-11-10 07:37:51,381 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:51,381 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 231 transitions. [2018-11-10 07:37:51,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:37:51,381 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:51,381 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:51,382 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:51,382 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:51,382 INFO L82 PathProgramCache]: Analyzing trace with hash 169666178, now seen corresponding path program 1 times [2018-11-10 07:37:51,382 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:51,382 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:51,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:51,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:51,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:51,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:51,572 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,578 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-11-10 07:37:51,603 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:51,604 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:51,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 07:37:51,605 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,616 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,616 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:28, output treesize:26 [2018-11-10 07:37:51,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:37:51,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:37:51,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,637 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:38 [2018-11-10 07:37:51,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-11-10 07:37:51,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:37:51,696 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,703 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,714 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,714 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:55, output treesize:32 [2018-11-10 07:37:51,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:37:51,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:37:51,770 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,773 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:51,778 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:37:51,778 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 [2018-11-10 07:37:51,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:51,796 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:51,797 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:51,797 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-10 07:37:51,797 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 07:37:51,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 07:37:51,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:37:51,798 INFO L87 Difference]: Start difference. First operand 208 states and 231 transitions. Second operand 11 states. [2018-11-10 07:37:53,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:53,845 INFO L93 Difference]: Finished difference Result 357 states and 392 transitions. [2018-11-10 07:37:53,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-10 07:37:53,846 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 36 [2018-11-10 07:37:53,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:53,846 INFO L225 Difference]: With dead ends: 357 [2018-11-10 07:37:53,847 INFO L226 Difference]: Without dead ends: 357 [2018-11-10 07:37:53,847 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-11-10 07:37:53,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-11-10 07:37:53,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 222. [2018-11-10 07:37:53,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-11-10 07:37:53,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 247 transitions. [2018-11-10 07:37:53,850 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 247 transitions. Word has length 36 [2018-11-10 07:37:53,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:53,851 INFO L481 AbstractCegarLoop]: Abstraction has 222 states and 247 transitions. [2018-11-10 07:37:53,851 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 07:37:53,851 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 247 transitions. [2018-11-10 07:37:53,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-10 07:37:53,851 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:53,851 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:53,852 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:53,852 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:53,852 INFO L82 PathProgramCache]: Analyzing trace with hash 347744295, now seen corresponding path program 1 times [2018-11-10 07:37:53,852 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:53,852 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:53,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:54,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:54,101 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:54,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:37:54,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:37:54,107 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:54,108 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:54,110 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:54,110 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-11-10 07:37:54,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:54,194 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:54,195 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:54,196 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 07:37:54,196 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:37:54,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:37:54,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:37:54,196 INFO L87 Difference]: Start difference. First operand 222 states and 247 transitions. Second operand 7 states. [2018-11-10 07:37:55,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:55,021 INFO L93 Difference]: Finished difference Result 234 states and 261 transitions. [2018-11-10 07:37:55,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 07:37:55,021 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-11-10 07:37:55,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:55,022 INFO L225 Difference]: With dead ends: 234 [2018-11-10 07:37:55,022 INFO L226 Difference]: Without dead ends: 234 [2018-11-10 07:37:55,022 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:37:55,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-11-10 07:37:55,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 221. [2018-11-10 07:37:55,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-11-10 07:37:55,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 246 transitions. [2018-11-10 07:37:55,024 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 246 transitions. Word has length 36 [2018-11-10 07:37:55,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:55,024 INFO L481 AbstractCegarLoop]: Abstraction has 221 states and 246 transitions. [2018-11-10 07:37:55,024 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:37:55,024 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 246 transitions. [2018-11-10 07:37:55,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:37:55,024 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:55,024 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:55,024 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:55,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:55,025 INFO L82 PathProgramCache]: Analyzing trace with hash 964684426, now seen corresponding path program 1 times [2018-11-10 07:37:55,025 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:55,025 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:55,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:55,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:55,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:55,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:55,211 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,214 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:55,225 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:55,228 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:37:55,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 07:37:55,229 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:55,242 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:24 [2018-11-10 07:37:55,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:37:55,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:37:55,279 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,282 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:37:55,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:37:55,302 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,304 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,319 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,319 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:49, output treesize:44 [2018-11-10 07:37:55,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-11-10 07:37:55,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:37:55,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,385 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 52 [2018-11-10 07:37:55,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:37:55,418 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,429 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,444 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,444 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:80, output treesize:34 [2018-11-10 07:37:55,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:37:55,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:37:55,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,518 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:37:55,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:37:55,530 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,536 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:55,545 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-11-10 07:37:55,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:55,568 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:55,569 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:55,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-10 07:37:55,569 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 07:37:55,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 07:37:55,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:37:55,570 INFO L87 Difference]: Start difference. First operand 221 states and 246 transitions. Second operand 10 states. [2018-11-10 07:37:58,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:58,069 INFO L93 Difference]: Finished difference Result 312 states and 343 transitions. [2018-11-10 07:37:58,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 07:37:58,069 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2018-11-10 07:37:58,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:58,070 INFO L225 Difference]: With dead ends: 312 [2018-11-10 07:37:58,070 INFO L226 Difference]: Without dead ends: 312 [2018-11-10 07:37:58,070 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2018-11-10 07:37:58,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-11-10 07:37:58,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 222. [2018-11-10 07:37:58,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-11-10 07:37:58,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 247 transitions. [2018-11-10 07:37:58,072 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 247 transitions. Word has length 37 [2018-11-10 07:37:58,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:58,072 INFO L481 AbstractCegarLoop]: Abstraction has 222 states and 247 transitions. [2018-11-10 07:37:58,073 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 07:37:58,073 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 247 transitions. [2018-11-10 07:37:58,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:37:58,073 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:58,073 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:58,073 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:58,073 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:58,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1721106615, now seen corresponding path program 1 times [2018-11-10 07:37:58,074 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:58,074 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:58,087 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:58,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:58,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:58,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:58,166 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:58,178 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:58,178 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:37:58,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:58,199 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:58,200 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:58,200 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:58,201 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:58,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:58,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:58,201 INFO L87 Difference]: Start difference. First operand 222 states and 247 transitions. Second operand 5 states. [2018-11-10 07:37:58,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:58,939 INFO L93 Difference]: Finished difference Result 276 states and 300 transitions. [2018-11-10 07:37:58,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:37:58,939 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2018-11-10 07:37:58,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:58,940 INFO L225 Difference]: With dead ends: 276 [2018-11-10 07:37:58,940 INFO L226 Difference]: Without dead ends: 276 [2018-11-10 07:37:58,940 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:58,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-11-10 07:37:58,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 223. [2018-11-10 07:37:58,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-11-10 07:37:58,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 247 transitions. [2018-11-10 07:37:58,942 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 247 transitions. Word has length 37 [2018-11-10 07:37:58,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:58,942 INFO L481 AbstractCegarLoop]: Abstraction has 223 states and 247 transitions. [2018-11-10 07:37:58,942 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:58,942 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 247 transitions. [2018-11-10 07:37:58,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 07:37:58,943 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:58,943 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:58,943 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:58,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:58,944 INFO L82 PathProgramCache]: Analyzing trace with hash -2104828609, now seen corresponding path program 1 times [2018-11-10 07:37:58,944 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:58,944 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:58,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:59,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:37:59,076 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:37:59,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:37:59,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:37:59,082 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,085 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:7, output treesize:1 [2018-11-10 07:37:59,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:37:59,089 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,098 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,099 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-11-10 07:37:59,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:37:59,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:37:59,115 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,122 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:9 [2018-11-10 07:37:59,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:37:59,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:37:59,131 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,133 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:37:59,134 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:5 [2018-11-10 07:37:59,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:37:59,144 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:37:59,146 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:37:59,146 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:37:59,146 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:37:59,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:37:59,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:37:59,147 INFO L87 Difference]: Start difference. First operand 223 states and 247 transitions. Second operand 5 states. [2018-11-10 07:37:59,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:37:59,839 INFO L93 Difference]: Finished difference Result 224 states and 246 transitions. [2018-11-10 07:37:59,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:37:59,839 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2018-11-10 07:37:59,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:37:59,840 INFO L225 Difference]: With dead ends: 224 [2018-11-10 07:37:59,840 INFO L226 Difference]: Without dead ends: 224 [2018-11-10 07:37:59,840 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:37:59,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-11-10 07:37:59,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 222. [2018-11-10 07:37:59,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-11-10 07:37:59,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 246 transitions. [2018-11-10 07:37:59,842 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 246 transitions. Word has length 37 [2018-11-10 07:37:59,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:37:59,842 INFO L481 AbstractCegarLoop]: Abstraction has 222 states and 246 transitions. [2018-11-10 07:37:59,842 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:37:59,842 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 246 transitions. [2018-11-10 07:37:59,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-10 07:37:59,843 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:37:59,843 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:37:59,843 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:37:59,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:37:59,844 INFO L82 PathProgramCache]: Analyzing trace with hash -825177303, now seen corresponding path program 1 times [2018-11-10 07:37:59,844 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:37:59,844 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:37:59,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:37:59,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:38:00,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:38:00,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:38:00,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:38:00,013 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,014 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,014 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,014 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:7, output treesize:1 [2018-11-10 07:38:00,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:38:00,018 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,029 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:17 [2018-11-10 07:38:00,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:38:00,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:38:00,049 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,051 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:38:00,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:38:00,061 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,063 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,070 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:30, output treesize:17 [2018-11-10 07:38:00,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:38:00,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:38:00,085 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,087 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 07:38:00,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 07:38:00,103 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,105 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,140 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:00,140 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:34, output treesize:12 [2018-11-10 07:38:00,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:38:00,156 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:38:00,158 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:38:00,158 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 07:38:00,158 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:38:00,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:38:00,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 07:38:00,158 INFO L87 Difference]: Start difference. First operand 222 states and 246 transitions. Second operand 5 states. [2018-11-10 07:38:00,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:38:00,986 INFO L93 Difference]: Finished difference Result 331 states and 369 transitions. [2018-11-10 07:38:00,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:38:00,987 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2018-11-10 07:38:00,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:38:00,988 INFO L225 Difference]: With dead ends: 331 [2018-11-10 07:38:00,988 INFO L226 Difference]: Without dead ends: 331 [2018-11-10 07:38:00,988 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:38:00,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-11-10 07:38:00,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 221. [2018-11-10 07:38:00,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-11-10 07:38:00,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 245 transitions. [2018-11-10 07:38:00,990 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 245 transitions. Word has length 38 [2018-11-10 07:38:00,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:38:00,991 INFO L481 AbstractCegarLoop]: Abstraction has 221 states and 245 transitions. [2018-11-10 07:38:00,991 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:38:00,991 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 245 transitions. [2018-11-10 07:38:00,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-10 07:38:00,991 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:38:00,991 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:38:00,992 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:38:00,992 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:38:00,992 INFO L82 PathProgramCache]: Analyzing trace with hash -104075696, now seen corresponding path program 1 times [2018-11-10 07:38:00,992 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:38:00,992 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:38:01,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:38:01,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:38:01,309 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:38:01,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:38:01,312 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,316 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,316 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:38:01,338 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:38:01,338 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:38:01,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:38:01,339 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:38:01,359 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,372 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,373 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:22 [2018-11-10 07:38:01,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:38:01,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:38:01,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,403 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:38:01,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:38:01,424 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,427 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,443 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,443 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-11-10 07:38:01,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-10 07:38:01,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:38:01,499 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,507 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-11-10 07:38:01,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:38:01,532 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,542 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,557 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,557 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-11-10 07:38:01,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:38:01,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:38:01,581 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,583 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:38:01,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:38:01,599 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,603 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,611 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:45, output treesize:15 [2018-11-10 07:38:01,649 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:38:01,650 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:38:01,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:38:01,650 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 07:38:01,665 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,675 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-11-10 07:38:01,695 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:38:01,695 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:38:01,844 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:38:01,848 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:38:01,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-11-10 07:38:01,849 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,919 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:38:01,920 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:38:01,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-11-10 07:38:01,921 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:01,980 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:38:01,980 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:38:01,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 13 [2018-11-10 07:38:01,981 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:02,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:38:02,032 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:70, output treesize:37 [2018-11-10 07:38:02,882 WARN L179 SmtUtils]: Spent 437.00 ms on a formula simplification that was a NOOP. DAG size: 42 [2018-11-10 07:38:03,850 WARN L179 SmtUtils]: Spent 631.00 ms on a formula simplification that was a NOOP. DAG size: 95 [2018-11-10 07:38:03,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 259 treesize of output 220 [2018-11-10 07:38:04,268 WARN L179 SmtUtils]: Spent 400.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 70 [2018-11-10 07:38:04,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:04,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 68 [2018-11-10 07:38:04,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-11-10 07:38:04,521 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,562 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 108 [2018-11-10 07:38:04,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 89 [2018-11-10 07:38:04,576 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,615 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-11-10 07:38:04,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:04,627 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,651 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 68 [2018-11-10 07:38:04,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-11-10 07:38:04,662 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,705 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 108 [2018-11-10 07:38:04,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 89 [2018-11-10 07:38:04,718 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,766 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 71 [2018-11-10 07:38:04,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-11-10 07:38:04,783 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,831 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 71 [2018-11-10 07:38:04,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 46 [2018-11-10 07:38:04,843 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,877 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 111 [2018-11-10 07:38:04,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 85 [2018-11-10 07:38:04,891 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:04,935 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,241 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 13 xjuncts. [2018-11-10 07:38:05,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 115 [2018-11-10 07:38:05,380 WARN L179 SmtUtils]: Spent 123.00 ms on a formula simplification that was a NOOP. DAG size: 55 [2018-11-10 07:38:05,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:05,384 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-10 07:38:05,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:05,503 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,517 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 60 [2018-11-10 07:38:05,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-11-10 07:38:05,525 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,546 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 63 [2018-11-10 07:38:05,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-11-10 07:38:05,561 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,591 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 60 [2018-11-10 07:38:05,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-11-10 07:38:05,601 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,620 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:05,717 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 6 xjuncts. [2018-11-10 07:38:05,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 223 [2018-11-10 07:38:06,171 WARN L179 SmtUtils]: Spent 435.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 67 [2018-11-10 07:38:06,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:06,178 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 107 [2018-11-10 07:38:06,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:06,453 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-11-10 07:38:06,509 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,532 INFO L267 ElimStorePlain]: Start of recursive call 32: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 75 [2018-11-10 07:38:06,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:06,549 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 07:38:06,587 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,614 INFO L267 ElimStorePlain]: Start of recursive call 35: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 71 [2018-11-10 07:38:06,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:06,628 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 07:38:06,680 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,725 INFO L267 ElimStorePlain]: Start of recursive call 38: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 114 [2018-11-10 07:38:06,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 85 [2018-11-10 07:38:06,743 INFO L267 ElimStorePlain]: Start of recursive call 42: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:06,802 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,848 INFO L267 ElimStorePlain]: Start of recursive call 41: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:06,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-11-10 07:38:06,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:06,857 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,885 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 111 [2018-11-10 07:38:06,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:06,905 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:06,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 89 [2018-11-10 07:38:06,975 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,006 INFO L267 ElimStorePlain]: Start of recursive call 46: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 66 [2018-11-10 07:38:07,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 38 [2018-11-10 07:38:07,023 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:07,074 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,106 INFO L267 ElimStorePlain]: Start of recursive call 49: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-11-10 07:38:07,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:07,122 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-11-10 07:38:07,170 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,208 INFO L267 ElimStorePlain]: Start of recursive call 52: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,632 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 20 dim-0 vars, and 21 xjuncts. [2018-11-10 07:38:07,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 165 treesize of output 142 [2018-11-10 07:38:07,747 WARN L179 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-11-10 07:38:07,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:07,752 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 74 [2018-11-10 07:38:07,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:07,872 INFO L267 ElimStorePlain]: Start of recursive call 58: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-11-10 07:38:07,907 INFO L267 ElimStorePlain]: Start of recursive call 59: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,933 INFO L267 ElimStorePlain]: Start of recursive call 57: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:07,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-10 07:38:07,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:07,942 INFO L267 ElimStorePlain]: Start of recursive call 61: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,955 INFO L267 ElimStorePlain]: Start of recursive call 60: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 71 [2018-11-10 07:38:07,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:07,965 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:07,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 07:38:07,989 INFO L267 ElimStorePlain]: Start of recursive call 64: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:08,010 INFO L267 ElimStorePlain]: Start of recursive call 62: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:08,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 67 [2018-11-10 07:38:08,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:08,024 INFO L267 ElimStorePlain]: Start of recursive call 66: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:08,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 07:38:08,051 INFO L267 ElimStorePlain]: Start of recursive call 67: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:08,071 INFO L267 ElimStorePlain]: Start of recursive call 65: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:08,187 INFO L267 ElimStorePlain]: Start of recursive call 55: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 7 xjuncts. [2018-11-10 07:38:08,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 223 [2018-11-10 07:38:08,635 WARN L179 SmtUtils]: Spent 425.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 67 [2018-11-10 07:38:08,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:08,644 INFO L267 ElimStorePlain]: Start of recursive call 69: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:08,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 112 treesize of output 112 [2018-11-10 07:38:08,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 95 [2018-11-10 07:38:08,914 INFO L267 ElimStorePlain]: Start of recursive call 71: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:09,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 61 [2018-11-10 07:38:09,078 INFO L267 ElimStorePlain]: Start of recursive call 72: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:09,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 57 [2018-11-10 07:38:09,159 INFO L267 ElimStorePlain]: Start of recursive call 73: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:09,235 INFO L267 ElimStorePlain]: Start of recursive call 70: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:09,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 117 treesize of output 119 [2018-11-10 07:38:09,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 108 [2018-11-10 07:38:09,273 INFO L267 ElimStorePlain]: Start of recursive call 75: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:09,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 104 [2018-11-10 07:38:09,389 INFO L267 ElimStorePlain]: Start of recursive call 76: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:09,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 104 [2018-11-10 07:38:09,536 INFO L267 ElimStorePlain]: Start of recursive call 77: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:09,672 INFO L267 ElimStorePlain]: Start of recursive call 74: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:09,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 116 treesize of output 116 [2018-11-10 07:38:09,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 105 [2018-11-10 07:38:09,718 INFO L267 ElimStorePlain]: Start of recursive call 79: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:09,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 99 [2018-11-10 07:38:09,868 INFO L267 ElimStorePlain]: Start of recursive call 80: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:09,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 99 [2018-11-10 07:38:09,988 INFO L267 ElimStorePlain]: Start of recursive call 81: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:10,118 INFO L267 ElimStorePlain]: Start of recursive call 78: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:10,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 79 treesize of output 83 [2018-11-10 07:38:10,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 76 [2018-11-10 07:38:10,158 INFO L267 ElimStorePlain]: Start of recursive call 83: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:10,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 70 [2018-11-10 07:38:10,302 INFO L267 ElimStorePlain]: Start of recursive call 84: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:10,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 70 [2018-11-10 07:38:10,430 INFO L267 ElimStorePlain]: Start of recursive call 85: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:10,534 INFO L267 ElimStorePlain]: Start of recursive call 82: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:10,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 71 [2018-11-10 07:38:10,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 58 [2018-11-10 07:38:10,577 INFO L267 ElimStorePlain]: Start of recursive call 87: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:10,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-11-10 07:38:10,697 INFO L267 ElimStorePlain]: Start of recursive call 88: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:10,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 58 [2018-11-10 07:38:10,808 INFO L267 ElimStorePlain]: Start of recursive call 89: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:10,897 INFO L267 ElimStorePlain]: Start of recursive call 86: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:10,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 74 treesize of output 76 [2018-11-10 07:38:10,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 67 [2018-11-10 07:38:10,939 INFO L267 ElimStorePlain]: Start of recursive call 91: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:11,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 61 [2018-11-10 07:38:11,042 INFO L267 ElimStorePlain]: Start of recursive call 92: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:11,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 61 [2018-11-10 07:38:11,154 INFO L267 ElimStorePlain]: Start of recursive call 93: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:11,247 INFO L267 ElimStorePlain]: Start of recursive call 90: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:11,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 78 treesize of output 80 [2018-11-10 07:38:11,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 69 [2018-11-10 07:38:11,278 INFO L267 ElimStorePlain]: Start of recursive call 95: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:11,368 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 65 [2018-11-10 07:38:11,368 INFO L267 ElimStorePlain]: Start of recursive call 96: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:11,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 65 [2018-11-10 07:38:11,468 INFO L267 ElimStorePlain]: Start of recursive call 97: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:11,585 INFO L267 ElimStorePlain]: Start of recursive call 94: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:11,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-11-10 07:38:11,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:11,595 INFO L267 ElimStorePlain]: Start of recursive call 99: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:11,631 INFO L267 ElimStorePlain]: Start of recursive call 98: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:12,654 INFO L267 ElimStorePlain]: Start of recursive call 68: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 40 dim-0 vars, and 41 xjuncts. [2018-11-10 07:38:12,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 165 treesize of output 142 [2018-11-10 07:38:12,786 WARN L179 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-11-10 07:38:12,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:12,793 INFO L267 ElimStorePlain]: Start of recursive call 101: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:12,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 79 [2018-11-10 07:38:12,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 66 [2018-11-10 07:38:12,925 INFO L267 ElimStorePlain]: Start of recursive call 103: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:13,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 68 [2018-11-10 07:38:13,031 INFO L267 ElimStorePlain]: Start of recursive call 104: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:13,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 66 [2018-11-10 07:38:13,107 INFO L267 ElimStorePlain]: Start of recursive call 105: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:13,179 INFO L267 ElimStorePlain]: Start of recursive call 102: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:13,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 70 treesize of output 72 [2018-11-10 07:38:13,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 63 [2018-11-10 07:38:13,215 INFO L267 ElimStorePlain]: Start of recursive call 107: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:13,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-11-10 07:38:13,292 INFO L267 ElimStorePlain]: Start of recursive call 108: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:13,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 57 [2018-11-10 07:38:13,362 INFO L267 ElimStorePlain]: Start of recursive call 109: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:13,415 INFO L267 ElimStorePlain]: Start of recursive call 106: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:13,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 74 treesize of output 76 [2018-11-10 07:38:13,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 61 [2018-11-10 07:38:13,452 INFO L267 ElimStorePlain]: Start of recursive call 111: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:13,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-11-10 07:38:13,541 INFO L267 ElimStorePlain]: Start of recursive call 112: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:13,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 61 [2018-11-10 07:38:13,599 INFO L267 ElimStorePlain]: Start of recursive call 113: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:13,654 INFO L267 ElimStorePlain]: Start of recursive call 110: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:38:13,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-10 07:38:13,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:13,663 INFO L267 ElimStorePlain]: Start of recursive call 115: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:13,682 INFO L267 ElimStorePlain]: Start of recursive call 114: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:13,884 INFO L267 ElimStorePlain]: Start of recursive call 100: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 12 dim-0 vars, and 13 xjuncts. [2018-11-10 07:38:13,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 145 [2018-11-10 07:38:14,004 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 55 [2018-11-10 07:38:14,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:38:14,010 INFO L267 ElimStorePlain]: Start of recursive call 117: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:14,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-10 07:38:14,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:14,138 INFO L267 ElimStorePlain]: Start of recursive call 119: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:14,152 INFO L267 ElimStorePlain]: Start of recursive call 118: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:38:14,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 71 [2018-11-10 07:38:14,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 07:38:14,166 INFO L267 ElimStorePlain]: Start of recursive call 121: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:14,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:14,225 INFO L267 ElimStorePlain]: Start of recursive call 122: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:14,252 INFO L267 ElimStorePlain]: Start of recursive call 120: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:14,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 74 [2018-11-10 07:38:14,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:14,277 INFO L267 ElimStorePlain]: Start of recursive call 124: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:14,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-11-10 07:38:14,321 INFO L267 ElimStorePlain]: Start of recursive call 125: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:14,354 INFO L267 ElimStorePlain]: Start of recursive call 123: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:14,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 67 [2018-11-10 07:38:14,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:38:14,371 INFO L267 ElimStorePlain]: Start of recursive call 127: End of recursive call: and 1 xjuncts. [2018-11-10 07:38:14,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 07:38:14,398 INFO L267 ElimStorePlain]: Start of recursive call 128: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:14,418 INFO L267 ElimStorePlain]: Start of recursive call 126: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:14,526 INFO L267 ElimStorePlain]: Start of recursive call 116: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 7 xjuncts. [2018-11-10 07:38:56,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 73 [2018-11-10 07:38:56,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2018-11-10 07:38:56,790 INFO L267 ElimStorePlain]: Start of recursive call 130: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:56,810 INFO L267 ElimStorePlain]: Start of recursive call 129: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:56,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 73 [2018-11-10 07:38:56,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2018-11-10 07:38:56,818 INFO L267 ElimStorePlain]: Start of recursive call 132: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:38:56,833 INFO L267 ElimStorePlain]: Start of recursive call 131: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:39:32,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 42 [2018-11-10 07:39:32,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:39:32,745 INFO L267 ElimStorePlain]: Start of recursive call 134: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-10 07:39:32,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:39:32,797 INFO L267 ElimStorePlain]: Start of recursive call 136: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,803 INFO L267 ElimStorePlain]: Start of recursive call 135: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 19 [2018-11-10 07:39:32,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:39:32,816 INFO L267 ElimStorePlain]: Start of recursive call 138: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2018-11-10 07:39:32,829 INFO L267 ElimStorePlain]: Start of recursive call 139: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,831 INFO L267 ElimStorePlain]: Start of recursive call 137: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,844 INFO L267 ElimStorePlain]: Start of recursive call 133: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:39:32,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 47 [2018-11-10 07:39:32,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:39:32,904 INFO L267 ElimStorePlain]: Start of recursive call 141: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-11-10 07:39:32,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 5 [2018-11-10 07:39:32,970 INFO L267 ElimStorePlain]: Start of recursive call 143: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,977 INFO L267 ElimStorePlain]: Start of recursive call 142: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-10 07:39:32,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:39:32,982 INFO L267 ElimStorePlain]: Start of recursive call 145: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:32,988 INFO L267 ElimStorePlain]: Start of recursive call 144: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,041 INFO L267 ElimStorePlain]: Start of recursive call 140: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 07:39:33,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 42 [2018-11-10 07:39:33,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:39:33,102 INFO L267 ElimStorePlain]: Start of recursive call 147: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-11-10 07:39:33,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-10 07:39:33,160 INFO L267 ElimStorePlain]: Start of recursive call 149: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-11-10 07:39:33,190 INFO L267 ElimStorePlain]: Start of recursive call 150: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,194 INFO L267 ElimStorePlain]: Start of recursive call 148: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-10 07:39:33,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:39:33,200 INFO L267 ElimStorePlain]: Start of recursive call 152: End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,206 INFO L267 ElimStorePlain]: Start of recursive call 151: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:39:33,218 INFO L267 ElimStorePlain]: Start of recursive call 146: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:40:03,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 142 treesize of output 110 [2018-11-10 07:40:03,901 WARN L179 SmtUtils]: Spent 576.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 61 [2018-11-10 07:40:03,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-11-10 07:40:03,906 INFO L267 ElimStorePlain]: Start of recursive call 154: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:04,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 58 [2018-11-10 07:40:04,093 INFO L267 ElimStorePlain]: Start of recursive call 155: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:04,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 49 [2018-11-10 07:40:04,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:04,263 INFO L267 ElimStorePlain]: Start of recursive call 157: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:04,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:04,303 INFO L267 ElimStorePlain]: Start of recursive call 158: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:04,334 INFO L267 ElimStorePlain]: Start of recursive call 156: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:04,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 55 [2018-11-10 07:40:04,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-11-10 07:40:04,513 INFO L267 ElimStorePlain]: Start of recursive call 160: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:04,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 34 [2018-11-10 07:40:04,603 INFO L267 ElimStorePlain]: Start of recursive call 161: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:04,695 INFO L267 ElimStorePlain]: Start of recursive call 159: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:04,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 50 [2018-11-10 07:40:04,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-11-10 07:40:04,889 INFO L267 ElimStorePlain]: Start of recursive call 163: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:04,923 INFO L267 ElimStorePlain]: Start of recursive call 162: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:05,108 INFO L267 ElimStorePlain]: Start of recursive call 153: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:05,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 96 treesize of output 84 [2018-11-10 07:40:05,537 WARN L179 SmtUtils]: Spent 370.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 56 [2018-11-10 07:40:05,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-11-10 07:40:05,541 INFO L267 ElimStorePlain]: Start of recursive call 165: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:05,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:40:05,686 INFO L267 ElimStorePlain]: Start of recursive call 166: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:05,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-10 07:40:05,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-11-10 07:40:05,812 INFO L267 ElimStorePlain]: Start of recursive call 168: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:05,840 INFO L267 ElimStorePlain]: Start of recursive call 167: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 43 [2018-11-10 07:40:06,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2018-11-10 07:40:06,009 INFO L267 ElimStorePlain]: Start of recursive call 170: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 24 [2018-11-10 07:40:06,085 INFO L267 ElimStorePlain]: Start of recursive call 171: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,142 INFO L267 ElimStorePlain]: Start of recursive call 169: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:06,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-11-10 07:40:06,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:06,285 INFO L267 ElimStorePlain]: Start of recursive call 173: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:06,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:06,312 INFO L267 ElimStorePlain]: Start of recursive call 174: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,339 INFO L267 ElimStorePlain]: Start of recursive call 172: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,464 INFO L267 ElimStorePlain]: Start of recursive call 164: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:06,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 75 [2018-11-10 07:40:06,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:06,578 INFO L267 ElimStorePlain]: Start of recursive call 176: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:06,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:06,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:06,616 INFO L267 ElimStorePlain]: Start of recursive call 178: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:06,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:06,635 INFO L267 ElimStorePlain]: Start of recursive call 179: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,650 INFO L267 ElimStorePlain]: Start of recursive call 177: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,673 INFO L267 ElimStorePlain]: Start of recursive call 175: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 105 [2018-11-10 07:40:06,825 WARN L179 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 34 [2018-11-10 07:40:06,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:06,831 INFO L267 ElimStorePlain]: Start of recursive call 181: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:06,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:06,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:06,880 INFO L267 ElimStorePlain]: Start of recursive call 183: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:06,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:06,910 INFO L267 ElimStorePlain]: Start of recursive call 184: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,933 INFO L267 ElimStorePlain]: Start of recursive call 182: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,970 INFO L267 ElimStorePlain]: Start of recursive call 180: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:06,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 99 [2018-11-10 07:40:07,135 WARN L179 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 35 [2018-11-10 07:40:07,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:07,139 INFO L267 ElimStorePlain]: Start of recursive call 186: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:07,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:07,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:07,197 INFO L267 ElimStorePlain]: Start of recursive call 188: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:07,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:07,222 INFO L267 ElimStorePlain]: Start of recursive call 189: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:07,241 INFO L267 ElimStorePlain]: Start of recursive call 187: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:07,274 INFO L267 ElimStorePlain]: Start of recursive call 185: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:07,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 105 [2018-11-10 07:40:07,446 WARN L179 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 36 [2018-11-10 07:40:07,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:07,451 INFO L267 ElimStorePlain]: Start of recursive call 191: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:07,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:07,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:07,512 INFO L267 ElimStorePlain]: Start of recursive call 193: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:07,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:07,537 INFO L267 ElimStorePlain]: Start of recursive call 194: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:07,555 INFO L267 ElimStorePlain]: Start of recursive call 192: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:07,592 INFO L267 ElimStorePlain]: Start of recursive call 190: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:07,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 138 treesize of output 110 [2018-11-10 07:40:08,255 WARN L179 SmtUtils]: Spent 586.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 64 [2018-11-10 07:40:08,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-11-10 07:40:08,260 INFO L267 ElimStorePlain]: Start of recursive call 196: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:08,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62 [2018-11-10 07:40:08,473 INFO L267 ElimStorePlain]: Start of recursive call 197: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:08,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 61 treesize of output 59 [2018-11-10 07:40:08,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-11-10 07:40:08,694 INFO L267 ElimStorePlain]: Start of recursive call 199: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:08,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 38 [2018-11-10 07:40:08,797 INFO L267 ElimStorePlain]: Start of recursive call 200: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:08,889 INFO L267 ElimStorePlain]: Start of recursive call 198: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:09,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 56 [2018-11-10 07:40:09,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:09,117 INFO L267 ElimStorePlain]: Start of recursive call 202: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:09,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:09,165 INFO L267 ElimStorePlain]: Start of recursive call 203: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:09,204 INFO L267 ElimStorePlain]: Start of recursive call 201: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:09,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-11-10 07:40:09,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-11-10 07:40:09,443 INFO L267 ElimStorePlain]: Start of recursive call 205: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:09,480 INFO L267 ElimStorePlain]: Start of recursive call 204: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:09,668 INFO L267 ElimStorePlain]: Start of recursive call 195: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:09,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 98 [2018-11-10 07:40:09,852 WARN L179 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 34 [2018-11-10 07:40:09,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:09,857 INFO L267 ElimStorePlain]: Start of recursive call 207: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:09,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:09,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:09,913 INFO L267 ElimStorePlain]: Start of recursive call 209: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:09,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:09,944 INFO L267 ElimStorePlain]: Start of recursive call 210: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:09,962 INFO L267 ElimStorePlain]: Start of recursive call 208: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:09,993 INFO L267 ElimStorePlain]: Start of recursive call 206: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 118 [2018-11-10 07:40:10,322 WARN L179 SmtUtils]: Spent 306.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 46 [2018-11-10 07:40:10,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:10,327 INFO L267 ElimStorePlain]: Start of recursive call 212: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:10,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-11-10 07:40:10,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:10,421 INFO L267 ElimStorePlain]: Start of recursive call 214: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:10,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:10,453 INFO L267 ElimStorePlain]: Start of recursive call 215: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,479 INFO L267 ElimStorePlain]: Start of recursive call 213: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-11-10 07:40:10,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:10,499 INFO L267 ElimStorePlain]: Start of recursive call 217: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:10,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:10,531 INFO L267 ElimStorePlain]: Start of recursive call 218: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,553 INFO L267 ElimStorePlain]: Start of recursive call 216: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,649 INFO L267 ElimStorePlain]: Start of recursive call 211: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-11-10 07:40:10,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 106 [2018-11-10 07:40:10,781 WARN L179 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 34 [2018-11-10 07:40:10,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:10,786 INFO L267 ElimStorePlain]: Start of recursive call 220: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:10,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:10,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:10,838 INFO L267 ElimStorePlain]: Start of recursive call 222: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:10,866 INFO L267 ElimStorePlain]: Start of recursive call 223: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:10,883 INFO L267 ElimStorePlain]: Start of recursive call 221: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,920 INFO L267 ElimStorePlain]: Start of recursive call 219: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:10,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 173 treesize of output 127 [2018-11-10 07:40:11,753 WARN L179 SmtUtils]: Spent 754.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 82 [2018-11-10 07:40:11,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-11-10 07:40:11,760 INFO L267 ElimStorePlain]: Start of recursive call 225: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:11,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-11-10 07:40:11,765 INFO L267 ElimStorePlain]: Start of recursive call 226: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:11,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-11-10 07:40:11,771 INFO L267 ElimStorePlain]: Start of recursive call 227: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:12,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-11-10 07:40:12,380 INFO L267 ElimStorePlain]: Start of recursive call 228: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:12,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-11-10 07:40:12,386 INFO L267 ElimStorePlain]: Start of recursive call 229: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:12,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-11-10 07:40:12,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:12,870 INFO L267 ElimStorePlain]: Start of recursive call 231: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:12,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:12,919 INFO L267 ElimStorePlain]: Start of recursive call 232: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:12,981 INFO L267 ElimStorePlain]: Start of recursive call 230: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:12,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 60 [2018-11-10 07:40:13,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:13,000 INFO L267 ElimStorePlain]: Start of recursive call 234: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:13,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:13,064 INFO L267 ElimStorePlain]: Start of recursive call 235: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:13,119 INFO L267 ElimStorePlain]: Start of recursive call 233: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:13,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 62 [2018-11-10 07:40:13,602 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:13,602 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:13,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-11-10 07:40:13,604 INFO L267 ElimStorePlain]: Start of recursive call 237: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:13,661 INFO L267 ElimStorePlain]: Start of recursive call 236: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:13,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-11-10 07:40:13,674 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:13,675 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:13,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-11-10 07:40:13,676 INFO L267 ElimStorePlain]: Start of recursive call 239: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:13,729 INFO L267 ElimStorePlain]: Start of recursive call 238: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:14,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 64 [2018-11-10 07:40:14,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-10 07:40:14,176 INFO L267 ElimStorePlain]: Start of recursive call 241: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:14,286 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:14,286 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:14,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-10 07:40:14,288 INFO L267 ElimStorePlain]: Start of recursive call 242: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:14,385 INFO L267 ElimStorePlain]: Start of recursive call 240: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:14,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 66 [2018-11-10 07:40:14,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-11-10 07:40:14,423 INFO L267 ElimStorePlain]: Start of recursive call 244: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:14,543 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:14,544 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:14,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-11-10 07:40:14,545 INFO L267 ElimStorePlain]: Start of recursive call 245: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:14,652 INFO L267 ElimStorePlain]: Start of recursive call 243: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:15,216 INFO L267 ElimStorePlain]: Start of recursive call 224: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 8 xjuncts. [2018-11-10 07:40:15,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 110 [2018-11-10 07:40:15,376 WARN L179 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 33 [2018-11-10 07:40:15,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:15,381 INFO L267 ElimStorePlain]: Start of recursive call 247: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:15,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:15,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:15,433 INFO L267 ElimStorePlain]: Start of recursive call 249: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:15,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:15,460 INFO L267 ElimStorePlain]: Start of recursive call 250: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,484 INFO L267 ElimStorePlain]: Start of recursive call 248: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,517 INFO L267 ElimStorePlain]: Start of recursive call 246: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-11-10 07:40:15,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:15,625 INFO L267 ElimStorePlain]: Start of recursive call 252: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:15,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:15,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:15,674 INFO L267 ElimStorePlain]: Start of recursive call 254: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:15,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:15,692 INFO L267 ElimStorePlain]: Start of recursive call 255: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,707 INFO L267 ElimStorePlain]: Start of recursive call 253: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,730 INFO L267 ElimStorePlain]: Start of recursive call 251: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 106 [2018-11-10 07:40:15,864 WARN L179 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 34 [2018-11-10 07:40:15,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:15,869 INFO L267 ElimStorePlain]: Start of recursive call 257: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:15,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:15,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:15,919 INFO L267 ElimStorePlain]: Start of recursive call 259: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:15,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:15,943 INFO L267 ElimStorePlain]: Start of recursive call 260: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,960 INFO L267 ElimStorePlain]: Start of recursive call 258: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:15,994 INFO L267 ElimStorePlain]: Start of recursive call 256: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:16,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 77 [2018-11-10 07:40:16,142 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 32 [2018-11-10 07:40:16,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:16,149 INFO L267 ElimStorePlain]: Start of recursive call 262: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:16,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:40:16,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:16,207 INFO L267 ElimStorePlain]: Start of recursive call 264: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:16,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:16,231 INFO L267 ElimStorePlain]: Start of recursive call 265: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:16,247 INFO L267 ElimStorePlain]: Start of recursive call 263: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:16,283 INFO L267 ElimStorePlain]: Start of recursive call 261: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:16,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 107 treesize of output 93 [2018-11-10 07:40:16,790 WARN L179 SmtUtils]: Spent 435.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 66 [2018-11-10 07:40:16,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 54 [2018-11-10 07:40:16,795 INFO L267 ElimStorePlain]: Start of recursive call 267: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:16,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 55 [2018-11-10 07:40:16,976 INFO L267 ElimStorePlain]: Start of recursive call 268: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:17,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 48 [2018-11-10 07:40:17,152 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:17,153 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:17,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-11-10 07:40:17,154 INFO L267 ElimStorePlain]: Start of recursive call 270: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:17,201 INFO L267 ElimStorePlain]: Start of recursive call 269: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:17,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 52 [2018-11-10 07:40:17,381 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:17,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-11-10 07:40:17,383 INFO L267 ElimStorePlain]: Start of recursive call 272: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:17,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 34 [2018-11-10 07:40:17,473 INFO L267 ElimStorePlain]: Start of recursive call 273: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:17,560 INFO L267 ElimStorePlain]: Start of recursive call 271: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:17,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2018-11-10 07:40:17,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:17,751 INFO L267 ElimStorePlain]: Start of recursive call 275: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:17,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:17,795 INFO L267 ElimStorePlain]: Start of recursive call 276: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:17,829 INFO L267 ElimStorePlain]: Start of recursive call 274: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:18,006 INFO L267 ElimStorePlain]: Start of recursive call 266: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:18,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 105 treesize of output 91 [2018-11-10 07:40:18,406 WARN L179 SmtUtils]: Spent 350.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 57 [2018-11-10 07:40:18,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:40:18,410 INFO L267 ElimStorePlain]: Start of recursive call 278: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-11-10 07:40:18,537 INFO L267 ElimStorePlain]: Start of recursive call 279: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 40 [2018-11-10 07:40:18,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:18,668 INFO L267 ElimStorePlain]: Start of recursive call 281: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:18,701 INFO L267 ElimStorePlain]: Start of recursive call 282: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,724 INFO L267 ElimStorePlain]: Start of recursive call 280: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2018-11-10 07:40:18,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-11-10 07:40:18,845 INFO L267 ElimStorePlain]: Start of recursive call 284: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,862 INFO L267 ElimStorePlain]: Start of recursive call 283: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,919 INFO L267 ElimStorePlain]: Start of recursive call 277: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:18,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 75 [2018-11-10 07:40:19,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:19,038 INFO L267 ElimStorePlain]: Start of recursive call 286: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:19,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:19,084 INFO L267 ElimStorePlain]: Start of recursive call 288: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:19,104 INFO L267 ElimStorePlain]: Start of recursive call 289: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,118 INFO L267 ElimStorePlain]: Start of recursive call 287: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,147 INFO L267 ElimStorePlain]: Start of recursive call 285: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 87 [2018-11-10 07:40:19,289 WARN L179 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 33 [2018-11-10 07:40:19,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:19,294 INFO L267 ElimStorePlain]: Start of recursive call 291: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:19,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:19,339 INFO L267 ElimStorePlain]: Start of recursive call 293: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:19,362 INFO L267 ElimStorePlain]: Start of recursive call 294: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,380 INFO L267 ElimStorePlain]: Start of recursive call 292: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,411 INFO L267 ElimStorePlain]: Start of recursive call 290: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-11-10 07:40:19,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:19,529 INFO L267 ElimStorePlain]: Start of recursive call 296: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:19,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:19,575 INFO L267 ElimStorePlain]: Start of recursive call 298: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:19,596 INFO L267 ElimStorePlain]: Start of recursive call 299: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,611 INFO L267 ElimStorePlain]: Start of recursive call 297: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,641 INFO L267 ElimStorePlain]: Start of recursive call 295: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:19,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 62 [2018-11-10 07:40:19,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:19,736 INFO L267 ElimStorePlain]: Start of recursive call 301: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2018-11-10 07:40:19,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-11-10 07:40:19,769 INFO L267 ElimStorePlain]: Start of recursive call 303: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,779 INFO L267 ElimStorePlain]: Start of recursive call 302: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,800 INFO L267 ElimStorePlain]: Start of recursive call 300: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:19,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 106 [2018-11-10 07:40:19,964 WARN L179 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 38 [2018-11-10 07:40:19,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:19,969 INFO L267 ElimStorePlain]: Start of recursive call 305: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-11-10 07:40:20,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:20,035 INFO L267 ElimStorePlain]: Start of recursive call 307: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:20,065 INFO L267 ElimStorePlain]: Start of recursive call 308: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,091 INFO L267 ElimStorePlain]: Start of recursive call 306: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,128 INFO L267 ElimStorePlain]: Start of recursive call 304: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 112 [2018-11-10 07:40:20,313 WARN L179 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 39 [2018-11-10 07:40:20,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:20,319 INFO L267 ElimStorePlain]: Start of recursive call 310: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-11-10 07:40:20,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:20,394 INFO L267 ElimStorePlain]: Start of recursive call 312: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:20,428 INFO L267 ElimStorePlain]: Start of recursive call 313: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,451 INFO L267 ElimStorePlain]: Start of recursive call 311: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,495 INFO L267 ElimStorePlain]: Start of recursive call 309: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-11-10 07:40:20,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:20,594 INFO L267 ElimStorePlain]: Start of recursive call 315: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:20,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:20,635 INFO L267 ElimStorePlain]: Start of recursive call 317: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:20,656 INFO L267 ElimStorePlain]: Start of recursive call 318: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,671 INFO L267 ElimStorePlain]: Start of recursive call 316: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,695 INFO L267 ElimStorePlain]: Start of recursive call 314: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-11-10 07:40:20,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:20,805 INFO L267 ElimStorePlain]: Start of recursive call 320: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:20,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:20,845 INFO L267 ElimStorePlain]: Start of recursive call 322: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:20,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:20,864 INFO L267 ElimStorePlain]: Start of recursive call 323: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,878 INFO L267 ElimStorePlain]: Start of recursive call 321: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,899 INFO L267 ElimStorePlain]: Start of recursive call 319: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:20,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 83 [2018-11-10 07:40:21,021 WARN L179 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 33 [2018-11-10 07:40:21,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:21,025 INFO L267 ElimStorePlain]: Start of recursive call 325: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:21,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:40:21,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:21,071 INFO L267 ElimStorePlain]: Start of recursive call 327: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:21,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:21,090 INFO L267 ElimStorePlain]: Start of recursive call 328: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:21,103 INFO L267 ElimStorePlain]: Start of recursive call 326: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:21,133 INFO L267 ElimStorePlain]: Start of recursive call 324: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:21,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 76 [2018-11-10 07:40:21,258 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 31 [2018-11-10 07:40:21,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:21,263 INFO L267 ElimStorePlain]: Start of recursive call 330: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:21,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:40:21,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:21,308 INFO L267 ElimStorePlain]: Start of recursive call 332: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:21,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:21,325 INFO L267 ElimStorePlain]: Start of recursive call 333: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:21,337 INFO L267 ElimStorePlain]: Start of recursive call 331: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:21,363 INFO L267 ElimStorePlain]: Start of recursive call 329: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:21,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 219 treesize of output 153 [2018-11-10 07:40:22,282 WARN L179 SmtUtils]: Spent 841.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 77 [2018-11-10 07:40:22,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-11-10 07:40:22,287 INFO L267 ElimStorePlain]: Start of recursive call 335: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:22,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-11-10 07:40:22,293 INFO L267 ElimStorePlain]: Start of recursive call 336: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:22,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-11-10 07:40:22,816 INFO L267 ElimStorePlain]: Start of recursive call 337: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:22,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 79 [2018-11-10 07:40:22,822 INFO L267 ElimStorePlain]: Start of recursive call 338: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:23,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 78 treesize of output 74 [2018-11-10 07:40:23,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-11-10 07:40:23,411 INFO L267 ElimStorePlain]: Start of recursive call 340: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:23,527 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:23,528 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:23,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-11-10 07:40:23,530 INFO L267 ElimStorePlain]: Start of recursive call 341: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:23,647 INFO L267 ElimStorePlain]: Start of recursive call 339: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:23,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 64 [2018-11-10 07:40:23,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-10 07:40:23,687 INFO L267 ElimStorePlain]: Start of recursive call 343: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:23,809 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:23,809 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:23,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-10 07:40:23,811 INFO L267 ElimStorePlain]: Start of recursive call 344: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:23,908 INFO L267 ElimStorePlain]: Start of recursive call 342: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:24,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-11-10 07:40:24,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:24,569 INFO L267 ElimStorePlain]: Start of recursive call 346: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:24,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:24,616 INFO L267 ElimStorePlain]: Start of recursive call 347: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:24,656 INFO L267 ElimStorePlain]: Start of recursive call 345: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:24,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 68 [2018-11-10 07:40:24,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:24,673 INFO L267 ElimStorePlain]: Start of recursive call 349: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:24,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:24,743 INFO L267 ElimStorePlain]: Start of recursive call 350: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:24,805 INFO L267 ElimStorePlain]: Start of recursive call 348: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:25,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 70 [2018-11-10 07:40:25,492 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:25,493 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:25,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-11-10 07:40:25,494 INFO L267 ElimStorePlain]: Start of recursive call 352: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:25,545 INFO L267 ElimStorePlain]: Start of recursive call 351: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:25,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-11-10 07:40:25,555 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:25,556 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:25,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-11-10 07:40:25,557 INFO L267 ElimStorePlain]: Start of recursive call 354: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:25,603 INFO L267 ElimStorePlain]: Start of recursive call 353: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:26,192 INFO L267 ElimStorePlain]: Start of recursive call 334: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 8 xjuncts. [2018-11-10 07:40:26,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 222 treesize of output 154 [2018-11-10 07:40:26,466 WARN L179 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 45 [2018-11-10 07:40:26,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:26,472 INFO L267 ElimStorePlain]: Start of recursive call 356: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:26,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-11-10 07:40:26,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:26,584 INFO L267 ElimStorePlain]: Start of recursive call 358: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:26,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:26,624 INFO L267 ElimStorePlain]: Start of recursive call 359: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:26,655 INFO L267 ElimStorePlain]: Start of recursive call 357: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:26,720 INFO L267 ElimStorePlain]: Start of recursive call 355: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:26,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 141 treesize of output 111 [2018-11-10 07:40:27,339 WARN L179 SmtUtils]: Spent 552.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 64 [2018-11-10 07:40:27,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-11-10 07:40:27,345 INFO L267 ElimStorePlain]: Start of recursive call 361: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:27,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-11-10 07:40:27,522 INFO L267 ElimStorePlain]: Start of recursive call 362: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:27,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-11-10 07:40:27,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:40:27,710 INFO L267 ElimStorePlain]: Start of recursive call 364: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:27,748 INFO L267 ElimStorePlain]: Start of recursive call 363: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:27,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-11-10 07:40:27,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:40:27,936 INFO L267 ElimStorePlain]: Start of recursive call 366: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:28,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-11-10 07:40:28,029 INFO L267 ElimStorePlain]: Start of recursive call 367: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:28,122 INFO L267 ElimStorePlain]: Start of recursive call 365: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:28,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-11-10 07:40:28,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:28,324 INFO L267 ElimStorePlain]: Start of recursive call 369: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:28,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:28,362 INFO L267 ElimStorePlain]: Start of recursive call 370: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:28,397 INFO L267 ElimStorePlain]: Start of recursive call 368: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:28,614 INFO L267 ElimStorePlain]: Start of recursive call 360: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:28,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 67 [2018-11-10 07:40:28,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:28,708 INFO L267 ElimStorePlain]: Start of recursive call 372: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:28,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2018-11-10 07:40:28,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:28,746 INFO L267 ElimStorePlain]: Start of recursive call 374: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:28,750 INFO L267 ElimStorePlain]: Start of recursive call 373: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:28,779 INFO L267 ElimStorePlain]: Start of recursive call 371: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:28,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 89 [2018-11-10 07:40:29,210 WARN L179 SmtUtils]: Spent 377.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 60 [2018-11-10 07:40:29,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-11-10 07:40:29,215 INFO L267 ElimStorePlain]: Start of recursive call 376: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:29,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-11-10 07:40:29,377 INFO L267 ElimStorePlain]: Start of recursive call 377: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:29,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-11-10 07:40:29,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:29,525 INFO L267 ElimStorePlain]: Start of recursive call 379: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:29,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:29,562 INFO L267 ElimStorePlain]: Start of recursive call 380: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:29,588 INFO L267 ElimStorePlain]: Start of recursive call 378: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:29,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-11-10 07:40:29,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-11-10 07:40:29,722 INFO L267 ElimStorePlain]: Start of recursive call 382: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:29,750 INFO L267 ElimStorePlain]: Start of recursive call 381: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:29,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-11-10 07:40:29,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-11-10 07:40:29,894 INFO L267 ElimStorePlain]: Start of recursive call 384: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:29,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-10 07:40:29,967 INFO L267 ElimStorePlain]: Start of recursive call 385: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,037 INFO L267 ElimStorePlain]: Start of recursive call 383: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:30,163 INFO L267 ElimStorePlain]: Start of recursive call 375: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:30,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 109 [2018-11-10 07:40:30,296 WARN L179 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 35 [2018-11-10 07:40:30,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:30,301 INFO L267 ElimStorePlain]: Start of recursive call 387: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:30,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:30,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:30,364 INFO L267 ElimStorePlain]: Start of recursive call 389: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:30,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:30,390 INFO L267 ElimStorePlain]: Start of recursive call 390: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,410 INFO L267 ElimStorePlain]: Start of recursive call 388: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,447 INFO L267 ElimStorePlain]: Start of recursive call 386: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 210 treesize of output 139 [2018-11-10 07:40:30,718 WARN L179 SmtUtils]: Spent 251.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 47 [2018-11-10 07:40:30,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:30,724 INFO L267 ElimStorePlain]: Start of recursive call 392: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:30,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:30,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:30,861 INFO L267 ElimStorePlain]: Start of recursive call 394: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:30,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:30,896 INFO L267 ElimStorePlain]: Start of recursive call 395: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,918 INFO L267 ElimStorePlain]: Start of recursive call 393: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2018-11-10 07:40:30,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:30,933 INFO L267 ElimStorePlain]: Start of recursive call 397: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:30,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:30,974 INFO L267 ElimStorePlain]: Start of recursive call 398: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:30,999 INFO L267 ElimStorePlain]: Start of recursive call 396: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:31,144 INFO L267 ElimStorePlain]: Start of recursive call 391: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:31,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 141 treesize of output 111 [2018-11-10 07:40:31,779 WARN L179 SmtUtils]: Spent 562.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 65 [2018-11-10 07:40:31,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-11-10 07:40:31,784 INFO L267 ElimStorePlain]: Start of recursive call 400: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:31,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-11-10 07:40:31,973 INFO L267 ElimStorePlain]: Start of recursive call 401: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:32,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-11-10 07:40:32,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:40:32,169 INFO L267 ElimStorePlain]: Start of recursive call 403: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:32,211 INFO L267 ElimStorePlain]: Start of recursive call 402: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:32,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-11-10 07:40:32,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:32,376 INFO L267 ElimStorePlain]: Start of recursive call 405: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:32,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:32,414 INFO L267 ElimStorePlain]: Start of recursive call 406: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:32,453 INFO L267 ElimStorePlain]: Start of recursive call 404: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:32,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-11-10 07:40:32,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-11-10 07:40:32,631 INFO L267 ElimStorePlain]: Start of recursive call 408: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:32,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:40:32,727 INFO L267 ElimStorePlain]: Start of recursive call 409: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:32,812 INFO L267 ElimStorePlain]: Start of recursive call 407: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:32,977 INFO L267 ElimStorePlain]: Start of recursive call 399: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:32,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-11-10 07:40:33,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:33,072 INFO L267 ElimStorePlain]: Start of recursive call 411: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:33,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:33,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:33,112 INFO L267 ElimStorePlain]: Start of recursive call 413: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:33,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:33,131 INFO L267 ElimStorePlain]: Start of recursive call 414: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:33,147 INFO L267 ElimStorePlain]: Start of recursive call 412: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:33,170 INFO L267 ElimStorePlain]: Start of recursive call 410: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:33,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 145 treesize of output 115 [2018-11-10 07:40:33,906 WARN L179 SmtUtils]: Spent 665.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 71 [2018-11-10 07:40:33,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-11-10 07:40:33,911 INFO L267 ElimStorePlain]: Start of recursive call 416: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:34,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-11-10 07:40:34,128 INFO L267 ElimStorePlain]: Start of recursive call 417: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:34,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 64 [2018-11-10 07:40:34,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-10 07:40:34,376 INFO L267 ElimStorePlain]: Start of recursive call 419: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:34,476 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:34,476 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:34,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-10 07:40:34,478 INFO L267 ElimStorePlain]: Start of recursive call 420: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:34,584 INFO L267 ElimStorePlain]: Start of recursive call 418: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:34,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-11-10 07:40:34,823 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:34,824 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:40:34,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-11-10 07:40:34,825 INFO L267 ElimStorePlain]: Start of recursive call 422: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:34,870 INFO L267 ElimStorePlain]: Start of recursive call 421: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:35,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-11-10 07:40:35,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:35,103 INFO L267 ElimStorePlain]: Start of recursive call 424: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:35,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:35,149 INFO L267 ElimStorePlain]: Start of recursive call 425: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:35,190 INFO L267 ElimStorePlain]: Start of recursive call 423: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:35,376 INFO L267 ElimStorePlain]: Start of recursive call 415: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:35,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 75 [2018-11-10 07:40:35,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:35,480 INFO L267 ElimStorePlain]: Start of recursive call 427: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:35,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:35,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:35,519 INFO L267 ElimStorePlain]: Start of recursive call 429: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:35,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:35,541 INFO L267 ElimStorePlain]: Start of recursive call 430: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:35,555 INFO L267 ElimStorePlain]: Start of recursive call 428: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:35,579 INFO L267 ElimStorePlain]: Start of recursive call 426: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:35,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 253 treesize of output 171 [2018-11-10 07:40:36,449 WARN L179 SmtUtils]: Spent 794.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 74 [2018-11-10 07:40:36,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-11-10 07:40:36,455 INFO L267 ElimStorePlain]: Start of recursive call 432: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:36,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 84 [2018-11-10 07:40:36,461 INFO L267 ElimStorePlain]: Start of recursive call 433: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:36,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-11-10 07:40:36,466 INFO L267 ElimStorePlain]: Start of recursive call 434: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:37,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-11-10 07:40:37,176 INFO L267 ElimStorePlain]: Start of recursive call 435: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:37,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-11-10 07:40:37,186 INFO L267 ElimStorePlain]: Start of recursive call 436: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:37,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 85 [2018-11-10 07:40:37,198 INFO L267 ElimStorePlain]: Start of recursive call 437: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:37,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 74 [2018-11-10 07:40:37,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:37,822 INFO L267 ElimStorePlain]: Start of recursive call 439: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:37,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:37,895 INFO L267 ElimStorePlain]: Start of recursive call 440: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:37,940 INFO L267 ElimStorePlain]: Start of recursive call 438: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:37,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-11-10 07:40:37,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:37,959 INFO L267 ElimStorePlain]: Start of recursive call 442: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:38,002 INFO L267 ElimStorePlain]: Start of recursive call 443: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:38,038 INFO L267 ElimStorePlain]: Start of recursive call 441: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-11-10 07:40:38,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:38,052 INFO L267 ElimStorePlain]: Start of recursive call 445: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:38,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:38,091 INFO L267 ElimStorePlain]: Start of recursive call 446: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,134 INFO L267 ElimStorePlain]: Start of recursive call 444: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 75 [2018-11-10 07:40:38,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:40:38,865 INFO L267 ElimStorePlain]: Start of recursive call 448: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,921 INFO L267 ElimStorePlain]: Start of recursive call 447: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-11-10 07:40:38,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:40:38,933 INFO L267 ElimStorePlain]: Start of recursive call 450: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,968 INFO L267 ElimStorePlain]: Start of recursive call 449: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:38,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-11-10 07:40:38,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:40:38,981 INFO L267 ElimStorePlain]: Start of recursive call 452: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:39,015 INFO L267 ElimStorePlain]: Start of recursive call 451: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:39,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 84 treesize of output 80 [2018-11-10 07:40:39,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 57 [2018-11-10 07:40:39,723 INFO L267 ElimStorePlain]: Start of recursive call 454: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:39,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 60 [2018-11-10 07:40:39,871 INFO L267 ElimStorePlain]: Start of recursive call 455: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:39,987 INFO L267 ElimStorePlain]: Start of recursive call 453: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:40,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-11-10 07:40:40,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:40:40,017 INFO L267 ElimStorePlain]: Start of recursive call 457: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:40,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-11-10 07:40:40,109 INFO L267 ElimStorePlain]: Start of recursive call 458: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:40,236 INFO L267 ElimStorePlain]: Start of recursive call 456: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:40,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-11-10 07:40:40,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-11-10 07:40:40,270 INFO L267 ElimStorePlain]: Start of recursive call 460: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:40,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:40:40,352 INFO L267 ElimStorePlain]: Start of recursive call 461: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:40,426 INFO L267 ElimStorePlain]: Start of recursive call 459: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:41,557 INFO L267 ElimStorePlain]: Start of recursive call 431: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 12 xjuncts. [2018-11-10 07:40:41,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-11-10 07:40:41,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:41,647 INFO L267 ElimStorePlain]: Start of recursive call 463: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:41,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:41,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:41,684 INFO L267 ElimStorePlain]: Start of recursive call 465: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:41,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:41,702 INFO L267 ElimStorePlain]: Start of recursive call 466: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:41,715 INFO L267 ElimStorePlain]: Start of recursive call 464: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:41,733 INFO L267 ElimStorePlain]: Start of recursive call 462: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:41,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-11-10 07:40:41,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:41,846 INFO L267 ElimStorePlain]: Start of recursive call 468: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:41,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:41,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:41,890 INFO L267 ElimStorePlain]: Start of recursive call 470: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:41,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:41,908 INFO L267 ElimStorePlain]: Start of recursive call 471: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:41,921 INFO L267 ElimStorePlain]: Start of recursive call 469: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:41,955 INFO L267 ElimStorePlain]: Start of recursive call 467: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:41,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 86 [2018-11-10 07:40:42,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:42,076 INFO L267 ElimStorePlain]: Start of recursive call 473: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:42,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:42,130 INFO L267 ElimStorePlain]: Start of recursive call 475: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:42,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:42,155 INFO L267 ElimStorePlain]: Start of recursive call 476: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,169 INFO L267 ElimStorePlain]: Start of recursive call 474: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:42,203 INFO L267 ElimStorePlain]: Start of recursive call 472: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:42,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 76 [2018-11-10 07:40:42,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:42,308 INFO L267 ElimStorePlain]: Start of recursive call 478: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:40:42,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:42,350 INFO L267 ElimStorePlain]: Start of recursive call 480: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:42,367 INFO L267 ElimStorePlain]: Start of recursive call 481: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:42,378 INFO L267 ElimStorePlain]: Start of recursive call 479: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:42,401 INFO L267 ElimStorePlain]: Start of recursive call 477: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:42,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 62 [2018-11-10 07:40:42,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:42,504 INFO L267 ElimStorePlain]: Start of recursive call 483: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2018-11-10 07:40:42,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-11-10 07:40:42,537 INFO L267 ElimStorePlain]: Start of recursive call 485: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,548 INFO L267 ElimStorePlain]: Start of recursive call 484: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,569 INFO L267 ElimStorePlain]: Start of recursive call 482: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:42,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 95 treesize of output 85 [2018-11-10 07:40:43,008 WARN L179 SmtUtils]: Spent 391.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 59 [2018-11-10 07:40:43,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-11-10 07:40:43,013 INFO L267 ElimStorePlain]: Start of recursive call 487: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:43,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-11-10 07:40:43,146 INFO L267 ElimStorePlain]: Start of recursive call 488: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:43,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-11-10 07:40:43,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-10 07:40:43,305 INFO L267 ElimStorePlain]: Start of recursive call 490: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:43,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-11-10 07:40:43,373 INFO L267 ElimStorePlain]: Start of recursive call 491: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:43,436 INFO L267 ElimStorePlain]: Start of recursive call 489: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:43,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-11-10 07:40:43,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:43,601 INFO L267 ElimStorePlain]: Start of recursive call 493: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:43,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:43,633 INFO L267 ElimStorePlain]: Start of recursive call 494: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:43,665 INFO L267 ElimStorePlain]: Start of recursive call 492: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:43,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-11-10 07:40:43,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-11-10 07:40:43,807 INFO L267 ElimStorePlain]: Start of recursive call 496: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:43,834 INFO L267 ElimStorePlain]: Start of recursive call 495: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:43,978 INFO L267 ElimStorePlain]: Start of recursive call 486: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:43,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 94 [2018-11-10 07:40:44,127 WARN L179 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 34 [2018-11-10 07:40:44,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:44,133 INFO L267 ElimStorePlain]: Start of recursive call 498: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:44,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:44,187 INFO L267 ElimStorePlain]: Start of recursive call 500: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:44,227 INFO L267 ElimStorePlain]: Start of recursive call 501: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,247 INFO L267 ElimStorePlain]: Start of recursive call 499: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,278 INFO L267 ElimStorePlain]: Start of recursive call 497: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-11-10 07:40:44,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:44,389 INFO L267 ElimStorePlain]: Start of recursive call 503: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:44,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:44,449 INFO L267 ElimStorePlain]: Start of recursive call 505: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:44,467 INFO L267 ElimStorePlain]: Start of recursive call 506: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,482 INFO L267 ElimStorePlain]: Start of recursive call 504: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,509 INFO L267 ElimStorePlain]: Start of recursive call 502: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 107 [2018-11-10 07:40:44,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:44,622 INFO L267 ElimStorePlain]: Start of recursive call 508: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:44,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:44,666 INFO L267 ElimStorePlain]: Start of recursive call 510: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:44,693 INFO L267 ElimStorePlain]: Start of recursive call 511: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,710 INFO L267 ElimStorePlain]: Start of recursive call 509: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,733 INFO L267 ElimStorePlain]: Start of recursive call 507: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 142 treesize of output 103 [2018-11-10 07:40:44,856 WARN L179 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 33 [2018-11-10 07:40:44,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:44,860 INFO L267 ElimStorePlain]: Start of recursive call 513: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:44,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:44,913 INFO L267 ElimStorePlain]: Start of recursive call 515: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:44,942 INFO L267 ElimStorePlain]: Start of recursive call 516: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:44,960 INFO L267 ElimStorePlain]: Start of recursive call 514: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:44,985 INFO L267 ElimStorePlain]: Start of recursive call 512: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:45,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 90 [2018-11-10 07:40:45,107 WARN L179 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 36 [2018-11-10 07:40:45,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:45,112 INFO L267 ElimStorePlain]: Start of recursive call 518: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:45,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-11-10 07:40:45,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:45,169 INFO L267 ElimStorePlain]: Start of recursive call 520: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:45,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:45,201 INFO L267 ElimStorePlain]: Start of recursive call 521: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:45,218 INFO L267 ElimStorePlain]: Start of recursive call 519: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:45,259 INFO L267 ElimStorePlain]: Start of recursive call 517: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:45,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 106 treesize of output 92 [2018-11-10 07:40:45,712 WARN L179 SmtUtils]: Spent 404.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2018-11-10 07:40:45,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 53 [2018-11-10 07:40:45,719 INFO L267 ElimStorePlain]: Start of recursive call 523: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:45,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-11-10 07:40:45,906 INFO L267 ElimStorePlain]: Start of recursive call 524: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:46,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2018-11-10 07:40:46,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-11-10 07:40:46,078 INFO L267 ElimStorePlain]: Start of recursive call 526: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:46,108 INFO L267 ElimStorePlain]: Start of recursive call 525: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:46,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 45 [2018-11-10 07:40:46,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:46,256 INFO L267 ElimStorePlain]: Start of recursive call 528: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:46,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:46,315 INFO L267 ElimStorePlain]: Start of recursive call 529: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:46,366 INFO L267 ElimStorePlain]: Start of recursive call 527: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:46,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 51 [2018-11-10 07:40:46,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-11-10 07:40:46,535 INFO L267 ElimStorePlain]: Start of recursive call 531: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:46,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 30 [2018-11-10 07:40:46,615 INFO L267 ElimStorePlain]: Start of recursive call 532: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:46,696 INFO L267 ElimStorePlain]: Start of recursive call 530: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:46,853 INFO L267 ElimStorePlain]: Start of recursive call 522: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:46,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 89 [2018-11-10 07:40:47,330 WARN L179 SmtUtils]: Spent 428.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2018-11-10 07:40:47,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-11-10 07:40:47,334 INFO L267 ElimStorePlain]: Start of recursive call 534: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:47,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-11-10 07:40:47,479 INFO L267 ElimStorePlain]: Start of recursive call 535: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:47,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-11-10 07:40:47,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:47,635 INFO L267 ElimStorePlain]: Start of recursive call 537: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:47,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:47,667 INFO L267 ElimStorePlain]: Start of recursive call 538: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:47,693 INFO L267 ElimStorePlain]: Start of recursive call 536: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:47,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-11-10 07:40:47,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-11-10 07:40:47,831 INFO L267 ElimStorePlain]: Start of recursive call 540: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:47,857 INFO L267 ElimStorePlain]: Start of recursive call 539: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:47,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-11-10 07:40:48,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-11-10 07:40:48,002 INFO L267 ElimStorePlain]: Start of recursive call 542: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:48,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-10 07:40:48,065 INFO L267 ElimStorePlain]: Start of recursive call 543: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:48,125 INFO L267 ElimStorePlain]: Start of recursive call 541: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:48,254 INFO L267 ElimStorePlain]: Start of recursive call 533: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:48,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 98 [2018-11-10 07:40:48,388 WARN L179 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 34 [2018-11-10 07:40:48,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:48,392 INFO L267 ElimStorePlain]: Start of recursive call 545: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:48,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-11-10 07:40:48,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:48,453 INFO L267 ElimStorePlain]: Start of recursive call 547: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:48,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:48,478 INFO L267 ElimStorePlain]: Start of recursive call 548: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:48,496 INFO L267 ElimStorePlain]: Start of recursive call 546: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:48,528 INFO L267 ElimStorePlain]: Start of recursive call 544: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:48,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 86 [2018-11-10 07:40:48,978 WARN L179 SmtUtils]: Spent 396.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 58 [2018-11-10 07:40:48,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-11-10 07:40:48,985 INFO L267 ElimStorePlain]: Start of recursive call 550: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:49,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-11-10 07:40:49,118 INFO L267 ElimStorePlain]: Start of recursive call 551: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:49,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-11-10 07:40:49,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:49,256 INFO L267 ElimStorePlain]: Start of recursive call 553: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:49,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:49,280 INFO L267 ElimStorePlain]: Start of recursive call 554: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:49,303 INFO L267 ElimStorePlain]: Start of recursive call 552: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:49,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 45 [2018-11-10 07:40:49,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-11-10 07:40:49,441 INFO L267 ElimStorePlain]: Start of recursive call 556: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:49,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-11-10 07:40:49,504 INFO L267 ElimStorePlain]: Start of recursive call 557: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:49,552 INFO L267 ElimStorePlain]: Start of recursive call 555: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:49,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:40:49,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-11-10 07:40:49,683 INFO L267 ElimStorePlain]: Start of recursive call 559: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:49,706 INFO L267 ElimStorePlain]: Start of recursive call 558: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:49,811 INFO L267 ElimStorePlain]: Start of recursive call 549: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:49,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 110 [2018-11-10 07:40:49,939 WARN L179 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 33 [2018-11-10 07:40:49,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:49,943 INFO L267 ElimStorePlain]: Start of recursive call 561: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:49,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:49,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:49,990 INFO L267 ElimStorePlain]: Start of recursive call 563: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:50,019 INFO L267 ElimStorePlain]: Start of recursive call 564: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,042 INFO L267 ElimStorePlain]: Start of recursive call 562: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,075 INFO L267 ElimStorePlain]: Start of recursive call 560: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 110 [2018-11-10 07:40:50,215 WARN L179 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 33 [2018-11-10 07:40:50,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:50,219 INFO L267 ElimStorePlain]: Start of recursive call 566: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:50,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:50,271 INFO L267 ElimStorePlain]: Start of recursive call 568: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:50,299 INFO L267 ElimStorePlain]: Start of recursive call 569: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,329 INFO L267 ElimStorePlain]: Start of recursive call 567: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,366 INFO L267 ElimStorePlain]: Start of recursive call 565: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 84 [2018-11-10 07:40:50,483 WARN L179 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 35 [2018-11-10 07:40:50,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:50,487 INFO L267 ElimStorePlain]: Start of recursive call 571: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-11-10 07:40:50,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:50,544 INFO L267 ElimStorePlain]: Start of recursive call 573: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:50,569 INFO L267 ElimStorePlain]: Start of recursive call 574: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,586 INFO L267 ElimStorePlain]: Start of recursive call 572: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,615 INFO L267 ElimStorePlain]: Start of recursive call 570: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 73 [2018-11-10 07:40:50,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:50,705 INFO L267 ElimStorePlain]: Start of recursive call 576: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:40:50,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:50,740 INFO L267 ElimStorePlain]: Start of recursive call 578: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:50,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:50,755 INFO L267 ElimStorePlain]: Start of recursive call 579: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,766 INFO L267 ElimStorePlain]: Start of recursive call 577: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,788 INFO L267 ElimStorePlain]: Start of recursive call 575: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:50,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 105 [2018-11-10 07:40:50,938 WARN L179 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 35 [2018-11-10 07:40:50,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:50,943 INFO L267 ElimStorePlain]: Start of recursive call 581: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:51,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:51,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:51,007 INFO L267 ElimStorePlain]: Start of recursive call 583: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:51,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:51,038 INFO L267 ElimStorePlain]: Start of recursive call 584: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:51,063 INFO L267 ElimStorePlain]: Start of recursive call 582: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:51,100 INFO L267 ElimStorePlain]: Start of recursive call 580: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:51,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 134 treesize of output 106 [2018-11-10 07:40:51,714 WARN L179 SmtUtils]: Spent 524.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 61 [2018-11-10 07:40:51,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-11-10 07:40:51,719 INFO L267 ElimStorePlain]: Start of recursive call 586: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:51,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 58 [2018-11-10 07:40:51,895 INFO L267 ElimStorePlain]: Start of recursive call 587: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:52,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 55 [2018-11-10 07:40:52,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-11-10 07:40:52,085 INFO L267 ElimStorePlain]: Start of recursive call 589: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:52,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 34 [2018-11-10 07:40:52,168 INFO L267 ElimStorePlain]: Start of recursive call 590: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:52,245 INFO L267 ElimStorePlain]: Start of recursive call 588: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:52,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 49 [2018-11-10 07:40:52,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:52,438 INFO L267 ElimStorePlain]: Start of recursive call 592: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:52,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:40:52,478 INFO L267 ElimStorePlain]: Start of recursive call 593: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:52,510 INFO L267 ElimStorePlain]: Start of recursive call 591: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:52,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 50 [2018-11-10 07:40:52,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-11-10 07:40:52,709 INFO L267 ElimStorePlain]: Start of recursive call 595: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:52,745 INFO L267 ElimStorePlain]: Start of recursive call 594: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:52,901 INFO L267 ElimStorePlain]: Start of recursive call 585: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:52,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 88 [2018-11-10 07:40:53,376 WARN L179 SmtUtils]: Spent 406.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 59 [2018-11-10 07:40:53,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-11-10 07:40:53,381 INFO L267 ElimStorePlain]: Start of recursive call 597: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:53,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 48 [2018-11-10 07:40:53,536 INFO L267 ElimStorePlain]: Start of recursive call 598: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:53,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-11-10 07:40:53,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-11-10 07:40:53,694 INFO L267 ElimStorePlain]: Start of recursive call 600: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:53,725 INFO L267 ElimStorePlain]: Start of recursive call 599: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:53,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-11-10 07:40:53,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:53,862 INFO L267 ElimStorePlain]: Start of recursive call 602: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:53,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:53,901 INFO L267 ElimStorePlain]: Start of recursive call 603: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:53,929 INFO L267 ElimStorePlain]: Start of recursive call 601: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:54,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 47 [2018-11-10 07:40:54,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2018-11-10 07:40:54,088 INFO L267 ElimStorePlain]: Start of recursive call 605: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:54,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 28 [2018-11-10 07:40:54,170 INFO L267 ElimStorePlain]: Start of recursive call 606: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:54,231 INFO L267 ElimStorePlain]: Start of recursive call 604: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:54,380 INFO L267 ElimStorePlain]: Start of recursive call 596: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:54,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 76 [2018-11-10 07:40:54,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:54,480 INFO L267 ElimStorePlain]: Start of recursive call 608: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:54,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:40:54,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:54,530 INFO L267 ElimStorePlain]: Start of recursive call 610: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:54,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:54,545 INFO L267 ElimStorePlain]: Start of recursive call 611: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:54,556 INFO L267 ElimStorePlain]: Start of recursive call 609: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:54,582 INFO L267 ElimStorePlain]: Start of recursive call 607: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:54,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 146 treesize of output 112 [2018-11-10 07:40:55,151 WARN L179 SmtUtils]: Spent 508.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 63 [2018-11-10 07:40:55,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-11-10 07:40:55,156 INFO L267 ElimStorePlain]: Start of recursive call 613: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:55,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 62 [2018-11-10 07:40:55,331 INFO L267 ElimStorePlain]: Start of recursive call 614: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:55,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 57 [2018-11-10 07:40:55,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 34 [2018-11-10 07:40:55,529 INFO L267 ElimStorePlain]: Start of recursive call 616: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:55,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-11-10 07:40:55,651 INFO L267 ElimStorePlain]: Start of recursive call 617: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:55,739 INFO L267 ElimStorePlain]: Start of recursive call 615: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:55,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 52 [2018-11-10 07:40:55,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:40:55,932 INFO L267 ElimStorePlain]: Start of recursive call 619: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:55,965 INFO L267 ElimStorePlain]: Start of recursive call 618: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:56,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2018-11-10 07:40:56,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:56,156 INFO L267 ElimStorePlain]: Start of recursive call 621: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:56,194 INFO L267 ElimStorePlain]: Start of recursive call 622: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:56,232 INFO L267 ElimStorePlain]: Start of recursive call 620: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:56,404 INFO L267 ElimStorePlain]: Start of recursive call 612: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:56,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-11-10 07:40:56,517 WARN L179 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 32 [2018-11-10 07:40:56,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:56,522 INFO L267 ElimStorePlain]: Start of recursive call 624: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:56,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:56,572 INFO L267 ElimStorePlain]: Start of recursive call 626: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:56,591 INFO L267 ElimStorePlain]: Start of recursive call 627: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:56,606 INFO L267 ElimStorePlain]: Start of recursive call 625: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:56,633 INFO L267 ElimStorePlain]: Start of recursive call 623: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:56,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 82 [2018-11-10 07:40:56,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:56,738 INFO L267 ElimStorePlain]: Start of recursive call 629: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-11-10 07:40:56,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:56,780 INFO L267 ElimStorePlain]: Start of recursive call 631: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:56,794 INFO L267 ElimStorePlain]: Start of recursive call 632: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,797 INFO L267 ElimStorePlain]: Start of recursive call 630: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,820 INFO L267 ElimStorePlain]: Start of recursive call 628: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:40:56,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 96 treesize of output 84 [2018-11-10 07:40:57,262 WARN L179 SmtUtils]: Spent 377.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 56 [2018-11-10 07:40:57,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-11-10 07:40:57,266 INFO L267 ElimStorePlain]: Start of recursive call 634: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:57,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:40:57,418 INFO L267 ElimStorePlain]: Start of recursive call 635: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:57,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-11-10 07:40:57,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:57,586 INFO L267 ElimStorePlain]: Start of recursive call 637: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:57,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:40:57,615 INFO L267 ElimStorePlain]: Start of recursive call 638: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:57,641 INFO L267 ElimStorePlain]: Start of recursive call 636: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:57,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-10 07:40:57,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-11-10 07:40:57,768 INFO L267 ElimStorePlain]: Start of recursive call 640: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:57,793 INFO L267 ElimStorePlain]: Start of recursive call 639: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:57,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 43 [2018-11-10 07:40:57,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 24 [2018-11-10 07:40:57,920 INFO L267 ElimStorePlain]: Start of recursive call 642: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:57,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2018-11-10 07:40:57,981 INFO L267 ElimStorePlain]: Start of recursive call 643: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:58,039 INFO L267 ElimStorePlain]: Start of recursive call 641: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:40:58,167 INFO L267 ElimStorePlain]: Start of recursive call 633: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:40:58,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 253 treesize of output 166 [2018-11-10 07:40:58,450 WARN L179 SmtUtils]: Spent 256.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 43 [2018-11-10 07:40:58,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:58,456 INFO L267 ElimStorePlain]: Start of recursive call 645: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:58,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:40:58,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:58,567 INFO L267 ElimStorePlain]: Start of recursive call 647: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:58,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:40:58,597 INFO L267 ElimStorePlain]: Start of recursive call 648: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:58,620 INFO L267 ElimStorePlain]: Start of recursive call 646: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:58,692 INFO L267 ElimStorePlain]: Start of recursive call 644: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-11-10 07:40:58,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-11-10 07:40:58,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:40:58,803 INFO L267 ElimStorePlain]: Start of recursive call 650: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:58,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:40:58,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:40:58,843 INFO L267 ElimStorePlain]: Start of recursive call 652: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:58,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:40:58,861 INFO L267 ElimStorePlain]: Start of recursive call 653: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:58,875 INFO L267 ElimStorePlain]: Start of recursive call 651: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:58,897 INFO L267 ElimStorePlain]: Start of recursive call 649: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:40:58,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 145 treesize of output 113 [2018-11-10 07:40:59,528 WARN L179 SmtUtils]: Spent 561.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 62 [2018-11-10 07:40:59,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 60 [2018-11-10 07:40:59,533 INFO L267 ElimStorePlain]: Start of recursive call 655: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:59,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-11-10 07:40:59,732 INFO L267 ElimStorePlain]: Start of recursive call 656: End of recursive call: and 1 xjuncts. [2018-11-10 07:40:59,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 58 [2018-11-10 07:40:59,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 37 [2018-11-10 07:40:59,940 INFO L267 ElimStorePlain]: Start of recursive call 658: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:00,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-11-10 07:41:00,027 INFO L267 ElimStorePlain]: Start of recursive call 659: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:00,119 INFO L267 ElimStorePlain]: Start of recursive call 657: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:41:00,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 53 [2018-11-10 07:41:00,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-11-10 07:41:00,333 INFO L267 ElimStorePlain]: Start of recursive call 661: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:00,379 INFO L267 ElimStorePlain]: Start of recursive call 660: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:00,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 52 [2018-11-10 07:41:00,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:00,603 INFO L267 ElimStorePlain]: Start of recursive call 663: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:00,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:41:00,649 INFO L267 ElimStorePlain]: Start of recursive call 664: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:00,686 INFO L267 ElimStorePlain]: Start of recursive call 662: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:00,885 INFO L267 ElimStorePlain]: Start of recursive call 654: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:41:00,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 124 [2018-11-10 07:41:01,232 WARN L179 SmtUtils]: Spent 328.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 47 [2018-11-10 07:41:01,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:41:01,238 INFO L267 ElimStorePlain]: Start of recursive call 666: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:01,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-11-10 07:41:01,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:01,344 INFO L267 ElimStorePlain]: Start of recursive call 668: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:01,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:41:01,377 INFO L267 ElimStorePlain]: Start of recursive call 669: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:01,402 INFO L267 ElimStorePlain]: Start of recursive call 667: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:01,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-11-10 07:41:01,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:01,423 INFO L267 ElimStorePlain]: Start of recursive call 671: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:01,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:41:01,458 INFO L267 ElimStorePlain]: Start of recursive call 672: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:01,482 INFO L267 ElimStorePlain]: Start of recursive call 670: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:01,600 INFO L267 ElimStorePlain]: Start of recursive call 665: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-11-10 07:41:01,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 256 treesize of output 169 [2018-11-10 07:41:01,884 WARN L179 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 44 [2018-11-10 07:41:01,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:41:01,889 INFO L267 ElimStorePlain]: Start of recursive call 674: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:01,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:41:01,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:01,997 INFO L267 ElimStorePlain]: Start of recursive call 676: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:02,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:41:02,034 INFO L267 ElimStorePlain]: Start of recursive call 677: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:02,062 INFO L267 ElimStorePlain]: Start of recursive call 675: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:02,144 INFO L267 ElimStorePlain]: Start of recursive call 673: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-11-10 07:41:02,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 77 [2018-11-10 07:41:02,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:41:02,232 INFO L267 ElimStorePlain]: Start of recursive call 679: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:02,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-11-10 07:41:02,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:02,270 INFO L267 ElimStorePlain]: Start of recursive call 681: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:02,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:41:02,288 INFO L267 ElimStorePlain]: Start of recursive call 682: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:02,300 INFO L267 ElimStorePlain]: Start of recursive call 680: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:02,317 INFO L267 ElimStorePlain]: Start of recursive call 678: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:02,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 207 treesize of output 145 [2018-11-10 07:41:03,183 WARN L179 SmtUtils]: Spent 786.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 79 [2018-11-10 07:41:03,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-11-10 07:41:03,190 INFO L267 ElimStorePlain]: Start of recursive call 684: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:03,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 84 [2018-11-10 07:41:03,197 INFO L267 ElimStorePlain]: Start of recursive call 685: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:03,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-11-10 07:41:03,203 INFO L267 ElimStorePlain]: Start of recursive call 686: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:03,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-11-10 07:41:03,209 INFO L267 ElimStorePlain]: Start of recursive call 687: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:03,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-11-10 07:41:03,919 INFO L267 ElimStorePlain]: Start of recursive call 688: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:03,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-11-10 07:41:03,928 INFO L267 ElimStorePlain]: Start of recursive call 689: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:03,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 79 [2018-11-10 07:41:03,936 INFO L267 ElimStorePlain]: Start of recursive call 690: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:04,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 78 treesize of output 76 [2018-11-10 07:41:04,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-11-10 07:41:04,599 INFO L267 ElimStorePlain]: Start of recursive call 692: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:04,775 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:41:04,776 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:41:04,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-11-10 07:41:04,777 INFO L267 ElimStorePlain]: Start of recursive call 693: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:04,922 INFO L267 ElimStorePlain]: Start of recursive call 691: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:41:04,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-11-10 07:41:04,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-11-10 07:41:04,952 INFO L267 ElimStorePlain]: Start of recursive call 695: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:05,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:41:05,033 INFO L267 ElimStorePlain]: Start of recursive call 696: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:05,126 INFO L267 ElimStorePlain]: Start of recursive call 694: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:41:05,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-11-10 07:41:05,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 07:41:05,155 INFO L267 ElimStorePlain]: Start of recursive call 698: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:05,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-11-10 07:41:05,264 INFO L267 ElimStorePlain]: Start of recursive call 699: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:05,339 INFO L267 ElimStorePlain]: Start of recursive call 697: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:41:06,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-11-10 07:41:06,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:41:06,270 INFO L267 ElimStorePlain]: Start of recursive call 701: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:06,310 INFO L267 ElimStorePlain]: Start of recursive call 700: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:06,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-11-10 07:41:06,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-11-10 07:41:06,326 INFO L267 ElimStorePlain]: Start of recursive call 703: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:06,368 INFO L267 ElimStorePlain]: Start of recursive call 702: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:06,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 68 [2018-11-10 07:41:06,378 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:41:06,379 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:41:06,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-11-10 07:41:06,380 INFO L267 ElimStorePlain]: Start of recursive call 705: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:06,441 INFO L267 ElimStorePlain]: Start of recursive call 704: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:07,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 70 [2018-11-10 07:41:07,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:07,361 INFO L267 ElimStorePlain]: Start of recursive call 707: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:07,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:41:07,429 INFO L267 ElimStorePlain]: Start of recursive call 708: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:07,499 INFO L267 ElimStorePlain]: Start of recursive call 706: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:07,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-11-10 07:41:07,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:41:07,513 INFO L267 ElimStorePlain]: Start of recursive call 710: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:07,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:07,562 INFO L267 ElimStorePlain]: Start of recursive call 711: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:07,603 INFO L267 ElimStorePlain]: Start of recursive call 709: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:07,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-11-10 07:41:07,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:07,619 INFO L267 ElimStorePlain]: Start of recursive call 713: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:07,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:41:07,660 INFO L267 ElimStorePlain]: Start of recursive call 714: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:07,707 INFO L267 ElimStorePlain]: Start of recursive call 712: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:08,695 INFO L267 ElimStorePlain]: Start of recursive call 683: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 12 xjuncts. [2018-11-10 07:41:08,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 95 treesize of output 85 [2018-11-10 07:41:09,162 WARN L179 SmtUtils]: Spent 403.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 60 [2018-11-10 07:41:09,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-11-10 07:41:09,167 INFO L267 ElimStorePlain]: Start of recursive call 716: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:09,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-11-10 07:41:09,328 INFO L267 ElimStorePlain]: Start of recursive call 717: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:09,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-11-10 07:41:09,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-10 07:41:09,497 INFO L267 ElimStorePlain]: Start of recursive call 719: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:09,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-11-10 07:41:09,572 INFO L267 ElimStorePlain]: Start of recursive call 720: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:09,631 INFO L267 ElimStorePlain]: Start of recursive call 718: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:41:09,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-11-10 07:41:09,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-11-10 07:41:09,791 INFO L267 ElimStorePlain]: Start of recursive call 722: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:09,819 INFO L267 ElimStorePlain]: Start of recursive call 721: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:09,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-11-10 07:41:09,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:09,981 INFO L267 ElimStorePlain]: Start of recursive call 724: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:10,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:41:10,016 INFO L267 ElimStorePlain]: Start of recursive call 725: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:10,043 INFO L267 ElimStorePlain]: Start of recursive call 723: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:10,167 INFO L267 ElimStorePlain]: Start of recursive call 715: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:41:10,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 207 treesize of output 136 [2018-11-10 07:41:10,443 WARN L179 SmtUtils]: Spent 252.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 46 [2018-11-10 07:41:10,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:41:10,449 INFO L267 ElimStorePlain]: Start of recursive call 727: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:10,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-11-10 07:41:10,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:10,561 INFO L267 ElimStorePlain]: Start of recursive call 729: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:10,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:41:10,592 INFO L267 ElimStorePlain]: Start of recursive call 730: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:10,612 INFO L267 ElimStorePlain]: Start of recursive call 728: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:10,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2018-11-10 07:41:10,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:10,628 INFO L267 ElimStorePlain]: Start of recursive call 732: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:10,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:41:10,666 INFO L267 ElimStorePlain]: Start of recursive call 733: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:10,695 INFO L267 ElimStorePlain]: Start of recursive call 731: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:10,812 INFO L267 ElimStorePlain]: Start of recursive call 726: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-11-10 07:41:10,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 219 treesize of output 148 [2018-11-10 07:41:11,047 WARN L179 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 44 [2018-11-10 07:41:11,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:41:11,052 INFO L267 ElimStorePlain]: Start of recursive call 735: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:11,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-11-10 07:41:11,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:11,135 INFO L267 ElimStorePlain]: Start of recursive call 737: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:11,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-11-10 07:41:11,172 INFO L267 ElimStorePlain]: Start of recursive call 738: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:11,198 INFO L267 ElimStorePlain]: Start of recursive call 736: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:11,254 INFO L267 ElimStorePlain]: Start of recursive call 734: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:41:11,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 65 [2018-11-10 07:41:11,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:41:11,344 INFO L267 ElimStorePlain]: Start of recursive call 740: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:11,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-11-10 07:41:11,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:41:11,386 INFO L267 ElimStorePlain]: Start of recursive call 742: End of recursive call: and 1 xjuncts. [2018-11-10 07:41:11,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-11-10 07:41:11,404 INFO L267 ElimStorePlain]: Start of recursive call 743: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:11,415 INFO L267 ElimStorePlain]: Start of recursive call 741: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:41:11,433 INFO L267 ElimStorePlain]: Start of recursive call 739: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:44:48,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: 870 dim-0 vars, and 188 xjuncts. [2018-11-10 07:44:48,447 INFO L202 ElimStorePlain]: Needed 743 recursive calls to eliminate 11 variables, input treesize:336, output treesize:6536 [2018-11-10 07:44:50,627 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse0 (= |c_main_write~$Pointer$_#ptr.base| c_main_~x~0.base)) (.cse10 (= |c_main_write~$Pointer$_#value.base| c_main_~x~0.base)) (.cse6 (= |c_main_write~$Pointer$_#value.base| |c_main_write~$Pointer$_#ptr.base|)) (.cse1 (= c_main_~x~0.offset |c_main_write~$Pointer$_#ptr.offset|))) (let ((.cse8 (not .cse1)) (.cse9 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#value.offset|))) (.cse71 (bvsle |c_main_write~$Pointer$_#value.offset| (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)))) (.cse43 (not .cse6)) (.cse5 (not .cse10)) (.cse7 (not .cse0))) (and (or .cse0 (forall ((v_prenex_560 (_ BitVec 32)) (v_arrayElimCell_105 (_ BitVec 32)) (v_arrayElimCell_273 (_ BitVec 32)) (v_prenex_561 (_ BitVec 32))) (or (= v_arrayElimCell_273 v_prenex_561) (not (bvsle (_ bv0 32) v_arrayElimCell_105)) (bvsle (bvadd v_arrayElimCell_105 (_ bv4 32)) (select (store |c_#length| v_prenex_561 v_prenex_560) v_arrayElimCell_273)) (= v_arrayElimCell_273 c_main_~x~0.base)))) (or .cse1 .cse0 (forall ((v_arrayElimCell_157 (_ BitVec 32)) (v_arrayElimCell_323 (_ BitVec 32)) (v_prenex_688 (_ BitVec 32)) (v_prenex_687 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_157 (_ bv4 32)) (select (store |c_#length| v_prenex_688 v_prenex_687) v_arrayElimCell_323)) (= v_arrayElimCell_323 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_157)) (= v_arrayElimCell_323 v_prenex_688)))) (or .cse1 (forall ((v_prenex_581 (_ BitVec 32)) (v_prenex_580 (_ BitVec 32)) (v_arrayElimCell_359 (_ BitVec 32)) (v_prenex_50 (_ BitVec 32)) (v_prenex_579 (_ BitVec 32)) (v_prenex_578 (_ BitVec 32))) (let ((.cse4 (store |c_#length| v_prenex_581 v_prenex_580))) (let ((.cse3 (bvadd v_prenex_579 (_ bv4 32))) (.cse2 (select .cse4 v_arrayElimCell_359))) (or (bvsle (bvadd v_prenex_50 (_ bv4 32)) .cse2) (= v_arrayElimCell_359 v_prenex_581) (= v_prenex_578 v_prenex_581) (bvsle .cse3 (select .cse4 v_prenex_578)) (not (bvsle (_ bv0 32) v_prenex_50)) (bvsle .cse3 .cse2) (= v_arrayElimCell_359 c_main_~x~0.base))))) .cse5 .cse6) (or .cse7 .cse8 (forall ((v_prenex_466 (_ BitVec 32)) (v_prenex_465 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_466 v_prenex_465) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_466))) .cse9) (or .cse1 (forall ((v_prenex_582 (_ BitVec 32)) (v_arrayElimCell_608 (_ BitVec 32)) (v_prenex_584 (_ BitVec 32)) (v_prenex_583 (_ BitVec 32))) (or (= v_arrayElimCell_608 v_prenex_584) (bvsle (bvadd v_prenex_583 (_ bv4 32)) (select (store |c_#length| v_prenex_584 v_prenex_582) v_arrayElimCell_608)) (not (bvsle (_ bv0 32) v_prenex_583)))) .cse0) (or .cse1 (forall ((v_prenex_274 (_ BitVec 32)) (v_prenex_273 (_ BitVec 32)) (v_arrayElimCell_518 (_ BitVec 32)) (v_prenex_275 (_ BitVec 32))) (or (= v_arrayElimCell_518 c_main_~x~0.base) (= v_arrayElimCell_518 v_prenex_274) (not (bvsle (_ bv0 32) v_prenex_273)) (bvsle (bvadd v_prenex_273 (_ bv4 32)) (select (store |c_#length| v_prenex_274 v_prenex_275) v_arrayElimCell_518)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_523 (_ BitVec 32)) (v_prenex_255 (_ BitVec 32)) (v_prenex_254 (_ BitVec 32)) (v_prenex_253 (_ BitVec 32))) (or (= v_arrayElimCell_523 v_prenex_254) (bvsle (bvadd v_prenex_253 (_ bv4 32)) (select (store |c_#length| v_prenex_254 v_prenex_255) v_arrayElimCell_523)) (not (bvsle (_ bv0 32) v_prenex_253)) (= v_arrayElimCell_523 c_main_~x~0.base)))) (or .cse1 (forall ((v_prenex_736 (_ BitVec 32)) (v_prenex_735 (_ BitVec 32)) (v_prenex_734 (_ BitVec 32)) (v_prenex_733 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_734)) (= v_prenex_733 v_prenex_736) (bvsle (bvadd v_prenex_734 (_ bv4 32)) (select (store |c_#length| v_prenex_736 v_prenex_735) v_prenex_733))))) (or .cse10 .cse1 (forall ((v_prenex_236 (_ BitVec 32)) (v_prenex_235 (_ BitVec 32)) (v_prenex_234 (_ BitVec 32)) (v_arrayElimCell_509 (_ BitVec 32))) (or (= v_arrayElimCell_509 v_prenex_234) (not (bvsle (_ bv0 32) v_prenex_235)) (= v_arrayElimCell_509 c_main_~x~0.base) (bvsle (bvadd v_prenex_235 (_ bv4 32)) (select (store |c_#length| v_prenex_234 v_prenex_236) v_arrayElimCell_509)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_414 (_ BitVec 32)) (v_prenex_559 (_ BitVec 32)) (v_prenex_558 (_ BitVec 32)) (v_prenex_557 (_ BitVec 32)) (v_prenex_556 (_ BitVec 32))) (let ((.cse11 (select (store |c_#length| v_prenex_558 v_prenex_557) v_arrayElimCell_414))) (or (= v_arrayElimCell_414 v_prenex_558) (bvsle (bvadd v_prenex_556 (_ bv4 32)) .cse11) (not (bvsle (_ bv0 32) v_prenex_559)) (bvsle (bvadd v_prenex_559 (_ bv4 32)) .cse11) (= v_arrayElimCell_414 c_main_~x~0.base)))) .cse5 .cse6) (or .cse0 (forall ((v_prenex_670 (_ BitVec 32)) (v_arrayElimCell_555 (_ BitVec 32)) (v_prenex_26 (_ BitVec 32)) (v_prenex_671 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_26 (_ bv4 32)) (select (store |c_#length| v_prenex_671 v_prenex_670) v_arrayElimCell_555)) (not (bvsle (_ bv0 32) v_prenex_26)) (= v_arrayElimCell_555 v_prenex_671)))) (or .cse1 .cse7 (forall ((v_arrayElimCell_664 (_ BitVec 32)) (v_prenex_675 (_ BitVec 32)) (v_prenex_674 (_ BitVec 32)) (v_prenex_673 (_ BitVec 32)) (v_prenex_672 (_ BitVec 32))) (let ((.cse12 (select (store |c_#length| v_prenex_675 v_prenex_673) v_arrayElimCell_664))) (or (= v_arrayElimCell_664 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_674)) (= v_arrayElimCell_664 v_prenex_675) (bvsle (bvadd v_prenex_674 (_ bv4 32)) .cse12) (bvsle (bvadd v_prenex_672 (_ bv4 32)) .cse12))))) (or .cse0 (forall ((v_arrayElimCell_305 (_ BitVec 32)) (v_arrayElimCell_78 (_ BitVec 32)) (v_prenex_224 (_ BitVec 32)) (v_prenex_223 (_ BitVec 32)) (v_prenex_222 (_ BitVec 32))) (let ((.cse13 (select (store |c_#length| v_prenex_222 v_prenex_224) v_arrayElimCell_305))) (or (bvsle (bvadd v_prenex_223 (_ bv4 32)) .cse13) (bvsle (bvadd v_arrayElimCell_78 (_ bv4 32)) .cse13) (not (bvsle (_ bv0 32) v_arrayElimCell_78)) (= v_arrayElimCell_305 v_prenex_222))))) (or .cse10 .cse1 .cse0 (forall ((v_prenex_609 (_ BitVec 32)) (v_prenex_608 (_ BitVec 32)) (v_arrayElimCell_674 (_ BitVec 32)) (v_prenex_607 (_ BitVec 32)) (v_prenex_610 (_ BitVec 32))) (let ((.cse14 (select (store |c_#length| v_prenex_610 v_prenex_608) v_arrayElimCell_674))) (or (not (bvsle (_ bv0 32) v_prenex_609)) (= v_arrayElimCell_674 v_prenex_610) (= v_arrayElimCell_674 c_main_~x~0.base) (bvsle (bvadd v_prenex_607 (_ bv4 32)) .cse14) (bvsle (bvadd v_prenex_609 (_ bv4 32)) .cse14))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_301 (_ BitVec 32)) (v_prenex_37 (_ BitVec 32)) (v_prenex_454 (_ BitVec 32)) (v_prenex_453 (_ BitVec 32))) (or (= v_arrayElimCell_301 v_prenex_454) (= v_arrayElimCell_301 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_37)) (bvsle (bvadd v_prenex_37 (_ bv4 32)) (select (store |c_#length| v_prenex_454 v_prenex_453) v_arrayElimCell_301))))) (or .cse1 (forall ((v_prenex_72 (_ BitVec 32)) (v_prenex_369 (_ BitVec 32)) (v_prenex_368 (_ BitVec 32)) (v_prenex_367 (_ BitVec 32)) (v_arrayElimCell_186 (_ BitVec 32))) (let ((.cse15 (select (store |c_#length| v_prenex_367 v_prenex_369) v_arrayElimCell_186))) (or (= v_arrayElimCell_186 v_prenex_367) (not (bvsle (_ bv0 32) v_prenex_72)) (bvsle (bvadd v_prenex_368 (_ bv4 32)) .cse15) (bvsle (bvadd v_prenex_72 (_ bv4 32)) .cse15)))) .cse0) (or .cse0 (forall ((v_arrayElimCell_215 (_ BitVec 32)) (v_prenex_239 (_ BitVec 32)) (v_prenex_238 (_ BitVec 32)) (v_prenex_237 (_ BitVec 32)) (v_arrayElimCell_84 (_ BitVec 32))) (let ((.cse16 (select (store |c_#length| v_prenex_237 v_prenex_239) v_arrayElimCell_215))) (or (= v_arrayElimCell_215 v_prenex_237) (bvsle (bvadd v_prenex_238 (_ bv4 32)) .cse16) (bvsle (bvadd v_arrayElimCell_84 (_ bv4 32)) .cse16) (not (bvsle (_ bv0 32) v_arrayElimCell_84))))) .cse5) (or .cse10 .cse0 (forall ((v_prenex_509 (_ BitVec 32)) (v_prenex_508 (_ BitVec 32)) (v_prenex_507 (_ BitVec 32)) (v_prenex_158 (_ BitVec 32)) (v_prenex_510 (_ BitVec 32))) (let ((.cse17 (select (store |c_#length| v_prenex_509 v_prenex_508) v_prenex_158))) (or (not (bvsle (_ bv0 32) v_prenex_510)) (= v_prenex_158 c_main_~x~0.base) (= v_prenex_158 v_prenex_509) (bvsle (bvadd v_prenex_510 (_ bv4 32)) .cse17) (bvsle (bvadd v_prenex_507 (_ bv4 32)) .cse17))))) (or .cse1 (forall ((v_prenex_729 (_ BitVec 32)) (v_arrayElimCell_565 (_ BitVec 32)) (v_prenex_732 (_ BitVec 32)) (v_prenex_731 (_ BitVec 32)) (v_prenex_730 (_ BitVec 32))) (let ((.cse18 (select (store |c_#length| v_prenex_732 v_prenex_731) v_arrayElimCell_565))) (or (bvsle (bvadd v_prenex_729 (_ bv4 32)) .cse18) (= v_arrayElimCell_565 v_prenex_732) (bvsle (bvadd v_prenex_730 (_ bv4 32)) .cse18) (not (bvsle (_ bv0 32) v_prenex_729)))))) (or .cse1 .cse5 (forall ((v_arrayElimCell_640 (_ BitVec 32)) (v_prenex_53 (_ BitVec 32)) (v_prenex_349 (_ BitVec 32)) (v_prenex_348 (_ BitVec 32)) (v_prenex_347 (_ BitVec 32)) (v_prenex_346 (_ BitVec 32))) (let ((.cse21 (store |c_#length| v_prenex_346 v_prenex_349))) (let ((.cse20 (select .cse21 v_arrayElimCell_640)) (.cse19 (bvadd v_prenex_348 (_ bv4 32)))) (or (bvsle .cse19 .cse20) (not (bvsle (_ bv0 32) v_prenex_53)) (= v_arrayElimCell_640 v_prenex_346) (bvsle (bvadd v_prenex_53 (_ bv4 32)) .cse20) (bvsle .cse19 (select .cse21 v_prenex_347)) (= v_arrayElimCell_640 c_main_~x~0.base) (= v_prenex_347 v_prenex_346))))) .cse6) (or .cse1 .cse5 (forall ((v_prenex_629 (_ BitVec 32)) (v_prenex_628 (_ BitVec 32)) (v_prenex_627 (_ BitVec 32)) (v_arrayElimCell_415 (_ BitVec 32)) (v_prenex_630 (_ BitVec 32))) (let ((.cse22 (select (store |c_#length| v_prenex_629 v_prenex_628) v_arrayElimCell_415))) (or (= v_arrayElimCell_415 c_main_~x~0.base) (bvsle (bvadd v_prenex_630 (_ bv4 32)) .cse22) (bvsle (bvadd v_prenex_627 (_ bv4 32)) .cse22) (not (bvsle (_ bv0 32) v_prenex_630)) (= v_arrayElimCell_415 v_prenex_629))))) (or .cse1 (forall ((v_prenex_480 (_ BitVec 32)) (v_prenex_479 (_ BitVec 32)) (v_prenex_478 (_ BitVec 32)) (v_prenex_477 (_ BitVec 32)) (v_prenex_476 (_ BitVec 32)) (v_arrayElimCell_253 (_ BitVec 32))) (let ((.cse23 (store |c_#length| v_prenex_480 v_prenex_478))) (or (= v_arrayElimCell_253 c_main_~x~0.base) (= v_arrayElimCell_253 v_prenex_480) (not (bvsle (_ bv0 32) v_prenex_479)) (= v_prenex_476 v_prenex_480) (bvsle (bvadd v_prenex_479 (_ bv4 32)) (select .cse23 v_arrayElimCell_253)) (bvsle (bvadd v_prenex_477 (_ bv4 32)) (select .cse23 v_prenex_476))))) .cse5 .cse6) (or .cse1 .cse7 (forall ((v_arrayElimCell_398 (_ BitVec 32)) (v_prenex_393 (_ BitVec 32)) (v_prenex_392 (_ BitVec 32)) (v_prenex_391 (_ BitVec 32)) (v_prenex_390 (_ BitVec 32))) (let ((.cse24 (select (store |c_#length| v_prenex_390 v_prenex_392) v_arrayElimCell_398))) (or (not (bvsle (_ bv0 32) v_prenex_393)) (= v_arrayElimCell_398 c_main_~x~0.base) (bvsle (bvadd v_prenex_391 (_ bv4 32)) .cse24) (bvsle (bvadd v_prenex_393 (_ bv4 32)) .cse24) (= v_arrayElimCell_398 v_prenex_390))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_564 (_ BitVec 32)) (v_prenex_655 (_ BitVec 32)) (v_prenex_654 (_ BitVec 32)) (v_prenex_653 (_ BitVec 32)) (v_prenex_652 (_ BitVec 32))) (let ((.cse25 (select (store |c_#length| v_prenex_655 v_prenex_653) v_arrayElimCell_564))) (or (bvsle (bvadd v_prenex_654 (_ bv4 32)) .cse25) (bvsle (bvadd v_prenex_652 (_ bv4 32)) .cse25) (not (bvsle (_ bv0 32) v_prenex_654)) (= v_arrayElimCell_564 v_prenex_655))))) (or .cse1 .cse0 (forall ((v_prenex_518 (_ BitVec 32)) (v_prenex_517 (_ BitVec 32)) (v_prenex_516 (_ BitVec 32)) (v_prenex_515 (_ BitVec 32)) (v_arrayElimCell_591 (_ BitVec 32))) (let ((.cse26 (select (store |c_#length| v_prenex_518 v_prenex_516) v_arrayElimCell_591))) (or (bvsle (bvadd v_prenex_517 (_ bv4 32)) .cse26) (bvsle (bvadd v_prenex_515 (_ bv4 32)) .cse26) (not (bvsle (_ bv0 32) v_prenex_517)) (= v_arrayElimCell_591 c_main_~x~0.base) (= v_arrayElimCell_591 v_prenex_518))))) (or (forall ((v_prenex_692 (_ BitVec 32)) (v_prenex_691 (_ BitVec 32)) (v_prenex_690 (_ BitVec 32)) (v_prenex_689 (_ BitVec 32)) (v_arrayElimCell_341 (_ BitVec 32)) (v_prenex_693 (_ BitVec 32))) (let ((.cse29 (store |c_#length| v_prenex_692 v_prenex_691))) (let ((.cse28 (select .cse29 v_arrayElimCell_341)) (.cse27 (bvadd v_prenex_690 (_ bv4 32)))) (or (not (bvsle (_ bv0 32) v_prenex_693)) (= v_arrayElimCell_341 c_main_~x~0.base) (= v_arrayElimCell_341 v_prenex_692) (bvsle .cse27 .cse28) (bvsle (bvadd v_prenex_693 (_ bv4 32)) .cse28) (= v_prenex_689 v_prenex_692) (bvsle .cse27 (select .cse29 v_prenex_689)))))) .cse1 .cse5) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_366 (_ BitVec 32)) (v_prenex_713 (_ BitVec 32)) (v_prenex_712 (_ BitVec 32)) (v_prenex_711 (_ BitVec 32)) (v_prenex_710 (_ BitVec 32))) (let ((.cse30 (select (store |c_#length| v_prenex_713 v_prenex_712) v_arrayElimCell_366))) (or (not (bvsle (_ bv0 32) v_prenex_710)) (bvsle (bvadd v_prenex_710 (_ bv4 32)) .cse30) (bvsle (bvadd v_prenex_711 (_ bv4 32)) .cse30) (= v_arrayElimCell_366 c_main_~x~0.base) (= v_arrayElimCell_366 v_prenex_713))))) (or .cse1 (forall ((v_prenex_373 (_ BitVec 32)) (v_arrayElimCell_449 (_ BitVec 32)) (v_prenex_376 (_ BitVec 32)) (v_prenex_375 (_ BitVec 32)) (v_prenex_374 (_ BitVec 32))) (let ((.cse31 (select (store |c_#length| v_prenex_373 v_prenex_375) v_arrayElimCell_449))) (or (= v_arrayElimCell_449 v_prenex_373) (bvsle (bvadd v_prenex_376 (_ bv4 32)) .cse31) (not (bvsle (_ bv0 32) v_prenex_376)) (= v_arrayElimCell_449 c_main_~x~0.base) (bvsle (bvadd v_prenex_374 (_ bv4 32)) .cse31))))) (or .cse1 (forall ((v_arrayElimCell_292 (_ BitVec 32)) (v_prenex_336 (_ BitVec 32)) (v_prenex_335 (_ BitVec 32)) (v_prenex_334 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_336)) (bvsle (bvadd v_prenex_336 (_ bv4 32)) (select (store |c_#length| v_prenex_334 v_prenex_335) v_arrayElimCell_292)) (= v_arrayElimCell_292 c_main_~x~0.base) (= v_arrayElimCell_292 v_prenex_334))) .cse5 .cse6) (or .cse1 .cse7 (forall ((v_prenex_549 (_ BitVec 32)) (v_prenex_548 (_ BitVec 32)) (v_prenex_547 (_ BitVec 32)) (v_prenex_546 (_ BitVec 32)) (v_arrayElimCell_570 (_ BitVec 32))) (let ((.cse32 (select (store |c_#length| v_prenex_549 v_prenex_547) v_arrayElimCell_570))) (or (= v_arrayElimCell_570 v_prenex_549) (bvsle (bvadd v_prenex_546 (_ bv4 32)) .cse32) (bvsle (bvadd v_prenex_548 (_ bv4 32)) .cse32) (not (bvsle (_ bv0 32) v_prenex_548)))))) (or .cse0 .cse5 (forall ((v_prenex_639 (_ BitVec 32)) (v_arrayElimCell_699 (_ BitVec 32)) (v_prenex_638 (_ BitVec 32)) (v_prenex_641 (_ BitVec 32)) (v_prenex_640 (_ BitVec 32))) (let ((.cse33 (select (store |c_#length| v_prenex_641 v_prenex_639) v_arrayElimCell_699))) (or (bvsle (bvadd v_prenex_640 (_ bv4 32)) .cse33) (= v_arrayElimCell_699 v_prenex_641) (= v_arrayElimCell_699 c_main_~x~0.base) (bvsle (bvadd v_prenex_638 (_ bv4 32)) .cse33) (not (bvsle (_ bv0 32) v_prenex_640)))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_477 (_ BitVec 32)) (v_prenex_649 (_ BitVec 32)) (v_prenex_651 (_ BitVec 32)) (v_prenex_650 (_ BitVec 32))) (or (= v_arrayElimCell_477 c_main_~x~0.base) (= v_arrayElimCell_477 v_prenex_651) (not (bvsle (_ bv0 32) v_prenex_650)) (bvsle (bvadd v_prenex_650 (_ bv4 32)) (select (store |c_#length| v_prenex_651 v_prenex_649) v_arrayElimCell_477))))) (or .cse1 .cse0 (forall ((v_prenex_317 (_ BitVec 32)) (v_prenex_316 (_ BitVec 32)) (v_arrayElimCell_405 (_ BitVec 32)) (v_prenex_315 (_ BitVec 32)) (v_prenex_314 (_ BitVec 32))) (let ((.cse34 (select (store |c_#length| v_prenex_314 v_prenex_316) v_arrayElimCell_405))) (or (not (bvsle (_ bv0 32) v_prenex_317)) (= v_arrayElimCell_405 c_main_~x~0.base) (= v_arrayElimCell_405 v_prenex_314) (bvsle (bvadd v_prenex_317 (_ bv4 32)) .cse34) (bvsle (bvadd v_prenex_315 (_ bv4 32)) .cse34))))) (or .cse1 .cse0 (forall ((v_prenex_419 (_ BitVec 32)) (v_prenex_418 (_ BitVec 32)) (v_prenex_148 (_ BitVec 32)) (v_prenex_422 (_ BitVec 32)) (v_prenex_421 (_ BitVec 32)) (v_prenex_420 (_ BitVec 32))) (let ((.cse39 (store |c_#length| v_prenex_422 v_prenex_420))) (let ((.cse37 (bvadd v_prenex_419 (_ bv4 32))) (.cse36 (select .cse39 v_prenex_148)) (.cse35 (bvadd v_prenex_421 (_ bv4 32))) (.cse38 (select .cse39 v_prenex_418))) (or (= v_prenex_148 c_main_~x~0.base) (bvsle .cse35 .cse36) (= v_prenex_148 v_prenex_422) (bvsle .cse37 .cse38) (= v_prenex_418 v_prenex_422) (bvsle .cse37 .cse36) (bvsle .cse35 .cse38) (not (bvsle (_ bv0 32) v_prenex_421))))))) (or (forall ((v_prenex_490 (_ BitVec 32)) (v_prenex_489 (_ BitVec 32)) (v_prenex_488 (_ BitVec 32)) (v_prenex_487 (_ BitVec 32)) (v_prenex_486 (_ BitVec 32)) (v_arrayElimCell_353 (_ BitVec 32))) (let ((.cse42 (store |c_#length| v_prenex_489 v_prenex_488))) (let ((.cse40 (select .cse42 v_arrayElimCell_353)) (.cse41 (bvadd v_prenex_487 (_ bv4 32)))) (or (bvsle (bvadd v_prenex_490 (_ bv4 32)) .cse40) (bvsle .cse41 .cse40) (= v_prenex_486 v_prenex_489) (not (bvsle (_ bv0 32) v_prenex_490)) (bvsle .cse41 (select .cse42 v_prenex_486)) (= v_arrayElimCell_353 c_main_~x~0.base) (= v_arrayElimCell_353 v_prenex_489))))) .cse1 .cse43 .cse5) (or .cse1 (forall ((v_arrayElimCell_420 (_ BitVec 32)) (v_prenex_700 (_ BitVec 32)) (v_prenex_699 (_ BitVec 32)) (v_prenex_698 (_ BitVec 32)) (v_prenex_697 (_ BitVec 32))) (let ((.cse44 (select (store |c_#length| v_prenex_700 v_prenex_699) v_arrayElimCell_420))) (or (= v_arrayElimCell_420 c_main_~x~0.base) (= v_arrayElimCell_420 v_prenex_700) (bvsle (bvadd v_prenex_697 (_ bv4 32)) .cse44) (bvsle (bvadd v_prenex_698 (_ bv4 32)) .cse44) (not (bvsle (_ bv0 32) v_prenex_697))))) .cse5 .cse6) (or (forall ((v_prenex_606 (_ BitVec 32)) (v_prenex_605 (_ BitVec 32)) (v_prenex_604 (_ BitVec 32)) (v_arrayElimCell_580 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_605 (_ bv4 32)) (select (store |c_#length| v_prenex_606 v_prenex_604) v_arrayElimCell_580)) (= v_arrayElimCell_580 v_prenex_606) (not (bvsle (_ bv0 32) v_prenex_605)))) .cse1 .cse5 .cse6) (or .cse1 (forall ((v_prenex_719 (_ BitVec 32)) (v_arrayElimCell_113 (_ BitVec 32)) (v_prenex_718 (_ BitVec 32)) (v_arrayElimCell_528 (_ BitVec 32)) (v_prenex_720 (_ BitVec 32))) (let ((.cse45 (select (store |c_#length| v_prenex_720 v_prenex_719) v_arrayElimCell_528))) (or (bvsle (bvadd v_arrayElimCell_113 (_ bv4 32)) .cse45) (bvsle (bvadd v_prenex_718 (_ bv4 32)) .cse45) (= v_arrayElimCell_528 v_prenex_720) (not (bvsle (_ bv0 32) v_arrayElimCell_113))))) .cse0) (or .cse1 .cse7 (forall ((v_arrayElimCell_439 (_ BitVec 32)) (v_prenex_458 (_ BitVec 32)) (v_prenex_457 (_ BitVec 32)) (v_prenex_456 (_ BitVec 32)) (v_prenex_455 (_ BitVec 32))) (let ((.cse46 (select (store |c_#length| v_prenex_457 v_prenex_456) v_arrayElimCell_439))) (or (not (bvsle (_ bv0 32) v_prenex_458)) (= v_arrayElimCell_439 v_prenex_457) (= v_arrayElimCell_439 c_main_~x~0.base) (bvsle (bvadd v_prenex_455 (_ bv4 32)) .cse46) (bvsle (bvadd v_prenex_458 (_ bv4 32)) .cse46))))) (or .cse10 .cse1 .cse7 (forall ((v_prenex_41 (_ BitVec 32)) (v_prenex_181 (_ BitVec 32)) (v_prenex_180 (_ BitVec 32)) (v_prenex_179 (_ BitVec 32)) (v_arrayElimCell_363 (_ BitVec 32))) (let ((.cse47 (select (store |c_#length| v_prenex_180 v_prenex_179) v_arrayElimCell_363))) (or (= v_arrayElimCell_363 v_prenex_180) (bvsle (bvadd v_prenex_181 (_ bv4 32)) .cse47) (= v_arrayElimCell_363 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_41)) (bvsle (bvadd v_prenex_41 (_ bv4 32)) .cse47))))) (or .cse1 .cse0 (forall ((v_prenex_494 (_ BitVec 32)) (v_prenex_493 (_ BitVec 32)) (v_prenex_52 (_ BitVec 32)) (v_arrayElimCell_559 (_ BitVec 32)) (v_prenex_495 (_ BitVec 32))) (let ((.cse48 (select (store |c_#length| v_prenex_495 v_prenex_494) v_arrayElimCell_559))) (or (bvsle (bvadd v_prenex_493 (_ bv4 32)) .cse48) (bvsle (bvadd v_prenex_52 (_ bv4 32)) .cse48) (= v_arrayElimCell_559 v_prenex_495) (not (bvsle (_ bv0 32) v_prenex_52)) (= v_arrayElimCell_559 c_main_~x~0.base))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_677 (_ BitVec 32)) (v_prenex_746 (_ BitVec 32)) (v_prenex_745 (_ BitVec 32)) (v_prenex_744 (_ BitVec 32)) (v_prenex_743 (_ BitVec 32))) (let ((.cse49 (select (store |c_#length| v_prenex_746 v_prenex_745) v_arrayElimCell_677))) (or (not (bvsle (_ bv0 32) v_prenex_743)) (= v_arrayElimCell_677 v_prenex_746) (bvsle (bvadd v_prenex_744 (_ bv4 32)) .cse49) (bvsle (bvadd v_prenex_743 (_ bv4 32)) .cse49) (= v_arrayElimCell_677 c_main_~x~0.base))))) (or .cse10 .cse1 .cse7 (forall ((v_arrayElimCell_666 (_ BitVec 32)) (v_prenex_228 (_ BitVec 32)) (v_prenex_227 (_ BitVec 32)) (v_prenex_226 (_ BitVec 32)) (v_prenex_225 (_ BitVec 32))) (let ((.cse50 (select (store |c_#length| v_prenex_225 v_prenex_228) v_arrayElimCell_666))) (or (bvsle (bvadd v_prenex_226 (_ bv4 32)) .cse50) (= v_arrayElimCell_666 v_prenex_225) (not (bvsle (_ bv0 32) v_prenex_226)) (= v_arrayElimCell_666 c_main_~x~0.base) (bvsle (bvadd v_prenex_227 (_ bv4 32)) .cse50))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_211 (_ BitVec 32)) (v_prenex_774 (_ BitVec 32)) (v_prenex_773 (_ BitVec 32)) (v_prenex_772 (_ BitVec 32)) (v_prenex_34 (_ BitVec 32))) (let ((.cse51 (select (store |c_#length| v_prenex_774 v_prenex_773) v_arrayElimCell_211))) (or (bvsle (bvadd v_prenex_772 (_ bv4 32)) .cse51) (not (bvsle (_ bv0 32) v_prenex_34)) (bvsle (bvadd v_prenex_34 (_ bv4 32)) .cse51) (= v_arrayElimCell_211 v_prenex_774) (= v_arrayElimCell_211 c_main_~x~0.base)))) .cse0) (or .cse1 .cse0 (forall ((v_prenex_252 (_ BitVec 32)) (v_prenex_251 (_ BitVec 32)) (v_prenex_75 (_ BitVec 32)) (v_arrayElimCell_461 (_ BitVec 32))) (or (= v_arrayElimCell_461 v_prenex_251) (not (bvsle (_ bv0 32) v_prenex_75)) (bvsle (bvadd v_prenex_75 (_ bv4 32)) (select (store |c_#length| v_prenex_251 v_prenex_252) v_arrayElimCell_461)) (= v_arrayElimCell_461 c_main_~x~0.base)))) (or .cse10 .cse1 .cse0 (forall ((v_prenex_728 (_ BitVec 32)) (v_prenex_727 (_ BitVec 32)) (v_arrayElimCell_633 (_ BitVec 32)) (v_prenex_726 (_ BitVec 32)) (v_prenex_725 (_ BitVec 32))) (let ((.cse52 (select (store |c_#length| v_prenex_728 v_prenex_727) v_arrayElimCell_633))) (or (bvsle (bvadd v_prenex_726 (_ bv4 32)) .cse52) (not (bvsle (_ bv0 32) v_prenex_725)) (= v_arrayElimCell_633 v_prenex_728) (bvsle (bvadd v_prenex_725 (_ bv4 32)) .cse52))))) (or .cse1 .cse7 (forall ((v_prenex_483 (_ BitVec 32)) (v_prenex_482 (_ BitVec 32)) (v_prenex_481 (_ BitVec 32)) (v_arrayElimCell_437 (_ BitVec 32)) (v_prenex_485 (_ BitVec 32)) (v_prenex_484 (_ BitVec 32))) (let ((.cse57 (store |c_#length| v_prenex_484 v_prenex_483))) (let ((.cse53 (bvadd v_prenex_485 (_ bv4 32))) (.cse55 (select .cse57 v_arrayElimCell_437)) (.cse56 (bvadd v_prenex_482 (_ bv4 32))) (.cse54 (select .cse57 v_prenex_481))) (or (= v_prenex_481 v_prenex_484) (= v_arrayElimCell_437 c_main_~x~0.base) (bvsle .cse53 .cse54) (not (bvsle (_ bv0 32) v_prenex_485)) (bvsle .cse53 .cse55) (bvsle .cse56 .cse55) (= v_arrayElimCell_437 v_prenex_484) (bvsle .cse56 .cse54)))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_245 (_ BitVec 32)) (v_prenex_666 (_ BitVec 32)) (v_prenex_665 (_ BitVec 32)) (v_prenex_664 (_ BitVec 32)) (v_prenex_66 (_ BitVec 32))) (let ((.cse58 (select (store |c_#length| v_prenex_666 v_prenex_665) v_arrayElimCell_245))) (or (not (bvsle (_ bv0 32) v_prenex_66)) (bvsle (bvadd v_prenex_66 (_ bv4 32)) .cse58) (= v_arrayElimCell_245 v_prenex_666) (bvsle (bvadd v_prenex_664 (_ bv4 32)) .cse58))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_146 (_ BitVec 32)) (v_prenex_519 (_ BitVec 32)) (v_arrayElimCell_309 (_ BitVec 32)) (v_prenex_520 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_146 (_ bv4 32)) (select (store |c_#length| v_prenex_520 v_prenex_519) v_arrayElimCell_309)) (= v_arrayElimCell_309 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_146)) (= v_arrayElimCell_309 v_prenex_520)))) (or .cse1 .cse5 (forall ((v_arrayElimCell_289 (_ BitVec 32)) (v_prenex_669 (_ BitVec 32)) (v_prenex_668 (_ BitVec 32)) (v_prenex_667 (_ BitVec 32))) (or (= v_arrayElimCell_289 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_668)) (bvsle (bvadd v_prenex_668 (_ bv4 32)) (select (store |c_#length| v_prenex_669 v_prenex_667) v_arrayElimCell_289)) (= v_arrayElimCell_289 v_prenex_669))) .cse6) (or .cse1 (forall ((v_prenex_329 (_ BitVec 32)) (v_arrayElimCell_285 (_ BitVec 32)) (v_prenex_330 (_ BitVec 32)) (v_prenex_36 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_36 (_ bv4 32)) (select (store |c_#length| v_prenex_329 v_prenex_330) v_arrayElimCell_285)) (= v_arrayElimCell_285 v_prenex_329) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_285) (not (bvsle (_ bv0 32) v_prenex_36)))) .cse43 .cse5) (or .cse1 (forall ((v_arrayElimCell_344 (_ BitVec 32)) (v_prenex_470 (_ BitVec 32)) (v_prenex_469 (_ BitVec 32)) (v_prenex_468 (_ BitVec 32)) (v_prenex_467 (_ BitVec 32))) (let ((.cse59 (select (store |c_#length| v_prenex_469 v_prenex_468) v_arrayElimCell_344))) (or (= v_arrayElimCell_344 c_main_~x~0.base) (bvsle (bvadd v_prenex_470 (_ bv4 32)) .cse59) (not (bvsle (_ bv0 32) v_prenex_470)) (bvsle (bvadd v_prenex_467 (_ bv4 32)) .cse59) (= v_arrayElimCell_344 v_prenex_469)))) .cse5 .cse6) (or .cse1 .cse5 .cse6 (forall ((v_arrayElimCell_577 (_ BitVec 32)) (v_prenex_437 (_ BitVec 32)) (v_prenex_436 (_ BitVec 32)) (v_prenex_35 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_35 (_ bv4 32)) (select (store |c_#length| v_prenex_437 v_prenex_436) v_arrayElimCell_577)) (= v_arrayElimCell_577 v_prenex_437) (not (bvsle (_ bv0 32) v_prenex_35))))) (or .cse1 (forall ((v_arrayElimCell_662 (_ BitVec 32)) (v_prenex_218 (_ BitVec 32)) (v_prenex_217 (_ BitVec 32)) (v_prenex_216 (_ BitVec 32)) (v_prenex_215 (_ BitVec 32))) (let ((.cse60 (select (store |c_#length| v_prenex_215 v_prenex_218) v_arrayElimCell_662))) (or (= v_arrayElimCell_662 c_main_~x~0.base) (= v_arrayElimCell_662 v_prenex_215) (not (bvsle (_ bv0 32) v_prenex_216)) (bvsle (bvadd v_prenex_217 (_ bv4 32)) .cse60) (bvsle (bvadd v_prenex_216 (_ bv4 32)) .cse60))))) (or .cse0 .cse5 (forall ((v_prenex_206 (_ BitVec 32)) (v_prenex_205 (_ BitVec 32)) (v_arrayElimCell_551 (_ BitVec 32)) (v_arrayElimCell_81 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_81 (_ bv4 32)) (select (store |c_#length| v_prenex_205 v_prenex_206) v_arrayElimCell_551)) (= v_arrayElimCell_551 v_prenex_205) (not (bvsle (_ bv0 32) v_arrayElimCell_81)) (= v_arrayElimCell_551 c_main_~x~0.base)))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_387 (_ BitVec 32)) (v_prenex_42 (_ BitVec 32)) (v_prenex_306 (_ BitVec 32)) (v_prenex_305 (_ BitVec 32)) (v_prenex_304 (_ BitVec 32))) (let ((.cse61 (select (store |c_#length| v_prenex_304 v_prenex_306) v_arrayElimCell_387))) (or (not (bvsle (_ bv0 32) v_prenex_42)) (= v_arrayElimCell_387 v_prenex_304) (bvsle (bvadd v_prenex_305 (_ bv4 32)) .cse61) (bvsle (bvadd v_prenex_42 (_ bv4 32)) .cse61))))) (or .cse1 .cse5 (forall ((v_prenex_769 (_ BitVec 32)) (v_prenex_768 (_ BitVec 32)) (v_prenex_771 (_ BitVec 32)) (v_prenex_100 (_ BitVec 32)) (v_prenex_770 (_ BitVec 32))) (let ((.cse62 (select (store |c_#length| v_prenex_771 v_prenex_770) v_prenex_100))) (or (bvsle (bvadd v_prenex_768 (_ bv4 32)) .cse62) (= v_prenex_100 c_main_~x~0.base) (bvsle (bvadd v_prenex_769 (_ bv4 32)) .cse62) (not (bvsle (_ bv0 32) v_prenex_768)) (= v_prenex_100 v_prenex_771)))) .cse6) (or .cse1 .cse0 (forall ((v_prenex_351 (_ BitVec 32)) (v_prenex_350 (_ BitVec 32)) (v_arrayElimCell_688 (_ BitVec 32)) (v_prenex_352 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_352)) (= v_arrayElimCell_688 v_prenex_350) (bvsle (bvadd v_prenex_352 (_ bv4 32)) (select (store |c_#length| v_prenex_350 v_prenex_351) v_arrayElimCell_688)) (= v_arrayElimCell_688 c_main_~x~0.base)))) (or .cse10 .cse1 (forall ((v_arrayElimCell_480 (_ BitVec 32)) (v_prenex_663 (_ BitVec 32)) (v_prenex_662 (_ BitVec 32)) (v_prenex_661 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_662 (_ bv4 32)) (select (store |c_#length| v_prenex_663 v_prenex_661) v_arrayElimCell_480)) (not (bvsle (_ bv0 32) v_prenex_662)) (= v_arrayElimCell_480 v_prenex_663) (= v_arrayElimCell_480 c_main_~x~0.base))) .cse0) (or .cse1 (forall ((v_arrayElimCell_404 (_ BitVec 32)) (v_prenex_313 (_ BitVec 32)) (v_prenex_312 (_ BitVec 32)) (v_prenex_311 (_ BitVec 32)) (v_prenex_310 (_ BitVec 32))) (let ((.cse63 (select (store |c_#length| v_prenex_310 v_prenex_312) v_arrayElimCell_404))) (or (= v_arrayElimCell_404 v_prenex_310) (not (bvsle (_ bv0 32) v_prenex_313)) (bvsle (bvadd v_prenex_313 (_ bv4 32)) .cse63) (= v_arrayElimCell_404 c_main_~x~0.base) (bvsle (bvadd v_prenex_311 (_ bv4 32)) .cse63))))) (or .cse1 (forall ((v_arrayElimCell_219 (_ BitVec 32)) (v_prenex_633 (_ BitVec 32)) (v_prenex_632 (_ BitVec 32)) (v_prenex_631 (_ BitVec 32)) (v_arrayElimCell_132 (_ BitVec 32))) (let ((.cse64 (select (store |c_#length| v_prenex_633 v_prenex_632) v_arrayElimCell_219))) (or (bvsle (bvadd v_arrayElimCell_132 (_ bv4 32)) .cse64) (not (bvsle (_ bv0 32) v_arrayElimCell_132)) (= v_arrayElimCell_219 v_prenex_633) (bvsle (bvadd v_prenex_631 (_ bv4 32)) .cse64)))) .cse5 .cse6) (or .cse10 .cse1 .cse7 (forall ((v_prenex_283 (_ BitVec 32)) (v_prenex_282 (_ BitVec 32)) (v_prenex_281 (_ BitVec 32)) (v_prenex_280 (_ BitVec 32)) (v_arrayElimCell_441 (_ BitVec 32))) (let ((.cse65 (select (store |c_#length| v_prenex_280 v_prenex_282) v_arrayElimCell_441))) (or (bvsle (bvadd v_prenex_281 (_ bv4 32)) .cse65) (= v_arrayElimCell_441 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_283)) (bvsle (bvadd v_prenex_283 (_ bv4 32)) .cse65) (= v_arrayElimCell_441 v_prenex_280))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_657 (_ BitVec 32)) (v_prenex_279 (_ BitVec 32)) (v_prenex_278 (_ BitVec 32)) (v_prenex_277 (_ BitVec 32)) (v_prenex_276 (_ BitVec 32))) (let ((.cse66 (select (store |c_#length| v_prenex_276 v_prenex_279) v_arrayElimCell_657))) (or (bvsle (bvadd v_prenex_278 (_ bv4 32)) .cse66) (= v_arrayElimCell_657 v_prenex_276) (= v_arrayElimCell_657 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_277)) (bvsle (bvadd v_prenex_277 (_ bv4 32)) .cse66))))) (or .cse1 .cse0 (forall ((v_prenex_285 (_ BitVec 32)) (v_prenex_284 (_ BitVec 32)) (v_prenex_287 (_ BitVec 32)) (v_prenex_286 (_ BitVec 32)) (v_arrayElimCell_661 (_ BitVec 32))) (let ((.cse67 (select (store |c_#length| v_prenex_284 v_prenex_286) v_arrayElimCell_661))) (or (bvsle (bvadd v_prenex_285 (_ bv4 32)) .cse67) (bvsle (bvadd v_prenex_287 (_ bv4 32)) .cse67) (not (bvsle (_ bv0 32) v_prenex_287)) (= v_arrayElimCell_661 c_main_~x~0.base) (= v_arrayElimCell_661 v_prenex_284))))) (or .cse10 (forall ((v_subst_2 (_ BitVec 32)) (v_prenex_48 (_ BitVec 32)) (v_arrayElimCell_627 (_ BitVec 32)) (|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (let ((.cse68 (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) v_arrayElimCell_627))) (or (bvsle (bvadd v_subst_2 (_ bv4 32)) .cse68) (bvsle (bvadd v_prenex_48 (_ bv4 32)) .cse68) (not (bvsle (_ bv0 32) v_prenex_48)) (= v_arrayElimCell_627 v_prenex_2)))) .cse1) (or .cse1 (forall ((v_prenex_503 (_ BitVec 32)) (v_prenex_502 (_ BitVec 32)) (v_prenex_501 (_ BitVec 32)) (v_prenex_149 (_ BitVec 32)) (v_prenex_500 (_ BitVec 32))) (let ((.cse69 (select (store |c_#length| v_prenex_503 v_prenex_501) v_prenex_149))) (or (= v_prenex_149 v_prenex_503) (= v_prenex_149 c_main_~x~0.base) (bvsle (bvadd v_prenex_502 (_ bv4 32)) .cse69) (bvsle (bvadd v_prenex_500 (_ bv4 32)) .cse69) (not (bvsle (_ bv0 32) v_prenex_502))))) .cse0) (or .cse1 (forall ((v_prenex_715 (_ BitVec 32)) (v_arrayElimCell_622 (_ BitVec 32)) (v_prenex_714 (_ BitVec 32)) (v_prenex_67 (_ BitVec 32))) (or (= v_arrayElimCell_622 c_main_~x~0.base) (= v_arrayElimCell_622 v_prenex_715) (not (bvsle (_ bv0 32) v_prenex_67)) (bvsle (bvadd v_prenex_67 (_ bv4 32)) (select (store |c_#length| v_prenex_715 v_prenex_714) v_arrayElimCell_622)))) .cse0) (or .cse1 .cse0 (forall ((v_prenex_51 (_ BitVec 32)) (v_prenex_417 (_ BitVec 32)) (v_arrayElimCell_568 (_ BitVec 32)) (v_prenex_416 (_ BitVec 32)) (v_prenex_415 (_ BitVec 32))) (let ((.cse70 (select (store |c_#length| v_prenex_417 v_prenex_416) v_arrayElimCell_568))) (or (= v_arrayElimCell_568 v_prenex_417) (bvsle (bvadd v_prenex_51 (_ bv4 32)) .cse70) (bvsle (bvadd v_prenex_415 (_ bv4 32)) .cse70) (not (bvsle (_ bv0 32) v_prenex_51)))))) (or .cse10 (forall ((v_arrayElimCell_457 (_ BitVec 32)) (v_prenex_435 (_ BitVec 32)) (v_prenex_434 (_ BitVec 32)) (v_prenex_11 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_11)) (= v_arrayElimCell_457 v_prenex_435) (= v_arrayElimCell_457 c_main_~x~0.base) (bvsle (bvadd v_prenex_11 (_ bv4 32)) (select (store |c_#length| v_prenex_435 v_prenex_434) v_arrayElimCell_457)))) .cse0) (or .cse10 .cse7 .cse8 .cse71) (or .cse10 .cse7 .cse8 .cse9 (forall ((v_prenex_186 (_ BitVec 32)) (v_prenex_185 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_185 v_prenex_186) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_185)))) (or .cse5 (forall ((v_prenex_300 (_ BitVec 32)) (v_prenex_299 (_ BitVec 32)) (v_prenex_298 (_ BitVec 32)) (v_prenex_297 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_299 (_ bv4 32)) (select (store |c_#length| v_prenex_297 v_prenex_300) v_prenex_298)) (not (bvsle (_ bv0 32) v_prenex_299)) (= v_prenex_298 v_prenex_297)))) (or .cse1 (forall ((v_prenex_545 (_ BitVec 32)) (v_prenex_544 (_ BitVec 32)) (v_prenex_543 (_ BitVec 32)) (v_arrayElimCell_581 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_544)) (= v_arrayElimCell_581 v_prenex_545) (bvsle (bvadd v_prenex_544 (_ bv4 32)) (select (store |c_#length| v_prenex_545 v_prenex_543) v_arrayElimCell_581)))) .cse5) (or .cse10 (forall ((v_arrayElimCell_543 (_ BitVec 32)) (v_prenex_212 (_ BitVec 32)) (v_prenex_211 (_ BitVec 32)) (v_prenex_210 (_ BitVec 32)) (v_prenex_13 (_ BitVec 32))) (let ((.cse72 (select (store |c_#length| v_prenex_210 v_prenex_212) v_arrayElimCell_543))) (or (bvsle (bvadd v_prenex_13 (_ bv4 32)) .cse72) (bvsle (bvadd v_prenex_211 (_ bv4 32)) .cse72) (= v_arrayElimCell_543 v_prenex_210) (= v_arrayElimCell_543 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_13))))) .cse0) (or .cse1 .cse5 (forall ((v_prenex_724 (_ BitVec 32)) (v_prenex_723 (_ BitVec 32)) (v_prenex_722 (_ BitVec 32)) (v_prenex_721 (_ BitVec 32)) (v_prenex_147 (_ BitVec 32))) (let ((.cse73 (select (store |c_#length| v_prenex_724 v_prenex_723) v_prenex_147))) (or (bvsle (bvadd v_prenex_721 (_ bv4 32)) .cse73) (= v_prenex_147 v_prenex_724) (not (bvsle (_ bv0 32) v_prenex_721)) (= v_prenex_147 c_main_~x~0.base) (bvsle (bvadd v_prenex_722 (_ bv4 32)) .cse73)))) .cse6) (or .cse10 .cse1 (forall ((v_arrayElimCell_644 (_ BitVec 32)) (v_prenex_319 (_ BitVec 32)) (v_prenex_318 (_ BitVec 32)) (v_prenex_320 (_ BitVec 32)) (v_prenex_47 (_ BitVec 32))) (let ((.cse74 (select (store |c_#length| v_prenex_318 v_prenex_320) v_arrayElimCell_644))) (or (= v_arrayElimCell_644 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_47)) (= v_arrayElimCell_644 v_prenex_318) (bvsle (bvadd v_prenex_47 (_ bv4 32)) .cse74) (bvsle (bvadd v_prenex_319 (_ bv4 32)) .cse74)))) .cse0) (or .cse1 (forall ((v_prenex_619 (_ BitVec 32)) (v_arrayElimCell_190 (_ BitVec 32)) (v_prenex_622 (_ BitVec 32)) (v_prenex_621 (_ BitVec 32)) (v_prenex_620 (_ BitVec 32))) (let ((.cse75 (select (store |c_#length| v_prenex_622 v_prenex_620) v_arrayElimCell_190))) (or (bvsle (bvadd v_prenex_621 (_ bv4 32)) .cse75) (= v_arrayElimCell_190 v_prenex_622) (bvsle (bvadd v_prenex_619 (_ bv4 32)) .cse75) (not (bvsle (_ bv0 32) v_prenex_621)))))) (or .cse1 (forall ((v_arrayElimCell_150 (_ BitVec 32)) (v_prenex_202 (_ BitVec 32)) (v_arrayElimCell_382 (_ BitVec 32)) (v_prenex_201 (_ BitVec 32))) (or (= v_arrayElimCell_382 v_prenex_201) (not (bvsle (_ bv0 32) v_arrayElimCell_150)) (= v_arrayElimCell_382 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_150 (_ bv4 32)) (select (store |c_#length| v_prenex_201 v_prenex_202) v_arrayElimCell_382))))) (or .cse1 (forall ((v_arrayElimCell_533 (_ BitVec 32)) (v_prenex_191 (_ BitVec 32)) (v_prenex_190 (_ BitVec 32)) (v_prenex_69 (_ BitVec 32))) (or (= v_arrayElimCell_533 v_prenex_190) (bvsle (bvadd v_prenex_69 (_ bv4 32)) (select (store |c_#length| v_prenex_190 v_prenex_191) v_arrayElimCell_533)) (= v_arrayElimCell_533 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_69)))) .cse0) (or .cse1 .cse7 (forall ((v_prenex_162 (_ BitVec 32)) (v_prenex_161 (_ BitVec 32)) (v_arrayElimCell_610 (_ BitVec 32)) (v_prenex_39 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_39 (_ bv4 32)) (select (store |c_#length| v_prenex_162 v_prenex_161) v_arrayElimCell_610)) (not (bvsle (_ bv0 32) v_prenex_39)) (= v_arrayElimCell_610 v_prenex_162)))) (or .cse10 .cse1 .cse0 (forall ((v_prenex_529 (_ BitVec 32)) (v_prenex_528 (_ BitVec 32)) (v_prenex_527 (_ BitVec 32)) (v_arrayElimCell_628 (_ BitVec 32)) (v_prenex_530 (_ BitVec 32))) (let ((.cse76 (select (store |c_#length| v_prenex_530 v_prenex_528) v_arrayElimCell_628))) (or (bvsle (bvadd v_prenex_527 (_ bv4 32)) .cse76) (= v_arrayElimCell_628 v_prenex_530) (bvsle (bvadd v_prenex_529 (_ bv4 32)) .cse76) (not (bvsle (_ bv0 32) v_prenex_529)))))) (or .cse1 .cse43 .cse5 (forall ((v_arrayElimCell_355 (_ BitVec 32)) (v_prenex_345 (_ BitVec 32)) (v_prenex_344 (_ BitVec 32)) (v_prenex_343 (_ BitVec 32)) (v_prenex_342 (_ BitVec 32))) (let ((.cse77 (select (store |c_#length| v_prenex_342 v_prenex_344) v_arrayElimCell_355))) (or (bvsle (bvadd v_prenex_343 (_ bv4 32)) .cse77) (not (bvsle (_ bv0 32) v_prenex_345)) (bvsle (bvadd v_prenex_345 (_ bv4 32)) .cse77) (= v_arrayElimCell_355 c_main_~x~0.base) (= v_arrayElimCell_355 v_prenex_342))))) (or .cse1 .cse7 (forall ((v_arrayElimCell_379 (_ BitVec 32)) (v_prenex_764 (_ BitVec 32)) (v_prenex_763 (_ BitVec 32)) (v_prenex_762 (_ BitVec 32))) (or (= v_arrayElimCell_379 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_762)) (bvsle (bvadd v_prenex_762 (_ bv4 32)) (select (store |c_#length| v_prenex_764 v_prenex_763) v_arrayElimCell_379)) (= v_arrayElimCell_379 v_prenex_764)))) (or .cse0 .cse5 (forall ((v_prenex_160 (_ BitVec 32)) (v_prenex_534 (_ BitVec 32)) (v_prenex_533 (_ BitVec 32)) (v_prenex_532 (_ BitVec 32)) (v_prenex_531 (_ BitVec 32)) (v_prenex_14 (_ BitVec 32))) (let ((.cse80 (store |c_#length| v_prenex_534 v_prenex_533))) (let ((.cse79 (bvadd v_prenex_532 (_ bv4 32))) (.cse78 (select .cse80 v_prenex_160))) (or (bvsle (bvadd v_prenex_14 (_ bv4 32)) .cse78) (bvsle .cse79 (select .cse80 v_prenex_531)) (= v_prenex_160 c_main_~x~0.base) (bvsle .cse79 .cse78) (not (bvsle (_ bv0 32) v_prenex_14)) (= v_prenex_531 v_prenex_534) (= v_prenex_160 v_prenex_534)))))) (or (forall ((v_prenex_219 (_ BitVec 32)) (v_prenex_59 (_ BitVec 32)) (v_arrayElimCell_319 (_ BitVec 32)) (v_prenex_221 (_ BitVec 32)) (v_prenex_220 (_ BitVec 32))) (let ((.cse81 (select (store |c_#length| v_prenex_219 v_prenex_221) v_arrayElimCell_319))) (or (bvsle (bvadd v_prenex_59 (_ bv4 32)) .cse81) (bvsle (bvadd v_prenex_220 (_ bv4 32)) .cse81) (not (bvsle (_ bv0 32) v_prenex_59)) (= v_arrayElimCell_319 c_main_~x~0.base) (= v_arrayElimCell_319 v_prenex_219)))) .cse1 .cse5 .cse6) (or .cse1 (forall ((v_arrayElimCell_429 (_ BitVec 32)) (v_prenex_566 (_ BitVec 32)) (v_prenex_565 (_ BitVec 32)) (v_prenex_564 (_ BitVec 32)) (v_prenex_563 (_ BitVec 32)) (v_prenex_562 (_ BitVec 32))) (let ((.cse86 (store |c_#length| v_prenex_565 v_prenex_564))) (let ((.cse83 (select .cse86 v_arrayElimCell_429)) (.cse84 (bvadd v_prenex_563 (_ bv4 32))) (.cse82 (bvadd v_prenex_566 (_ bv4 32))) (.cse85 (select .cse86 v_prenex_562))) (or (= v_arrayElimCell_429 v_prenex_565) (not (bvsle (_ bv0 32) v_prenex_566)) (= v_prenex_562 v_prenex_565) (bvsle .cse82 .cse83) (bvsle .cse84 .cse83) (bvsle .cse84 .cse85) (bvsle .cse82 .cse85) (= v_arrayElimCell_429 c_main_~x~0.base))))) .cse0) (or (forall ((v_prenex_65 (_ BitVec 32)) (v_arrayElimCell_469 (_ BitVec 32)) (v_prenex_200 (_ BitVec 32)) (v_prenex_199 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_65)) (bvsle (bvadd v_prenex_65 (_ bv4 32)) (select (store |c_#length| v_prenex_199 v_prenex_200) v_arrayElimCell_469)) (= v_arrayElimCell_469 v_prenex_199))) .cse1 .cse0) (or .cse1 .cse7 (forall ((v_arrayElimCell_685 (_ BitVec 32)) (v_prenex_171 (_ BitVec 32)) (v_prenex_170 (_ BitVec 32)) (v_prenex_56 (_ BitVec 32))) (or (= v_arrayElimCell_685 v_prenex_171) (bvsle (bvadd v_prenex_56 (_ bv4 32)) (select (store |c_#length| v_prenex_171 v_prenex_170) v_arrayElimCell_685)) (not (bvsle (_ bv0 32) v_prenex_56)) (= v_arrayElimCell_685 c_main_~x~0.base)))) (or .cse1 .cse0 (forall ((v_prenex_395 (_ BitVec 32)) (v_prenex_394 (_ BitVec 32)) (v_arrayElimCell_377 (_ BitVec 32)) (v_prenex_396 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_396 (_ bv4 32)) (select (store |c_#length| v_prenex_394 v_prenex_395) v_arrayElimCell_377)) (= v_arrayElimCell_377 v_prenex_394) (= v_arrayElimCell_377 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_396))))) (or .cse1 (forall ((v_prenex_739 (_ BitVec 32)) (v_prenex_742 (_ BitVec 32)) (v_arrayElimCell_590 (_ BitVec 32)) (v_prenex_741 (_ BitVec 32)) (v_prenex_740 (_ BitVec 32))) (let ((.cse87 (select (store |c_#length| v_prenex_742 v_prenex_741) v_arrayElimCell_590))) (or (bvsle (bvadd v_prenex_740 (_ bv4 32)) .cse87) (= v_arrayElimCell_590 c_main_~x~0.base) (= v_arrayElimCell_590 v_prenex_742) (not (bvsle (_ bv0 32) v_prenex_739)) (bvsle (bvadd v_prenex_739 (_ bv4 32)) .cse87))))) (or .cse1 .cse5 (forall ((v_arrayElimCell_345 (_ BitVec 32)) (v_prenex_414 (_ BitVec 32)) (v_prenex_413 (_ BitVec 32)) (v_prenex_412 (_ BitVec 32)) (v_prenex_411 (_ BitVec 32))) (let ((.cse88 (select (store |c_#length| v_prenex_411 v_prenex_413) v_arrayElimCell_345))) (or (= v_arrayElimCell_345 v_prenex_411) (bvsle (bvadd v_prenex_412 (_ bv4 32)) .cse88) (not (bvsle (_ bv0 32) v_prenex_414)) (bvsle (bvadd v_prenex_414 (_ bv4 32)) .cse88) (= v_arrayElimCell_345 c_main_~x~0.base))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_585 (_ BitVec 32)) (v_prenex_526 (_ BitVec 32)) (v_prenex_525 (_ BitVec 32)) (v_prenex_49 (_ BitVec 32))) (or (= v_arrayElimCell_585 v_prenex_526) (bvsle (bvadd v_prenex_49 (_ bv4 32)) (select (store |c_#length| v_prenex_526 v_prenex_525) v_arrayElimCell_585)) (not (bvsle (_ bv0 32) v_prenex_49))))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_432 (_ BitVec 32)) (v_prenex_291 (_ BitVec 32)) (v_prenex_290 (_ BitVec 32)) (v_prenex_289 (_ BitVec 32)) (v_prenex_288 (_ BitVec 32))) (let ((.cse89 (select (store |c_#length| v_prenex_288 v_prenex_290) v_arrayElimCell_432))) (or (not (bvsle (_ bv0 32) v_prenex_291)) (bvsle (bvadd v_prenex_289 (_ bv4 32)) .cse89) (= v_arrayElimCell_432 v_prenex_288) (= v_arrayElimCell_432 c_main_~x~0.base) (bvsle (bvadd v_prenex_291 (_ bv4 32)) .cse89))))) (or .cse0 (forall ((v_prenex_387 (_ BitVec 32)) (v_arrayElimCell_494 (_ BitVec 32)) (v_prenex_386 (_ BitVec 32)) (v_prenex_385 (_ BitVec 32)) (v_prenex_25 (_ BitVec 32))) (let ((.cse90 (select (store |c_#length| v_prenex_385 v_prenex_387) v_arrayElimCell_494))) (or (bvsle (bvadd v_prenex_25 (_ bv4 32)) .cse90) (not (bvsle (_ bv0 32) v_prenex_25)) (= v_arrayElimCell_494 c_main_~x~0.base) (bvsle (bvadd v_prenex_386 (_ bv4 32)) .cse90) (= v_arrayElimCell_494 v_prenex_385))))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_465 (_ BitVec 32)) (v_prenex_44 (_ BitVec 32)) (v_prenex_452 (_ BitVec 32)) (v_prenex_451 (_ BitVec 32))) (or (= v_arrayElimCell_465 v_prenex_452) (bvsle (bvadd v_prenex_44 (_ bv4 32)) (select (store |c_#length| v_prenex_452 v_prenex_451) v_arrayElimCell_465)) (= v_arrayElimCell_465 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_44))))) (or .cse1 .cse43 .cse5 (forall ((v_arrayElimCell_257 (_ BitVec 32)) (v_prenex_759 (_ BitVec 32)) (v_prenex_758 (_ BitVec 32)) (v_prenex_761 (_ BitVec 32)) (v_prenex_760 (_ BitVec 32))) (let ((.cse91 (select (store |c_#length| v_prenex_761 v_prenex_760) v_arrayElimCell_257))) (or (bvsle (bvadd v_prenex_759 (_ bv4 32)) .cse91) (= v_arrayElimCell_257 v_prenex_761) (= v_arrayElimCell_257 c_main_~x~0.base) (bvsle (bvadd v_prenex_758 (_ bv4 32)) .cse91) (not (bvsle (_ bv0 32) v_prenex_758)))))) (or .cse1 (forall ((v_prenex_450 (_ BitVec 32)) (v_arrayElimCell_348 (_ BitVec 32)) (v_prenex_449 (_ BitVec 32)) (v_prenex_448 (_ BitVec 32)) (v_prenex_447 (_ BitVec 32))) (let ((.cse92 (select (store |c_#length| v_prenex_449 v_prenex_448) v_arrayElimCell_348))) (or (not (bvsle (_ bv0 32) v_prenex_450)) (bvsle (bvadd v_prenex_447 (_ bv4 32)) .cse92) (bvsle (bvadd v_prenex_450 (_ bv4 32)) .cse92) (= v_arrayElimCell_348 c_main_~x~0.base) (= v_arrayElimCell_348 v_prenex_449)))) .cse5 .cse6) (or .cse0 (forall ((v_prenex_426 (_ BitVec 32)) (v_prenex_425 (_ BitVec 32)) (v_prenex_424 (_ BitVec 32)) (v_prenex_423 (_ BitVec 32)) (v_prenex_18 (_ BitVec 32)) (v_arrayElimCell_241 (_ BitVec 32))) (let ((.cse93 (store |c_#length| v_prenex_426 v_prenex_425))) (or (not (bvsle (_ bv0 32) v_prenex_18)) (= v_prenex_423 v_prenex_426) (bvsle (bvadd v_prenex_424 (_ bv4 32)) (select .cse93 v_prenex_423)) (bvsle (bvadd v_prenex_18 (_ bv4 32)) (select .cse93 v_arrayElimCell_241)) (= v_arrayElimCell_241 v_prenex_426) (= v_arrayElimCell_241 c_main_~x~0.base)))) .cse5) (or .cse1 (forall ((v_arrayElimCell_136 (_ BitVec 32)) (v_arrayElimCell_502 (_ BitVec 32)) (v_prenex_586 (_ BitVec 32)) (v_prenex_585 (_ BitVec 32))) (or (= v_arrayElimCell_502 v_prenex_586) (= v_arrayElimCell_502 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_136)) (bvsle (bvadd v_arrayElimCell_136 (_ bv4 32)) (select (store |c_#length| v_prenex_586 v_prenex_585) v_arrayElimCell_502)))) .cse5 .cse6) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_658 (_ BitVec 32)) (v_prenex_326 (_ BitVec 32)) (v_prenex_325 (_ BitVec 32)) (v_prenex_324 (_ BitVec 32)) (v_prenex_323 (_ BitVec 32))) (let ((.cse94 (select (store |c_#length| v_prenex_323 v_prenex_325) v_arrayElimCell_658))) (or (bvsle (bvadd v_prenex_326 (_ bv4 32)) .cse94) (= v_arrayElimCell_658 v_prenex_323) (= v_arrayElimCell_658 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_326)) (bvsle (bvadd v_prenex_324 (_ bv4 32)) .cse94))))) (or .cse0 (forall ((v_prenex_626 (_ BitVec 32)) (v_prenex_625 (_ BitVec 32)) (v_prenex_624 (_ BitVec 32)) (v_prenex_623 (_ BitVec 32)) (v_prenex_159 (_ BitVec 32))) (let ((.cse95 (select (store |c_#length| v_prenex_625 v_prenex_624) v_prenex_159))) (or (bvsle (bvadd v_prenex_623 (_ bv4 32)) .cse95) (= v_prenex_159 v_prenex_625) (bvsle (bvadd v_prenex_626 (_ bv4 32)) .cse95) (= v_prenex_159 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_626)))))) (or .cse10 .cse1 (forall ((v_prenex_461 (_ BitVec 32)) (v_prenex_460 (_ BitVec 32)) (v_prenex_459 (_ BitVec 32)) (v_arrayElimCell_370 (_ BitVec 32)) (v_prenex_462 (_ BitVec 32))) (let ((.cse96 (select (store |c_#length| v_prenex_462 v_prenex_460) v_arrayElimCell_370))) (or (bvsle (bvadd v_prenex_461 (_ bv4 32)) .cse96) (bvsle (bvadd v_prenex_459 (_ bv4 32)) .cse96) (not (bvsle (_ bv0 32) v_prenex_461)) (= v_arrayElimCell_370 c_main_~x~0.base) (= v_arrayElimCell_370 v_prenex_462)))) .cse0) (or .cse10 .cse0 (forall ((v_prenex_142 (_ BitVec 32)) (v_prenex_681 (_ BitVec 32)) (v_prenex_680 (_ BitVec 32)) (v_prenex_679 (_ BitVec 32)) (v_prenex_682 (_ BitVec 32))) (let ((.cse97 (select (store |c_#length| v_prenex_682 v_prenex_680) v_prenex_142))) (or (= v_prenex_142 c_main_~x~0.base) (bvsle (bvadd v_prenex_679 (_ bv4 32)) .cse97) (bvsle (bvadd v_prenex_681 (_ bv4 32)) .cse97) (not (bvsle (_ bv0 32) v_prenex_681)) (= v_prenex_142 v_prenex_682))))) (or .cse1 (forall ((v_prenex_241 (_ BitVec 32)) (v_prenex_240 (_ BitVec 32)) (v_arrayElimCell_537 (_ BitVec 32)) (v_prenex_242 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_242)) (bvsle (bvadd v_prenex_242 (_ bv4 32)) (select (store |c_#length| v_prenex_240 v_prenex_241) v_arrayElimCell_537)) (= v_arrayElimCell_537 v_prenex_240) (= v_arrayElimCell_537 c_main_~x~0.base)))) (or .cse0 .cse5 (forall ((v_prenex_87 (_ BitVec 32)) (v_prenex_539 (_ BitVec 32)) (v_prenex_538 (_ BitVec 32)) (v_prenex_542 (_ BitVec 32)) (v_prenex_541 (_ BitVec 32)) (v_prenex_540 (_ BitVec 32))) (let ((.cse99 (store |c_#length| v_prenex_542 v_prenex_540))) (let ((.cse98 (bvadd v_prenex_539 (_ bv4 32))) (.cse100 (select .cse99 v_prenex_87))) (or (= v_prenex_87 v_prenex_542) (bvsle .cse98 (select .cse99 v_prenex_538)) (= v_prenex_87 c_main_~x~0.base) (bvsle (bvadd v_prenex_541 (_ bv4 32)) .cse100) (bvsle .cse98 .cse100) (not (bvsle (_ bv0 32) v_prenex_541)) (= v_prenex_538 v_prenex_542)))))) (or .cse1 .cse5 (forall ((v_arrayElimCell_225 (_ BitVec 32)) (v_prenex_514 (_ BitVec 32)) (v_prenex_513 (_ BitVec 32)) (v_prenex_512 (_ BitVec 32)) (v_prenex_511 (_ BitVec 32))) (let ((.cse101 (select (store |c_#length| v_prenex_514 v_prenex_512) v_arrayElimCell_225))) (or (= v_arrayElimCell_225 v_prenex_514) (bvsle (bvadd v_prenex_511 (_ bv4 32)) .cse101) (not (bvsle (_ bv0 32) v_prenex_513)) (bvsle (bvadd v_prenex_513 (_ bv4 32)) .cse101))))) (or (forall ((v_prenex_599 (_ BitVec 32)) (v_prenex_598 (_ BitVec 32)) (v_prenex_597 (_ BitVec 32)) (v_prenex_596 (_ BitVec 32)) (v_arrayElimCell_692 (_ BitVec 32)) (v_prenex_595 (_ BitVec 32))) (let ((.cse106 (store |c_#length| v_prenex_598 v_prenex_597))) (let ((.cse102 (bvadd v_prenex_596 (_ bv4 32))) (.cse104 (select .cse106 v_arrayElimCell_692)) (.cse105 (bvadd v_prenex_599 (_ bv4 32))) (.cse103 (select .cse106 v_prenex_595))) (or (bvsle .cse102 .cse103) (bvsle .cse102 .cse104) (bvsle .cse105 .cse104) (bvsle .cse105 .cse103) (= v_arrayElimCell_692 c_main_~x~0.base) (= v_prenex_595 v_prenex_598) (not (bvsle (_ bv0 32) v_prenex_599)) (= v_arrayElimCell_692 v_prenex_598))))) .cse0) (or .cse1 .cse0 (forall ((v_prenex_439 (_ BitVec 32)) (v_prenex_438 (_ BitVec 32)) (v_prenex_107 (_ BitVec 32)) (v_prenex_442 (_ BitVec 32)) (v_prenex_441 (_ BitVec 32)) (v_prenex_440 (_ BitVec 32))) (let ((.cse111 (store |c_#length| v_prenex_441 v_prenex_440))) (let ((.cse107 (bvadd v_prenex_439 (_ bv4 32))) (.cse108 (select .cse111 v_prenex_107)) (.cse110 (bvadd v_prenex_442 (_ bv4 32))) (.cse109 (select .cse111 v_prenex_438))) (or (bvsle .cse107 .cse108) (bvsle .cse107 .cse109) (not (bvsle (_ bv0 32) v_prenex_442)) (= v_prenex_107 c_main_~x~0.base) (= v_prenex_438 v_prenex_441) (= v_prenex_107 v_prenex_441) (bvsle .cse110 .cse108) (bvsle .cse110 .cse109)))))) (or .cse1 (forall ((v_arrayElimCell_435 (_ BitVec 32)) (v_prenex_400 (_ BitVec 32)) (v_prenex_399 (_ BitVec 32)) (v_prenex_398 (_ BitVec 32)) (v_prenex_397 (_ BitVec 32))) (let ((.cse112 (select (store |c_#length| v_prenex_397 v_prenex_399) v_arrayElimCell_435))) (or (not (bvsle (_ bv0 32) v_prenex_400)) (= v_arrayElimCell_435 v_prenex_397) (bvsle (bvadd v_prenex_400 (_ bv4 32)) .cse112) (= v_arrayElimCell_435 c_main_~x~0.base) (bvsle (bvadd v_prenex_398 (_ bv4 32)) .cse112)))) .cse0) (or .cse1 (forall ((v_prenex_659 (_ BitVec 32)) (v_prenex_658 (_ BitVec 32)) (v_prenex_657 (_ BitVec 32)) (v_prenex_656 (_ BitVec 32)) (v_arrayElimCell_340 (_ BitVec 32)) (v_prenex_660 (_ BitVec 32))) (let ((.cse115 (store |c_#length| v_prenex_659 v_prenex_658))) (let ((.cse113 (bvadd v_prenex_657 (_ bv4 32))) (.cse114 (select .cse115 v_arrayElimCell_340))) (or (bvsle .cse113 .cse114) (= v_arrayElimCell_340 c_main_~x~0.base) (= v_prenex_656 v_prenex_659) (bvsle .cse113 (select .cse115 v_prenex_656)) (= v_arrayElimCell_340 v_prenex_659) (not (bvsle (_ bv0 32) v_prenex_660)) (bvsle (bvadd v_prenex_660 (_ bv4 32)) .cse114))))) .cse5 .cse6) (or .cse10 (forall ((v_arrayElimCell_367 (_ BitVec 32)) (v_prenex_246 (_ BitVec 32)) (v_prenex_245 (_ BitVec 32)) (v_prenex_244 (_ BitVec 32)) (v_prenex_243 (_ BitVec 32))) (let ((.cse116 (select (store |c_#length| v_prenex_243 v_prenex_246) v_arrayElimCell_367))) (or (bvsle (bvadd v_prenex_245 (_ bv4 32)) .cse116) (= v_arrayElimCell_367 c_main_~x~0.base) (bvsle (bvadd v_prenex_244 (_ bv4 32)) .cse116) (= v_arrayElimCell_367 v_prenex_243) (not (bvsle (_ bv0 32) v_prenex_244))))) .cse1) (or .cse1 .cse0 (forall ((v_arrayElimCell_277 (_ BitVec 32)) (v_prenex_76 (_ BitVec 32)) (v_prenex_678 (_ BitVec 32)) (v_prenex_677 (_ BitVec 32)) (v_prenex_676 (_ BitVec 32))) (let ((.cse117 (select (store |c_#length| v_prenex_678 v_prenex_677) v_arrayElimCell_277))) (or (= v_arrayElimCell_277 v_prenex_678) (bvsle (bvadd v_prenex_676 (_ bv4 32)) .cse117) (bvsle (bvadd v_prenex_76 (_ bv4 32)) .cse117) (not (bvsle (_ bv0 32) v_prenex_76)))))) (or .cse1 (forall ((v_arrayElimCell_147 (_ BitVec 32)) (v_prenex_260 (_ BitVec 32)) (v_prenex_259 (_ BitVec 32)) (v_arrayElimCell_199 (_ BitVec 32))) (or (= v_arrayElimCell_199 v_prenex_259) (bvsle (bvadd v_arrayElimCell_147 (_ bv4 32)) (select (store |c_#length| v_prenex_259 v_prenex_260) v_arrayElimCell_199)) (not (bvsle (_ bv0 32) v_arrayElimCell_147)))) .cse0) (or .cse1 (forall ((v_prenex_74 (_ BitVec 32)) (v_prenex_492 (_ BitVec 32)) (v_prenex_491 (_ BitVec 32)) (v_arrayElimCell_335 (_ BitVec 32))) (or (= v_arrayElimCell_335 v_prenex_492) (not (bvsle (_ bv0 32) v_prenex_74)) (bvsle (bvadd v_prenex_74 (_ bv4 32)) (select (store |c_#length| v_prenex_492 v_prenex_491) v_arrayElimCell_335)))) .cse0) (or .cse1 .cse7 (forall ((v_prenex_705 (_ BitVec 32)) (v_prenex_704 (_ BitVec 32)) (v_prenex_703 (_ BitVec 32)) (v_arrayElimCell_668 (_ BitVec 32)) (v_prenex_702 (_ BitVec 32)) (v_prenex_701 (_ BitVec 32))) (let ((.cse119 (store |c_#length| v_prenex_705 v_prenex_704))) (let ((.cse118 (bvadd v_prenex_701 (_ bv4 32))) (.cse120 (select .cse119 v_prenex_702))) (or (bvsle .cse118 (select .cse119 v_arrayElimCell_668)) (= v_prenex_702 v_prenex_705) (bvsle .cse118 .cse120) (not (bvsle (_ bv0 32) v_prenex_701)) (= v_arrayElimCell_668 v_prenex_705) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_668) (bvsle (bvadd v_prenex_703 (_ bv4 32)) .cse120))))) .cse5) (or .cse10 .cse1 .cse7 (forall ((v_arrayElimCell_482 (_ BitVec 32)) (v_prenex_464 (_ BitVec 32)) (v_prenex_463 (_ BitVec 32)) (v_prenex_58 (_ BitVec 32))) (or (= v_arrayElimCell_482 v_prenex_464) (= v_arrayElimCell_482 c_main_~x~0.base) (bvsle (bvadd v_prenex_58 (_ bv4 32)) (select (store |c_#length| v_prenex_464 v_prenex_463) v_arrayElimCell_482)) (not (bvsle (_ bv0 32) v_prenex_58))))) (or .cse1 .cse5 .cse6 (forall ((v_prenex_174 (_ BitVec 32)) (v_prenex_173 (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_prenex_172 (_ BitVec 32)) (v_arrayElimCell_137 (_ BitVec 32)) (v_arrayElimCell_351 (_ BitVec 32))) (let ((.cse123 (store |c_#length| v_prenex_173 v_prenex_172))) (let ((.cse121 (bvadd v_prenex_174 (_ bv4 32))) (.cse122 (select .cse123 v_arrayElimCell_351))) (or (bvsle .cse121 .cse122) (bvsle .cse121 (select .cse123 v_subst_3)) (bvsle (bvadd v_arrayElimCell_137 (_ bv4 32)) .cse122) (= v_subst_3 v_prenex_173) (= v_arrayElimCell_351 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_137)) (= v_arrayElimCell_351 v_prenex_173)))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_448 (_ BitVec 32)) (v_prenex_614 (_ BitVec 32)) (v_prenex_613 (_ BitVec 32)) (v_prenex_612 (_ BitVec 32)) (v_prenex_611 (_ BitVec 32))) (let ((.cse124 (select (store |c_#length| v_prenex_613 v_prenex_612) v_arrayElimCell_448))) (or (= v_arrayElimCell_448 v_prenex_613) (bvsle (bvadd v_prenex_611 (_ bv4 32)) .cse124) (not (bvsle (_ bv0 32) v_prenex_614)) (= v_arrayElimCell_448 c_main_~x~0.base) (bvsle (bvadd v_prenex_614 (_ bv4 32)) .cse124))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_453 (_ BitVec 32)) (v_prenex_197 (_ BitVec 32)) (v_prenex_196 (_ BitVec 32)) (v_prenex_195 (_ BitVec 32)) (v_prenex_198 (_ BitVec 32))) (let ((.cse125 (select (store |c_#length| v_prenex_195 v_prenex_198) v_arrayElimCell_453))) (or (= v_arrayElimCell_453 v_prenex_195) (= v_arrayElimCell_453 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_196)) (bvsle (bvadd v_prenex_196 (_ bv4 32)) .cse125) (bvsle (bvadd v_prenex_197 (_ bv4 32)) .cse125)))) .cse0) (or .cse1 .cse0 (forall ((v_arrayElimCell_490 (_ BitVec 32)) (v_arrayElimCell_163 (_ BitVec 32)) (v_prenex_573 (_ BitVec 32)) (v_prenex_572 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_163 (_ bv4 32)) (select (store |c_#length| v_prenex_573 v_prenex_572) v_arrayElimCell_490)) (= v_arrayElimCell_490 v_prenex_573) (not (bvsle (_ bv0 32) v_arrayElimCell_163)) (= v_arrayElimCell_490 c_main_~x~0.base)))) (or .cse10 .cse1 (forall ((v_prenex_209 (_ BitVec 32)) (v_arrayElimCell_513 (_ BitVec 32)) (v_prenex_208 (_ BitVec 32)) (v_prenex_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_208)) (= v_arrayElimCell_513 c_main_~x~0.base) (= v_arrayElimCell_513 v_prenex_207) (bvsle (bvadd v_prenex_208 (_ bv4 32)) (select (store |c_#length| v_prenex_207 v_prenex_209) v_arrayElimCell_513))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_596 (_ BitVec 32)) (v_prenex_499 (_ BitVec 32)) (v_prenex_498 (_ BitVec 32)) (v_prenex_497 (_ BitVec 32)) (v_prenex_496 (_ BitVec 32))) (let ((.cse126 (select (store |c_#length| v_prenex_499 v_prenex_497) v_arrayElimCell_596))) (or (= v_arrayElimCell_596 c_main_~x~0.base) (= v_arrayElimCell_596 v_prenex_499) (bvsle (bvadd v_prenex_496 (_ bv4 32)) .cse126) (bvsle (bvadd v_prenex_498 (_ bv4 32)) .cse126) (not (bvsle (_ bv0 32) v_prenex_498)))))) (or .cse0 (forall ((v_prenex_21 (_ BitVec 32)) (v_arrayElimCell_315 (_ BitVec 32)) (v_prenex_339 (_ BitVec 32)) (v_prenex_338 (_ BitVec 32)) (v_prenex_337 (_ BitVec 32))) (let ((.cse127 (select (store |c_#length| v_prenex_337 v_prenex_339) v_arrayElimCell_315))) (or (not (bvsle (_ bv0 32) v_prenex_21)) (= v_arrayElimCell_315 v_prenex_337) (= v_arrayElimCell_315 c_main_~x~0.base) (bvsle (bvadd v_prenex_21 (_ bv4 32)) .cse127) (bvsle (bvadd v_prenex_338 (_ bv4 32)) .cse127)))) .cse5) (or (forall ((v_arrayElimCell_327 (_ BitVec 32)) (v_arrayElimCell_108 (_ BitVec 32)) (v_prenex_204 (_ BitVec 32)) (v_prenex_203 (_ BitVec 32))) (or (= v_arrayElimCell_327 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_108)) (bvsle (bvadd v_arrayElimCell_108 (_ bv4 32)) (select (store |c_#length| v_prenex_203 v_prenex_204) v_arrayElimCell_327)) (= v_arrayElimCell_327 v_prenex_203))) .cse0) (or .cse10 .cse1 .cse0 (forall ((v_prenex_106 (_ BitVec 32)) (v_prenex_446 (_ BitVec 32)) (v_prenex_445 (_ BitVec 32)) (v_prenex_444 (_ BitVec 32)) (v_prenex_443 (_ BitVec 32))) (let ((.cse128 (select (store |c_#length| v_prenex_445 v_prenex_444) v_prenex_106))) (or (bvsle (bvadd v_prenex_443 (_ bv4 32)) .cse128) (= v_prenex_106 c_main_~x~0.base) (bvsle (bvadd v_prenex_446 (_ bv4 32)) .cse128) (= v_prenex_106 v_prenex_445) (not (bvsle (_ bv0 32) v_prenex_446)))))) (or .cse1 .cse0 (forall ((v_prenex_717 (_ BitVec 32)) (v_prenex_716 (_ BitVec 32)) (v_arrayElimCell_600 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_151)) (= v_arrayElimCell_600 v_prenex_717) (bvsle (bvadd v_arrayElimCell_151 (_ bv4 32)) (select (store |c_#length| v_prenex_717 v_prenex_716) v_arrayElimCell_600)) (= v_arrayElimCell_600 c_main_~x~0.base)))) (or (forall ((v_prenex_230 (_ BitVec 32)) (v_arrayElimCell_654 (_ BitVec 32)) (v_prenex_229 (_ BitVec 32)) (v_prenex_233 (_ BitVec 32)) (v_prenex_232 (_ BitVec 32)) (v_prenex_231 (_ BitVec 32))) (let ((.cse131 (store |c_#length| v_prenex_229 v_prenex_233))) (let ((.cse130 (bvadd v_prenex_230 (_ bv4 32))) (.cse129 (select .cse131 v_prenex_231))) (or (= v_arrayElimCell_654 c_main_~x~0.base) (= v_prenex_231 v_prenex_229) (bvsle (bvadd v_prenex_232 (_ bv4 32)) .cse129) (bvsle .cse130 (select .cse131 v_arrayElimCell_654)) (bvsle .cse130 .cse129) (= v_arrayElimCell_654 v_prenex_229) (not (bvsle (_ bv0 32) v_prenex_230)))))) .cse1 .cse5) (or .cse1 .cse0 (forall ((v_arrayElimCell_536 (_ BitVec 32)) (v_prenex_258 (_ BitVec 32)) (v_prenex_257 (_ BitVec 32)) (v_prenex_256 (_ BitVec 32))) (or (= v_arrayElimCell_536 v_prenex_256) (not (bvsle (_ bv0 32) v_prenex_258)) (bvsle (bvadd v_prenex_258 (_ bv4 32)) (select (store |c_#length| v_prenex_256 v_prenex_257) v_arrayElimCell_536)) (= v_arrayElimCell_536 c_main_~x~0.base)))) (or .cse1 (forall ((v_arrayElimCell_200 (_ BitVec 32)) (v_prenex_333 (_ BitVec 32)) (v_prenex_332 (_ BitVec 32)) (v_prenex_331 (_ BitVec 32))) (or (= v_arrayElimCell_200 v_prenex_331) (not (bvsle (_ bv0 32) v_prenex_333)) (bvsle (bvadd v_prenex_333 (_ bv4 32)) (select (store |c_#length| v_prenex_331 v_prenex_332) v_arrayElimCell_200))))) (or (forall ((v_prenex_359 (_ BitVec 32)) (v_prenex_358 (_ BitVec 32)) (v_prenex_16 (_ BitVec 32)) (v_prenex_357 (_ BitVec 32)) (v_prenex_356 (_ BitVec 32)) (v_prenex_143 (_ BitVec 32))) (let ((.cse136 (store |c_#length| v_prenex_356 v_prenex_359))) (let ((.cse133 (select .cse136 v_prenex_143)) (.cse134 (bvadd v_prenex_16 (_ bv4 32))) (.cse132 (bvadd v_prenex_358 (_ bv4 32))) (.cse135 (select .cse136 v_prenex_357))) (or (bvsle .cse132 .cse133) (bvsle .cse134 .cse133) (= v_prenex_143 v_prenex_356) (bvsle .cse134 .cse135) (= v_prenex_357 v_prenex_356) (bvsle .cse132 .cse135) (= v_prenex_143 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_16)))))) .cse0) (or .cse0 (forall ((v_prenex_340 (_ BitVec 32)) (v_arrayElimCell_648 (_ BitVec 32)) (v_prenex_24 (_ BitVec 32)) (v_prenex_341 (_ BitVec 32))) (or (= v_arrayElimCell_648 v_prenex_340) (not (bvsle (_ bv0 32) v_prenex_24)) (= v_arrayElimCell_648 c_main_~x~0.base) (bvsle (bvadd v_prenex_24 (_ bv4 32)) (select (store |c_#length| v_prenex_340 v_prenex_341) v_arrayElimCell_648))))) (or .cse1 .cse7 (forall ((v_arrayElimCell_520 (_ BitVec 32)) (v_prenex_70 (_ BitVec 32)) (v_prenex_167 (_ BitVec 32)) (v_prenex_166 (_ BitVec 32))) (or (= v_arrayElimCell_520 v_prenex_166) (= v_arrayElimCell_520 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_70)) (bvsle (bvadd v_prenex_70 (_ bv4 32)) (select (store |c_#length| v_prenex_166 v_prenex_167) v_arrayElimCell_520))))) (or .cse1 (forall ((v_prenex_472 (_ BitVec 32)) (v_prenex_471 (_ BitVec 32)) (v_arrayElimCell_444 (_ BitVec 32)) (v_prenex_475 (_ BitVec 32)) (v_prenex_474 (_ BitVec 32)) (v_prenex_473 (_ BitVec 32))) (let ((.cse141 (store |c_#length| v_prenex_474 v_prenex_473))) (let ((.cse138 (select .cse141 v_prenex_471)) (.cse139 (bvadd v_prenex_475 (_ bv4 32))) (.cse137 (bvadd v_prenex_472 (_ bv4 32))) (.cse140 (select .cse141 v_arrayElimCell_444))) (or (= v_arrayElimCell_444 c_main_~x~0.base) (bvsle .cse137 .cse138) (= v_arrayElimCell_444 v_prenex_474) (bvsle .cse139 .cse138) (bvsle .cse139 .cse140) (not (bvsle (_ bv0 32) v_prenex_475)) (bvsle .cse137 .cse140) (= v_prenex_471 v_prenex_474)))))) (or .cse10 (forall ((v_arrayElimCell_234 (_ BitVec 32)) (v_prenex_409 (_ BitVec 32)) (v_prenex_408 (_ BitVec 32)) (v_prenex_10 (_ BitVec 32)) (v_prenex_410 (_ BitVec 32))) (let ((.cse142 (select (store |c_#length| v_prenex_408 v_prenex_410) v_arrayElimCell_234))) (or (= v_arrayElimCell_234 v_prenex_408) (bvsle (bvadd v_prenex_10 (_ bv4 32)) .cse142) (not (bvsle (_ bv0 32) v_prenex_10)) (bvsle (bvadd v_prenex_409 (_ bv4 32)) .cse142)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_228 (_ BitVec 32)) (v_prenex_61 (_ BitVec 32)) (v_prenex_267 (_ BitVec 32)) (v_prenex_266 (_ BitVec 32)) (v_prenex_265 (_ BitVec 32))) (let ((.cse143 (select (store |c_#length| v_prenex_265 v_prenex_267) v_arrayElimCell_228))) (or (not (bvsle (_ bv0 32) v_prenex_61)) (bvsle (bvadd v_prenex_61 (_ bv4 32)) .cse143) (= v_arrayElimCell_228 v_prenex_265) (bvsle (bvadd v_prenex_266 (_ bv4 32)) .cse143)))) .cse5 .cse6) (or .cse1 (forall ((v_prenex_603 (_ BitVec 32)) (v_prenex_602 (_ BitVec 32)) (v_prenex_601 (_ BitVec 32)) (v_arrayElimCell_391 (_ BitVec 32)) (v_prenex_600 (_ BitVec 32))) (let ((.cse144 (select (store |c_#length| v_prenex_602 v_prenex_601) v_arrayElimCell_391))) (or (= v_arrayElimCell_391 c_main_~x~0.base) (bvsle (bvadd v_prenex_603 (_ bv4 32)) .cse144) (= v_arrayElimCell_391 v_prenex_602) (not (bvsle (_ bv0 32) v_prenex_603)) (bvsle (bvadd v_prenex_600 (_ bv4 32)) .cse144)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_288 (_ BitVec 32)) (v_prenex_366 (_ BitVec 32)) (v_prenex_365 (_ BitVec 32)) (v_prenex_364 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_366)) (= v_arrayElimCell_288 c_main_~x~0.base) (bvsle (bvadd v_prenex_366 (_ bv4 32)) (select (store |c_#length| v_prenex_364 v_prenex_365) v_arrayElimCell_288)) (= v_arrayElimCell_288 v_prenex_364))) .cse5) (or .cse1 (forall ((v_prenex_355 (_ BitVec 32)) (v_prenex_354 (_ BitVec 32)) (v_prenex_353 (_ BitVec 32)) (v_arrayElimCell_682 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_355)) (bvsle (bvadd v_prenex_355 (_ bv4 32)) (select (store |c_#length| v_prenex_353 v_prenex_354) v_arrayElimCell_682)) (= v_arrayElimCell_682 v_prenex_353) (= v_arrayElimCell_682 c_main_~x~0.base))) .cse0) (or (forall ((v_arrayElimCell_695 (_ BitVec 32)) (v_prenex_250 (_ BitVec 32)) (v_prenex_249 (_ BitVec 32)) (v_prenex_248 (_ BitVec 32)) (v_prenex_247 (_ BitVec 32)) (v_arrayElimCell_91 (_ BitVec 32))) (let ((.cse146 (store |c_#length| v_prenex_247 v_prenex_250))) (let ((.cse145 (bvadd v_arrayElimCell_91 (_ bv4 32))) (.cse147 (select .cse146 v_prenex_248))) (or (bvsle .cse145 (select .cse146 v_arrayElimCell_695)) (bvsle .cse145 .cse147) (not (bvsle (_ bv0 32) v_arrayElimCell_91)) (= v_prenex_248 v_prenex_247) (bvsle (bvadd v_prenex_249 (_ bv4 32)) .cse147) (= v_arrayElimCell_695 c_main_~x~0.base) (= v_arrayElimCell_695 v_prenex_247))))) .cse0 .cse5) (or (forall ((v_prenex_524 (_ BitVec 32)) (v_prenex_523 (_ BitVec 32)) (v_prenex_522 (_ BitVec 32)) (v_arrayElimCell_618 (_ BitVec 32)) (v_prenex_521 (_ BitVec 32))) (let ((.cse148 (select (store |c_#length| v_prenex_524 v_prenex_522) v_arrayElimCell_618))) (or (bvsle (bvadd v_prenex_523 (_ bv4 32)) .cse148) (bvsle (bvadd v_prenex_521 (_ bv4 32)) .cse148) (= v_arrayElimCell_618 v_prenex_524) (= v_arrayElimCell_618 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_523))))) .cse0) .cse1 (or .cse1 .cse0 (forall ((v_arrayElimCell_112 (_ BitVec 32)) (v_arrayElimCell_401 (_ BitVec 32)) (v_prenex_189 (_ BitVec 32)) (v_prenex_188 (_ BitVec 32)) (v_prenex_187 (_ BitVec 32))) (let ((.cse149 (select (store |c_#length| v_prenex_187 v_prenex_189) v_arrayElimCell_401))) (or (bvsle (bvadd v_prenex_188 (_ bv4 32)) .cse149) (bvsle (bvadd v_arrayElimCell_112 (_ bv4 32)) .cse149) (= v_arrayElimCell_401 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_112)) (= v_arrayElimCell_401 v_prenex_187))))) (or .cse1 .cse43 (forall ((v_prenex_384 (_ BitVec 32)) (v_prenex_383 (_ BitVec 32)) (v_prenex_382 (_ BitVec 32)) (v_arrayElimCell_417 (_ BitVec 32)) (v_arrayElimCell_133 (_ BitVec 32))) (let ((.cse150 (select (store |c_#length| v_prenex_382 v_prenex_384) v_arrayElimCell_417))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_133)) (bvsle (bvadd v_prenex_383 (_ bv4 32)) .cse150) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_417) (bvsle (bvadd v_arrayElimCell_133 (_ bv4 32)) .cse150) (= v_arrayElimCell_417 v_prenex_382)))) .cse5) (or .cse1 (forall ((v_arrayElimCell_224 (_ BitVec 32)) (v_prenex_749 (_ BitVec 32)) (v_prenex_748 (_ BitVec 32)) (v_prenex_747 (_ BitVec 32)) (v_prenex_750 (_ BitVec 32))) (let ((.cse151 (select (store |c_#length| v_prenex_750 v_prenex_749) v_arrayElimCell_224))) (or (= v_arrayElimCell_224 v_prenex_750) (bvsle (bvadd v_prenex_748 (_ bv4 32)) .cse151) (bvsle (bvadd v_prenex_747 (_ bv4 32)) .cse151) (not (bvsle (_ bv0 32) v_prenex_747))))) .cse5 .cse6) (or .cse1 .cse5 (forall ((v_prenex_645 (_ BitVec 32)) (v_prenex_644 (_ BitVec 32)) (v_prenex_643 (_ BitVec 32)) (v_arrayElimCell_261 (_ BitVec 32)) (v_prenex_642 (_ BitVec 32))) (let ((.cse152 (select (store |c_#length| v_prenex_645 v_prenex_643) v_arrayElimCell_261))) (or (bvsle (bvadd v_prenex_644 (_ bv4 32)) .cse152) (not (bvsle (_ bv0 32) v_prenex_644)) (= v_arrayElimCell_261 v_prenex_645) (bvsle (bvadd v_prenex_642 (_ bv4 32)) .cse152) (= v_arrayElimCell_261 c_main_~x~0.base))))) (or (forall ((v_prenex_164 (_ BitVec 32)) (v_prenex_163 (_ BitVec 32)) (v_arrayElimCell_613 (_ BitVec 32)) (v_prenex_165 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_164)) (bvsle (bvadd v_prenex_164 (_ bv4 32)) (select (store |c_#length| v_prenex_163 v_prenex_165) v_arrayElimCell_613)) (= v_arrayElimCell_613 v_prenex_163))) .cse1) (or .cse1 .cse0 (forall ((v_arrayElimCell_524 (_ BitVec 32)) (v_prenex_555 (_ BitVec 32)) (v_prenex_554 (_ BitVec 32)) (v_prenex_553 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_554 (_ bv4 32)) (select (store |c_#length| v_prenex_555 v_prenex_553) v_arrayElimCell_524)) (= v_arrayElimCell_524 v_prenex_555) (not (bvsle (_ bv0 32) v_prenex_554)) (= v_arrayElimCell_524 c_main_~x~0.base)))) (or (forall ((v_arrayElimCell_498 (_ BitVec 32)) (v_prenex_194 (_ BitVec 32)) (v_prenex_193 (_ BitVec 32)) (v_prenex_192 (_ BitVec 32)) (v_prenex_23 (_ BitVec 32))) (let ((.cse153 (select (store |c_#length| v_prenex_192 v_prenex_194) v_arrayElimCell_498))) (or (not (bvsle (_ bv0 32) v_prenex_23)) (bvsle (bvadd v_prenex_193 (_ bv4 32)) .cse153) (bvsle (bvadd v_prenex_23 (_ bv4 32)) .cse153) (= v_arrayElimCell_498 v_prenex_192)))) .cse0) (or .cse1 (forall ((v_prenex_506 (_ BitVec 32)) (v_prenex_505 (_ BitVec 32)) (v_prenex_504 (_ BitVec 32)) (v_arrayElimCell_683 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_505 (_ bv4 32)) (select (store |c_#length| v_prenex_506 v_prenex_504) v_arrayElimCell_683)) (not (bvsle (_ bv0 32) v_prenex_505)) (= v_arrayElimCell_683 c_main_~x~0.base) (= v_arrayElimCell_683 v_prenex_506)))) (or .cse1 .cse0 (forall ((v_prenex_381 (_ BitVec 32)) (v_arrayElimCell_445 (_ BitVec 32)) (v_prenex_380 (_ BitVec 32)) (v_prenex_379 (_ BitVec 32)) (v_prenex_378 (_ BitVec 32)) (v_prenex_377 (_ BitVec 32))) (let ((.cse158 (store |c_#length| v_prenex_377 v_prenex_380))) (let ((.cse155 (select .cse158 v_prenex_378)) (.cse154 (bvadd v_prenex_381 (_ bv4 32))) (.cse156 (bvadd v_prenex_379 (_ bv4 32))) (.cse157 (select .cse158 v_arrayElimCell_445))) (or (bvsle .cse154 .cse155) (bvsle .cse156 .cse155) (not (bvsle (_ bv0 32) v_prenex_381)) (bvsle .cse154 .cse157) (bvsle .cse156 .cse157) (= v_arrayElimCell_445 c_main_~x~0.base) (= v_arrayElimCell_445 v_prenex_377) (= v_prenex_378 v_prenex_377)))))) (or .cse1 (forall ((v_prenex_303 (_ BitVec 32)) (v_prenex_302 (_ BitVec 32)) (v_prenex_301 (_ BitVec 32)) (v_arrayElimCell_196 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_303 (_ bv4 32)) (select (store |c_#length| v_prenex_301 v_prenex_302) v_arrayElimCell_196)) (not (bvsle (_ bv0 32) v_prenex_303)) (= v_arrayElimCell_196 v_prenex_301))) .cse7) (or .cse1 (forall ((v_prenex_296 (_ BitVec 32)) (v_prenex_295 (_ BitVec 32)) (v_prenex_294 (_ BitVec 32)) (v_prenex_293 (_ BitVec 32)) (v_prenex_292 (_ BitVec 32)) (v_arrayElimCell_671 (_ BitVec 32))) (let ((.cse161 (store |c_#length| v_prenex_292 v_prenex_295))) (let ((.cse159 (bvadd v_prenex_296 (_ bv4 32))) (.cse160 (select .cse161 v_prenex_293))) (or (bvsle .cse159 .cse160) (bvsle .cse159 (select .cse161 v_arrayElimCell_671)) (= v_arrayElimCell_671 v_prenex_292) (not (bvsle (_ bv0 32) v_prenex_296)) (= v_arrayElimCell_671 c_main_~x~0.base) (= v_prenex_293 v_prenex_292) (bvsle (bvadd v_prenex_294 (_ bv4 32)) .cse160))))) .cse0 .cse5) (or .cse10 .cse1 .cse7 (forall ((v_arrayElimCell_630 (_ BitVec 32)) (v_prenex_757 (_ BitVec 32)) (v_prenex_756 (_ BitVec 32)) (v_prenex_755 (_ BitVec 32)) (v_prenex_754 (_ BitVec 32))) (let ((.cse162 (select (store |c_#length| v_prenex_757 v_prenex_756) v_arrayElimCell_630))) (or (bvsle (bvadd v_prenex_754 (_ bv4 32)) .cse162) (bvsle (bvadd v_prenex_755 (_ bv4 32)) .cse162) (= v_arrayElimCell_630 v_prenex_757) (not (bvsle (_ bv0 32) v_prenex_754)))))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_476 (_ BitVec 32)) (v_prenex_753 (_ BitVec 32)) (v_prenex_752 (_ BitVec 32)) (v_prenex_751 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_751 (_ bv4 32)) (select (store |c_#length| v_prenex_753 v_prenex_752) v_arrayElimCell_476)) (= v_arrayElimCell_476 v_prenex_753) (= v_arrayElimCell_476 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_751))))) (or (forall ((v_prenex_593 (_ BitVec 32)) (v_arrayElimCell_486 (_ BitVec 32)) (v_prenex_592 (_ BitVec 32)) (v_prenex_22 (_ BitVec 32)) (v_prenex_594 (_ BitVec 32))) (let ((.cse163 (select (store |c_#length| v_prenex_594 v_prenex_593) v_arrayElimCell_486))) (or (= v_arrayElimCell_486 v_prenex_594) (= v_arrayElimCell_486 c_main_~x~0.base) (bvsle (bvadd v_prenex_22 (_ bv4 32)) .cse163) (bvsle (bvadd v_prenex_592 (_ bv4 32)) .cse163) (not (bvsle (_ bv0 32) v_prenex_22))))) .cse0) (or .cse10 .cse1 (forall ((v_prenex_429 (_ BitVec 32)) (v_arrayElimCell_512 (_ BitVec 32)) (v_prenex_428 (_ BitVec 32)) (v_prenex_427 (_ BitVec 32))) (or (= v_arrayElimCell_512 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_428)) (= v_arrayElimCell_512 v_prenex_429) (bvsle (bvadd v_prenex_428 (_ bv4 32)) (select (store |c_#length| v_prenex_429 v_prenex_427) v_arrayElimCell_512)))) .cse0) (or .cse0 .cse5 (forall ((v_arrayElimCell_238 (_ BitVec 32)) (v_prenex_433 (_ BitVec 32)) (v_prenex_432 (_ BitVec 32)) (v_prenex_431 (_ BitVec 32)) (v_prenex_430 (_ BitVec 32))) (let ((.cse164 (select (store |c_#length| v_prenex_433 v_prenex_431) v_arrayElimCell_238))) (or (bvsle (bvadd v_prenex_432 (_ bv4 32)) .cse164) (= v_arrayElimCell_238 v_prenex_433) (bvsle (bvadd v_prenex_430 (_ bv4 32)) .cse164) (= v_arrayElimCell_238 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_432)))))) (or (forall ((v_prenex_738 (_ BitVec 32)) (v_prenex_737 (_ BitVec 32)) (v_prenex_19 (_ BitVec 32)) (v_arrayElimCell_703 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_19)) (bvsle (bvadd v_prenex_19 (_ bv4 32)) (select (store |c_#length| v_prenex_738 v_prenex_737) v_arrayElimCell_703)) (= v_arrayElimCell_703 v_prenex_738))) .cse0) .cse71 (or .cse0 (forall ((v_prenex_20 (_ BitVec 32)) (v_prenex_776 (_ BitVec 32)) (v_prenex_775 (_ BitVec 32)) (v_arrayElimCell_409 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_20)) (bvsle (bvadd v_prenex_20 (_ bv4 32)) (select (store |c_#length| v_prenex_776 v_prenex_775) v_arrayElimCell_409)) (= v_arrayElimCell_409 c_main_~x~0.base) (= v_arrayElimCell_409 v_prenex_776)))) (or .cse1 .cse7 (forall ((v_prenex_618 (_ BitVec 32)) (v_prenex_617 (_ BitVec 32)) (v_prenex_616 (_ BitVec 32)) (v_prenex_615 (_ BitVec 32)) (v_arrayElimCell_192 (_ BitVec 32))) (let ((.cse165 (select (store |c_#length| v_prenex_618 v_prenex_616) v_arrayElimCell_192))) (or (bvsle (bvadd v_prenex_615 (_ bv4 32)) .cse165) (= v_arrayElimCell_192 v_prenex_618) (not (bvsle (_ bv0 32) v_prenex_617)) (bvsle (bvadd v_prenex_617 (_ bv4 32)) .cse165))))) (or .cse1 .cse0 .cse5 (forall ((v_prenex_362 (_ BitVec 32)) (v_prenex_361 (_ BitVec 32)) (v_prenex_360 (_ BitVec 32)) (v_arrayElimCell_394 (_ BitVec 32)) (v_arrayElimCell_120 (_ BitVec 32)) (v_prenex_363 (_ BitVec 32))) (let ((.cse167 (store |c_#length| v_prenex_360 v_prenex_363))) (let ((.cse166 (bvadd v_arrayElimCell_120 (_ bv4 32))) (.cse168 (select .cse167 v_prenex_361))) (or (= v_arrayElimCell_394 c_main_~x~0.base) (bvsle .cse166 (select .cse167 v_arrayElimCell_394)) (bvsle (bvadd v_prenex_362 (_ bv4 32)) .cse168) (= v_arrayElimCell_394 v_prenex_360) (not (bvsle (_ bv0 32) v_arrayElimCell_120)) (bvsle .cse166 .cse168) (= v_prenex_361 v_prenex_360)))))) (or (forall ((v_prenex_708 (_ BitVec 32)) (v_arrayElimCell_189 (_ BitVec 32)) (v_prenex_707 (_ BitVec 32)) (v_prenex_706 (_ BitVec 32)) (v_prenex_709 (_ BitVec 32))) (let ((.cse169 (select (store |c_#length| v_prenex_709 v_prenex_708) v_arrayElimCell_189))) (or (bvsle (bvadd v_prenex_706 (_ bv4 32)) .cse169) (bvsle (bvadd v_prenex_707 (_ bv4 32)) .cse169) (= v_arrayElimCell_189 v_prenex_709) (not (bvsle (_ bv0 32) v_prenex_706))))) .cse1 .cse0) (or .cse1 (forall ((v_prenex_591 (_ BitVec 32)) (v_prenex_590 (_ BitVec 32)) (v_prenex_589 (_ BitVec 32)) (v_prenex_588 (_ BitVec 32)) (v_prenex_587 (_ BitVec 32)) (v_arrayElimCell_265 (_ BitVec 32))) (let ((.cse170 (store |c_#length| v_prenex_591 v_prenex_589))) (or (bvsle (bvadd v_prenex_590 (_ bv4 32)) (select .cse170 v_arrayElimCell_265)) (= v_prenex_587 v_prenex_591) (not (bvsle (_ bv0 32) v_prenex_590)) (= v_arrayElimCell_265 v_prenex_591) (bvsle (bvadd v_prenex_588 (_ bv4 32)) (select .cse170 v_prenex_587)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_265)))) .cse5) (or .cse1 .cse43 .cse5 (forall ((v_arrayElimCell_574 (_ BitVec 32)) (v_prenex_537 (_ BitVec 32)) (v_prenex_536 (_ BitVec 32)) (v_prenex_535 (_ BitVec 32))) (or (= v_arrayElimCell_574 v_prenex_537) (not (bvsle (_ bv0 32) v_prenex_536)) (bvsle (bvadd v_prenex_536 (_ bv4 32)) (select (store |c_#length| v_prenex_537 v_prenex_535) v_arrayElimCell_574))))) (or .cse1 (forall ((v_prenex_263 (_ BitVec 32)) (v_prenex_262 (_ BitVec 32)) (v_prenex_261 (_ BitVec 32)) (v_prenex_60 (_ BitVec 32)) (v_arrayElimCell_264 (_ BitVec 32)) (v_prenex_264 (_ BitVec 32))) (let ((.cse171 (store |c_#length| v_prenex_261 v_prenex_264))) (or (bvsle (bvadd v_prenex_263 (_ bv4 32)) (select .cse171 v_prenex_262)) (not (bvsle (_ bv0 32) v_prenex_60)) (bvsle (bvadd v_prenex_60 (_ bv4 32)) (select .cse171 v_arrayElimCell_264)) (= v_arrayElimCell_264 c_main_~x~0.base) (= v_prenex_262 v_prenex_261) (= v_arrayElimCell_264 v_prenex_261)))) .cse5 .cse6) (or .cse1 (forall ((v_prenex_40 (_ BitVec 32)) (v_prenex_214 (_ BitVec 32)) (v_prenex_213 (_ BitVec 32)) (v_arrayElimCell_331 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_40)) (bvsle (bvadd v_prenex_40 (_ bv4 32)) (select (store |c_#length| v_prenex_213 v_prenex_214) v_arrayElimCell_331)) (= v_arrayElimCell_331 v_prenex_213))) .cse5 .cse6) (or .cse1 .cse43 .cse5 (forall ((v_prenex_407 (_ BitVec 32)) (v_prenex_406 (_ BitVec 32)) (v_prenex_405 (_ BitVec 32)) (v_prenex_404 (_ BitVec 32)) (v_arrayElimCell_230 (_ BitVec 32))) (let ((.cse172 (select (store |c_#length| v_prenex_404 v_prenex_406) v_arrayElimCell_230))) (or (bvsle (bvadd v_prenex_407 (_ bv4 32)) .cse172) (= v_arrayElimCell_230 v_prenex_404) (not (bvsle (_ bv0 32) v_prenex_407)) (bvsle (bvadd v_prenex_405 (_ bv4 32)) .cse172))))) (or .cse1 (forall ((v_prenex_73 (_ BitVec 32)) (v_arrayElimCell_269 (_ BitVec 32)) (v_prenex_552 (_ BitVec 32)) (v_prenex_551 (_ BitVec 32)) (v_prenex_550 (_ BitVec 32))) (let ((.cse173 (select (store |c_#length| v_prenex_552 v_prenex_551) v_arrayElimCell_269))) (or (= v_arrayElimCell_269 c_main_~x~0.base) (bvsle (bvadd v_prenex_550 (_ bv4 32)) .cse173) (bvsle (bvadd v_prenex_73 (_ bv4 32)) .cse173) (= v_arrayElimCell_269 v_prenex_552) (not (bvsle (_ bv0 32) v_prenex_73))))) .cse0) (or .cse10 (forall ((v_prenex_328 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32)) (v_prenex_327 (_ BitVec 32)) (v_arrayElimCell_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_9)) (= v_arrayElimCell_207 c_main_~x~0.base) (bvsle (bvadd v_prenex_9 (_ bv4 32)) (select (store |c_#length| v_prenex_327 v_prenex_328) v_arrayElimCell_207)) (= v_arrayElimCell_207 v_prenex_327))) .cse0) (or .cse1 (forall ((v_arrayElimCell_203 (_ BitVec 32)) (v_prenex_309 (_ BitVec 32)) (v_prenex_308 (_ BitVec 32)) (v_prenex_307 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_309 (_ bv4 32)) (select (store |c_#length| v_prenex_307 v_prenex_308) v_arrayElimCell_203)) (not (bvsle (_ bv0 32) v_prenex_309)) (= v_arrayElimCell_203 v_prenex_307))) .cse0) (or (forall ((v_arrayElimCell_260 (_ BitVec 32)) (v_prenex_686 (_ BitVec 32)) (v_prenex_685 (_ BitVec 32)) (v_prenex_684 (_ BitVec 32)) (v_prenex_683 (_ BitVec 32))) (let ((.cse174 (select (store |c_#length| v_prenex_686 v_prenex_684) v_arrayElimCell_260))) (or (not (bvsle (_ bv0 32) v_prenex_685)) (= v_arrayElimCell_260 v_prenex_686) (bvsle (bvadd v_prenex_685 (_ bv4 32)) .cse174) (bvsle (bvadd v_prenex_683 (_ bv4 32)) .cse174) (= v_arrayElimCell_260 c_main_~x~0.base)))) .cse1 .cse5 .cse6) (or .cse1 (forall ((v_arrayElimCell_255 (_ BitVec 32)) (v_prenex_272 (_ BitVec 32)) (v_prenex_271 (_ BitVec 32)) (v_prenex_270 (_ BitVec 32)) (v_prenex_269 (_ BitVec 32)) (v_prenex_268 (_ BitVec 32))) (let ((.cse175 (store |c_#length| v_prenex_268 v_prenex_271))) (or (not (bvsle (_ bv0 32) v_prenex_272)) (bvsle (bvadd v_prenex_270 (_ bv4 32)) (select .cse175 v_prenex_269)) (= v_arrayElimCell_255 v_prenex_268) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_255) (= v_prenex_269 v_prenex_268) (bvsle (bvadd v_prenex_272 (_ bv4 32)) (select .cse175 v_arrayElimCell_255))))) .cse43 .cse5) (or .cse1 .cse7 (forall ((v_prenex_372 (_ BitVec 32)) (v_prenex_371 (_ BitVec 32)) (v_prenex_370 (_ BitVec 32)) (v_prenex_71 (_ BitVec 32)) (v_arrayElimCell_593 (_ BitVec 32))) (let ((.cse176 (select (store |c_#length| v_prenex_370 v_prenex_372) v_arrayElimCell_593))) (or (= v_arrayElimCell_593 c_main_~x~0.base) (bvsle (bvadd v_prenex_371 (_ bv4 32)) .cse176) (bvsle (bvadd v_prenex_71 (_ bv4 32)) .cse176) (= v_arrayElimCell_593 v_prenex_370) (not (bvsle (_ bv0 32) v_prenex_71)))))) (or .cse0 (forall ((v_prenex_577 (_ BitVec 32)) (v_prenex_576 (_ BitVec 32)) (v_prenex_575 (_ BitVec 32)) (v_prenex_574 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_575)) (= v_prenex_574 v_prenex_577) (bvsle (bvadd v_prenex_575 (_ bv4 32)) (select (store |c_#length| v_prenex_577 v_prenex_576) v_prenex_574))))) .cse5 (or .cse1 .cse0 (forall ((v_prenex_648 (_ BitVec 32)) (v_prenex_647 (_ BitVec 32)) (v_arrayElimCell_547 (_ BitVec 32)) (v_prenex_646 (_ BitVec 32)) (v_prenex_68 (_ BitVec 32))) (let ((.cse177 (select (store |c_#length| v_prenex_648 v_prenex_647) v_arrayElimCell_547))) (or (= v_arrayElimCell_547 v_prenex_648) (bvsle (bvadd v_prenex_646 (_ bv4 32)) .cse177) (= v_arrayElimCell_547 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_68)) (bvsle (bvadd v_prenex_68 (_ bv4 32)) .cse177))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_383 (_ BitVec 32)) (v_prenex_696 (_ BitVec 32)) (v_prenex_695 (_ BitVec 32)) (v_prenex_694 (_ BitVec 32))) (or (= v_arrayElimCell_383 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_696)) (= v_arrayElimCell_383 v_prenex_695) (bvsle (bvadd v_prenex_696 (_ bv4 32)) (select (store |c_#length| v_prenex_695 v_prenex_694) v_arrayElimCell_383))))) (or (forall ((v_prenex_403 (_ BitVec 32)) (v_prenex_402 (_ BitVec 32)) (v_arrayElimCell_539 (_ BitVec 32)) (v_prenex_401 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_403 (_ bv4 32)) (select (store |c_#length| v_prenex_401 v_prenex_402) v_arrayElimCell_539)) (= v_arrayElimCell_539 v_prenex_401) (= v_arrayElimCell_539 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_403)))) .cse1 .cse7) (or (forall ((v_prenex_571 (_ BitVec 32)) (v_prenex_570 (_ BitVec 32)) (v_prenex_569 (_ BitVec 32)) (v_prenex_568 (_ BitVec 32)) (v_arrayElimCell_637 (_ BitVec 32)) (v_prenex_567 (_ BitVec 32))) (let ((.cse178 (store |c_#length| v_prenex_571 v_prenex_569))) (or (= v_prenex_567 v_prenex_571) (not (bvsle (_ bv0 32) v_prenex_570)) (= v_arrayElimCell_637 v_prenex_571) (bvsle (bvadd v_prenex_568 (_ bv4 32)) (select .cse178 v_prenex_567)) (bvsle (bvadd v_prenex_570 (_ bv4 32)) (select .cse178 v_arrayElimCell_637)) (= v_arrayElimCell_637 c_main_~x~0.base)))) .cse1 .cse5 .cse6) .cse0 (or .cse0 (forall ((v_prenex_15 (_ BitVec 32)) (v_arrayElimCell_281 (_ BitVec 32)) (v_prenex_322 (_ BitVec 32)) (v_prenex_321 (_ BitVec 32))) (or (= v_arrayElimCell_281 v_prenex_321) (not (bvsle (_ bv0 32) v_prenex_15)) (bvsle (bvadd v_prenex_15 (_ bv4 32)) (select (store |c_#length| v_prenex_321 v_prenex_322) v_arrayElimCell_281)))) .cse5) (or .cse1 (forall ((v_prenex_637 (_ BitVec 32)) (v_prenex_636 (_ BitVec 32)) (v_prenex_635 (_ BitVec 32)) (v_prenex_634 (_ BitVec 32)) (v_arrayElimCell_250 (_ BitVec 32))) (let ((.cse179 (select (store |c_#length| v_prenex_637 v_prenex_635) v_arrayElimCell_250))) (or (not (bvsle (_ bv0 32) v_prenex_636)) (bvsle (bvadd v_prenex_634 (_ bv4 32)) .cse179) (= v_arrayElimCell_250 c_main_~x~0.base) (= v_arrayElimCell_250 v_prenex_637) (bvsle (bvadd v_prenex_636 (_ bv4 32)) .cse179)))) .cse5 .cse6) (or .cse1 (forall ((v_prenex_175 (_ BitVec 32)) (v_arrayElimCell_653 (_ BitVec 32)) (v_prenex_38 (_ BitVec 32)) (v_prenex_178 (_ BitVec 32)) (v_prenex_177 (_ BitVec 32)) (v_prenex_176 (_ BitVec 32))) (let ((.cse181 (store |c_#length| v_prenex_176 v_prenex_175))) (let ((.cse180 (bvadd v_prenex_38 (_ bv4 32))) (.cse182 (select .cse181 v_prenex_177))) (or (= v_arrayElimCell_653 c_main_~x~0.base) (bvsle .cse180 (select .cse181 v_arrayElimCell_653)) (bvsle (bvadd v_prenex_178 (_ bv4 32)) .cse182) (= v_arrayElimCell_653 v_prenex_176) (not (bvsle (_ bv0 32) v_prenex_38)) (bvsle .cse180 .cse182) (= v_prenex_177 v_prenex_176))))) .cse5 .cse6) (or .cse10 .cse1 (forall ((v_prenex_184 (_ BitVec 32)) (v_prenex_183 (_ BitVec 32)) (v_prenex_182 (_ BitVec 32)) (v_arrayElimCell_121 (_ BitVec 32)) (v_arrayElimCell_452 (_ BitVec 32))) (let ((.cse183 (select (store |c_#length| v_prenex_182 v_prenex_184) v_arrayElimCell_452))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_121)) (bvsle (bvadd v_prenex_183 (_ bv4 32)) .cse183) (= v_arrayElimCell_452 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_121 (_ bv4 32)) .cse183) (= v_arrayElimCell_452 v_prenex_182))))) (or .cse10 (forall ((v_prenex_43 (_ BitVec 32)) (v_arrayElimCell_424 (_ BitVec 32)) (v_prenex_389 (_ BitVec 32)) (v_prenex_388 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_43)) (= v_arrayElimCell_424 c_main_~x~0.base) (bvsle (bvadd v_prenex_43 (_ bv4 32)) (select (store |c_#length| v_prenex_388 v_prenex_389) v_arrayElimCell_424)) (= v_arrayElimCell_424 v_prenex_388))) .cse1 .cse0) (or .cse1 (forall ((v_prenex_767 (_ BitVec 32)) (v_arrayElimCell_614 (_ BitVec 32)) (v_prenex_766 (_ BitVec 32)) (v_prenex_765 (_ BitVec 32))) (or (= v_arrayElimCell_614 v_prenex_767) (bvsle (bvadd v_prenex_765 (_ bv4 32)) (select (store |c_#length| v_prenex_767 v_prenex_766) v_arrayElimCell_614)) (not (bvsle (_ bv0 32) v_prenex_765)))) .cse0) (or .cse10 .cse1 .cse7 (forall ((v_prenex_54 (_ BitVec 32)) (v_arrayElimCell_506 (_ BitVec 32)) (v_prenex_169 (_ BitVec 32)) (v_prenex_168 (_ BitVec 32))) (or (= v_arrayElimCell_506 v_prenex_168) (not (bvsle (_ bv0 32) v_prenex_54)) (bvsle (bvadd v_prenex_54 (_ bv4 32)) (select (store |c_#length| v_prenex_168 v_prenex_169) v_arrayElimCell_506)) (= v_arrayElimCell_506 c_main_~x~0.base))))))) is different from true [2018-11-10 07:44:50,976 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-10 07:44:50,977 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:50,996 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:50,996 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 13 variables, input treesize:79, output treesize:6 [2018-11-10 07:44:51,156 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (40)] Exception during sending of exit command (exit): Broken pipe [2018-11-10 07:44:51,160 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:44:51,160 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:44:51,171 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:44:51,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:44:51,234 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:44:51,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:44:51,237 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,240 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 07:44:51,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-11-10 07:44:51,305 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:44:51,323 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,335 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,335 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-10 07:44:51,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:44:51,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:44:51,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,424 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:44:51,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:44:51,456 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,459 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,478 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:40, output treesize:31 [2018-11-10 07:44:51,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-11-10 07:44:51,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:44:51,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,706 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-11-10 07:44:51,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:44:51,745 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,763 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,783 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,783 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:65, output treesize:27 [2018-11-10 07:44:51,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:44:51,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:44:51,853 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,856 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:44:51,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:44:51,876 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,883 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:51,897 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:48, output treesize:18 [2018-11-10 07:44:52,003 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:44:52,004 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:44:52,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 07:44:52,004 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:52,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 07:44:52,019 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:52,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:44:52,030 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-11-10 07:44:52,032 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:44:52,032 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:44:52,410 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-10 07:44:52,416 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:44:52,417 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:44:52,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 25 [2018-11-10 07:44:52,418 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:52,502 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:44:52,503 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:44:52,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-11-10 07:44:52,504 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:52,586 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:44:52,586 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:44:52,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-11-10 07:44:52,587 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 07:44:52,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:44:52,671 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:112, output treesize:79 [2018-11-10 07:44:52,964 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:44:52,981 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:44:52,981 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [10, 10, 11] total 27 [2018-11-10 07:44:52,981 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-11-10 07:44:52,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-11-10 07:44:52,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=609, Unknown=1, NotChecked=50, Total=756 [2018-11-10 07:44:52,982 INFO L87 Difference]: Start difference. First operand 221 states and 245 transitions. Second operand 28 states. [2018-11-10 07:44:57,004 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse7 (= |c_main_write~$Pointer$_#value.base| c_main_~x~0.base)) (.cse5 (= |c_main_write~$Pointer$_#value.base| |c_main_write~$Pointer$_#ptr.base|)) (.cse6 (= |c_main_write~$Pointer$_#ptr.base| c_main_~x~0.base)) (.cse189 (bvadd |c_main_write~$Pointer$_#ptr.offset| |c_main_write~$Pointer$_#sizeOfWrittenType|)) (.cse0 (= c_main_~x~0.offset |c_main_write~$Pointer$_#ptr.offset|))) (let ((.cse38 (bvsle |c_main_write~$Pointer$_#value.offset| (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)))) (.cse37 (not .cse0)) (.cse39 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#value.offset|))) (.cse133 (bvsle c_main_~x~0.offset (bvadd c_main_~x~0.offset (_ bv4 32)))) (.cse43 (not (bvsle .cse189 (select |c_#length| |c_main_write~$Pointer$_#ptr.base|)))) (.cse44 (bvsle (_ bv0 32) c_main_~x~0.offset)) (.cse45 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#ptr.offset|))) (.cse46 (not (bvsle |c_main_write~$Pointer$_#ptr.offset| .cse189))) (.cse15 (not .cse6)) (.cse25 (not .cse5)) (.cse4 (not .cse7))) (and (or .cse0 (forall ((v_prenex_581 (_ BitVec 32)) (v_prenex_580 (_ BitVec 32)) (v_arrayElimCell_359 (_ BitVec 32)) (v_prenex_50 (_ BitVec 32)) (v_prenex_579 (_ BitVec 32)) (v_prenex_578 (_ BitVec 32))) (let ((.cse3 (store |c_#length| v_prenex_581 v_prenex_580))) (let ((.cse2 (bvadd v_prenex_579 (_ bv4 32))) (.cse1 (select .cse3 v_arrayElimCell_359))) (or (bvsle (bvadd v_prenex_50 (_ bv4 32)) .cse1) (= v_arrayElimCell_359 v_prenex_581) (= v_prenex_578 v_prenex_581) (bvsle .cse2 (select .cse3 v_prenex_578)) (not (bvsle (_ bv0 32) v_prenex_50)) (bvsle .cse2 .cse1) (= v_arrayElimCell_359 c_main_~x~0.base))))) .cse4 .cse5) (or .cse0 (forall ((v_prenex_582 (_ BitVec 32)) (v_arrayElimCell_608 (_ BitVec 32)) (v_prenex_584 (_ BitVec 32)) (v_prenex_583 (_ BitVec 32))) (or (= v_arrayElimCell_608 v_prenex_584) (bvsle (bvadd v_prenex_583 (_ bv4 32)) (select (store |c_#length| v_prenex_584 v_prenex_582) v_arrayElimCell_608)) (not (bvsle (_ bv0 32) v_prenex_583)))) .cse6) (or .cse0 (forall ((v_prenex_736 (_ BitVec 32)) (v_prenex_735 (_ BitVec 32)) (v_prenex_734 (_ BitVec 32)) (v_prenex_733 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_734)) (= v_prenex_733 v_prenex_736) (bvsle (bvadd v_prenex_734 (_ bv4 32)) (select (store |c_#length| v_prenex_736 v_prenex_735) v_prenex_733))))) (or .cse7 .cse0 (forall ((v_prenex_236 (_ BitVec 32)) (v_prenex_235 (_ BitVec 32)) (v_prenex_234 (_ BitVec 32)) (v_arrayElimCell_509 (_ BitVec 32))) (or (= v_arrayElimCell_509 v_prenex_234) (not (bvsle (_ bv0 32) v_prenex_235)) (= v_arrayElimCell_509 c_main_~x~0.base) (bvsle (bvadd v_prenex_235 (_ bv4 32)) (select (store |c_#length| v_prenex_234 v_prenex_236) v_arrayElimCell_509)))) .cse6) (or .cse6 (forall ((v_arrayElimCell_305 (_ BitVec 32)) (v_arrayElimCell_78 (_ BitVec 32)) (v_prenex_224 (_ BitVec 32)) (v_prenex_223 (_ BitVec 32)) (v_prenex_222 (_ BitVec 32))) (let ((.cse8 (select (store |c_#length| v_prenex_222 v_prenex_224) v_arrayElimCell_305))) (or (bvsle (bvadd v_prenex_223 (_ bv4 32)) .cse8) (bvsle (bvadd v_arrayElimCell_78 (_ bv4 32)) .cse8) (not (bvsle (_ bv0 32) v_arrayElimCell_78)) (= v_arrayElimCell_305 v_prenex_222))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_301 (_ BitVec 32)) (v_prenex_37 (_ BitVec 32)) (v_prenex_454 (_ BitVec 32)) (v_prenex_453 (_ BitVec 32))) (or (= v_arrayElimCell_301 v_prenex_454) (= v_arrayElimCell_301 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_37)) (bvsle (bvadd v_prenex_37 (_ bv4 32)) (select (store |c_#length| v_prenex_454 v_prenex_453) v_arrayElimCell_301))))) (or .cse0 (forall ((v_prenex_72 (_ BitVec 32)) (v_prenex_369 (_ BitVec 32)) (v_prenex_368 (_ BitVec 32)) (v_prenex_367 (_ BitVec 32)) (v_arrayElimCell_186 (_ BitVec 32))) (let ((.cse9 (select (store |c_#length| v_prenex_367 v_prenex_369) v_arrayElimCell_186))) (or (= v_arrayElimCell_186 v_prenex_367) (not (bvsle (_ bv0 32) v_prenex_72)) (bvsle (bvadd v_prenex_368 (_ bv4 32)) .cse9) (bvsle (bvadd v_prenex_72 (_ bv4 32)) .cse9)))) .cse6) (or .cse0 .cse4 (forall ((v_arrayElimCell_640 (_ BitVec 32)) (v_prenex_53 (_ BitVec 32)) (v_prenex_349 (_ BitVec 32)) (v_prenex_348 (_ BitVec 32)) (v_prenex_347 (_ BitVec 32)) (v_prenex_346 (_ BitVec 32))) (let ((.cse12 (store |c_#length| v_prenex_346 v_prenex_349))) (let ((.cse11 (select .cse12 v_arrayElimCell_640)) (.cse10 (bvadd v_prenex_348 (_ bv4 32)))) (or (bvsle .cse10 .cse11) (not (bvsle (_ bv0 32) v_prenex_53)) (= v_arrayElimCell_640 v_prenex_346) (bvsle (bvadd v_prenex_53 (_ bv4 32)) .cse11) (bvsle .cse10 (select .cse12 v_prenex_347)) (= v_arrayElimCell_640 c_main_~x~0.base) (= v_prenex_347 v_prenex_346))))) .cse5) (or .cse0 (forall ((v_prenex_480 (_ BitVec 32)) (v_prenex_479 (_ BitVec 32)) (v_prenex_478 (_ BitVec 32)) (v_prenex_477 (_ BitVec 32)) (v_prenex_476 (_ BitVec 32)) (v_arrayElimCell_253 (_ BitVec 32))) (let ((.cse13 (store |c_#length| v_prenex_480 v_prenex_478))) (or (= v_arrayElimCell_253 c_main_~x~0.base) (= v_arrayElimCell_253 v_prenex_480) (not (bvsle (_ bv0 32) v_prenex_479)) (= v_prenex_476 v_prenex_480) (bvsle (bvadd v_prenex_479 (_ bv4 32)) (select .cse13 v_arrayElimCell_253)) (bvsle (bvadd v_prenex_477 (_ bv4 32)) (select .cse13 v_prenex_476))))) .cse4 .cse5) (or .cse0 (forall ((v_prenex_373 (_ BitVec 32)) (v_arrayElimCell_449 (_ BitVec 32)) (v_prenex_376 (_ BitVec 32)) (v_prenex_375 (_ BitVec 32)) (v_prenex_374 (_ BitVec 32))) (let ((.cse14 (select (store |c_#length| v_prenex_373 v_prenex_375) v_arrayElimCell_449))) (or (= v_arrayElimCell_449 v_prenex_373) (bvsle (bvadd v_prenex_376 (_ bv4 32)) .cse14) (not (bvsle (_ bv0 32) v_prenex_376)) (= v_arrayElimCell_449 c_main_~x~0.base) (bvsle (bvadd v_prenex_374 (_ bv4 32)) .cse14))))) (or .cse0 .cse15 (forall ((v_prenex_549 (_ BitVec 32)) (v_prenex_548 (_ BitVec 32)) (v_prenex_547 (_ BitVec 32)) (v_prenex_546 (_ BitVec 32)) (v_arrayElimCell_570 (_ BitVec 32))) (let ((.cse16 (select (store |c_#length| v_prenex_549 v_prenex_547) v_arrayElimCell_570))) (or (= v_arrayElimCell_570 v_prenex_549) (bvsle (bvadd v_prenex_546 (_ bv4 32)) .cse16) (bvsle (bvadd v_prenex_548 (_ bv4 32)) .cse16) (not (bvsle (_ bv0 32) v_prenex_548)))))) (or .cse0 .cse6 (forall ((v_prenex_419 (_ BitVec 32)) (v_prenex_418 (_ BitVec 32)) (v_prenex_148 (_ BitVec 32)) (v_prenex_422 (_ BitVec 32)) (v_prenex_421 (_ BitVec 32)) (v_prenex_420 (_ BitVec 32))) (let ((.cse21 (store |c_#length| v_prenex_422 v_prenex_420))) (let ((.cse19 (bvadd v_prenex_419 (_ bv4 32))) (.cse18 (select .cse21 v_prenex_148)) (.cse17 (bvadd v_prenex_421 (_ bv4 32))) (.cse20 (select .cse21 v_prenex_418))) (or (= v_prenex_148 c_main_~x~0.base) (bvsle .cse17 .cse18) (= v_prenex_148 v_prenex_422) (bvsle .cse19 .cse20) (= v_prenex_418 v_prenex_422) (bvsle .cse19 .cse18) (bvsle .cse17 .cse20) (not (bvsle (_ bv0 32) v_prenex_421))))))) (or (forall ((v_prenex_490 (_ BitVec 32)) (v_prenex_489 (_ BitVec 32)) (v_prenex_488 (_ BitVec 32)) (v_prenex_487 (_ BitVec 32)) (v_prenex_486 (_ BitVec 32)) (v_arrayElimCell_353 (_ BitVec 32))) (let ((.cse24 (store |c_#length| v_prenex_489 v_prenex_488))) (let ((.cse22 (select .cse24 v_arrayElimCell_353)) (.cse23 (bvadd v_prenex_487 (_ bv4 32)))) (or (bvsle (bvadd v_prenex_490 (_ bv4 32)) .cse22) (bvsle .cse23 .cse22) (= v_prenex_486 v_prenex_489) (not (bvsle (_ bv0 32) v_prenex_490)) (bvsle .cse23 (select .cse24 v_prenex_486)) (= v_arrayElimCell_353 c_main_~x~0.base) (= v_arrayElimCell_353 v_prenex_489))))) .cse0 .cse25 .cse4) (or .cse0 (forall ((v_arrayElimCell_420 (_ BitVec 32)) (v_prenex_700 (_ BitVec 32)) (v_prenex_699 (_ BitVec 32)) (v_prenex_698 (_ BitVec 32)) (v_prenex_697 (_ BitVec 32))) (let ((.cse26 (select (store |c_#length| v_prenex_700 v_prenex_699) v_arrayElimCell_420))) (or (= v_arrayElimCell_420 c_main_~x~0.base) (= v_arrayElimCell_420 v_prenex_700) (bvsle (bvadd v_prenex_697 (_ bv4 32)) .cse26) (bvsle (bvadd v_prenex_698 (_ bv4 32)) .cse26) (not (bvsle (_ bv0 32) v_prenex_697))))) .cse4 .cse5) (or (forall ((v_prenex_606 (_ BitVec 32)) (v_prenex_605 (_ BitVec 32)) (v_prenex_604 (_ BitVec 32)) (v_arrayElimCell_580 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_605 (_ bv4 32)) (select (store |c_#length| v_prenex_606 v_prenex_604) v_arrayElimCell_580)) (= v_arrayElimCell_580 v_prenex_606) (not (bvsle (_ bv0 32) v_prenex_605)))) .cse0 .cse4 .cse5) (or .cse0 (forall ((v_prenex_719 (_ BitVec 32)) (v_arrayElimCell_113 (_ BitVec 32)) (v_prenex_718 (_ BitVec 32)) (v_arrayElimCell_528 (_ BitVec 32)) (v_prenex_720 (_ BitVec 32))) (let ((.cse27 (select (store |c_#length| v_prenex_720 v_prenex_719) v_arrayElimCell_528))) (or (bvsle (bvadd v_arrayElimCell_113 (_ bv4 32)) .cse27) (bvsle (bvadd v_prenex_718 (_ bv4 32)) .cse27) (= v_arrayElimCell_528 v_prenex_720) (not (bvsle (_ bv0 32) v_arrayElimCell_113))))) .cse6) (or .cse0 .cse15 (forall ((v_arrayElimCell_439 (_ BitVec 32)) (v_prenex_458 (_ BitVec 32)) (v_prenex_457 (_ BitVec 32)) (v_prenex_456 (_ BitVec 32)) (v_prenex_455 (_ BitVec 32))) (let ((.cse28 (select (store |c_#length| v_prenex_457 v_prenex_456) v_arrayElimCell_439))) (or (not (bvsle (_ bv0 32) v_prenex_458)) (= v_arrayElimCell_439 v_prenex_457) (= v_arrayElimCell_439 c_main_~x~0.base) (bvsle (bvadd v_prenex_455 (_ bv4 32)) .cse28) (bvsle (bvadd v_prenex_458 (_ bv4 32)) .cse28))))) (or .cse7 .cse0 .cse15 (forall ((v_prenex_41 (_ BitVec 32)) (v_prenex_181 (_ BitVec 32)) (v_prenex_180 (_ BitVec 32)) (v_prenex_179 (_ BitVec 32)) (v_arrayElimCell_363 (_ BitVec 32))) (let ((.cse29 (select (store |c_#length| v_prenex_180 v_prenex_179) v_arrayElimCell_363))) (or (= v_arrayElimCell_363 v_prenex_180) (bvsle (bvadd v_prenex_181 (_ bv4 32)) .cse29) (= v_arrayElimCell_363 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_41)) (bvsle (bvadd v_prenex_41 (_ bv4 32)) .cse29))))) (or .cse7 .cse0 .cse15 (forall ((v_arrayElimCell_666 (_ BitVec 32)) (v_prenex_228 (_ BitVec 32)) (v_prenex_227 (_ BitVec 32)) (v_prenex_226 (_ BitVec 32)) (v_prenex_225 (_ BitVec 32))) (let ((.cse30 (select (store |c_#length| v_prenex_225 v_prenex_228) v_arrayElimCell_666))) (or (bvsle (bvadd v_prenex_226 (_ bv4 32)) .cse30) (= v_arrayElimCell_666 v_prenex_225) (not (bvsle (_ bv0 32) v_prenex_226)) (= v_arrayElimCell_666 c_main_~x~0.base) (bvsle (bvadd v_prenex_227 (_ bv4 32)) .cse30))))) (or .cse0 .cse6 (forall ((v_prenex_252 (_ BitVec 32)) (v_prenex_251 (_ BitVec 32)) (v_prenex_75 (_ BitVec 32)) (v_arrayElimCell_461 (_ BitVec 32))) (or (= v_arrayElimCell_461 v_prenex_251) (not (bvsle (_ bv0 32) v_prenex_75)) (bvsle (bvadd v_prenex_75 (_ bv4 32)) (select (store |c_#length| v_prenex_251 v_prenex_252) v_arrayElimCell_461)) (= v_arrayElimCell_461 c_main_~x~0.base)))) (or .cse7 .cse0 .cse6 (forall ((v_prenex_728 (_ BitVec 32)) (v_prenex_727 (_ BitVec 32)) (v_arrayElimCell_633 (_ BitVec 32)) (v_prenex_726 (_ BitVec 32)) (v_prenex_725 (_ BitVec 32))) (let ((.cse31 (select (store |c_#length| v_prenex_728 v_prenex_727) v_arrayElimCell_633))) (or (bvsle (bvadd v_prenex_726 (_ bv4 32)) .cse31) (not (bvsle (_ bv0 32) v_prenex_725)) (= v_arrayElimCell_633 v_prenex_728) (bvsle (bvadd v_prenex_725 (_ bv4 32)) .cse31))))) (or .cse0 (forall ((v_arrayElimCell_344 (_ BitVec 32)) (v_prenex_470 (_ BitVec 32)) (v_prenex_469 (_ BitVec 32)) (v_prenex_468 (_ BitVec 32)) (v_prenex_467 (_ BitVec 32))) (let ((.cse32 (select (store |c_#length| v_prenex_469 v_prenex_468) v_arrayElimCell_344))) (or (= v_arrayElimCell_344 c_main_~x~0.base) (bvsle (bvadd v_prenex_470 (_ bv4 32)) .cse32) (not (bvsle (_ bv0 32) v_prenex_470)) (bvsle (bvadd v_prenex_467 (_ bv4 32)) .cse32) (= v_arrayElimCell_344 v_prenex_469)))) .cse4 .cse5) (or .cse0 (forall ((v_arrayElimCell_662 (_ BitVec 32)) (v_prenex_218 (_ BitVec 32)) (v_prenex_217 (_ BitVec 32)) (v_prenex_216 (_ BitVec 32)) (v_prenex_215 (_ BitVec 32))) (let ((.cse33 (select (store |c_#length| v_prenex_215 v_prenex_218) v_arrayElimCell_662))) (or (= v_arrayElimCell_662 c_main_~x~0.base) (= v_arrayElimCell_662 v_prenex_215) (not (bvsle (_ bv0 32) v_prenex_216)) (bvsle (bvadd v_prenex_217 (_ bv4 32)) .cse33) (bvsle (bvadd v_prenex_216 (_ bv4 32)) .cse33))))) (or .cse6 .cse4 (forall ((v_prenex_206 (_ BitVec 32)) (v_prenex_205 (_ BitVec 32)) (v_arrayElimCell_551 (_ BitVec 32)) (v_arrayElimCell_81 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_81 (_ bv4 32)) (select (store |c_#length| v_prenex_205 v_prenex_206) v_arrayElimCell_551)) (= v_arrayElimCell_551 v_prenex_205) (not (bvsle (_ bv0 32) v_arrayElimCell_81)) (= v_arrayElimCell_551 c_main_~x~0.base)))) (or .cse7 .cse0 .cse6 (forall ((v_arrayElimCell_387 (_ BitVec 32)) (v_prenex_42 (_ BitVec 32)) (v_prenex_306 (_ BitVec 32)) (v_prenex_305 (_ BitVec 32)) (v_prenex_304 (_ BitVec 32))) (let ((.cse34 (select (store |c_#length| v_prenex_304 v_prenex_306) v_arrayElimCell_387))) (or (not (bvsle (_ bv0 32) v_prenex_42)) (= v_arrayElimCell_387 v_prenex_304) (bvsle (bvadd v_prenex_305 (_ bv4 32)) .cse34) (bvsle (bvadd v_prenex_42 (_ bv4 32)) .cse34))))) (or .cse0 .cse4 (forall ((v_prenex_769 (_ BitVec 32)) (v_prenex_768 (_ BitVec 32)) (v_prenex_771 (_ BitVec 32)) (v_prenex_100 (_ BitVec 32)) (v_prenex_770 (_ BitVec 32))) (let ((.cse35 (select (store |c_#length| v_prenex_771 v_prenex_770) v_prenex_100))) (or (bvsle (bvadd v_prenex_768 (_ bv4 32)) .cse35) (= v_prenex_100 c_main_~x~0.base) (bvsle (bvadd v_prenex_769 (_ bv4 32)) .cse35) (not (bvsle (_ bv0 32) v_prenex_768)) (= v_prenex_100 v_prenex_771)))) .cse5) (or .cse0 .cse6 (forall ((v_prenex_351 (_ BitVec 32)) (v_prenex_350 (_ BitVec 32)) (v_arrayElimCell_688 (_ BitVec 32)) (v_prenex_352 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_352)) (= v_arrayElimCell_688 v_prenex_350) (bvsle (bvadd v_prenex_352 (_ bv4 32)) (select (store |c_#length| v_prenex_350 v_prenex_351) v_arrayElimCell_688)) (= v_arrayElimCell_688 c_main_~x~0.base)))) (or .cse0 (forall ((v_prenex_503 (_ BitVec 32)) (v_prenex_502 (_ BitVec 32)) (v_prenex_501 (_ BitVec 32)) (v_prenex_149 (_ BitVec 32)) (v_prenex_500 (_ BitVec 32))) (let ((.cse36 (select (store |c_#length| v_prenex_503 v_prenex_501) v_prenex_149))) (or (= v_prenex_149 v_prenex_503) (= v_prenex_149 c_main_~x~0.base) (bvsle (bvadd v_prenex_502 (_ bv4 32)) .cse36) (bvsle (bvadd v_prenex_500 (_ bv4 32)) .cse36) (not (bvsle (_ bv0 32) v_prenex_502))))) .cse6) (or .cse7 (forall ((v_arrayElimCell_457 (_ BitVec 32)) (v_prenex_435 (_ BitVec 32)) (v_prenex_434 (_ BitVec 32)) (v_prenex_11 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_11)) (= v_arrayElimCell_457 v_prenex_435) (= v_arrayElimCell_457 c_main_~x~0.base) (bvsle (bvadd v_prenex_11 (_ bv4 32)) (select (store |c_#length| v_prenex_435 v_prenex_434) v_arrayElimCell_457)))) .cse6) (or .cse7 .cse15 .cse37 .cse38) (or .cse7 .cse15 .cse37 .cse39 (forall ((v_prenex_186 (_ BitVec 32)) (v_prenex_185 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_185 v_prenex_186) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_185)))) (or .cse4 (forall ((v_prenex_300 (_ BitVec 32)) (v_prenex_299 (_ BitVec 32)) (v_prenex_298 (_ BitVec 32)) (v_prenex_297 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_299 (_ bv4 32)) (select (store |c_#length| v_prenex_297 v_prenex_300) v_prenex_298)) (not (bvsle (_ bv0 32) v_prenex_299)) (= v_prenex_298 v_prenex_297)))) (or .cse7 (forall ((v_arrayElimCell_543 (_ BitVec 32)) (v_prenex_212 (_ BitVec 32)) (v_prenex_211 (_ BitVec 32)) (v_prenex_210 (_ BitVec 32)) (v_prenex_13 (_ BitVec 32))) (let ((.cse40 (select (store |c_#length| v_prenex_210 v_prenex_212) v_arrayElimCell_543))) (or (bvsle (bvadd v_prenex_13 (_ bv4 32)) .cse40) (bvsle (bvadd v_prenex_211 (_ bv4 32)) .cse40) (= v_arrayElimCell_543 v_prenex_210) (= v_arrayElimCell_543 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_13))))) .cse6) (or .cse0 (forall ((v_prenex_619 (_ BitVec 32)) (v_arrayElimCell_190 (_ BitVec 32)) (v_prenex_622 (_ BitVec 32)) (v_prenex_621 (_ BitVec 32)) (v_prenex_620 (_ BitVec 32))) (let ((.cse41 (select (store |c_#length| v_prenex_622 v_prenex_620) v_arrayElimCell_190))) (or (bvsle (bvadd v_prenex_621 (_ bv4 32)) .cse41) (= v_arrayElimCell_190 v_prenex_622) (bvsle (bvadd v_prenex_619 (_ bv4 32)) .cse41) (not (bvsle (_ bv0 32) v_prenex_621)))))) (or .cse0 (forall ((v_arrayElimCell_533 (_ BitVec 32)) (v_prenex_191 (_ BitVec 32)) (v_prenex_190 (_ BitVec 32)) (v_prenex_69 (_ BitVec 32))) (or (= v_arrayElimCell_533 v_prenex_190) (bvsle (bvadd v_prenex_69 (_ bv4 32)) (select (store |c_#length| v_prenex_190 v_prenex_191) v_arrayElimCell_533)) (= v_arrayElimCell_533 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_69)))) .cse6) (or .cse0 .cse25 .cse4 (forall ((v_arrayElimCell_355 (_ BitVec 32)) (v_prenex_345 (_ BitVec 32)) (v_prenex_344 (_ BitVec 32)) (v_prenex_343 (_ BitVec 32)) (v_prenex_342 (_ BitVec 32))) (let ((.cse42 (select (store |c_#length| v_prenex_342 v_prenex_344) v_arrayElimCell_355))) (or (bvsle (bvadd v_prenex_343 (_ bv4 32)) .cse42) (not (bvsle (_ bv0 32) v_prenex_345)) (bvsle (bvadd v_prenex_345 (_ bv4 32)) .cse42) (= v_arrayElimCell_355 c_main_~x~0.base) (= v_arrayElimCell_355 v_prenex_342))))) (or .cse0 .cse15 (forall ((v_arrayElimCell_379 (_ BitVec 32)) (v_prenex_764 (_ BitVec 32)) (v_prenex_763 (_ BitVec 32)) (v_prenex_762 (_ BitVec 32))) (or (= v_arrayElimCell_379 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_762)) (bvsle (bvadd v_prenex_762 (_ bv4 32)) (select (store |c_#length| v_prenex_764 v_prenex_763) v_arrayElimCell_379)) (= v_arrayElimCell_379 v_prenex_764)))) (or .cse43 .cse44 (forall ((|v_main_#Ultimate.alloc_#res.base_5| (_ BitVec 32))) (not (= (_ bv0 1) (select |c_#valid| |v_main_#Ultimate.alloc_#res.base_5|)))) .cse45 .cse46) (or .cse0 (forall ((v_arrayElimCell_429 (_ BitVec 32)) (v_prenex_566 (_ BitVec 32)) (v_prenex_565 (_ BitVec 32)) (v_prenex_564 (_ BitVec 32)) (v_prenex_563 (_ BitVec 32)) (v_prenex_562 (_ BitVec 32))) (let ((.cse51 (store |c_#length| v_prenex_565 v_prenex_564))) (let ((.cse48 (select .cse51 v_arrayElimCell_429)) (.cse49 (bvadd v_prenex_563 (_ bv4 32))) (.cse47 (bvadd v_prenex_566 (_ bv4 32))) (.cse50 (select .cse51 v_prenex_562))) (or (= v_arrayElimCell_429 v_prenex_565) (not (bvsle (_ bv0 32) v_prenex_566)) (= v_prenex_562 v_prenex_565) (bvsle .cse47 .cse48) (bvsle .cse49 .cse48) (bvsle .cse49 .cse50) (bvsle .cse47 .cse50) (= v_arrayElimCell_429 c_main_~x~0.base))))) .cse6) (or (forall ((v_prenex_65 (_ BitVec 32)) (v_arrayElimCell_469 (_ BitVec 32)) (v_prenex_200 (_ BitVec 32)) (v_prenex_199 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_65)) (bvsle (bvadd v_prenex_65 (_ bv4 32)) (select (store |c_#length| v_prenex_199 v_prenex_200) v_arrayElimCell_469)) (= v_arrayElimCell_469 v_prenex_199))) .cse0 .cse6) (or .cse0 .cse15 (forall ((v_arrayElimCell_685 (_ BitVec 32)) (v_prenex_171 (_ BitVec 32)) (v_prenex_170 (_ BitVec 32)) (v_prenex_56 (_ BitVec 32))) (or (= v_arrayElimCell_685 v_prenex_171) (bvsle (bvadd v_prenex_56 (_ bv4 32)) (select (store |c_#length| v_prenex_171 v_prenex_170) v_arrayElimCell_685)) (not (bvsle (_ bv0 32) v_prenex_56)) (= v_arrayElimCell_685 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_585 (_ BitVec 32)) (v_prenex_526 (_ BitVec 32)) (v_prenex_525 (_ BitVec 32)) (v_prenex_49 (_ BitVec 32))) (or (= v_arrayElimCell_585 v_prenex_526) (bvsle (bvadd v_prenex_49 (_ bv4 32)) (select (store |c_#length| v_prenex_526 v_prenex_525) v_arrayElimCell_585)) (not (bvsle (_ bv0 32) v_prenex_49))))) (or .cse0 (forall ((v_prenex_450 (_ BitVec 32)) (v_arrayElimCell_348 (_ BitVec 32)) (v_prenex_449 (_ BitVec 32)) (v_prenex_448 (_ BitVec 32)) (v_prenex_447 (_ BitVec 32))) (let ((.cse52 (select (store |c_#length| v_prenex_449 v_prenex_448) v_arrayElimCell_348))) (or (not (bvsle (_ bv0 32) v_prenex_450)) (bvsle (bvadd v_prenex_447 (_ bv4 32)) .cse52) (bvsle (bvadd v_prenex_450 (_ bv4 32)) .cse52) (= v_arrayElimCell_348 c_main_~x~0.base) (= v_arrayElimCell_348 v_prenex_449)))) .cse4 .cse5) (or .cse7 .cse6 (forall ((v_prenex_142 (_ BitVec 32)) (v_prenex_681 (_ BitVec 32)) (v_prenex_680 (_ BitVec 32)) (v_prenex_679 (_ BitVec 32)) (v_prenex_682 (_ BitVec 32))) (let ((.cse53 (select (store |c_#length| v_prenex_682 v_prenex_680) v_prenex_142))) (or (= v_prenex_142 c_main_~x~0.base) (bvsle (bvadd v_prenex_679 (_ bv4 32)) .cse53) (bvsle (bvadd v_prenex_681 (_ bv4 32)) .cse53) (not (bvsle (_ bv0 32) v_prenex_681)) (= v_prenex_142 v_prenex_682))))) (or .cse0 (forall ((v_prenex_241 (_ BitVec 32)) (v_prenex_240 (_ BitVec 32)) (v_arrayElimCell_537 (_ BitVec 32)) (v_prenex_242 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_242)) (bvsle (bvadd v_prenex_242 (_ bv4 32)) (select (store |c_#length| v_prenex_240 v_prenex_241) v_arrayElimCell_537)) (= v_arrayElimCell_537 v_prenex_240) (= v_arrayElimCell_537 c_main_~x~0.base)))) (or .cse0 .cse4 (forall ((v_arrayElimCell_225 (_ BitVec 32)) (v_prenex_514 (_ BitVec 32)) (v_prenex_513 (_ BitVec 32)) (v_prenex_512 (_ BitVec 32)) (v_prenex_511 (_ BitVec 32))) (let ((.cse54 (select (store |c_#length| v_prenex_514 v_prenex_512) v_arrayElimCell_225))) (or (= v_arrayElimCell_225 v_prenex_514) (bvsle (bvadd v_prenex_511 (_ bv4 32)) .cse54) (not (bvsle (_ bv0 32) v_prenex_513)) (bvsle (bvadd v_prenex_513 (_ bv4 32)) .cse54))))) (or .cse0 (forall ((v_prenex_659 (_ BitVec 32)) (v_prenex_658 (_ BitVec 32)) (v_prenex_657 (_ BitVec 32)) (v_prenex_656 (_ BitVec 32)) (v_arrayElimCell_340 (_ BitVec 32)) (v_prenex_660 (_ BitVec 32))) (let ((.cse57 (store |c_#length| v_prenex_659 v_prenex_658))) (let ((.cse55 (bvadd v_prenex_657 (_ bv4 32))) (.cse56 (select .cse57 v_arrayElimCell_340))) (or (bvsle .cse55 .cse56) (= v_arrayElimCell_340 c_main_~x~0.base) (= v_prenex_656 v_prenex_659) (bvsle .cse55 (select .cse57 v_prenex_656)) (= v_arrayElimCell_340 v_prenex_659) (not (bvsle (_ bv0 32) v_prenex_660)) (bvsle (bvadd v_prenex_660 (_ bv4 32)) .cse56))))) .cse4 .cse5) (or .cse0 .cse6 (forall ((v_arrayElimCell_277 (_ BitVec 32)) (v_prenex_76 (_ BitVec 32)) (v_prenex_678 (_ BitVec 32)) (v_prenex_677 (_ BitVec 32)) (v_prenex_676 (_ BitVec 32))) (let ((.cse58 (select (store |c_#length| v_prenex_678 v_prenex_677) v_arrayElimCell_277))) (or (= v_arrayElimCell_277 v_prenex_678) (bvsle (bvadd v_prenex_676 (_ bv4 32)) .cse58) (bvsle (bvadd v_prenex_76 (_ bv4 32)) .cse58) (not (bvsle (_ bv0 32) v_prenex_76)))))) (or .cse0 (forall ((v_arrayElimCell_147 (_ BitVec 32)) (v_prenex_260 (_ BitVec 32)) (v_prenex_259 (_ BitVec 32)) (v_arrayElimCell_199 (_ BitVec 32))) (or (= v_arrayElimCell_199 v_prenex_259) (bvsle (bvadd v_arrayElimCell_147 (_ bv4 32)) (select (store |c_#length| v_prenex_259 v_prenex_260) v_arrayElimCell_199)) (not (bvsle (_ bv0 32) v_arrayElimCell_147)))) .cse6) (or .cse7 .cse0 .cse15 (forall ((v_arrayElimCell_482 (_ BitVec 32)) (v_prenex_464 (_ BitVec 32)) (v_prenex_463 (_ BitVec 32)) (v_prenex_58 (_ BitVec 32))) (or (= v_arrayElimCell_482 v_prenex_464) (= v_arrayElimCell_482 c_main_~x~0.base) (bvsle (bvadd v_prenex_58 (_ bv4 32)) (select (store |c_#length| v_prenex_464 v_prenex_463) v_arrayElimCell_482)) (not (bvsle (_ bv0 32) v_prenex_58))))) (or .cse7 .cse0 (forall ((v_arrayElimCell_453 (_ BitVec 32)) (v_prenex_197 (_ BitVec 32)) (v_prenex_196 (_ BitVec 32)) (v_prenex_195 (_ BitVec 32)) (v_prenex_198 (_ BitVec 32))) (let ((.cse59 (select (store |c_#length| v_prenex_195 v_prenex_198) v_arrayElimCell_453))) (or (= v_arrayElimCell_453 v_prenex_195) (= v_arrayElimCell_453 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_196)) (bvsle (bvadd v_prenex_196 (_ bv4 32)) .cse59) (bvsle (bvadd v_prenex_197 (_ bv4 32)) .cse59)))) .cse6) (or .cse0 .cse6 (forall ((v_arrayElimCell_490 (_ BitVec 32)) (v_arrayElimCell_163 (_ BitVec 32)) (v_prenex_573 (_ BitVec 32)) (v_prenex_572 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_163 (_ bv4 32)) (select (store |c_#length| v_prenex_573 v_prenex_572) v_arrayElimCell_490)) (= v_arrayElimCell_490 v_prenex_573) (not (bvsle (_ bv0 32) v_arrayElimCell_163)) (= v_arrayElimCell_490 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_596 (_ BitVec 32)) (v_prenex_499 (_ BitVec 32)) (v_prenex_498 (_ BitVec 32)) (v_prenex_497 (_ BitVec 32)) (v_prenex_496 (_ BitVec 32))) (let ((.cse60 (select (store |c_#length| v_prenex_499 v_prenex_497) v_arrayElimCell_596))) (or (= v_arrayElimCell_596 c_main_~x~0.base) (= v_arrayElimCell_596 v_prenex_499) (bvsle (bvadd v_prenex_496 (_ bv4 32)) .cse60) (bvsle (bvadd v_prenex_498 (_ bv4 32)) .cse60) (not (bvsle (_ bv0 32) v_prenex_498)))))) (or .cse0 .cse6 (forall ((v_prenex_717 (_ BitVec 32)) (v_prenex_716 (_ BitVec 32)) (v_arrayElimCell_600 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_151)) (= v_arrayElimCell_600 v_prenex_717) (bvsle (bvadd v_arrayElimCell_151 (_ bv4 32)) (select (store |c_#length| v_prenex_717 v_prenex_716) v_arrayElimCell_600)) (= v_arrayElimCell_600 c_main_~x~0.base)))) (or (forall ((v_prenex_230 (_ BitVec 32)) (v_arrayElimCell_654 (_ BitVec 32)) (v_prenex_229 (_ BitVec 32)) (v_prenex_233 (_ BitVec 32)) (v_prenex_232 (_ BitVec 32)) (v_prenex_231 (_ BitVec 32))) (let ((.cse63 (store |c_#length| v_prenex_229 v_prenex_233))) (let ((.cse62 (bvadd v_prenex_230 (_ bv4 32))) (.cse61 (select .cse63 v_prenex_231))) (or (= v_arrayElimCell_654 c_main_~x~0.base) (= v_prenex_231 v_prenex_229) (bvsle (bvadd v_prenex_232 (_ bv4 32)) .cse61) (bvsle .cse62 (select .cse63 v_arrayElimCell_654)) (bvsle .cse62 .cse61) (= v_arrayElimCell_654 v_prenex_229) (not (bvsle (_ bv0 32) v_prenex_230)))))) .cse0 .cse4) (or .cse0 .cse6 (forall ((v_arrayElimCell_536 (_ BitVec 32)) (v_prenex_258 (_ BitVec 32)) (v_prenex_257 (_ BitVec 32)) (v_prenex_256 (_ BitVec 32))) (or (= v_arrayElimCell_536 v_prenex_256) (not (bvsle (_ bv0 32) v_prenex_258)) (bvsle (bvadd v_prenex_258 (_ bv4 32)) (select (store |c_#length| v_prenex_256 v_prenex_257) v_arrayElimCell_536)) (= v_arrayElimCell_536 c_main_~x~0.base)))) (or .cse0 (forall ((v_arrayElimCell_200 (_ BitVec 32)) (v_prenex_333 (_ BitVec 32)) (v_prenex_332 (_ BitVec 32)) (v_prenex_331 (_ BitVec 32))) (or (= v_arrayElimCell_200 v_prenex_331) (not (bvsle (_ bv0 32) v_prenex_333)) (bvsle (bvadd v_prenex_333 (_ bv4 32)) (select (store |c_#length| v_prenex_331 v_prenex_332) v_arrayElimCell_200))))) (or .cse6 (forall ((v_prenex_340 (_ BitVec 32)) (v_arrayElimCell_648 (_ BitVec 32)) (v_prenex_24 (_ BitVec 32)) (v_prenex_341 (_ BitVec 32))) (or (= v_arrayElimCell_648 v_prenex_340) (not (bvsle (_ bv0 32) v_prenex_24)) (= v_arrayElimCell_648 c_main_~x~0.base) (bvsle (bvadd v_prenex_24 (_ bv4 32)) (select (store |c_#length| v_prenex_340 v_prenex_341) v_arrayElimCell_648))))) (or .cse0 .cse15 (forall ((v_arrayElimCell_520 (_ BitVec 32)) (v_prenex_70 (_ BitVec 32)) (v_prenex_167 (_ BitVec 32)) (v_prenex_166 (_ BitVec 32))) (or (= v_arrayElimCell_520 v_prenex_166) (= v_arrayElimCell_520 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_70)) (bvsle (bvadd v_prenex_70 (_ bv4 32)) (select (store |c_#length| v_prenex_166 v_prenex_167) v_arrayElimCell_520))))) (or .cse0 (forall ((v_prenex_472 (_ BitVec 32)) (v_prenex_471 (_ BitVec 32)) (v_arrayElimCell_444 (_ BitVec 32)) (v_prenex_475 (_ BitVec 32)) (v_prenex_474 (_ BitVec 32)) (v_prenex_473 (_ BitVec 32))) (let ((.cse68 (store |c_#length| v_prenex_474 v_prenex_473))) (let ((.cse65 (select .cse68 v_prenex_471)) (.cse66 (bvadd v_prenex_475 (_ bv4 32))) (.cse64 (bvadd v_prenex_472 (_ bv4 32))) (.cse67 (select .cse68 v_arrayElimCell_444))) (or (= v_arrayElimCell_444 c_main_~x~0.base) (bvsle .cse64 .cse65) (= v_arrayElimCell_444 v_prenex_474) (bvsle .cse66 .cse65) (bvsle .cse66 .cse67) (not (bvsle (_ bv0 32) v_prenex_475)) (bvsle .cse64 .cse67) (= v_prenex_471 v_prenex_474)))))) (or .cse43 (forall ((|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (= |c_main_write~$Pointer$_#ptr.base| v_prenex_2) (bvsle (bvadd c_main_~x~0.offset (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) c_main_~x~0.base)))) .cse45 .cse46) (or .cse7 (forall ((v_arrayElimCell_234 (_ BitVec 32)) (v_prenex_409 (_ BitVec 32)) (v_prenex_408 (_ BitVec 32)) (v_prenex_10 (_ BitVec 32)) (v_prenex_410 (_ BitVec 32))) (let ((.cse69 (select (store |c_#length| v_prenex_408 v_prenex_410) v_arrayElimCell_234))) (or (= v_arrayElimCell_234 v_prenex_408) (bvsle (bvadd v_prenex_10 (_ bv4 32)) .cse69) (not (bvsle (_ bv0 32) v_prenex_10)) (bvsle (bvadd v_prenex_409 (_ bv4 32)) .cse69)))) .cse6) (or .cse0 (forall ((v_arrayElimCell_288 (_ BitVec 32)) (v_prenex_366 (_ BitVec 32)) (v_prenex_365 (_ BitVec 32)) (v_prenex_364 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_366)) (= v_arrayElimCell_288 c_main_~x~0.base) (bvsle (bvadd v_prenex_366 (_ bv4 32)) (select (store |c_#length| v_prenex_364 v_prenex_365) v_arrayElimCell_288)) (= v_arrayElimCell_288 v_prenex_364))) .cse4) (or (forall ((v_arrayElimCell_695 (_ BitVec 32)) (v_prenex_250 (_ BitVec 32)) (v_prenex_249 (_ BitVec 32)) (v_prenex_248 (_ BitVec 32)) (v_prenex_247 (_ BitVec 32)) (v_arrayElimCell_91 (_ BitVec 32))) (let ((.cse71 (store |c_#length| v_prenex_247 v_prenex_250))) (let ((.cse70 (bvadd v_arrayElimCell_91 (_ bv4 32))) (.cse72 (select .cse71 v_prenex_248))) (or (bvsle .cse70 (select .cse71 v_arrayElimCell_695)) (bvsle .cse70 .cse72) (not (bvsle (_ bv0 32) v_arrayElimCell_91)) (= v_prenex_248 v_prenex_247) (bvsle (bvadd v_prenex_249 (_ bv4 32)) .cse72) (= v_arrayElimCell_695 c_main_~x~0.base) (= v_arrayElimCell_695 v_prenex_247))))) .cse6 .cse4) (or .cse0 .cse6 (forall ((v_arrayElimCell_112 (_ BitVec 32)) (v_arrayElimCell_401 (_ BitVec 32)) (v_prenex_189 (_ BitVec 32)) (v_prenex_188 (_ BitVec 32)) (v_prenex_187 (_ BitVec 32))) (let ((.cse73 (select (store |c_#length| v_prenex_187 v_prenex_189) v_arrayElimCell_401))) (or (bvsle (bvadd v_prenex_188 (_ bv4 32)) .cse73) (bvsle (bvadd v_arrayElimCell_112 (_ bv4 32)) .cse73) (= v_arrayElimCell_401 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_112)) (= v_arrayElimCell_401 v_prenex_187))))) (or .cse0 (forall ((v_arrayElimCell_224 (_ BitVec 32)) (v_prenex_749 (_ BitVec 32)) (v_prenex_748 (_ BitVec 32)) (v_prenex_747 (_ BitVec 32)) (v_prenex_750 (_ BitVec 32))) (let ((.cse74 (select (store |c_#length| v_prenex_750 v_prenex_749) v_arrayElimCell_224))) (or (= v_arrayElimCell_224 v_prenex_750) (bvsle (bvadd v_prenex_748 (_ bv4 32)) .cse74) (bvsle (bvadd v_prenex_747 (_ bv4 32)) .cse74) (not (bvsle (_ bv0 32) v_prenex_747))))) .cse4 .cse5) (or (forall ((v_arrayElimCell_498 (_ BitVec 32)) (v_prenex_194 (_ BitVec 32)) (v_prenex_193 (_ BitVec 32)) (v_prenex_192 (_ BitVec 32)) (v_prenex_23 (_ BitVec 32))) (let ((.cse75 (select (store |c_#length| v_prenex_192 v_prenex_194) v_arrayElimCell_498))) (or (not (bvsle (_ bv0 32) v_prenex_23)) (bvsle (bvadd v_prenex_193 (_ bv4 32)) .cse75) (bvsle (bvadd v_prenex_23 (_ bv4 32)) .cse75) (= v_arrayElimCell_498 v_prenex_192)))) .cse6) (or .cse0 (forall ((v_prenex_506 (_ BitVec 32)) (v_prenex_505 (_ BitVec 32)) (v_prenex_504 (_ BitVec 32)) (v_arrayElimCell_683 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_505 (_ bv4 32)) (select (store |c_#length| v_prenex_506 v_prenex_504) v_arrayElimCell_683)) (not (bvsle (_ bv0 32) v_prenex_505)) (= v_arrayElimCell_683 c_main_~x~0.base) (= v_arrayElimCell_683 v_prenex_506)))) (or .cse0 (forall ((v_prenex_296 (_ BitVec 32)) (v_prenex_295 (_ BitVec 32)) (v_prenex_294 (_ BitVec 32)) (v_prenex_293 (_ BitVec 32)) (v_prenex_292 (_ BitVec 32)) (v_arrayElimCell_671 (_ BitVec 32))) (let ((.cse78 (store |c_#length| v_prenex_292 v_prenex_295))) (let ((.cse76 (bvadd v_prenex_296 (_ bv4 32))) (.cse77 (select .cse78 v_prenex_293))) (or (bvsle .cse76 .cse77) (bvsle .cse76 (select .cse78 v_arrayElimCell_671)) (= v_arrayElimCell_671 v_prenex_292) (not (bvsle (_ bv0 32) v_prenex_296)) (= v_arrayElimCell_671 c_main_~x~0.base) (= v_prenex_293 v_prenex_292) (bvsle (bvadd v_prenex_294 (_ bv4 32)) .cse77))))) .cse6 .cse4) (or .cse7 .cse0 .cse15 (forall ((v_arrayElimCell_630 (_ BitVec 32)) (v_prenex_757 (_ BitVec 32)) (v_prenex_756 (_ BitVec 32)) (v_prenex_755 (_ BitVec 32)) (v_prenex_754 (_ BitVec 32))) (let ((.cse79 (select (store |c_#length| v_prenex_757 v_prenex_756) v_arrayElimCell_630))) (or (bvsle (bvadd v_prenex_754 (_ bv4 32)) .cse79) (bvsle (bvadd v_prenex_755 (_ bv4 32)) .cse79) (= v_arrayElimCell_630 v_prenex_757) (not (bvsle (_ bv0 32) v_prenex_754)))))) (or .cse7 .cse0 .cse6 (forall ((v_arrayElimCell_476 (_ BitVec 32)) (v_prenex_753 (_ BitVec 32)) (v_prenex_752 (_ BitVec 32)) (v_prenex_751 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_751 (_ bv4 32)) (select (store |c_#length| v_prenex_753 v_prenex_752) v_arrayElimCell_476)) (= v_arrayElimCell_476 v_prenex_753) (= v_arrayElimCell_476 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_751))))) (or .cse6 .cse4 (forall ((v_arrayElimCell_238 (_ BitVec 32)) (v_prenex_433 (_ BitVec 32)) (v_prenex_432 (_ BitVec 32)) (v_prenex_431 (_ BitVec 32)) (v_prenex_430 (_ BitVec 32))) (let ((.cse80 (select (store |c_#length| v_prenex_433 v_prenex_431) v_arrayElimCell_238))) (or (bvsle (bvadd v_prenex_432 (_ bv4 32)) .cse80) (= v_arrayElimCell_238 v_prenex_433) (bvsle (bvadd v_prenex_430 (_ bv4 32)) .cse80) (= v_arrayElimCell_238 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_432)))))) (or (forall ((v_prenex_738 (_ BitVec 32)) (v_prenex_737 (_ BitVec 32)) (v_prenex_19 (_ BitVec 32)) (v_arrayElimCell_703 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_19)) (bvsle (bvadd v_prenex_19 (_ bv4 32)) (select (store |c_#length| v_prenex_738 v_prenex_737) v_arrayElimCell_703)) (= v_arrayElimCell_703 v_prenex_738))) .cse6) .cse38 (or .cse6 (forall ((v_prenex_20 (_ BitVec 32)) (v_prenex_776 (_ BitVec 32)) (v_prenex_775 (_ BitVec 32)) (v_arrayElimCell_409 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_20)) (bvsle (bvadd v_prenex_20 (_ bv4 32)) (select (store |c_#length| v_prenex_776 v_prenex_775) v_arrayElimCell_409)) (= v_arrayElimCell_409 c_main_~x~0.base) (= v_arrayElimCell_409 v_prenex_776)))) (or .cse0 .cse15 (forall ((v_prenex_618 (_ BitVec 32)) (v_prenex_617 (_ BitVec 32)) (v_prenex_616 (_ BitVec 32)) (v_prenex_615 (_ BitVec 32)) (v_arrayElimCell_192 (_ BitVec 32))) (let ((.cse81 (select (store |c_#length| v_prenex_618 v_prenex_616) v_arrayElimCell_192))) (or (bvsle (bvadd v_prenex_615 (_ bv4 32)) .cse81) (= v_arrayElimCell_192 v_prenex_618) (not (bvsle (_ bv0 32) v_prenex_617)) (bvsle (bvadd v_prenex_617 (_ bv4 32)) .cse81))))) (or .cse0 .cse6 .cse4 (forall ((v_prenex_362 (_ BitVec 32)) (v_prenex_361 (_ BitVec 32)) (v_prenex_360 (_ BitVec 32)) (v_arrayElimCell_394 (_ BitVec 32)) (v_arrayElimCell_120 (_ BitVec 32)) (v_prenex_363 (_ BitVec 32))) (let ((.cse83 (store |c_#length| v_prenex_360 v_prenex_363))) (let ((.cse82 (bvadd v_arrayElimCell_120 (_ bv4 32))) (.cse84 (select .cse83 v_prenex_361))) (or (= v_arrayElimCell_394 c_main_~x~0.base) (bvsle .cse82 (select .cse83 v_arrayElimCell_394)) (bvsle (bvadd v_prenex_362 (_ bv4 32)) .cse84) (= v_arrayElimCell_394 v_prenex_360) (not (bvsle (_ bv0 32) v_arrayElimCell_120)) (bvsle .cse82 .cse84) (= v_prenex_361 v_prenex_360)))))) (or .cse0 (forall ((v_prenex_591 (_ BitVec 32)) (v_prenex_590 (_ BitVec 32)) (v_prenex_589 (_ BitVec 32)) (v_prenex_588 (_ BitVec 32)) (v_prenex_587 (_ BitVec 32)) (v_arrayElimCell_265 (_ BitVec 32))) (let ((.cse85 (store |c_#length| v_prenex_591 v_prenex_589))) (or (bvsle (bvadd v_prenex_590 (_ bv4 32)) (select .cse85 v_arrayElimCell_265)) (= v_prenex_587 v_prenex_591) (not (bvsle (_ bv0 32) v_prenex_590)) (= v_arrayElimCell_265 v_prenex_591) (bvsle (bvadd v_prenex_588 (_ bv4 32)) (select .cse85 v_prenex_587)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_265)))) .cse4) (or .cse0 .cse25 .cse4 (forall ((v_arrayElimCell_574 (_ BitVec 32)) (v_prenex_537 (_ BitVec 32)) (v_prenex_536 (_ BitVec 32)) (v_prenex_535 (_ BitVec 32))) (or (= v_arrayElimCell_574 v_prenex_537) (not (bvsle (_ bv0 32) v_prenex_536)) (bvsle (bvadd v_prenex_536 (_ bv4 32)) (select (store |c_#length| v_prenex_537 v_prenex_535) v_arrayElimCell_574))))) (= |c_main_write~$Pointer$_#value.offset| (_ bv0 32)) (or .cse0 (forall ((v_prenex_40 (_ BitVec 32)) (v_prenex_214 (_ BitVec 32)) (v_prenex_213 (_ BitVec 32)) (v_arrayElimCell_331 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_40)) (bvsle (bvadd v_prenex_40 (_ bv4 32)) (select (store |c_#length| v_prenex_213 v_prenex_214) v_arrayElimCell_331)) (= v_arrayElimCell_331 v_prenex_213))) .cse4 .cse5) (or .cse0 (forall ((v_prenex_73 (_ BitVec 32)) (v_arrayElimCell_269 (_ BitVec 32)) (v_prenex_552 (_ BitVec 32)) (v_prenex_551 (_ BitVec 32)) (v_prenex_550 (_ BitVec 32))) (let ((.cse86 (select (store |c_#length| v_prenex_552 v_prenex_551) v_arrayElimCell_269))) (or (= v_arrayElimCell_269 c_main_~x~0.base) (bvsle (bvadd v_prenex_550 (_ bv4 32)) .cse86) (bvsle (bvadd v_prenex_73 (_ bv4 32)) .cse86) (= v_arrayElimCell_269 v_prenex_552) (not (bvsle (_ bv0 32) v_prenex_73))))) .cse6) (or .cse0 .cse15 (forall ((v_prenex_372 (_ BitVec 32)) (v_prenex_371 (_ BitVec 32)) (v_prenex_370 (_ BitVec 32)) (v_prenex_71 (_ BitVec 32)) (v_arrayElimCell_593 (_ BitVec 32))) (let ((.cse87 (select (store |c_#length| v_prenex_370 v_prenex_372) v_arrayElimCell_593))) (or (= v_arrayElimCell_593 c_main_~x~0.base) (bvsle (bvadd v_prenex_371 (_ bv4 32)) .cse87) (bvsle (bvadd v_prenex_71 (_ bv4 32)) .cse87) (= v_arrayElimCell_593 v_prenex_370) (not (bvsle (_ bv0 32) v_prenex_71)))))) (or .cse6 (forall ((v_prenex_577 (_ BitVec 32)) (v_prenex_576 (_ BitVec 32)) (v_prenex_575 (_ BitVec 32)) (v_prenex_574 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_575)) (= v_prenex_574 v_prenex_577) (bvsle (bvadd v_prenex_575 (_ bv4 32)) (select (store |c_#length| v_prenex_577 v_prenex_576) v_prenex_574))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_383 (_ BitVec 32)) (v_prenex_696 (_ BitVec 32)) (v_prenex_695 (_ BitVec 32)) (v_prenex_694 (_ BitVec 32))) (or (= v_arrayElimCell_383 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_696)) (= v_arrayElimCell_383 v_prenex_695) (bvsle (bvadd v_prenex_696 (_ bv4 32)) (select (store |c_#length| v_prenex_695 v_prenex_694) v_arrayElimCell_383))))) (or (forall ((v_prenex_403 (_ BitVec 32)) (v_prenex_402 (_ BitVec 32)) (v_arrayElimCell_539 (_ BitVec 32)) (v_prenex_401 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_403 (_ bv4 32)) (select (store |c_#length| v_prenex_401 v_prenex_402) v_arrayElimCell_539)) (= v_arrayElimCell_539 v_prenex_401) (= v_arrayElimCell_539 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_403)))) .cse0 .cse15) (or (forall ((v_prenex_571 (_ BitVec 32)) (v_prenex_570 (_ BitVec 32)) (v_prenex_569 (_ BitVec 32)) (v_prenex_568 (_ BitVec 32)) (v_arrayElimCell_637 (_ BitVec 32)) (v_prenex_567 (_ BitVec 32))) (let ((.cse88 (store |c_#length| v_prenex_571 v_prenex_569))) (or (= v_prenex_567 v_prenex_571) (not (bvsle (_ bv0 32) v_prenex_570)) (= v_arrayElimCell_637 v_prenex_571) (bvsle (bvadd v_prenex_568 (_ bv4 32)) (select .cse88 v_prenex_567)) (bvsle (bvadd v_prenex_570 (_ bv4 32)) (select .cse88 v_arrayElimCell_637)) (= v_arrayElimCell_637 c_main_~x~0.base)))) .cse0 .cse4 .cse5) .cse6 (or .cse0 (forall ((v_prenex_637 (_ BitVec 32)) (v_prenex_636 (_ BitVec 32)) (v_prenex_635 (_ BitVec 32)) (v_prenex_634 (_ BitVec 32)) (v_arrayElimCell_250 (_ BitVec 32))) (let ((.cse89 (select (store |c_#length| v_prenex_637 v_prenex_635) v_arrayElimCell_250))) (or (not (bvsle (_ bv0 32) v_prenex_636)) (bvsle (bvadd v_prenex_634 (_ bv4 32)) .cse89) (= v_arrayElimCell_250 c_main_~x~0.base) (= v_arrayElimCell_250 v_prenex_637) (bvsle (bvadd v_prenex_636 (_ bv4 32)) .cse89)))) .cse4 .cse5) (or .cse7 .cse0 .cse15 (forall ((v_prenex_54 (_ BitVec 32)) (v_arrayElimCell_506 (_ BitVec 32)) (v_prenex_169 (_ BitVec 32)) (v_prenex_168 (_ BitVec 32))) (or (= v_arrayElimCell_506 v_prenex_168) (not (bvsle (_ bv0 32) v_prenex_54)) (bvsle (bvadd v_prenex_54 (_ bv4 32)) (select (store |c_#length| v_prenex_168 v_prenex_169) v_arrayElimCell_506)) (= v_arrayElimCell_506 c_main_~x~0.base)))) (or .cse6 (forall ((v_prenex_560 (_ BitVec 32)) (v_arrayElimCell_105 (_ BitVec 32)) (v_arrayElimCell_273 (_ BitVec 32)) (v_prenex_561 (_ BitVec 32))) (or (= v_arrayElimCell_273 v_prenex_561) (not (bvsle (_ bv0 32) v_arrayElimCell_105)) (bvsle (bvadd v_arrayElimCell_105 (_ bv4 32)) (select (store |c_#length| v_prenex_561 v_prenex_560) v_arrayElimCell_273)) (= v_arrayElimCell_273 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_157 (_ BitVec 32)) (v_arrayElimCell_323 (_ BitVec 32)) (v_prenex_688 (_ BitVec 32)) (v_prenex_687 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_157 (_ bv4 32)) (select (store |c_#length| v_prenex_688 v_prenex_687) v_arrayElimCell_323)) (= v_arrayElimCell_323 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_157)) (= v_arrayElimCell_323 v_prenex_688)))) (or .cse15 .cse37 (forall ((v_prenex_466 (_ BitVec 32)) (v_prenex_465 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_466 v_prenex_465) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_466))) .cse39) (or .cse0 (forall ((v_prenex_274 (_ BitVec 32)) (v_prenex_273 (_ BitVec 32)) (v_arrayElimCell_518 (_ BitVec 32)) (v_prenex_275 (_ BitVec 32))) (or (= v_arrayElimCell_518 c_main_~x~0.base) (= v_arrayElimCell_518 v_prenex_274) (not (bvsle (_ bv0 32) v_prenex_273)) (bvsle (bvadd v_prenex_273 (_ bv4 32)) (select (store |c_#length| v_prenex_274 v_prenex_275) v_arrayElimCell_518)))) .cse6) (or .cse0 (forall ((v_arrayElimCell_523 (_ BitVec 32)) (v_prenex_255 (_ BitVec 32)) (v_prenex_254 (_ BitVec 32)) (v_prenex_253 (_ BitVec 32))) (or (= v_arrayElimCell_523 v_prenex_254) (bvsle (bvadd v_prenex_253 (_ bv4 32)) (select (store |c_#length| v_prenex_254 v_prenex_255) v_arrayElimCell_523)) (not (bvsle (_ bv0 32) v_prenex_253)) (= v_arrayElimCell_523 c_main_~x~0.base)))) (or .cse0 (forall ((v_arrayElimCell_414 (_ BitVec 32)) (v_prenex_559 (_ BitVec 32)) (v_prenex_558 (_ BitVec 32)) (v_prenex_557 (_ BitVec 32)) (v_prenex_556 (_ BitVec 32))) (let ((.cse90 (select (store |c_#length| v_prenex_558 v_prenex_557) v_arrayElimCell_414))) (or (= v_arrayElimCell_414 v_prenex_558) (bvsle (bvadd v_prenex_556 (_ bv4 32)) .cse90) (not (bvsle (_ bv0 32) v_prenex_559)) (bvsle (bvadd v_prenex_559 (_ bv4 32)) .cse90) (= v_arrayElimCell_414 c_main_~x~0.base)))) .cse4 .cse5) (or .cse6 (forall ((v_prenex_670 (_ BitVec 32)) (v_arrayElimCell_555 (_ BitVec 32)) (v_prenex_26 (_ BitVec 32)) (v_prenex_671 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_26 (_ bv4 32)) (select (store |c_#length| v_prenex_671 v_prenex_670) v_arrayElimCell_555)) (not (bvsle (_ bv0 32) v_prenex_26)) (= v_arrayElimCell_555 v_prenex_671)))) (or .cse0 .cse15 (forall ((v_arrayElimCell_664 (_ BitVec 32)) (v_prenex_675 (_ BitVec 32)) (v_prenex_674 (_ BitVec 32)) (v_prenex_673 (_ BitVec 32)) (v_prenex_672 (_ BitVec 32))) (let ((.cse91 (select (store |c_#length| v_prenex_675 v_prenex_673) v_arrayElimCell_664))) (or (= v_arrayElimCell_664 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_674)) (= v_arrayElimCell_664 v_prenex_675) (bvsle (bvadd v_prenex_674 (_ bv4 32)) .cse91) (bvsle (bvadd v_prenex_672 (_ bv4 32)) .cse91))))) (or .cse7 .cse0 .cse6 (forall ((v_prenex_609 (_ BitVec 32)) (v_prenex_608 (_ BitVec 32)) (v_arrayElimCell_674 (_ BitVec 32)) (v_prenex_607 (_ BitVec 32)) (v_prenex_610 (_ BitVec 32))) (let ((.cse92 (select (store |c_#length| v_prenex_610 v_prenex_608) v_arrayElimCell_674))) (or (not (bvsle (_ bv0 32) v_prenex_609)) (= v_arrayElimCell_674 v_prenex_610) (= v_arrayElimCell_674 c_main_~x~0.base) (bvsle (bvadd v_prenex_607 (_ bv4 32)) .cse92) (bvsle (bvadd v_prenex_609 (_ bv4 32)) .cse92))))) (or .cse6 (forall ((v_arrayElimCell_215 (_ BitVec 32)) (v_prenex_239 (_ BitVec 32)) (v_prenex_238 (_ BitVec 32)) (v_prenex_237 (_ BitVec 32)) (v_arrayElimCell_84 (_ BitVec 32))) (let ((.cse93 (select (store |c_#length| v_prenex_237 v_prenex_239) v_arrayElimCell_215))) (or (= v_arrayElimCell_215 v_prenex_237) (bvsle (bvadd v_prenex_238 (_ bv4 32)) .cse93) (bvsle (bvadd v_arrayElimCell_84 (_ bv4 32)) .cse93) (not (bvsle (_ bv0 32) v_arrayElimCell_84))))) .cse4) (or .cse7 .cse6 (forall ((v_prenex_509 (_ BitVec 32)) (v_prenex_508 (_ BitVec 32)) (v_prenex_507 (_ BitVec 32)) (v_prenex_158 (_ BitVec 32)) (v_prenex_510 (_ BitVec 32))) (let ((.cse94 (select (store |c_#length| v_prenex_509 v_prenex_508) v_prenex_158))) (or (not (bvsle (_ bv0 32) v_prenex_510)) (= v_prenex_158 c_main_~x~0.base) (= v_prenex_158 v_prenex_509) (bvsle (bvadd v_prenex_510 (_ bv4 32)) .cse94) (bvsle (bvadd v_prenex_507 (_ bv4 32)) .cse94))))) (or .cse0 (forall ((v_prenex_729 (_ BitVec 32)) (v_arrayElimCell_565 (_ BitVec 32)) (v_prenex_732 (_ BitVec 32)) (v_prenex_731 (_ BitVec 32)) (v_prenex_730 (_ BitVec 32))) (let ((.cse95 (select (store |c_#length| v_prenex_732 v_prenex_731) v_arrayElimCell_565))) (or (bvsle (bvadd v_prenex_729 (_ bv4 32)) .cse95) (= v_arrayElimCell_565 v_prenex_732) (bvsle (bvadd v_prenex_730 (_ bv4 32)) .cse95) (not (bvsle (_ bv0 32) v_prenex_729)))))) (or .cse0 .cse4 (forall ((v_prenex_629 (_ BitVec 32)) (v_prenex_628 (_ BitVec 32)) (v_prenex_627 (_ BitVec 32)) (v_arrayElimCell_415 (_ BitVec 32)) (v_prenex_630 (_ BitVec 32))) (let ((.cse96 (select (store |c_#length| v_prenex_629 v_prenex_628) v_arrayElimCell_415))) (or (= v_arrayElimCell_415 c_main_~x~0.base) (bvsle (bvadd v_prenex_630 (_ bv4 32)) .cse96) (bvsle (bvadd v_prenex_627 (_ bv4 32)) .cse96) (not (bvsle (_ bv0 32) v_prenex_630)) (= v_arrayElimCell_415 v_prenex_629))))) (or .cse0 .cse15 (forall ((v_arrayElimCell_398 (_ BitVec 32)) (v_prenex_393 (_ BitVec 32)) (v_prenex_392 (_ BitVec 32)) (v_prenex_391 (_ BitVec 32)) (v_prenex_390 (_ BitVec 32))) (let ((.cse97 (select (store |c_#length| v_prenex_390 v_prenex_392) v_arrayElimCell_398))) (or (not (bvsle (_ bv0 32) v_prenex_393)) (= v_arrayElimCell_398 c_main_~x~0.base) (bvsle (bvadd v_prenex_391 (_ bv4 32)) .cse97) (bvsle (bvadd v_prenex_393 (_ bv4 32)) .cse97) (= v_arrayElimCell_398 v_prenex_390))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_564 (_ BitVec 32)) (v_prenex_655 (_ BitVec 32)) (v_prenex_654 (_ BitVec 32)) (v_prenex_653 (_ BitVec 32)) (v_prenex_652 (_ BitVec 32))) (let ((.cse98 (select (store |c_#length| v_prenex_655 v_prenex_653) v_arrayElimCell_564))) (or (bvsle (bvadd v_prenex_654 (_ bv4 32)) .cse98) (bvsle (bvadd v_prenex_652 (_ bv4 32)) .cse98) (not (bvsle (_ bv0 32) v_prenex_654)) (= v_arrayElimCell_564 v_prenex_655))))) (or .cse0 .cse6 (forall ((v_prenex_518 (_ BitVec 32)) (v_prenex_517 (_ BitVec 32)) (v_prenex_516 (_ BitVec 32)) (v_prenex_515 (_ BitVec 32)) (v_arrayElimCell_591 (_ BitVec 32))) (let ((.cse99 (select (store |c_#length| v_prenex_518 v_prenex_516) v_arrayElimCell_591))) (or (bvsle (bvadd v_prenex_517 (_ bv4 32)) .cse99) (bvsle (bvadd v_prenex_515 (_ bv4 32)) .cse99) (not (bvsle (_ bv0 32) v_prenex_517)) (= v_arrayElimCell_591 c_main_~x~0.base) (= v_arrayElimCell_591 v_prenex_518))))) (or (forall ((v_prenex_692 (_ BitVec 32)) (v_prenex_691 (_ BitVec 32)) (v_prenex_690 (_ BitVec 32)) (v_prenex_689 (_ BitVec 32)) (v_arrayElimCell_341 (_ BitVec 32)) (v_prenex_693 (_ BitVec 32))) (let ((.cse102 (store |c_#length| v_prenex_692 v_prenex_691))) (let ((.cse101 (select .cse102 v_arrayElimCell_341)) (.cse100 (bvadd v_prenex_690 (_ bv4 32)))) (or (not (bvsle (_ bv0 32) v_prenex_693)) (= v_arrayElimCell_341 c_main_~x~0.base) (= v_arrayElimCell_341 v_prenex_692) (bvsle .cse100 .cse101) (bvsle (bvadd v_prenex_693 (_ bv4 32)) .cse101) (= v_prenex_689 v_prenex_692) (bvsle .cse100 (select .cse102 v_prenex_689)))))) .cse0 .cse4) (or .cse7 .cse0 .cse6 (forall ((v_arrayElimCell_366 (_ BitVec 32)) (v_prenex_713 (_ BitVec 32)) (v_prenex_712 (_ BitVec 32)) (v_prenex_711 (_ BitVec 32)) (v_prenex_710 (_ BitVec 32))) (let ((.cse103 (select (store |c_#length| v_prenex_713 v_prenex_712) v_arrayElimCell_366))) (or (not (bvsle (_ bv0 32) v_prenex_710)) (bvsle (bvadd v_prenex_710 (_ bv4 32)) .cse103) (bvsle (bvadd v_prenex_711 (_ bv4 32)) .cse103) (= v_arrayElimCell_366 c_main_~x~0.base) (= v_arrayElimCell_366 v_prenex_713))))) (or .cse0 (forall ((v_arrayElimCell_292 (_ BitVec 32)) (v_prenex_336 (_ BitVec 32)) (v_prenex_335 (_ BitVec 32)) (v_prenex_334 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_336)) (bvsle (bvadd v_prenex_336 (_ bv4 32)) (select (store |c_#length| v_prenex_334 v_prenex_335) v_arrayElimCell_292)) (= v_arrayElimCell_292 c_main_~x~0.base) (= v_arrayElimCell_292 v_prenex_334))) .cse4 .cse5) (or .cse6 .cse4 (forall ((v_prenex_639 (_ BitVec 32)) (v_arrayElimCell_699 (_ BitVec 32)) (v_prenex_638 (_ BitVec 32)) (v_prenex_641 (_ BitVec 32)) (v_prenex_640 (_ BitVec 32))) (let ((.cse104 (select (store |c_#length| v_prenex_641 v_prenex_639) v_arrayElimCell_699))) (or (bvsle (bvadd v_prenex_640 (_ bv4 32)) .cse104) (= v_arrayElimCell_699 v_prenex_641) (= v_arrayElimCell_699 c_main_~x~0.base) (bvsle (bvadd v_prenex_638 (_ bv4 32)) .cse104) (not (bvsle (_ bv0 32) v_prenex_640)))))) (or .cse7 .cse0 (forall ((v_arrayElimCell_477 (_ BitVec 32)) (v_prenex_649 (_ BitVec 32)) (v_prenex_651 (_ BitVec 32)) (v_prenex_650 (_ BitVec 32))) (or (= v_arrayElimCell_477 c_main_~x~0.base) (= v_arrayElimCell_477 v_prenex_651) (not (bvsle (_ bv0 32) v_prenex_650)) (bvsle (bvadd v_prenex_650 (_ bv4 32)) (select (store |c_#length| v_prenex_651 v_prenex_649) v_arrayElimCell_477))))) (or .cse0 .cse6 (forall ((v_prenex_317 (_ BitVec 32)) (v_prenex_316 (_ BitVec 32)) (v_arrayElimCell_405 (_ BitVec 32)) (v_prenex_315 (_ BitVec 32)) (v_prenex_314 (_ BitVec 32))) (let ((.cse105 (select (store |c_#length| v_prenex_314 v_prenex_316) v_arrayElimCell_405))) (or (not (bvsle (_ bv0 32) v_prenex_317)) (= v_arrayElimCell_405 c_main_~x~0.base) (= v_arrayElimCell_405 v_prenex_314) (bvsle (bvadd v_prenex_317 (_ bv4 32)) .cse105) (bvsle (bvadd v_prenex_315 (_ bv4 32)) .cse105))))) (= (_ bv0 32) c_main_~head~0.offset) (or .cse0 .cse6 (forall ((v_prenex_494 (_ BitVec 32)) (v_prenex_493 (_ BitVec 32)) (v_prenex_52 (_ BitVec 32)) (v_arrayElimCell_559 (_ BitVec 32)) (v_prenex_495 (_ BitVec 32))) (let ((.cse106 (select (store |c_#length| v_prenex_495 v_prenex_494) v_arrayElimCell_559))) (or (bvsle (bvadd v_prenex_493 (_ bv4 32)) .cse106) (bvsle (bvadd v_prenex_52 (_ bv4 32)) .cse106) (= v_arrayElimCell_559 v_prenex_495) (not (bvsle (_ bv0 32) v_prenex_52)) (= v_arrayElimCell_559 c_main_~x~0.base))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_677 (_ BitVec 32)) (v_prenex_746 (_ BitVec 32)) (v_prenex_745 (_ BitVec 32)) (v_prenex_744 (_ BitVec 32)) (v_prenex_743 (_ BitVec 32))) (let ((.cse107 (select (store |c_#length| v_prenex_746 v_prenex_745) v_arrayElimCell_677))) (or (not (bvsle (_ bv0 32) v_prenex_743)) (= v_arrayElimCell_677 v_prenex_746) (bvsle (bvadd v_prenex_744 (_ bv4 32)) .cse107) (bvsle (bvadd v_prenex_743 (_ bv4 32)) .cse107) (= v_arrayElimCell_677 c_main_~x~0.base))))) (or .cse7 .cse0 (forall ((v_arrayElimCell_211 (_ BitVec 32)) (v_prenex_774 (_ BitVec 32)) (v_prenex_773 (_ BitVec 32)) (v_prenex_772 (_ BitVec 32)) (v_prenex_34 (_ BitVec 32))) (let ((.cse108 (select (store |c_#length| v_prenex_774 v_prenex_773) v_arrayElimCell_211))) (or (bvsle (bvadd v_prenex_772 (_ bv4 32)) .cse108) (not (bvsle (_ bv0 32) v_prenex_34)) (bvsle (bvadd v_prenex_34 (_ bv4 32)) .cse108) (= v_arrayElimCell_211 v_prenex_774) (= v_arrayElimCell_211 c_main_~x~0.base)))) .cse6) (or .cse0 .cse15 (forall ((v_prenex_483 (_ BitVec 32)) (v_prenex_482 (_ BitVec 32)) (v_prenex_481 (_ BitVec 32)) (v_arrayElimCell_437 (_ BitVec 32)) (v_prenex_485 (_ BitVec 32)) (v_prenex_484 (_ BitVec 32))) (let ((.cse113 (store |c_#length| v_prenex_484 v_prenex_483))) (let ((.cse109 (bvadd v_prenex_485 (_ bv4 32))) (.cse111 (select .cse113 v_arrayElimCell_437)) (.cse112 (bvadd v_prenex_482 (_ bv4 32))) (.cse110 (select .cse113 v_prenex_481))) (or (= v_prenex_481 v_prenex_484) (= v_arrayElimCell_437 c_main_~x~0.base) (bvsle .cse109 .cse110) (not (bvsle (_ bv0 32) v_prenex_485)) (bvsle .cse109 .cse111) (bvsle .cse112 .cse111) (= v_arrayElimCell_437 v_prenex_484) (bvsle .cse112 .cse110)))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_245 (_ BitVec 32)) (v_prenex_666 (_ BitVec 32)) (v_prenex_665 (_ BitVec 32)) (v_prenex_664 (_ BitVec 32)) (v_prenex_66 (_ BitVec 32))) (let ((.cse114 (select (store |c_#length| v_prenex_666 v_prenex_665) v_arrayElimCell_245))) (or (not (bvsle (_ bv0 32) v_prenex_66)) (bvsle (bvadd v_prenex_66 (_ bv4 32)) .cse114) (= v_arrayElimCell_245 v_prenex_666) (bvsle (bvadd v_prenex_664 (_ bv4 32)) .cse114))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_146 (_ BitVec 32)) (v_prenex_519 (_ BitVec 32)) (v_arrayElimCell_309 (_ BitVec 32)) (v_prenex_520 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_146 (_ bv4 32)) (select (store |c_#length| v_prenex_520 v_prenex_519) v_arrayElimCell_309)) (= v_arrayElimCell_309 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_146)) (= v_arrayElimCell_309 v_prenex_520)))) (or .cse0 .cse4 (forall ((v_arrayElimCell_289 (_ BitVec 32)) (v_prenex_669 (_ BitVec 32)) (v_prenex_668 (_ BitVec 32)) (v_prenex_667 (_ BitVec 32))) (or (= v_arrayElimCell_289 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_668)) (bvsle (bvadd v_prenex_668 (_ bv4 32)) (select (store |c_#length| v_prenex_669 v_prenex_667) v_arrayElimCell_289)) (= v_arrayElimCell_289 v_prenex_669))) .cse5) (or .cse0 (forall ((v_prenex_329 (_ BitVec 32)) (v_arrayElimCell_285 (_ BitVec 32)) (v_prenex_330 (_ BitVec 32)) (v_prenex_36 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_36 (_ bv4 32)) (select (store |c_#length| v_prenex_329 v_prenex_330) v_arrayElimCell_285)) (= v_arrayElimCell_285 v_prenex_329) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_285) (not (bvsle (_ bv0 32) v_prenex_36)))) .cse25 .cse4) (or .cse0 .cse4 .cse5 (forall ((v_arrayElimCell_577 (_ BitVec 32)) (v_prenex_437 (_ BitVec 32)) (v_prenex_436 (_ BitVec 32)) (v_prenex_35 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_35 (_ bv4 32)) (select (store |c_#length| v_prenex_437 v_prenex_436) v_arrayElimCell_577)) (= v_arrayElimCell_577 v_prenex_437) (not (bvsle (_ bv0 32) v_prenex_35))))) (or .cse7 .cse0 (forall ((v_arrayElimCell_480 (_ BitVec 32)) (v_prenex_663 (_ BitVec 32)) (v_prenex_662 (_ BitVec 32)) (v_prenex_661 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_662 (_ bv4 32)) (select (store |c_#length| v_prenex_663 v_prenex_661) v_arrayElimCell_480)) (not (bvsle (_ bv0 32) v_prenex_662)) (= v_arrayElimCell_480 v_prenex_663) (= v_arrayElimCell_480 c_main_~x~0.base))) .cse6) (or .cse0 (forall ((v_arrayElimCell_404 (_ BitVec 32)) (v_prenex_313 (_ BitVec 32)) (v_prenex_312 (_ BitVec 32)) (v_prenex_311 (_ BitVec 32)) (v_prenex_310 (_ BitVec 32))) (let ((.cse115 (select (store |c_#length| v_prenex_310 v_prenex_312) v_arrayElimCell_404))) (or (= v_arrayElimCell_404 v_prenex_310) (not (bvsle (_ bv0 32) v_prenex_313)) (bvsle (bvadd v_prenex_313 (_ bv4 32)) .cse115) (= v_arrayElimCell_404 c_main_~x~0.base) (bvsle (bvadd v_prenex_311 (_ bv4 32)) .cse115))))) (or .cse0 (forall ((v_arrayElimCell_219 (_ BitVec 32)) (v_prenex_633 (_ BitVec 32)) (v_prenex_632 (_ BitVec 32)) (v_prenex_631 (_ BitVec 32)) (v_arrayElimCell_132 (_ BitVec 32))) (let ((.cse116 (select (store |c_#length| v_prenex_633 v_prenex_632) v_arrayElimCell_219))) (or (bvsle (bvadd v_arrayElimCell_132 (_ bv4 32)) .cse116) (not (bvsle (_ bv0 32) v_arrayElimCell_132)) (= v_arrayElimCell_219 v_prenex_633) (bvsle (bvadd v_prenex_631 (_ bv4 32)) .cse116)))) .cse4 .cse5) (or .cse7 .cse0 .cse15 (forall ((v_prenex_283 (_ BitVec 32)) (v_prenex_282 (_ BitVec 32)) (v_prenex_281 (_ BitVec 32)) (v_prenex_280 (_ BitVec 32)) (v_arrayElimCell_441 (_ BitVec 32))) (let ((.cse117 (select (store |c_#length| v_prenex_280 v_prenex_282) v_arrayElimCell_441))) (or (bvsle (bvadd v_prenex_281 (_ bv4 32)) .cse117) (= v_arrayElimCell_441 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_283)) (bvsle (bvadd v_prenex_283 (_ bv4 32)) .cse117) (= v_arrayElimCell_441 v_prenex_280))))) (or .cse7 .cse0 (forall ((v_arrayElimCell_657 (_ BitVec 32)) (v_prenex_279 (_ BitVec 32)) (v_prenex_278 (_ BitVec 32)) (v_prenex_277 (_ BitVec 32)) (v_prenex_276 (_ BitVec 32))) (let ((.cse118 (select (store |c_#length| v_prenex_276 v_prenex_279) v_arrayElimCell_657))) (or (bvsle (bvadd v_prenex_278 (_ bv4 32)) .cse118) (= v_arrayElimCell_657 v_prenex_276) (= v_arrayElimCell_657 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_277)) (bvsle (bvadd v_prenex_277 (_ bv4 32)) .cse118))))) (or .cse0 .cse6 (forall ((v_prenex_285 (_ BitVec 32)) (v_prenex_284 (_ BitVec 32)) (v_prenex_287 (_ BitVec 32)) (v_prenex_286 (_ BitVec 32)) (v_arrayElimCell_661 (_ BitVec 32))) (let ((.cse119 (select (store |c_#length| v_prenex_284 v_prenex_286) v_arrayElimCell_661))) (or (bvsle (bvadd v_prenex_285 (_ bv4 32)) .cse119) (bvsle (bvadd v_prenex_287 (_ bv4 32)) .cse119) (not (bvsle (_ bv0 32) v_prenex_287)) (= v_arrayElimCell_661 c_main_~x~0.base) (= v_arrayElimCell_661 v_prenex_284))))) (or .cse7 (forall ((v_subst_2 (_ BitVec 32)) (v_prenex_48 (_ BitVec 32)) (v_arrayElimCell_627 (_ BitVec 32)) (|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (let ((.cse120 (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) v_arrayElimCell_627))) (or (bvsle (bvadd v_subst_2 (_ bv4 32)) .cse120) (bvsle (bvadd v_prenex_48 (_ bv4 32)) .cse120) (not (bvsle (_ bv0 32) v_prenex_48)) (= v_arrayElimCell_627 v_prenex_2)))) .cse0) (or .cse0 (forall ((v_prenex_715 (_ BitVec 32)) (v_arrayElimCell_622 (_ BitVec 32)) (v_prenex_714 (_ BitVec 32)) (v_prenex_67 (_ BitVec 32))) (or (= v_arrayElimCell_622 c_main_~x~0.base) (= v_arrayElimCell_622 v_prenex_715) (not (bvsle (_ bv0 32) v_prenex_67)) (bvsle (bvadd v_prenex_67 (_ bv4 32)) (select (store |c_#length| v_prenex_715 v_prenex_714) v_arrayElimCell_622)))) .cse6) (or .cse43 (forall ((|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (not (= (_ bv0 1) (select |c_#valid| v_prenex_2))) (bvsle (bvadd c_main_~x~0.offset (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) c_main_~x~0.base)))) .cse45 .cse46) (or .cse0 .cse6 (forall ((v_prenex_51 (_ BitVec 32)) (v_prenex_417 (_ BitVec 32)) (v_arrayElimCell_568 (_ BitVec 32)) (v_prenex_416 (_ BitVec 32)) (v_prenex_415 (_ BitVec 32))) (let ((.cse121 (select (store |c_#length| v_prenex_417 v_prenex_416) v_arrayElimCell_568))) (or (= v_arrayElimCell_568 v_prenex_417) (bvsle (bvadd v_prenex_51 (_ bv4 32)) .cse121) (bvsle (bvadd v_prenex_415 (_ bv4 32)) .cse121) (not (bvsle (_ bv0 32) v_prenex_51)))))) (or .cse0 (forall ((v_prenex_545 (_ BitVec 32)) (v_prenex_544 (_ BitVec 32)) (v_prenex_543 (_ BitVec 32)) (v_arrayElimCell_581 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_544)) (= v_arrayElimCell_581 v_prenex_545) (bvsle (bvadd v_prenex_544 (_ bv4 32)) (select (store |c_#length| v_prenex_545 v_prenex_543) v_arrayElimCell_581)))) .cse4) (or .cse0 .cse4 (forall ((v_prenex_724 (_ BitVec 32)) (v_prenex_723 (_ BitVec 32)) (v_prenex_722 (_ BitVec 32)) (v_prenex_721 (_ BitVec 32)) (v_prenex_147 (_ BitVec 32))) (let ((.cse122 (select (store |c_#length| v_prenex_724 v_prenex_723) v_prenex_147))) (or (bvsle (bvadd v_prenex_721 (_ bv4 32)) .cse122) (= v_prenex_147 v_prenex_724) (not (bvsle (_ bv0 32) v_prenex_721)) (= v_prenex_147 c_main_~x~0.base) (bvsle (bvadd v_prenex_722 (_ bv4 32)) .cse122)))) .cse5) (or .cse7 .cse0 (forall ((v_arrayElimCell_644 (_ BitVec 32)) (v_prenex_319 (_ BitVec 32)) (v_prenex_318 (_ BitVec 32)) (v_prenex_320 (_ BitVec 32)) (v_prenex_47 (_ BitVec 32))) (let ((.cse123 (select (store |c_#length| v_prenex_318 v_prenex_320) v_arrayElimCell_644))) (or (= v_arrayElimCell_644 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_47)) (= v_arrayElimCell_644 v_prenex_318) (bvsle (bvadd v_prenex_47 (_ bv4 32)) .cse123) (bvsle (bvadd v_prenex_319 (_ bv4 32)) .cse123)))) .cse6) (= (bvadd (select |c_#valid| c_main_~x~0.base) (_ bv1 1)) (_ bv0 1)) (or .cse0 (forall ((v_arrayElimCell_150 (_ BitVec 32)) (v_prenex_202 (_ BitVec 32)) (v_arrayElimCell_382 (_ BitVec 32)) (v_prenex_201 (_ BitVec 32))) (or (= v_arrayElimCell_382 v_prenex_201) (not (bvsle (_ bv0 32) v_arrayElimCell_150)) (= v_arrayElimCell_382 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_150 (_ bv4 32)) (select (store |c_#length| v_prenex_201 v_prenex_202) v_arrayElimCell_382))))) (or .cse0 .cse15 (forall ((v_prenex_162 (_ BitVec 32)) (v_prenex_161 (_ BitVec 32)) (v_arrayElimCell_610 (_ BitVec 32)) (v_prenex_39 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_39 (_ bv4 32)) (select (store |c_#length| v_prenex_162 v_prenex_161) v_arrayElimCell_610)) (not (bvsle (_ bv0 32) v_prenex_39)) (= v_arrayElimCell_610 v_prenex_162)))) (or .cse7 .cse0 .cse6 (forall ((v_prenex_529 (_ BitVec 32)) (v_prenex_528 (_ BitVec 32)) (v_prenex_527 (_ BitVec 32)) (v_arrayElimCell_628 (_ BitVec 32)) (v_prenex_530 (_ BitVec 32))) (let ((.cse124 (select (store |c_#length| v_prenex_530 v_prenex_528) v_arrayElimCell_628))) (or (bvsle (bvadd v_prenex_527 (_ bv4 32)) .cse124) (= v_arrayElimCell_628 v_prenex_530) (bvsle (bvadd v_prenex_529 (_ bv4 32)) .cse124) (not (bvsle (_ bv0 32) v_prenex_529)))))) (or .cse6 .cse4 (forall ((v_prenex_160 (_ BitVec 32)) (v_prenex_534 (_ BitVec 32)) (v_prenex_533 (_ BitVec 32)) (v_prenex_532 (_ BitVec 32)) (v_prenex_531 (_ BitVec 32)) (v_prenex_14 (_ BitVec 32))) (let ((.cse127 (store |c_#length| v_prenex_534 v_prenex_533))) (let ((.cse126 (bvadd v_prenex_532 (_ bv4 32))) (.cse125 (select .cse127 v_prenex_160))) (or (bvsle (bvadd v_prenex_14 (_ bv4 32)) .cse125) (bvsle .cse126 (select .cse127 v_prenex_531)) (= v_prenex_160 c_main_~x~0.base) (bvsle .cse126 .cse125) (not (bvsle (_ bv0 32) v_prenex_14)) (= v_prenex_531 v_prenex_534) (= v_prenex_160 v_prenex_534)))))) (or (forall ((v_prenex_219 (_ BitVec 32)) (v_prenex_59 (_ BitVec 32)) (v_arrayElimCell_319 (_ BitVec 32)) (v_prenex_221 (_ BitVec 32)) (v_prenex_220 (_ BitVec 32))) (let ((.cse128 (select (store |c_#length| v_prenex_219 v_prenex_221) v_arrayElimCell_319))) (or (bvsle (bvadd v_prenex_59 (_ bv4 32)) .cse128) (bvsle (bvadd v_prenex_220 (_ bv4 32)) .cse128) (not (bvsle (_ bv0 32) v_prenex_59)) (= v_arrayElimCell_319 c_main_~x~0.base) (= v_arrayElimCell_319 v_prenex_219)))) .cse0 .cse4 .cse5) (or .cse0 .cse6 (forall ((v_prenex_395 (_ BitVec 32)) (v_prenex_394 (_ BitVec 32)) (v_arrayElimCell_377 (_ BitVec 32)) (v_prenex_396 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_396 (_ bv4 32)) (select (store |c_#length| v_prenex_394 v_prenex_395) v_arrayElimCell_377)) (= v_arrayElimCell_377 v_prenex_394) (= v_arrayElimCell_377 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_396))))) (or .cse0 (forall ((v_prenex_739 (_ BitVec 32)) (v_prenex_742 (_ BitVec 32)) (v_arrayElimCell_590 (_ BitVec 32)) (v_prenex_741 (_ BitVec 32)) (v_prenex_740 (_ BitVec 32))) (let ((.cse129 (select (store |c_#length| v_prenex_742 v_prenex_741) v_arrayElimCell_590))) (or (bvsle (bvadd v_prenex_740 (_ bv4 32)) .cse129) (= v_arrayElimCell_590 c_main_~x~0.base) (= v_arrayElimCell_590 v_prenex_742) (not (bvsle (_ bv0 32) v_prenex_739)) (bvsle (bvadd v_prenex_739 (_ bv4 32)) .cse129))))) (or .cse0 .cse4 (forall ((v_arrayElimCell_345 (_ BitVec 32)) (v_prenex_414 (_ BitVec 32)) (v_prenex_413 (_ BitVec 32)) (v_prenex_412 (_ BitVec 32)) (v_prenex_411 (_ BitVec 32))) (let ((.cse130 (select (store |c_#length| v_prenex_411 v_prenex_413) v_arrayElimCell_345))) (or (= v_arrayElimCell_345 v_prenex_411) (bvsle (bvadd v_prenex_412 (_ bv4 32)) .cse130) (not (bvsle (_ bv0 32) v_prenex_414)) (bvsle (bvadd v_prenex_414 (_ bv4 32)) .cse130) (= v_arrayElimCell_345 c_main_~x~0.base))))) (or .cse7 .cse0 .cse6 (forall ((v_arrayElimCell_432 (_ BitVec 32)) (v_prenex_291 (_ BitVec 32)) (v_prenex_290 (_ BitVec 32)) (v_prenex_289 (_ BitVec 32)) (v_prenex_288 (_ BitVec 32))) (let ((.cse131 (select (store |c_#length| v_prenex_288 v_prenex_290) v_arrayElimCell_432))) (or (not (bvsle (_ bv0 32) v_prenex_291)) (bvsle (bvadd v_prenex_289 (_ bv4 32)) .cse131) (= v_arrayElimCell_432 v_prenex_288) (= v_arrayElimCell_432 c_main_~x~0.base) (bvsle (bvadd v_prenex_291 (_ bv4 32)) .cse131))))) (or .cse6 (forall ((v_prenex_387 (_ BitVec 32)) (v_arrayElimCell_494 (_ BitVec 32)) (v_prenex_386 (_ BitVec 32)) (v_prenex_385 (_ BitVec 32)) (v_prenex_25 (_ BitVec 32))) (let ((.cse132 (select (store |c_#length| v_prenex_385 v_prenex_387) v_arrayElimCell_494))) (or (bvsle (bvadd v_prenex_25 (_ bv4 32)) .cse132) (not (bvsle (_ bv0 32) v_prenex_25)) (= v_arrayElimCell_494 c_main_~x~0.base) (bvsle (bvadd v_prenex_386 (_ bv4 32)) .cse132) (= v_arrayElimCell_494 v_prenex_385))))) (or .cse43 .cse133 .cse45 .cse46) (or .cse7 .cse0 .cse6 (forall ((v_arrayElimCell_465 (_ BitVec 32)) (v_prenex_44 (_ BitVec 32)) (v_prenex_452 (_ BitVec 32)) (v_prenex_451 (_ BitVec 32))) (or (= v_arrayElimCell_465 v_prenex_452) (bvsle (bvadd v_prenex_44 (_ bv4 32)) (select (store |c_#length| v_prenex_452 v_prenex_451) v_arrayElimCell_465)) (= v_arrayElimCell_465 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_44))))) (or .cse0 .cse25 .cse4 (forall ((v_arrayElimCell_257 (_ BitVec 32)) (v_prenex_759 (_ BitVec 32)) (v_prenex_758 (_ BitVec 32)) (v_prenex_761 (_ BitVec 32)) (v_prenex_760 (_ BitVec 32))) (let ((.cse134 (select (store |c_#length| v_prenex_761 v_prenex_760) v_arrayElimCell_257))) (or (bvsle (bvadd v_prenex_759 (_ bv4 32)) .cse134) (= v_arrayElimCell_257 v_prenex_761) (= v_arrayElimCell_257 c_main_~x~0.base) (bvsle (bvadd v_prenex_758 (_ bv4 32)) .cse134) (not (bvsle (_ bv0 32) v_prenex_758)))))) (or .cse6 (forall ((v_prenex_426 (_ BitVec 32)) (v_prenex_425 (_ BitVec 32)) (v_prenex_424 (_ BitVec 32)) (v_prenex_423 (_ BitVec 32)) (v_prenex_18 (_ BitVec 32)) (v_arrayElimCell_241 (_ BitVec 32))) (let ((.cse135 (store |c_#length| v_prenex_426 v_prenex_425))) (or (not (bvsle (_ bv0 32) v_prenex_18)) (= v_prenex_423 v_prenex_426) (bvsle (bvadd v_prenex_424 (_ bv4 32)) (select .cse135 v_prenex_423)) (bvsle (bvadd v_prenex_18 (_ bv4 32)) (select .cse135 v_arrayElimCell_241)) (= v_arrayElimCell_241 v_prenex_426) (= v_arrayElimCell_241 c_main_~x~0.base)))) .cse4) (or .cse0 (forall ((v_arrayElimCell_136 (_ BitVec 32)) (v_arrayElimCell_502 (_ BitVec 32)) (v_prenex_586 (_ BitVec 32)) (v_prenex_585 (_ BitVec 32))) (or (= v_arrayElimCell_502 v_prenex_586) (= v_arrayElimCell_502 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_136)) (bvsle (bvadd v_arrayElimCell_136 (_ bv4 32)) (select (store |c_#length| v_prenex_586 v_prenex_585) v_arrayElimCell_502)))) .cse4 .cse5) (or .cse7 .cse0 .cse6 (forall ((v_arrayElimCell_658 (_ BitVec 32)) (v_prenex_326 (_ BitVec 32)) (v_prenex_325 (_ BitVec 32)) (v_prenex_324 (_ BitVec 32)) (v_prenex_323 (_ BitVec 32))) (let ((.cse136 (select (store |c_#length| v_prenex_323 v_prenex_325) v_arrayElimCell_658))) (or (bvsle (bvadd v_prenex_326 (_ bv4 32)) .cse136) (= v_arrayElimCell_658 v_prenex_323) (= v_arrayElimCell_658 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_326)) (bvsle (bvadd v_prenex_324 (_ bv4 32)) .cse136))))) (or .cse6 (forall ((v_prenex_626 (_ BitVec 32)) (v_prenex_625 (_ BitVec 32)) (v_prenex_624 (_ BitVec 32)) (v_prenex_623 (_ BitVec 32)) (v_prenex_159 (_ BitVec 32))) (let ((.cse137 (select (store |c_#length| v_prenex_625 v_prenex_624) v_prenex_159))) (or (bvsle (bvadd v_prenex_623 (_ bv4 32)) .cse137) (= v_prenex_159 v_prenex_625) (bvsle (bvadd v_prenex_626 (_ bv4 32)) .cse137) (= v_prenex_159 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_626)))))) (or .cse7 .cse0 (forall ((v_prenex_461 (_ BitVec 32)) (v_prenex_460 (_ BitVec 32)) (v_prenex_459 (_ BitVec 32)) (v_arrayElimCell_370 (_ BitVec 32)) (v_prenex_462 (_ BitVec 32))) (let ((.cse138 (select (store |c_#length| v_prenex_462 v_prenex_460) v_arrayElimCell_370))) (or (bvsle (bvadd v_prenex_461 (_ bv4 32)) .cse138) (bvsle (bvadd v_prenex_459 (_ bv4 32)) .cse138) (not (bvsle (_ bv0 32) v_prenex_461)) (= v_arrayElimCell_370 c_main_~x~0.base) (= v_arrayElimCell_370 v_prenex_462)))) .cse6) (or .cse6 .cse4 (forall ((v_prenex_87 (_ BitVec 32)) (v_prenex_539 (_ BitVec 32)) (v_prenex_538 (_ BitVec 32)) (v_prenex_542 (_ BitVec 32)) (v_prenex_541 (_ BitVec 32)) (v_prenex_540 (_ BitVec 32))) (let ((.cse140 (store |c_#length| v_prenex_542 v_prenex_540))) (let ((.cse139 (bvadd v_prenex_539 (_ bv4 32))) (.cse141 (select .cse140 v_prenex_87))) (or (= v_prenex_87 v_prenex_542) (bvsle .cse139 (select .cse140 v_prenex_538)) (= v_prenex_87 c_main_~x~0.base) (bvsle (bvadd v_prenex_541 (_ bv4 32)) .cse141) (bvsle .cse139 .cse141) (not (bvsle (_ bv0 32) v_prenex_541)) (= v_prenex_538 v_prenex_542)))))) (or (forall ((v_prenex_599 (_ BitVec 32)) (v_prenex_598 (_ BitVec 32)) (v_prenex_597 (_ BitVec 32)) (v_prenex_596 (_ BitVec 32)) (v_arrayElimCell_692 (_ BitVec 32)) (v_prenex_595 (_ BitVec 32))) (let ((.cse146 (store |c_#length| v_prenex_598 v_prenex_597))) (let ((.cse142 (bvadd v_prenex_596 (_ bv4 32))) (.cse144 (select .cse146 v_arrayElimCell_692)) (.cse145 (bvadd v_prenex_599 (_ bv4 32))) (.cse143 (select .cse146 v_prenex_595))) (or (bvsle .cse142 .cse143) (bvsle .cse142 .cse144) (bvsle .cse145 .cse144) (bvsle .cse145 .cse143) (= v_arrayElimCell_692 c_main_~x~0.base) (= v_prenex_595 v_prenex_598) (not (bvsle (_ bv0 32) v_prenex_599)) (= v_arrayElimCell_692 v_prenex_598))))) .cse6) (or .cse0 .cse6 (forall ((v_prenex_439 (_ BitVec 32)) (v_prenex_438 (_ BitVec 32)) (v_prenex_107 (_ BitVec 32)) (v_prenex_442 (_ BitVec 32)) (v_prenex_441 (_ BitVec 32)) (v_prenex_440 (_ BitVec 32))) (let ((.cse151 (store |c_#length| v_prenex_441 v_prenex_440))) (let ((.cse147 (bvadd v_prenex_439 (_ bv4 32))) (.cse148 (select .cse151 v_prenex_107)) (.cse150 (bvadd v_prenex_442 (_ bv4 32))) (.cse149 (select .cse151 v_prenex_438))) (or (bvsle .cse147 .cse148) (bvsle .cse147 .cse149) (not (bvsle (_ bv0 32) v_prenex_442)) (= v_prenex_107 c_main_~x~0.base) (= v_prenex_438 v_prenex_441) (= v_prenex_107 v_prenex_441) (bvsle .cse150 .cse148) (bvsle .cse150 .cse149)))))) (or .cse0 (forall ((v_arrayElimCell_435 (_ BitVec 32)) (v_prenex_400 (_ BitVec 32)) (v_prenex_399 (_ BitVec 32)) (v_prenex_398 (_ BitVec 32)) (v_prenex_397 (_ BitVec 32))) (let ((.cse152 (select (store |c_#length| v_prenex_397 v_prenex_399) v_arrayElimCell_435))) (or (not (bvsle (_ bv0 32) v_prenex_400)) (= v_arrayElimCell_435 v_prenex_397) (bvsle (bvadd v_prenex_400 (_ bv4 32)) .cse152) (= v_arrayElimCell_435 c_main_~x~0.base) (bvsle (bvadd v_prenex_398 (_ bv4 32)) .cse152)))) .cse6) (or .cse7 (forall ((v_arrayElimCell_367 (_ BitVec 32)) (v_prenex_246 (_ BitVec 32)) (v_prenex_245 (_ BitVec 32)) (v_prenex_244 (_ BitVec 32)) (v_prenex_243 (_ BitVec 32))) (let ((.cse153 (select (store |c_#length| v_prenex_243 v_prenex_246) v_arrayElimCell_367))) (or (bvsle (bvadd v_prenex_245 (_ bv4 32)) .cse153) (= v_arrayElimCell_367 c_main_~x~0.base) (bvsle (bvadd v_prenex_244 (_ bv4 32)) .cse153) (= v_arrayElimCell_367 v_prenex_243) (not (bvsle (_ bv0 32) v_prenex_244))))) .cse0) (or .cse0 (forall ((v_prenex_74 (_ BitVec 32)) (v_prenex_492 (_ BitVec 32)) (v_prenex_491 (_ BitVec 32)) (v_arrayElimCell_335 (_ BitVec 32))) (or (= v_arrayElimCell_335 v_prenex_492) (not (bvsle (_ bv0 32) v_prenex_74)) (bvsle (bvadd v_prenex_74 (_ bv4 32)) (select (store |c_#length| v_prenex_492 v_prenex_491) v_arrayElimCell_335)))) .cse6) (or .cse0 .cse15 (forall ((v_prenex_705 (_ BitVec 32)) (v_prenex_704 (_ BitVec 32)) (v_prenex_703 (_ BitVec 32)) (v_arrayElimCell_668 (_ BitVec 32)) (v_prenex_702 (_ BitVec 32)) (v_prenex_701 (_ BitVec 32))) (let ((.cse155 (store |c_#length| v_prenex_705 v_prenex_704))) (let ((.cse154 (bvadd v_prenex_701 (_ bv4 32))) (.cse156 (select .cse155 v_prenex_702))) (or (bvsle .cse154 (select .cse155 v_arrayElimCell_668)) (= v_prenex_702 v_prenex_705) (bvsle .cse154 .cse156) (not (bvsle (_ bv0 32) v_prenex_701)) (= v_arrayElimCell_668 v_prenex_705) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_668) (bvsle (bvadd v_prenex_703 (_ bv4 32)) .cse156))))) .cse4) (or .cse0 .cse4 .cse5 (forall ((v_prenex_174 (_ BitVec 32)) (v_prenex_173 (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_prenex_172 (_ BitVec 32)) (v_arrayElimCell_137 (_ BitVec 32)) (v_arrayElimCell_351 (_ BitVec 32))) (let ((.cse159 (store |c_#length| v_prenex_173 v_prenex_172))) (let ((.cse157 (bvadd v_prenex_174 (_ bv4 32))) (.cse158 (select .cse159 v_arrayElimCell_351))) (or (bvsle .cse157 .cse158) (bvsle .cse157 (select .cse159 v_subst_3)) (bvsle (bvadd v_arrayElimCell_137 (_ bv4 32)) .cse158) (= v_subst_3 v_prenex_173) (= v_arrayElimCell_351 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_137)) (= v_arrayElimCell_351 v_prenex_173)))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_448 (_ BitVec 32)) (v_prenex_614 (_ BitVec 32)) (v_prenex_613 (_ BitVec 32)) (v_prenex_612 (_ BitVec 32)) (v_prenex_611 (_ BitVec 32))) (let ((.cse160 (select (store |c_#length| v_prenex_613 v_prenex_612) v_arrayElimCell_448))) (or (= v_arrayElimCell_448 v_prenex_613) (bvsle (bvadd v_prenex_611 (_ bv4 32)) .cse160) (not (bvsle (_ bv0 32) v_prenex_614)) (= v_arrayElimCell_448 c_main_~x~0.base) (bvsle (bvadd v_prenex_614 (_ bv4 32)) .cse160))))) (or .cse7 .cse0 (forall ((v_prenex_209 (_ BitVec 32)) (v_arrayElimCell_513 (_ BitVec 32)) (v_prenex_208 (_ BitVec 32)) (v_prenex_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_208)) (= v_arrayElimCell_513 c_main_~x~0.base) (= v_arrayElimCell_513 v_prenex_207) (bvsle (bvadd v_prenex_208 (_ bv4 32)) (select (store |c_#length| v_prenex_207 v_prenex_209) v_arrayElimCell_513))))) (or .cse6 (forall ((v_prenex_21 (_ BitVec 32)) (v_arrayElimCell_315 (_ BitVec 32)) (v_prenex_339 (_ BitVec 32)) (v_prenex_338 (_ BitVec 32)) (v_prenex_337 (_ BitVec 32))) (let ((.cse161 (select (store |c_#length| v_prenex_337 v_prenex_339) v_arrayElimCell_315))) (or (not (bvsle (_ bv0 32) v_prenex_21)) (= v_arrayElimCell_315 v_prenex_337) (= v_arrayElimCell_315 c_main_~x~0.base) (bvsle (bvadd v_prenex_21 (_ bv4 32)) .cse161) (bvsle (bvadd v_prenex_338 (_ bv4 32)) .cse161)))) .cse4) (or (forall ((v_arrayElimCell_327 (_ BitVec 32)) (v_arrayElimCell_108 (_ BitVec 32)) (v_prenex_204 (_ BitVec 32)) (v_prenex_203 (_ BitVec 32))) (or (= v_arrayElimCell_327 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_108)) (bvsle (bvadd v_arrayElimCell_108 (_ bv4 32)) (select (store |c_#length| v_prenex_203 v_prenex_204) v_arrayElimCell_327)) (= v_arrayElimCell_327 v_prenex_203))) .cse6) (or .cse7 .cse0 .cse6 (forall ((v_prenex_106 (_ BitVec 32)) (v_prenex_446 (_ BitVec 32)) (v_prenex_445 (_ BitVec 32)) (v_prenex_444 (_ BitVec 32)) (v_prenex_443 (_ BitVec 32))) (let ((.cse162 (select (store |c_#length| v_prenex_445 v_prenex_444) v_prenex_106))) (or (bvsle (bvadd v_prenex_443 (_ bv4 32)) .cse162) (= v_prenex_106 c_main_~x~0.base) (bvsle (bvadd v_prenex_446 (_ bv4 32)) .cse162) (= v_prenex_106 v_prenex_445) (not (bvsle (_ bv0 32) v_prenex_446)))))) (or (forall ((v_prenex_359 (_ BitVec 32)) (v_prenex_358 (_ BitVec 32)) (v_prenex_16 (_ BitVec 32)) (v_prenex_357 (_ BitVec 32)) (v_prenex_356 (_ BitVec 32)) (v_prenex_143 (_ BitVec 32))) (let ((.cse167 (store |c_#length| v_prenex_356 v_prenex_359))) (let ((.cse164 (select .cse167 v_prenex_143)) (.cse165 (bvadd v_prenex_16 (_ bv4 32))) (.cse163 (bvadd v_prenex_358 (_ bv4 32))) (.cse166 (select .cse167 v_prenex_357))) (or (bvsle .cse163 .cse164) (bvsle .cse165 .cse164) (= v_prenex_143 v_prenex_356) (bvsle .cse165 .cse166) (= v_prenex_357 v_prenex_356) (bvsle .cse163 .cse166) (= v_prenex_143 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_16)))))) .cse6) (or .cse0 (forall ((v_arrayElimCell_228 (_ BitVec 32)) (v_prenex_61 (_ BitVec 32)) (v_prenex_267 (_ BitVec 32)) (v_prenex_266 (_ BitVec 32)) (v_prenex_265 (_ BitVec 32))) (let ((.cse168 (select (store |c_#length| v_prenex_265 v_prenex_267) v_arrayElimCell_228))) (or (not (bvsle (_ bv0 32) v_prenex_61)) (bvsle (bvadd v_prenex_61 (_ bv4 32)) .cse168) (= v_arrayElimCell_228 v_prenex_265) (bvsle (bvadd v_prenex_266 (_ bv4 32)) .cse168)))) .cse4 .cse5) (or .cse0 (forall ((v_prenex_603 (_ BitVec 32)) (v_prenex_602 (_ BitVec 32)) (v_prenex_601 (_ BitVec 32)) (v_arrayElimCell_391 (_ BitVec 32)) (v_prenex_600 (_ BitVec 32))) (let ((.cse169 (select (store |c_#length| v_prenex_602 v_prenex_601) v_arrayElimCell_391))) (or (= v_arrayElimCell_391 c_main_~x~0.base) (bvsle (bvadd v_prenex_603 (_ bv4 32)) .cse169) (= v_arrayElimCell_391 v_prenex_602) (not (bvsle (_ bv0 32) v_prenex_603)) (bvsle (bvadd v_prenex_600 (_ bv4 32)) .cse169)))) .cse6) (or .cse0 (forall ((v_prenex_355 (_ BitVec 32)) (v_prenex_354 (_ BitVec 32)) (v_prenex_353 (_ BitVec 32)) (v_arrayElimCell_682 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_355)) (bvsle (bvadd v_prenex_355 (_ bv4 32)) (select (store |c_#length| v_prenex_353 v_prenex_354) v_arrayElimCell_682)) (= v_arrayElimCell_682 v_prenex_353) (= v_arrayElimCell_682 c_main_~x~0.base))) .cse6) (or (forall ((v_prenex_524 (_ BitVec 32)) (v_prenex_523 (_ BitVec 32)) (v_prenex_522 (_ BitVec 32)) (v_arrayElimCell_618 (_ BitVec 32)) (v_prenex_521 (_ BitVec 32))) (let ((.cse170 (select (store |c_#length| v_prenex_524 v_prenex_522) v_arrayElimCell_618))) (or (bvsle (bvadd v_prenex_523 (_ bv4 32)) .cse170) (bvsle (bvadd v_prenex_521 (_ bv4 32)) .cse170) (= v_arrayElimCell_618 v_prenex_524) (= v_arrayElimCell_618 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_523))))) .cse6) .cse0 (= (bvadd (select |c_#valid| c_main_~head~0.base) (_ bv1 1)) (_ bv0 1)) (or .cse0 .cse25 (forall ((v_prenex_384 (_ BitVec 32)) (v_prenex_383 (_ BitVec 32)) (v_prenex_382 (_ BitVec 32)) (v_arrayElimCell_417 (_ BitVec 32)) (v_arrayElimCell_133 (_ BitVec 32))) (let ((.cse171 (select (store |c_#length| v_prenex_382 v_prenex_384) v_arrayElimCell_417))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_133)) (bvsle (bvadd v_prenex_383 (_ bv4 32)) .cse171) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_417) (bvsle (bvadd v_arrayElimCell_133 (_ bv4 32)) .cse171) (= v_arrayElimCell_417 v_prenex_382)))) .cse4) (or .cse0 .cse4 (forall ((v_prenex_645 (_ BitVec 32)) (v_prenex_644 (_ BitVec 32)) (v_prenex_643 (_ BitVec 32)) (v_arrayElimCell_261 (_ BitVec 32)) (v_prenex_642 (_ BitVec 32))) (let ((.cse172 (select (store |c_#length| v_prenex_645 v_prenex_643) v_arrayElimCell_261))) (or (bvsle (bvadd v_prenex_644 (_ bv4 32)) .cse172) (not (bvsle (_ bv0 32) v_prenex_644)) (= v_arrayElimCell_261 v_prenex_645) (bvsle (bvadd v_prenex_642 (_ bv4 32)) .cse172) (= v_arrayElimCell_261 c_main_~x~0.base))))) (or (forall ((v_prenex_164 (_ BitVec 32)) (v_prenex_163 (_ BitVec 32)) (v_arrayElimCell_613 (_ BitVec 32)) (v_prenex_165 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_164)) (bvsle (bvadd v_prenex_164 (_ bv4 32)) (select (store |c_#length| v_prenex_163 v_prenex_165) v_arrayElimCell_613)) (= v_arrayElimCell_613 v_prenex_163))) .cse0) (or .cse0 .cse6 (forall ((v_arrayElimCell_524 (_ BitVec 32)) (v_prenex_555 (_ BitVec 32)) (v_prenex_554 (_ BitVec 32)) (v_prenex_553 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_554 (_ bv4 32)) (select (store |c_#length| v_prenex_555 v_prenex_553) v_arrayElimCell_524)) (= v_arrayElimCell_524 v_prenex_555) (not (bvsle (_ bv0 32) v_prenex_554)) (= v_arrayElimCell_524 c_main_~x~0.base)))) (or .cse43 .cse133 .cse45 .cse46 (forall ((v_prenex_1 (_ BitVec 32))) (not (= (_ bv0 1) (select |c_#valid| v_prenex_1))))) (or .cse43 .cse44 .cse45 .cse46) (or .cse0 .cse6 (forall ((v_prenex_381 (_ BitVec 32)) (v_arrayElimCell_445 (_ BitVec 32)) (v_prenex_380 (_ BitVec 32)) (v_prenex_379 (_ BitVec 32)) (v_prenex_378 (_ BitVec 32)) (v_prenex_377 (_ BitVec 32))) (let ((.cse177 (store |c_#length| v_prenex_377 v_prenex_380))) (let ((.cse174 (select .cse177 v_prenex_378)) (.cse173 (bvadd v_prenex_381 (_ bv4 32))) (.cse175 (bvadd v_prenex_379 (_ bv4 32))) (.cse176 (select .cse177 v_arrayElimCell_445))) (or (bvsle .cse173 .cse174) (bvsle .cse175 .cse174) (not (bvsle (_ bv0 32) v_prenex_381)) (bvsle .cse173 .cse176) (bvsle .cse175 .cse176) (= v_arrayElimCell_445 c_main_~x~0.base) (= v_arrayElimCell_445 v_prenex_377) (= v_prenex_378 v_prenex_377)))))) (or .cse0 (forall ((v_prenex_303 (_ BitVec 32)) (v_prenex_302 (_ BitVec 32)) (v_prenex_301 (_ BitVec 32)) (v_arrayElimCell_196 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_303 (_ bv4 32)) (select (store |c_#length| v_prenex_301 v_prenex_302) v_arrayElimCell_196)) (not (bvsle (_ bv0 32) v_prenex_303)) (= v_arrayElimCell_196 v_prenex_301))) .cse15) (or (forall ((v_prenex_593 (_ BitVec 32)) (v_arrayElimCell_486 (_ BitVec 32)) (v_prenex_592 (_ BitVec 32)) (v_prenex_22 (_ BitVec 32)) (v_prenex_594 (_ BitVec 32))) (let ((.cse178 (select (store |c_#length| v_prenex_594 v_prenex_593) v_arrayElimCell_486))) (or (= v_arrayElimCell_486 v_prenex_594) (= v_arrayElimCell_486 c_main_~x~0.base) (bvsle (bvadd v_prenex_22 (_ bv4 32)) .cse178) (bvsle (bvadd v_prenex_592 (_ bv4 32)) .cse178) (not (bvsle (_ bv0 32) v_prenex_22))))) .cse6) (or .cse7 .cse0 (forall ((v_prenex_429 (_ BitVec 32)) (v_arrayElimCell_512 (_ BitVec 32)) (v_prenex_428 (_ BitVec 32)) (v_prenex_427 (_ BitVec 32))) (or (= v_arrayElimCell_512 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_428)) (= v_arrayElimCell_512 v_prenex_429) (bvsle (bvadd v_prenex_428 (_ bv4 32)) (select (store |c_#length| v_prenex_429 v_prenex_427) v_arrayElimCell_512)))) .cse6) (or (forall ((v_prenex_708 (_ BitVec 32)) (v_arrayElimCell_189 (_ BitVec 32)) (v_prenex_707 (_ BitVec 32)) (v_prenex_706 (_ BitVec 32)) (v_prenex_709 (_ BitVec 32))) (let ((.cse179 (select (store |c_#length| v_prenex_709 v_prenex_708) v_arrayElimCell_189))) (or (bvsle (bvadd v_prenex_706 (_ bv4 32)) .cse179) (bvsle (bvadd v_prenex_707 (_ bv4 32)) .cse179) (= v_arrayElimCell_189 v_prenex_709) (not (bvsle (_ bv0 32) v_prenex_706))))) .cse0 .cse6) (or .cse0 (forall ((v_prenex_263 (_ BitVec 32)) (v_prenex_262 (_ BitVec 32)) (v_prenex_261 (_ BitVec 32)) (v_prenex_60 (_ BitVec 32)) (v_arrayElimCell_264 (_ BitVec 32)) (v_prenex_264 (_ BitVec 32))) (let ((.cse180 (store |c_#length| v_prenex_261 v_prenex_264))) (or (bvsle (bvadd v_prenex_263 (_ bv4 32)) (select .cse180 v_prenex_262)) (not (bvsle (_ bv0 32) v_prenex_60)) (bvsle (bvadd v_prenex_60 (_ bv4 32)) (select .cse180 v_arrayElimCell_264)) (= v_arrayElimCell_264 c_main_~x~0.base) (= v_prenex_262 v_prenex_261) (= v_arrayElimCell_264 v_prenex_261)))) .cse4 .cse5) (or .cse0 .cse25 .cse4 (forall ((v_prenex_407 (_ BitVec 32)) (v_prenex_406 (_ BitVec 32)) (v_prenex_405 (_ BitVec 32)) (v_prenex_404 (_ BitVec 32)) (v_arrayElimCell_230 (_ BitVec 32))) (let ((.cse181 (select (store |c_#length| v_prenex_404 v_prenex_406) v_arrayElimCell_230))) (or (bvsle (bvadd v_prenex_407 (_ bv4 32)) .cse181) (= v_arrayElimCell_230 v_prenex_404) (not (bvsle (_ bv0 32) v_prenex_407)) (bvsle (bvadd v_prenex_405 (_ bv4 32)) .cse181))))) (or .cse7 (forall ((v_prenex_328 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32)) (v_prenex_327 (_ BitVec 32)) (v_arrayElimCell_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_9)) (= v_arrayElimCell_207 c_main_~x~0.base) (bvsle (bvadd v_prenex_9 (_ bv4 32)) (select (store |c_#length| v_prenex_327 v_prenex_328) v_arrayElimCell_207)) (= v_arrayElimCell_207 v_prenex_327))) .cse6) (or .cse0 (forall ((v_arrayElimCell_203 (_ BitVec 32)) (v_prenex_309 (_ BitVec 32)) (v_prenex_308 (_ BitVec 32)) (v_prenex_307 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_309 (_ bv4 32)) (select (store |c_#length| v_prenex_307 v_prenex_308) v_arrayElimCell_203)) (not (bvsle (_ bv0 32) v_prenex_309)) (= v_arrayElimCell_203 v_prenex_307))) .cse6) (or (forall ((v_arrayElimCell_260 (_ BitVec 32)) (v_prenex_686 (_ BitVec 32)) (v_prenex_685 (_ BitVec 32)) (v_prenex_684 (_ BitVec 32)) (v_prenex_683 (_ BitVec 32))) (let ((.cse182 (select (store |c_#length| v_prenex_686 v_prenex_684) v_arrayElimCell_260))) (or (not (bvsle (_ bv0 32) v_prenex_685)) (= v_arrayElimCell_260 v_prenex_686) (bvsle (bvadd v_prenex_685 (_ bv4 32)) .cse182) (bvsle (bvadd v_prenex_683 (_ bv4 32)) .cse182) (= v_arrayElimCell_260 c_main_~x~0.base)))) .cse0 .cse4 .cse5) (or .cse0 (forall ((v_arrayElimCell_255 (_ BitVec 32)) (v_prenex_272 (_ BitVec 32)) (v_prenex_271 (_ BitVec 32)) (v_prenex_270 (_ BitVec 32)) (v_prenex_269 (_ BitVec 32)) (v_prenex_268 (_ BitVec 32))) (let ((.cse183 (store |c_#length| v_prenex_268 v_prenex_271))) (or (not (bvsle (_ bv0 32) v_prenex_272)) (bvsle (bvadd v_prenex_270 (_ bv4 32)) (select .cse183 v_prenex_269)) (= v_arrayElimCell_255 v_prenex_268) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_255) (= v_prenex_269 v_prenex_268) (bvsle (bvadd v_prenex_272 (_ bv4 32)) (select .cse183 v_arrayElimCell_255))))) .cse25 .cse4) (= (bvadd (select |c_#length| |c_main_write~$Pointer$_#value.base|) (_ bv4294967280 32)) (_ bv0 32)) .cse4 (or .cse0 .cse6 (forall ((v_prenex_648 (_ BitVec 32)) (v_prenex_647 (_ BitVec 32)) (v_arrayElimCell_547 (_ BitVec 32)) (v_prenex_646 (_ BitVec 32)) (v_prenex_68 (_ BitVec 32))) (let ((.cse184 (select (store |c_#length| v_prenex_648 v_prenex_647) v_arrayElimCell_547))) (or (= v_arrayElimCell_547 v_prenex_648) (bvsle (bvadd v_prenex_646 (_ bv4 32)) .cse184) (= v_arrayElimCell_547 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_68)) (bvsle (bvadd v_prenex_68 (_ bv4 32)) .cse184))))) (or .cse6 (forall ((v_prenex_15 (_ BitVec 32)) (v_arrayElimCell_281 (_ BitVec 32)) (v_prenex_322 (_ BitVec 32)) (v_prenex_321 (_ BitVec 32))) (or (= v_arrayElimCell_281 v_prenex_321) (not (bvsle (_ bv0 32) v_prenex_15)) (bvsle (bvadd v_prenex_15 (_ bv4 32)) (select (store |c_#length| v_prenex_321 v_prenex_322) v_arrayElimCell_281)))) .cse4) (= c_main_~x~0.offset (_ bv0 32)) (or .cse0 (forall ((v_prenex_175 (_ BitVec 32)) (v_arrayElimCell_653 (_ BitVec 32)) (v_prenex_38 (_ BitVec 32)) (v_prenex_178 (_ BitVec 32)) (v_prenex_177 (_ BitVec 32)) (v_prenex_176 (_ BitVec 32))) (let ((.cse186 (store |c_#length| v_prenex_176 v_prenex_175))) (let ((.cse185 (bvadd v_prenex_38 (_ bv4 32))) (.cse187 (select .cse186 v_prenex_177))) (or (= v_arrayElimCell_653 c_main_~x~0.base) (bvsle .cse185 (select .cse186 v_arrayElimCell_653)) (bvsle (bvadd v_prenex_178 (_ bv4 32)) .cse187) (= v_arrayElimCell_653 v_prenex_176) (not (bvsle (_ bv0 32) v_prenex_38)) (bvsle .cse185 .cse187) (= v_prenex_177 v_prenex_176))))) .cse4 .cse5) (or .cse7 .cse0 (forall ((v_prenex_184 (_ BitVec 32)) (v_prenex_183 (_ BitVec 32)) (v_prenex_182 (_ BitVec 32)) (v_arrayElimCell_121 (_ BitVec 32)) (v_arrayElimCell_452 (_ BitVec 32))) (let ((.cse188 (select (store |c_#length| v_prenex_182 v_prenex_184) v_arrayElimCell_452))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_121)) (bvsle (bvadd v_prenex_183 (_ bv4 32)) .cse188) (= v_arrayElimCell_452 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_121 (_ bv4 32)) .cse188) (= v_arrayElimCell_452 v_prenex_182))))) (or .cse7 (forall ((v_prenex_43 (_ BitVec 32)) (v_arrayElimCell_424 (_ BitVec 32)) (v_prenex_389 (_ BitVec 32)) (v_prenex_388 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_43)) (= v_arrayElimCell_424 c_main_~x~0.base) (bvsle (bvadd v_prenex_43 (_ bv4 32)) (select (store |c_#length| v_prenex_388 v_prenex_389) v_arrayElimCell_424)) (= v_arrayElimCell_424 v_prenex_388))) .cse0 .cse6) (or .cse0 (forall ((v_prenex_767 (_ BitVec 32)) (v_arrayElimCell_614 (_ BitVec 32)) (v_prenex_766 (_ BitVec 32)) (v_prenex_765 (_ BitVec 32))) (or (= v_arrayElimCell_614 v_prenex_767) (bvsle (bvadd v_prenex_765 (_ bv4 32)) (select (store |c_#length| v_prenex_767 v_prenex_766) v_arrayElimCell_614)) (not (bvsle (_ bv0 32) v_prenex_765)))) .cse6)))) is different from true [2018-11-10 07:44:59,169 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse0 (= |c_main_write~$Pointer$_#ptr.base| c_main_~x~0.base)) (.cse10 (= |c_main_write~$Pointer$_#value.base| c_main_~x~0.base)) (.cse6 (= |c_main_write~$Pointer$_#value.base| |c_main_write~$Pointer$_#ptr.base|)) (.cse1 (= c_main_~x~0.offset |c_main_write~$Pointer$_#ptr.offset|))) (let ((.cse8 (not .cse1)) (.cse9 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#value.offset|))) (.cse71 (bvsle |c_main_write~$Pointer$_#value.offset| (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)))) (.cse43 (not .cse6)) (.cse5 (not .cse10)) (.cse7 (not .cse0))) (and (or .cse0 (forall ((v_prenex_560 (_ BitVec 32)) (v_arrayElimCell_105 (_ BitVec 32)) (v_arrayElimCell_273 (_ BitVec 32)) (v_prenex_561 (_ BitVec 32))) (or (= v_arrayElimCell_273 v_prenex_561) (not (bvsle (_ bv0 32) v_arrayElimCell_105)) (bvsle (bvadd v_arrayElimCell_105 (_ bv4 32)) (select (store |c_#length| v_prenex_561 v_prenex_560) v_arrayElimCell_273)) (= v_arrayElimCell_273 c_main_~x~0.base)))) (or .cse1 .cse0 (forall ((v_arrayElimCell_157 (_ BitVec 32)) (v_arrayElimCell_323 (_ BitVec 32)) (v_prenex_688 (_ BitVec 32)) (v_prenex_687 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_157 (_ bv4 32)) (select (store |c_#length| v_prenex_688 v_prenex_687) v_arrayElimCell_323)) (= v_arrayElimCell_323 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_157)) (= v_arrayElimCell_323 v_prenex_688)))) (or .cse1 (forall ((v_prenex_581 (_ BitVec 32)) (v_prenex_580 (_ BitVec 32)) (v_arrayElimCell_359 (_ BitVec 32)) (v_prenex_50 (_ BitVec 32)) (v_prenex_579 (_ BitVec 32)) (v_prenex_578 (_ BitVec 32))) (let ((.cse4 (store |c_#length| v_prenex_581 v_prenex_580))) (let ((.cse3 (bvadd v_prenex_579 (_ bv4 32))) (.cse2 (select .cse4 v_arrayElimCell_359))) (or (bvsle (bvadd v_prenex_50 (_ bv4 32)) .cse2) (= v_arrayElimCell_359 v_prenex_581) (= v_prenex_578 v_prenex_581) (bvsle .cse3 (select .cse4 v_prenex_578)) (not (bvsle (_ bv0 32) v_prenex_50)) (bvsle .cse3 .cse2) (= v_arrayElimCell_359 c_main_~x~0.base))))) .cse5 .cse6) (or .cse7 .cse8 (forall ((v_prenex_466 (_ BitVec 32)) (v_prenex_465 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_466 v_prenex_465) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_466))) .cse9) (or .cse1 (forall ((v_prenex_582 (_ BitVec 32)) (v_arrayElimCell_608 (_ BitVec 32)) (v_prenex_584 (_ BitVec 32)) (v_prenex_583 (_ BitVec 32))) (or (= v_arrayElimCell_608 v_prenex_584) (bvsle (bvadd v_prenex_583 (_ bv4 32)) (select (store |c_#length| v_prenex_584 v_prenex_582) v_arrayElimCell_608)) (not (bvsle (_ bv0 32) v_prenex_583)))) .cse0) (or .cse1 (forall ((v_prenex_274 (_ BitVec 32)) (v_prenex_273 (_ BitVec 32)) (v_arrayElimCell_518 (_ BitVec 32)) (v_prenex_275 (_ BitVec 32))) (or (= v_arrayElimCell_518 c_main_~x~0.base) (= v_arrayElimCell_518 v_prenex_274) (not (bvsle (_ bv0 32) v_prenex_273)) (bvsle (bvadd v_prenex_273 (_ bv4 32)) (select (store |c_#length| v_prenex_274 v_prenex_275) v_arrayElimCell_518)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_523 (_ BitVec 32)) (v_prenex_255 (_ BitVec 32)) (v_prenex_254 (_ BitVec 32)) (v_prenex_253 (_ BitVec 32))) (or (= v_arrayElimCell_523 v_prenex_254) (bvsle (bvadd v_prenex_253 (_ bv4 32)) (select (store |c_#length| v_prenex_254 v_prenex_255) v_arrayElimCell_523)) (not (bvsle (_ bv0 32) v_prenex_253)) (= v_arrayElimCell_523 c_main_~x~0.base)))) (or .cse1 (forall ((v_prenex_736 (_ BitVec 32)) (v_prenex_735 (_ BitVec 32)) (v_prenex_734 (_ BitVec 32)) (v_prenex_733 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_734)) (= v_prenex_733 v_prenex_736) (bvsle (bvadd v_prenex_734 (_ bv4 32)) (select (store |c_#length| v_prenex_736 v_prenex_735) v_prenex_733))))) (or .cse10 .cse1 (forall ((v_prenex_236 (_ BitVec 32)) (v_prenex_235 (_ BitVec 32)) (v_prenex_234 (_ BitVec 32)) (v_arrayElimCell_509 (_ BitVec 32))) (or (= v_arrayElimCell_509 v_prenex_234) (not (bvsle (_ bv0 32) v_prenex_235)) (= v_arrayElimCell_509 c_main_~x~0.base) (bvsle (bvadd v_prenex_235 (_ bv4 32)) (select (store |c_#length| v_prenex_234 v_prenex_236) v_arrayElimCell_509)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_414 (_ BitVec 32)) (v_prenex_559 (_ BitVec 32)) (v_prenex_558 (_ BitVec 32)) (v_prenex_557 (_ BitVec 32)) (v_prenex_556 (_ BitVec 32))) (let ((.cse11 (select (store |c_#length| v_prenex_558 v_prenex_557) v_arrayElimCell_414))) (or (= v_arrayElimCell_414 v_prenex_558) (bvsle (bvadd v_prenex_556 (_ bv4 32)) .cse11) (not (bvsle (_ bv0 32) v_prenex_559)) (bvsle (bvadd v_prenex_559 (_ bv4 32)) .cse11) (= v_arrayElimCell_414 c_main_~x~0.base)))) .cse5 .cse6) (or .cse0 (forall ((v_prenex_670 (_ BitVec 32)) (v_arrayElimCell_555 (_ BitVec 32)) (v_prenex_26 (_ BitVec 32)) (v_prenex_671 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_26 (_ bv4 32)) (select (store |c_#length| v_prenex_671 v_prenex_670) v_arrayElimCell_555)) (not (bvsle (_ bv0 32) v_prenex_26)) (= v_arrayElimCell_555 v_prenex_671)))) (or .cse1 .cse7 (forall ((v_arrayElimCell_664 (_ BitVec 32)) (v_prenex_675 (_ BitVec 32)) (v_prenex_674 (_ BitVec 32)) (v_prenex_673 (_ BitVec 32)) (v_prenex_672 (_ BitVec 32))) (let ((.cse12 (select (store |c_#length| v_prenex_675 v_prenex_673) v_arrayElimCell_664))) (or (= v_arrayElimCell_664 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_674)) (= v_arrayElimCell_664 v_prenex_675) (bvsle (bvadd v_prenex_674 (_ bv4 32)) .cse12) (bvsle (bvadd v_prenex_672 (_ bv4 32)) .cse12))))) (or .cse0 (forall ((v_arrayElimCell_305 (_ BitVec 32)) (v_arrayElimCell_78 (_ BitVec 32)) (v_prenex_224 (_ BitVec 32)) (v_prenex_223 (_ BitVec 32)) (v_prenex_222 (_ BitVec 32))) (let ((.cse13 (select (store |c_#length| v_prenex_222 v_prenex_224) v_arrayElimCell_305))) (or (bvsle (bvadd v_prenex_223 (_ bv4 32)) .cse13) (bvsle (bvadd v_arrayElimCell_78 (_ bv4 32)) .cse13) (not (bvsle (_ bv0 32) v_arrayElimCell_78)) (= v_arrayElimCell_305 v_prenex_222))))) (or .cse10 .cse1 .cse0 (forall ((v_prenex_609 (_ BitVec 32)) (v_prenex_608 (_ BitVec 32)) (v_arrayElimCell_674 (_ BitVec 32)) (v_prenex_607 (_ BitVec 32)) (v_prenex_610 (_ BitVec 32))) (let ((.cse14 (select (store |c_#length| v_prenex_610 v_prenex_608) v_arrayElimCell_674))) (or (not (bvsle (_ bv0 32) v_prenex_609)) (= v_arrayElimCell_674 v_prenex_610) (= v_arrayElimCell_674 c_main_~x~0.base) (bvsle (bvadd v_prenex_607 (_ bv4 32)) .cse14) (bvsle (bvadd v_prenex_609 (_ bv4 32)) .cse14))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_301 (_ BitVec 32)) (v_prenex_37 (_ BitVec 32)) (v_prenex_454 (_ BitVec 32)) (v_prenex_453 (_ BitVec 32))) (or (= v_arrayElimCell_301 v_prenex_454) (= v_arrayElimCell_301 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_37)) (bvsle (bvadd v_prenex_37 (_ bv4 32)) (select (store |c_#length| v_prenex_454 v_prenex_453) v_arrayElimCell_301))))) (or .cse1 (forall ((v_prenex_72 (_ BitVec 32)) (v_prenex_369 (_ BitVec 32)) (v_prenex_368 (_ BitVec 32)) (v_prenex_367 (_ BitVec 32)) (v_arrayElimCell_186 (_ BitVec 32))) (let ((.cse15 (select (store |c_#length| v_prenex_367 v_prenex_369) v_arrayElimCell_186))) (or (= v_arrayElimCell_186 v_prenex_367) (not (bvsle (_ bv0 32) v_prenex_72)) (bvsle (bvadd v_prenex_368 (_ bv4 32)) .cse15) (bvsle (bvadd v_prenex_72 (_ bv4 32)) .cse15)))) .cse0) (or .cse0 (forall ((v_arrayElimCell_215 (_ BitVec 32)) (v_prenex_239 (_ BitVec 32)) (v_prenex_238 (_ BitVec 32)) (v_prenex_237 (_ BitVec 32)) (v_arrayElimCell_84 (_ BitVec 32))) (let ((.cse16 (select (store |c_#length| v_prenex_237 v_prenex_239) v_arrayElimCell_215))) (or (= v_arrayElimCell_215 v_prenex_237) (bvsle (bvadd v_prenex_238 (_ bv4 32)) .cse16) (bvsle (bvadd v_arrayElimCell_84 (_ bv4 32)) .cse16) (not (bvsle (_ bv0 32) v_arrayElimCell_84))))) .cse5) (or .cse10 .cse0 (forall ((v_prenex_509 (_ BitVec 32)) (v_prenex_508 (_ BitVec 32)) (v_prenex_507 (_ BitVec 32)) (v_prenex_158 (_ BitVec 32)) (v_prenex_510 (_ BitVec 32))) (let ((.cse17 (select (store |c_#length| v_prenex_509 v_prenex_508) v_prenex_158))) (or (not (bvsle (_ bv0 32) v_prenex_510)) (= v_prenex_158 c_main_~x~0.base) (= v_prenex_158 v_prenex_509) (bvsle (bvadd v_prenex_510 (_ bv4 32)) .cse17) (bvsle (bvadd v_prenex_507 (_ bv4 32)) .cse17))))) (or .cse1 (forall ((v_prenex_729 (_ BitVec 32)) (v_arrayElimCell_565 (_ BitVec 32)) (v_prenex_732 (_ BitVec 32)) (v_prenex_731 (_ BitVec 32)) (v_prenex_730 (_ BitVec 32))) (let ((.cse18 (select (store |c_#length| v_prenex_732 v_prenex_731) v_arrayElimCell_565))) (or (bvsle (bvadd v_prenex_729 (_ bv4 32)) .cse18) (= v_arrayElimCell_565 v_prenex_732) (bvsle (bvadd v_prenex_730 (_ bv4 32)) .cse18) (not (bvsle (_ bv0 32) v_prenex_729)))))) (or .cse1 .cse5 (forall ((v_arrayElimCell_640 (_ BitVec 32)) (v_prenex_53 (_ BitVec 32)) (v_prenex_349 (_ BitVec 32)) (v_prenex_348 (_ BitVec 32)) (v_prenex_347 (_ BitVec 32)) (v_prenex_346 (_ BitVec 32))) (let ((.cse21 (store |c_#length| v_prenex_346 v_prenex_349))) (let ((.cse20 (select .cse21 v_arrayElimCell_640)) (.cse19 (bvadd v_prenex_348 (_ bv4 32)))) (or (bvsle .cse19 .cse20) (not (bvsle (_ bv0 32) v_prenex_53)) (= v_arrayElimCell_640 v_prenex_346) (bvsle (bvadd v_prenex_53 (_ bv4 32)) .cse20) (bvsle .cse19 (select .cse21 v_prenex_347)) (= v_arrayElimCell_640 c_main_~x~0.base) (= v_prenex_347 v_prenex_346))))) .cse6) (or .cse1 .cse5 (forall ((v_prenex_629 (_ BitVec 32)) (v_prenex_628 (_ BitVec 32)) (v_prenex_627 (_ BitVec 32)) (v_arrayElimCell_415 (_ BitVec 32)) (v_prenex_630 (_ BitVec 32))) (let ((.cse22 (select (store |c_#length| v_prenex_629 v_prenex_628) v_arrayElimCell_415))) (or (= v_arrayElimCell_415 c_main_~x~0.base) (bvsle (bvadd v_prenex_630 (_ bv4 32)) .cse22) (bvsle (bvadd v_prenex_627 (_ bv4 32)) .cse22) (not (bvsle (_ bv0 32) v_prenex_630)) (= v_arrayElimCell_415 v_prenex_629))))) (or .cse1 (forall ((v_prenex_480 (_ BitVec 32)) (v_prenex_479 (_ BitVec 32)) (v_prenex_478 (_ BitVec 32)) (v_prenex_477 (_ BitVec 32)) (v_prenex_476 (_ BitVec 32)) (v_arrayElimCell_253 (_ BitVec 32))) (let ((.cse23 (store |c_#length| v_prenex_480 v_prenex_478))) (or (= v_arrayElimCell_253 c_main_~x~0.base) (= v_arrayElimCell_253 v_prenex_480) (not (bvsle (_ bv0 32) v_prenex_479)) (= v_prenex_476 v_prenex_480) (bvsle (bvadd v_prenex_479 (_ bv4 32)) (select .cse23 v_arrayElimCell_253)) (bvsle (bvadd v_prenex_477 (_ bv4 32)) (select .cse23 v_prenex_476))))) .cse5 .cse6) (or .cse1 .cse7 (forall ((v_arrayElimCell_398 (_ BitVec 32)) (v_prenex_393 (_ BitVec 32)) (v_prenex_392 (_ BitVec 32)) (v_prenex_391 (_ BitVec 32)) (v_prenex_390 (_ BitVec 32))) (let ((.cse24 (select (store |c_#length| v_prenex_390 v_prenex_392) v_arrayElimCell_398))) (or (not (bvsle (_ bv0 32) v_prenex_393)) (= v_arrayElimCell_398 c_main_~x~0.base) (bvsle (bvadd v_prenex_391 (_ bv4 32)) .cse24) (bvsle (bvadd v_prenex_393 (_ bv4 32)) .cse24) (= v_arrayElimCell_398 v_prenex_390))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_564 (_ BitVec 32)) (v_prenex_655 (_ BitVec 32)) (v_prenex_654 (_ BitVec 32)) (v_prenex_653 (_ BitVec 32)) (v_prenex_652 (_ BitVec 32))) (let ((.cse25 (select (store |c_#length| v_prenex_655 v_prenex_653) v_arrayElimCell_564))) (or (bvsle (bvadd v_prenex_654 (_ bv4 32)) .cse25) (bvsle (bvadd v_prenex_652 (_ bv4 32)) .cse25) (not (bvsle (_ bv0 32) v_prenex_654)) (= v_arrayElimCell_564 v_prenex_655))))) (or .cse1 .cse0 (forall ((v_prenex_518 (_ BitVec 32)) (v_prenex_517 (_ BitVec 32)) (v_prenex_516 (_ BitVec 32)) (v_prenex_515 (_ BitVec 32)) (v_arrayElimCell_591 (_ BitVec 32))) (let ((.cse26 (select (store |c_#length| v_prenex_518 v_prenex_516) v_arrayElimCell_591))) (or (bvsle (bvadd v_prenex_517 (_ bv4 32)) .cse26) (bvsle (bvadd v_prenex_515 (_ bv4 32)) .cse26) (not (bvsle (_ bv0 32) v_prenex_517)) (= v_arrayElimCell_591 c_main_~x~0.base) (= v_arrayElimCell_591 v_prenex_518))))) (or (forall ((v_prenex_692 (_ BitVec 32)) (v_prenex_691 (_ BitVec 32)) (v_prenex_690 (_ BitVec 32)) (v_prenex_689 (_ BitVec 32)) (v_arrayElimCell_341 (_ BitVec 32)) (v_prenex_693 (_ BitVec 32))) (let ((.cse29 (store |c_#length| v_prenex_692 v_prenex_691))) (let ((.cse28 (select .cse29 v_arrayElimCell_341)) (.cse27 (bvadd v_prenex_690 (_ bv4 32)))) (or (not (bvsle (_ bv0 32) v_prenex_693)) (= v_arrayElimCell_341 c_main_~x~0.base) (= v_arrayElimCell_341 v_prenex_692) (bvsle .cse27 .cse28) (bvsle (bvadd v_prenex_693 (_ bv4 32)) .cse28) (= v_prenex_689 v_prenex_692) (bvsle .cse27 (select .cse29 v_prenex_689)))))) .cse1 .cse5) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_366 (_ BitVec 32)) (v_prenex_713 (_ BitVec 32)) (v_prenex_712 (_ BitVec 32)) (v_prenex_711 (_ BitVec 32)) (v_prenex_710 (_ BitVec 32))) (let ((.cse30 (select (store |c_#length| v_prenex_713 v_prenex_712) v_arrayElimCell_366))) (or (not (bvsle (_ bv0 32) v_prenex_710)) (bvsle (bvadd v_prenex_710 (_ bv4 32)) .cse30) (bvsle (bvadd v_prenex_711 (_ bv4 32)) .cse30) (= v_arrayElimCell_366 c_main_~x~0.base) (= v_arrayElimCell_366 v_prenex_713))))) (or .cse1 (forall ((v_prenex_373 (_ BitVec 32)) (v_arrayElimCell_449 (_ BitVec 32)) (v_prenex_376 (_ BitVec 32)) (v_prenex_375 (_ BitVec 32)) (v_prenex_374 (_ BitVec 32))) (let ((.cse31 (select (store |c_#length| v_prenex_373 v_prenex_375) v_arrayElimCell_449))) (or (= v_arrayElimCell_449 v_prenex_373) (bvsle (bvadd v_prenex_376 (_ bv4 32)) .cse31) (not (bvsle (_ bv0 32) v_prenex_376)) (= v_arrayElimCell_449 c_main_~x~0.base) (bvsle (bvadd v_prenex_374 (_ bv4 32)) .cse31))))) (or .cse1 (forall ((v_arrayElimCell_292 (_ BitVec 32)) (v_prenex_336 (_ BitVec 32)) (v_prenex_335 (_ BitVec 32)) (v_prenex_334 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_336)) (bvsle (bvadd v_prenex_336 (_ bv4 32)) (select (store |c_#length| v_prenex_334 v_prenex_335) v_arrayElimCell_292)) (= v_arrayElimCell_292 c_main_~x~0.base) (= v_arrayElimCell_292 v_prenex_334))) .cse5 .cse6) (or .cse1 .cse7 (forall ((v_prenex_549 (_ BitVec 32)) (v_prenex_548 (_ BitVec 32)) (v_prenex_547 (_ BitVec 32)) (v_prenex_546 (_ BitVec 32)) (v_arrayElimCell_570 (_ BitVec 32))) (let ((.cse32 (select (store |c_#length| v_prenex_549 v_prenex_547) v_arrayElimCell_570))) (or (= v_arrayElimCell_570 v_prenex_549) (bvsle (bvadd v_prenex_546 (_ bv4 32)) .cse32) (bvsle (bvadd v_prenex_548 (_ bv4 32)) .cse32) (not (bvsle (_ bv0 32) v_prenex_548)))))) (or .cse0 .cse5 (forall ((v_prenex_639 (_ BitVec 32)) (v_arrayElimCell_699 (_ BitVec 32)) (v_prenex_638 (_ BitVec 32)) (v_prenex_641 (_ BitVec 32)) (v_prenex_640 (_ BitVec 32))) (let ((.cse33 (select (store |c_#length| v_prenex_641 v_prenex_639) v_arrayElimCell_699))) (or (bvsle (bvadd v_prenex_640 (_ bv4 32)) .cse33) (= v_arrayElimCell_699 v_prenex_641) (= v_arrayElimCell_699 c_main_~x~0.base) (bvsle (bvadd v_prenex_638 (_ bv4 32)) .cse33) (not (bvsle (_ bv0 32) v_prenex_640)))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_477 (_ BitVec 32)) (v_prenex_649 (_ BitVec 32)) (v_prenex_651 (_ BitVec 32)) (v_prenex_650 (_ BitVec 32))) (or (= v_arrayElimCell_477 c_main_~x~0.base) (= v_arrayElimCell_477 v_prenex_651) (not (bvsle (_ bv0 32) v_prenex_650)) (bvsle (bvadd v_prenex_650 (_ bv4 32)) (select (store |c_#length| v_prenex_651 v_prenex_649) v_arrayElimCell_477))))) (or .cse1 .cse0 (forall ((v_prenex_317 (_ BitVec 32)) (v_prenex_316 (_ BitVec 32)) (v_arrayElimCell_405 (_ BitVec 32)) (v_prenex_315 (_ BitVec 32)) (v_prenex_314 (_ BitVec 32))) (let ((.cse34 (select (store |c_#length| v_prenex_314 v_prenex_316) v_arrayElimCell_405))) (or (not (bvsle (_ bv0 32) v_prenex_317)) (= v_arrayElimCell_405 c_main_~x~0.base) (= v_arrayElimCell_405 v_prenex_314) (bvsle (bvadd v_prenex_317 (_ bv4 32)) .cse34) (bvsle (bvadd v_prenex_315 (_ bv4 32)) .cse34))))) (or .cse1 .cse0 (forall ((v_prenex_419 (_ BitVec 32)) (v_prenex_418 (_ BitVec 32)) (v_prenex_148 (_ BitVec 32)) (v_prenex_422 (_ BitVec 32)) (v_prenex_421 (_ BitVec 32)) (v_prenex_420 (_ BitVec 32))) (let ((.cse39 (store |c_#length| v_prenex_422 v_prenex_420))) (let ((.cse37 (bvadd v_prenex_419 (_ bv4 32))) (.cse36 (select .cse39 v_prenex_148)) (.cse35 (bvadd v_prenex_421 (_ bv4 32))) (.cse38 (select .cse39 v_prenex_418))) (or (= v_prenex_148 c_main_~x~0.base) (bvsle .cse35 .cse36) (= v_prenex_148 v_prenex_422) (bvsle .cse37 .cse38) (= v_prenex_418 v_prenex_422) (bvsle .cse37 .cse36) (bvsle .cse35 .cse38) (not (bvsle (_ bv0 32) v_prenex_421))))))) (or (forall ((v_prenex_490 (_ BitVec 32)) (v_prenex_489 (_ BitVec 32)) (v_prenex_488 (_ BitVec 32)) (v_prenex_487 (_ BitVec 32)) (v_prenex_486 (_ BitVec 32)) (v_arrayElimCell_353 (_ BitVec 32))) (let ((.cse42 (store |c_#length| v_prenex_489 v_prenex_488))) (let ((.cse40 (select .cse42 v_arrayElimCell_353)) (.cse41 (bvadd v_prenex_487 (_ bv4 32)))) (or (bvsle (bvadd v_prenex_490 (_ bv4 32)) .cse40) (bvsle .cse41 .cse40) (= v_prenex_486 v_prenex_489) (not (bvsle (_ bv0 32) v_prenex_490)) (bvsle .cse41 (select .cse42 v_prenex_486)) (= v_arrayElimCell_353 c_main_~x~0.base) (= v_arrayElimCell_353 v_prenex_489))))) .cse1 .cse43 .cse5) (or .cse1 (forall ((v_arrayElimCell_420 (_ BitVec 32)) (v_prenex_700 (_ BitVec 32)) (v_prenex_699 (_ BitVec 32)) (v_prenex_698 (_ BitVec 32)) (v_prenex_697 (_ BitVec 32))) (let ((.cse44 (select (store |c_#length| v_prenex_700 v_prenex_699) v_arrayElimCell_420))) (or (= v_arrayElimCell_420 c_main_~x~0.base) (= v_arrayElimCell_420 v_prenex_700) (bvsle (bvadd v_prenex_697 (_ bv4 32)) .cse44) (bvsle (bvadd v_prenex_698 (_ bv4 32)) .cse44) (not (bvsle (_ bv0 32) v_prenex_697))))) .cse5 .cse6) (or (forall ((v_prenex_606 (_ BitVec 32)) (v_prenex_605 (_ BitVec 32)) (v_prenex_604 (_ BitVec 32)) (v_arrayElimCell_580 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_605 (_ bv4 32)) (select (store |c_#length| v_prenex_606 v_prenex_604) v_arrayElimCell_580)) (= v_arrayElimCell_580 v_prenex_606) (not (bvsle (_ bv0 32) v_prenex_605)))) .cse1 .cse5 .cse6) (or .cse1 (forall ((v_prenex_719 (_ BitVec 32)) (v_arrayElimCell_113 (_ BitVec 32)) (v_prenex_718 (_ BitVec 32)) (v_arrayElimCell_528 (_ BitVec 32)) (v_prenex_720 (_ BitVec 32))) (let ((.cse45 (select (store |c_#length| v_prenex_720 v_prenex_719) v_arrayElimCell_528))) (or (bvsle (bvadd v_arrayElimCell_113 (_ bv4 32)) .cse45) (bvsle (bvadd v_prenex_718 (_ bv4 32)) .cse45) (= v_arrayElimCell_528 v_prenex_720) (not (bvsle (_ bv0 32) v_arrayElimCell_113))))) .cse0) (or .cse1 .cse7 (forall ((v_arrayElimCell_439 (_ BitVec 32)) (v_prenex_458 (_ BitVec 32)) (v_prenex_457 (_ BitVec 32)) (v_prenex_456 (_ BitVec 32)) (v_prenex_455 (_ BitVec 32))) (let ((.cse46 (select (store |c_#length| v_prenex_457 v_prenex_456) v_arrayElimCell_439))) (or (not (bvsle (_ bv0 32) v_prenex_458)) (= v_arrayElimCell_439 v_prenex_457) (= v_arrayElimCell_439 c_main_~x~0.base) (bvsle (bvadd v_prenex_455 (_ bv4 32)) .cse46) (bvsle (bvadd v_prenex_458 (_ bv4 32)) .cse46))))) (or .cse10 .cse1 .cse7 (forall ((v_prenex_41 (_ BitVec 32)) (v_prenex_181 (_ BitVec 32)) (v_prenex_180 (_ BitVec 32)) (v_prenex_179 (_ BitVec 32)) (v_arrayElimCell_363 (_ BitVec 32))) (let ((.cse47 (select (store |c_#length| v_prenex_180 v_prenex_179) v_arrayElimCell_363))) (or (= v_arrayElimCell_363 v_prenex_180) (bvsle (bvadd v_prenex_181 (_ bv4 32)) .cse47) (= v_arrayElimCell_363 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_41)) (bvsle (bvadd v_prenex_41 (_ bv4 32)) .cse47))))) (or .cse1 .cse0 (forall ((v_prenex_494 (_ BitVec 32)) (v_prenex_493 (_ BitVec 32)) (v_prenex_52 (_ BitVec 32)) (v_arrayElimCell_559 (_ BitVec 32)) (v_prenex_495 (_ BitVec 32))) (let ((.cse48 (select (store |c_#length| v_prenex_495 v_prenex_494) v_arrayElimCell_559))) (or (bvsle (bvadd v_prenex_493 (_ bv4 32)) .cse48) (bvsle (bvadd v_prenex_52 (_ bv4 32)) .cse48) (= v_arrayElimCell_559 v_prenex_495) (not (bvsle (_ bv0 32) v_prenex_52)) (= v_arrayElimCell_559 c_main_~x~0.base))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_677 (_ BitVec 32)) (v_prenex_746 (_ BitVec 32)) (v_prenex_745 (_ BitVec 32)) (v_prenex_744 (_ BitVec 32)) (v_prenex_743 (_ BitVec 32))) (let ((.cse49 (select (store |c_#length| v_prenex_746 v_prenex_745) v_arrayElimCell_677))) (or (not (bvsle (_ bv0 32) v_prenex_743)) (= v_arrayElimCell_677 v_prenex_746) (bvsle (bvadd v_prenex_744 (_ bv4 32)) .cse49) (bvsle (bvadd v_prenex_743 (_ bv4 32)) .cse49) (= v_arrayElimCell_677 c_main_~x~0.base))))) (or .cse10 .cse1 .cse7 (forall ((v_arrayElimCell_666 (_ BitVec 32)) (v_prenex_228 (_ BitVec 32)) (v_prenex_227 (_ BitVec 32)) (v_prenex_226 (_ BitVec 32)) (v_prenex_225 (_ BitVec 32))) (let ((.cse50 (select (store |c_#length| v_prenex_225 v_prenex_228) v_arrayElimCell_666))) (or (bvsle (bvadd v_prenex_226 (_ bv4 32)) .cse50) (= v_arrayElimCell_666 v_prenex_225) (not (bvsle (_ bv0 32) v_prenex_226)) (= v_arrayElimCell_666 c_main_~x~0.base) (bvsle (bvadd v_prenex_227 (_ bv4 32)) .cse50))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_211 (_ BitVec 32)) (v_prenex_774 (_ BitVec 32)) (v_prenex_773 (_ BitVec 32)) (v_prenex_772 (_ BitVec 32)) (v_prenex_34 (_ BitVec 32))) (let ((.cse51 (select (store |c_#length| v_prenex_774 v_prenex_773) v_arrayElimCell_211))) (or (bvsle (bvadd v_prenex_772 (_ bv4 32)) .cse51) (not (bvsle (_ bv0 32) v_prenex_34)) (bvsle (bvadd v_prenex_34 (_ bv4 32)) .cse51) (= v_arrayElimCell_211 v_prenex_774) (= v_arrayElimCell_211 c_main_~x~0.base)))) .cse0) (or .cse1 .cse0 (forall ((v_prenex_252 (_ BitVec 32)) (v_prenex_251 (_ BitVec 32)) (v_prenex_75 (_ BitVec 32)) (v_arrayElimCell_461 (_ BitVec 32))) (or (= v_arrayElimCell_461 v_prenex_251) (not (bvsle (_ bv0 32) v_prenex_75)) (bvsle (bvadd v_prenex_75 (_ bv4 32)) (select (store |c_#length| v_prenex_251 v_prenex_252) v_arrayElimCell_461)) (= v_arrayElimCell_461 c_main_~x~0.base)))) (or .cse10 .cse1 .cse0 (forall ((v_prenex_728 (_ BitVec 32)) (v_prenex_727 (_ BitVec 32)) (v_arrayElimCell_633 (_ BitVec 32)) (v_prenex_726 (_ BitVec 32)) (v_prenex_725 (_ BitVec 32))) (let ((.cse52 (select (store |c_#length| v_prenex_728 v_prenex_727) v_arrayElimCell_633))) (or (bvsle (bvadd v_prenex_726 (_ bv4 32)) .cse52) (not (bvsle (_ bv0 32) v_prenex_725)) (= v_arrayElimCell_633 v_prenex_728) (bvsle (bvadd v_prenex_725 (_ bv4 32)) .cse52))))) (or .cse1 .cse7 (forall ((v_prenex_483 (_ BitVec 32)) (v_prenex_482 (_ BitVec 32)) (v_prenex_481 (_ BitVec 32)) (v_arrayElimCell_437 (_ BitVec 32)) (v_prenex_485 (_ BitVec 32)) (v_prenex_484 (_ BitVec 32))) (let ((.cse57 (store |c_#length| v_prenex_484 v_prenex_483))) (let ((.cse53 (bvadd v_prenex_485 (_ bv4 32))) (.cse55 (select .cse57 v_arrayElimCell_437)) (.cse56 (bvadd v_prenex_482 (_ bv4 32))) (.cse54 (select .cse57 v_prenex_481))) (or (= v_prenex_481 v_prenex_484) (= v_arrayElimCell_437 c_main_~x~0.base) (bvsle .cse53 .cse54) (not (bvsle (_ bv0 32) v_prenex_485)) (bvsle .cse53 .cse55) (bvsle .cse56 .cse55) (= v_arrayElimCell_437 v_prenex_484) (bvsle .cse56 .cse54)))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_245 (_ BitVec 32)) (v_prenex_666 (_ BitVec 32)) (v_prenex_665 (_ BitVec 32)) (v_prenex_664 (_ BitVec 32)) (v_prenex_66 (_ BitVec 32))) (let ((.cse58 (select (store |c_#length| v_prenex_666 v_prenex_665) v_arrayElimCell_245))) (or (not (bvsle (_ bv0 32) v_prenex_66)) (bvsle (bvadd v_prenex_66 (_ bv4 32)) .cse58) (= v_arrayElimCell_245 v_prenex_666) (bvsle (bvadd v_prenex_664 (_ bv4 32)) .cse58))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_146 (_ BitVec 32)) (v_prenex_519 (_ BitVec 32)) (v_arrayElimCell_309 (_ BitVec 32)) (v_prenex_520 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_146 (_ bv4 32)) (select (store |c_#length| v_prenex_520 v_prenex_519) v_arrayElimCell_309)) (= v_arrayElimCell_309 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_146)) (= v_arrayElimCell_309 v_prenex_520)))) (or .cse1 .cse5 (forall ((v_arrayElimCell_289 (_ BitVec 32)) (v_prenex_669 (_ BitVec 32)) (v_prenex_668 (_ BitVec 32)) (v_prenex_667 (_ BitVec 32))) (or (= v_arrayElimCell_289 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_668)) (bvsle (bvadd v_prenex_668 (_ bv4 32)) (select (store |c_#length| v_prenex_669 v_prenex_667) v_arrayElimCell_289)) (= v_arrayElimCell_289 v_prenex_669))) .cse6) (or .cse1 (forall ((v_prenex_329 (_ BitVec 32)) (v_arrayElimCell_285 (_ BitVec 32)) (v_prenex_330 (_ BitVec 32)) (v_prenex_36 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_36 (_ bv4 32)) (select (store |c_#length| v_prenex_329 v_prenex_330) v_arrayElimCell_285)) (= v_arrayElimCell_285 v_prenex_329) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_285) (not (bvsle (_ bv0 32) v_prenex_36)))) .cse43 .cse5) (or .cse1 (forall ((v_arrayElimCell_344 (_ BitVec 32)) (v_prenex_470 (_ BitVec 32)) (v_prenex_469 (_ BitVec 32)) (v_prenex_468 (_ BitVec 32)) (v_prenex_467 (_ BitVec 32))) (let ((.cse59 (select (store |c_#length| v_prenex_469 v_prenex_468) v_arrayElimCell_344))) (or (= v_arrayElimCell_344 c_main_~x~0.base) (bvsle (bvadd v_prenex_470 (_ bv4 32)) .cse59) (not (bvsle (_ bv0 32) v_prenex_470)) (bvsle (bvadd v_prenex_467 (_ bv4 32)) .cse59) (= v_arrayElimCell_344 v_prenex_469)))) .cse5 .cse6) (or .cse1 .cse5 .cse6 (forall ((v_arrayElimCell_577 (_ BitVec 32)) (v_prenex_437 (_ BitVec 32)) (v_prenex_436 (_ BitVec 32)) (v_prenex_35 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_35 (_ bv4 32)) (select (store |c_#length| v_prenex_437 v_prenex_436) v_arrayElimCell_577)) (= v_arrayElimCell_577 v_prenex_437) (not (bvsle (_ bv0 32) v_prenex_35))))) (or .cse1 (forall ((v_arrayElimCell_662 (_ BitVec 32)) (v_prenex_218 (_ BitVec 32)) (v_prenex_217 (_ BitVec 32)) (v_prenex_216 (_ BitVec 32)) (v_prenex_215 (_ BitVec 32))) (let ((.cse60 (select (store |c_#length| v_prenex_215 v_prenex_218) v_arrayElimCell_662))) (or (= v_arrayElimCell_662 c_main_~x~0.base) (= v_arrayElimCell_662 v_prenex_215) (not (bvsle (_ bv0 32) v_prenex_216)) (bvsle (bvadd v_prenex_217 (_ bv4 32)) .cse60) (bvsle (bvadd v_prenex_216 (_ bv4 32)) .cse60))))) (or .cse0 .cse5 (forall ((v_prenex_206 (_ BitVec 32)) (v_prenex_205 (_ BitVec 32)) (v_arrayElimCell_551 (_ BitVec 32)) (v_arrayElimCell_81 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_81 (_ bv4 32)) (select (store |c_#length| v_prenex_205 v_prenex_206) v_arrayElimCell_551)) (= v_arrayElimCell_551 v_prenex_205) (not (bvsle (_ bv0 32) v_arrayElimCell_81)) (= v_arrayElimCell_551 c_main_~x~0.base)))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_387 (_ BitVec 32)) (v_prenex_42 (_ BitVec 32)) (v_prenex_306 (_ BitVec 32)) (v_prenex_305 (_ BitVec 32)) (v_prenex_304 (_ BitVec 32))) (let ((.cse61 (select (store |c_#length| v_prenex_304 v_prenex_306) v_arrayElimCell_387))) (or (not (bvsle (_ bv0 32) v_prenex_42)) (= v_arrayElimCell_387 v_prenex_304) (bvsle (bvadd v_prenex_305 (_ bv4 32)) .cse61) (bvsle (bvadd v_prenex_42 (_ bv4 32)) .cse61))))) (or .cse1 .cse5 (forall ((v_prenex_769 (_ BitVec 32)) (v_prenex_768 (_ BitVec 32)) (v_prenex_771 (_ BitVec 32)) (v_prenex_100 (_ BitVec 32)) (v_prenex_770 (_ BitVec 32))) (let ((.cse62 (select (store |c_#length| v_prenex_771 v_prenex_770) v_prenex_100))) (or (bvsle (bvadd v_prenex_768 (_ bv4 32)) .cse62) (= v_prenex_100 c_main_~x~0.base) (bvsle (bvadd v_prenex_769 (_ bv4 32)) .cse62) (not (bvsle (_ bv0 32) v_prenex_768)) (= v_prenex_100 v_prenex_771)))) .cse6) (or .cse1 .cse0 (forall ((v_prenex_351 (_ BitVec 32)) (v_prenex_350 (_ BitVec 32)) (v_arrayElimCell_688 (_ BitVec 32)) (v_prenex_352 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_352)) (= v_arrayElimCell_688 v_prenex_350) (bvsle (bvadd v_prenex_352 (_ bv4 32)) (select (store |c_#length| v_prenex_350 v_prenex_351) v_arrayElimCell_688)) (= v_arrayElimCell_688 c_main_~x~0.base)))) (or .cse10 .cse1 (forall ((v_arrayElimCell_480 (_ BitVec 32)) (v_prenex_663 (_ BitVec 32)) (v_prenex_662 (_ BitVec 32)) (v_prenex_661 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_662 (_ bv4 32)) (select (store |c_#length| v_prenex_663 v_prenex_661) v_arrayElimCell_480)) (not (bvsle (_ bv0 32) v_prenex_662)) (= v_arrayElimCell_480 v_prenex_663) (= v_arrayElimCell_480 c_main_~x~0.base))) .cse0) (or .cse1 (forall ((v_arrayElimCell_404 (_ BitVec 32)) (v_prenex_313 (_ BitVec 32)) (v_prenex_312 (_ BitVec 32)) (v_prenex_311 (_ BitVec 32)) (v_prenex_310 (_ BitVec 32))) (let ((.cse63 (select (store |c_#length| v_prenex_310 v_prenex_312) v_arrayElimCell_404))) (or (= v_arrayElimCell_404 v_prenex_310) (not (bvsle (_ bv0 32) v_prenex_313)) (bvsle (bvadd v_prenex_313 (_ bv4 32)) .cse63) (= v_arrayElimCell_404 c_main_~x~0.base) (bvsle (bvadd v_prenex_311 (_ bv4 32)) .cse63))))) (or .cse1 (forall ((v_arrayElimCell_219 (_ BitVec 32)) (v_prenex_633 (_ BitVec 32)) (v_prenex_632 (_ BitVec 32)) (v_prenex_631 (_ BitVec 32)) (v_arrayElimCell_132 (_ BitVec 32))) (let ((.cse64 (select (store |c_#length| v_prenex_633 v_prenex_632) v_arrayElimCell_219))) (or (bvsle (bvadd v_arrayElimCell_132 (_ bv4 32)) .cse64) (not (bvsle (_ bv0 32) v_arrayElimCell_132)) (= v_arrayElimCell_219 v_prenex_633) (bvsle (bvadd v_prenex_631 (_ bv4 32)) .cse64)))) .cse5 .cse6) (or .cse10 .cse1 .cse7 (forall ((v_prenex_283 (_ BitVec 32)) (v_prenex_282 (_ BitVec 32)) (v_prenex_281 (_ BitVec 32)) (v_prenex_280 (_ BitVec 32)) (v_arrayElimCell_441 (_ BitVec 32))) (let ((.cse65 (select (store |c_#length| v_prenex_280 v_prenex_282) v_arrayElimCell_441))) (or (bvsle (bvadd v_prenex_281 (_ bv4 32)) .cse65) (= v_arrayElimCell_441 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_283)) (bvsle (bvadd v_prenex_283 (_ bv4 32)) .cse65) (= v_arrayElimCell_441 v_prenex_280))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_657 (_ BitVec 32)) (v_prenex_279 (_ BitVec 32)) (v_prenex_278 (_ BitVec 32)) (v_prenex_277 (_ BitVec 32)) (v_prenex_276 (_ BitVec 32))) (let ((.cse66 (select (store |c_#length| v_prenex_276 v_prenex_279) v_arrayElimCell_657))) (or (bvsle (bvadd v_prenex_278 (_ bv4 32)) .cse66) (= v_arrayElimCell_657 v_prenex_276) (= v_arrayElimCell_657 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_277)) (bvsle (bvadd v_prenex_277 (_ bv4 32)) .cse66))))) (or .cse1 .cse0 (forall ((v_prenex_285 (_ BitVec 32)) (v_prenex_284 (_ BitVec 32)) (v_prenex_287 (_ BitVec 32)) (v_prenex_286 (_ BitVec 32)) (v_arrayElimCell_661 (_ BitVec 32))) (let ((.cse67 (select (store |c_#length| v_prenex_284 v_prenex_286) v_arrayElimCell_661))) (or (bvsle (bvadd v_prenex_285 (_ bv4 32)) .cse67) (bvsle (bvadd v_prenex_287 (_ bv4 32)) .cse67) (not (bvsle (_ bv0 32) v_prenex_287)) (= v_arrayElimCell_661 c_main_~x~0.base) (= v_arrayElimCell_661 v_prenex_284))))) (or .cse10 (forall ((v_subst_2 (_ BitVec 32)) (v_prenex_48 (_ BitVec 32)) (v_arrayElimCell_627 (_ BitVec 32)) (|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (let ((.cse68 (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) v_arrayElimCell_627))) (or (bvsle (bvadd v_subst_2 (_ bv4 32)) .cse68) (bvsle (bvadd v_prenex_48 (_ bv4 32)) .cse68) (not (bvsle (_ bv0 32) v_prenex_48)) (= v_arrayElimCell_627 v_prenex_2)))) .cse1) (or .cse1 (forall ((v_prenex_503 (_ BitVec 32)) (v_prenex_502 (_ BitVec 32)) (v_prenex_501 (_ BitVec 32)) (v_prenex_149 (_ BitVec 32)) (v_prenex_500 (_ BitVec 32))) (let ((.cse69 (select (store |c_#length| v_prenex_503 v_prenex_501) v_prenex_149))) (or (= v_prenex_149 v_prenex_503) (= v_prenex_149 c_main_~x~0.base) (bvsle (bvadd v_prenex_502 (_ bv4 32)) .cse69) (bvsle (bvadd v_prenex_500 (_ bv4 32)) .cse69) (not (bvsle (_ bv0 32) v_prenex_502))))) .cse0) (or .cse1 (forall ((v_prenex_715 (_ BitVec 32)) (v_arrayElimCell_622 (_ BitVec 32)) (v_prenex_714 (_ BitVec 32)) (v_prenex_67 (_ BitVec 32))) (or (= v_arrayElimCell_622 c_main_~x~0.base) (= v_arrayElimCell_622 v_prenex_715) (not (bvsle (_ bv0 32) v_prenex_67)) (bvsle (bvadd v_prenex_67 (_ bv4 32)) (select (store |c_#length| v_prenex_715 v_prenex_714) v_arrayElimCell_622)))) .cse0) (or .cse1 .cse0 (forall ((v_prenex_51 (_ BitVec 32)) (v_prenex_417 (_ BitVec 32)) (v_arrayElimCell_568 (_ BitVec 32)) (v_prenex_416 (_ BitVec 32)) (v_prenex_415 (_ BitVec 32))) (let ((.cse70 (select (store |c_#length| v_prenex_417 v_prenex_416) v_arrayElimCell_568))) (or (= v_arrayElimCell_568 v_prenex_417) (bvsle (bvadd v_prenex_51 (_ bv4 32)) .cse70) (bvsle (bvadd v_prenex_415 (_ bv4 32)) .cse70) (not (bvsle (_ bv0 32) v_prenex_51)))))) (or .cse10 (forall ((v_arrayElimCell_457 (_ BitVec 32)) (v_prenex_435 (_ BitVec 32)) (v_prenex_434 (_ BitVec 32)) (v_prenex_11 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_11)) (= v_arrayElimCell_457 v_prenex_435) (= v_arrayElimCell_457 c_main_~x~0.base) (bvsle (bvadd v_prenex_11 (_ bv4 32)) (select (store |c_#length| v_prenex_435 v_prenex_434) v_arrayElimCell_457)))) .cse0) (or .cse10 .cse7 .cse8 .cse71) (or .cse10 .cse7 .cse8 .cse9 (forall ((v_prenex_186 (_ BitVec 32)) (v_prenex_185 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_185 v_prenex_186) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_185)))) (or .cse5 (forall ((v_prenex_300 (_ BitVec 32)) (v_prenex_299 (_ BitVec 32)) (v_prenex_298 (_ BitVec 32)) (v_prenex_297 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_299 (_ bv4 32)) (select (store |c_#length| v_prenex_297 v_prenex_300) v_prenex_298)) (not (bvsle (_ bv0 32) v_prenex_299)) (= v_prenex_298 v_prenex_297)))) (or .cse1 (forall ((v_prenex_545 (_ BitVec 32)) (v_prenex_544 (_ BitVec 32)) (v_prenex_543 (_ BitVec 32)) (v_arrayElimCell_581 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_544)) (= v_arrayElimCell_581 v_prenex_545) (bvsle (bvadd v_prenex_544 (_ bv4 32)) (select (store |c_#length| v_prenex_545 v_prenex_543) v_arrayElimCell_581)))) .cse5) (or .cse10 (forall ((v_arrayElimCell_543 (_ BitVec 32)) (v_prenex_212 (_ BitVec 32)) (v_prenex_211 (_ BitVec 32)) (v_prenex_210 (_ BitVec 32)) (v_prenex_13 (_ BitVec 32))) (let ((.cse72 (select (store |c_#length| v_prenex_210 v_prenex_212) v_arrayElimCell_543))) (or (bvsle (bvadd v_prenex_13 (_ bv4 32)) .cse72) (bvsle (bvadd v_prenex_211 (_ bv4 32)) .cse72) (= v_arrayElimCell_543 v_prenex_210) (= v_arrayElimCell_543 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_13))))) .cse0) (or .cse1 .cse5 (forall ((v_prenex_724 (_ BitVec 32)) (v_prenex_723 (_ BitVec 32)) (v_prenex_722 (_ BitVec 32)) (v_prenex_721 (_ BitVec 32)) (v_prenex_147 (_ BitVec 32))) (let ((.cse73 (select (store |c_#length| v_prenex_724 v_prenex_723) v_prenex_147))) (or (bvsle (bvadd v_prenex_721 (_ bv4 32)) .cse73) (= v_prenex_147 v_prenex_724) (not (bvsle (_ bv0 32) v_prenex_721)) (= v_prenex_147 c_main_~x~0.base) (bvsle (bvadd v_prenex_722 (_ bv4 32)) .cse73)))) .cse6) (or .cse10 .cse1 (forall ((v_arrayElimCell_644 (_ BitVec 32)) (v_prenex_319 (_ BitVec 32)) (v_prenex_318 (_ BitVec 32)) (v_prenex_320 (_ BitVec 32)) (v_prenex_47 (_ BitVec 32))) (let ((.cse74 (select (store |c_#length| v_prenex_318 v_prenex_320) v_arrayElimCell_644))) (or (= v_arrayElimCell_644 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_47)) (= v_arrayElimCell_644 v_prenex_318) (bvsle (bvadd v_prenex_47 (_ bv4 32)) .cse74) (bvsle (bvadd v_prenex_319 (_ bv4 32)) .cse74)))) .cse0) (or .cse1 (forall ((v_prenex_619 (_ BitVec 32)) (v_arrayElimCell_190 (_ BitVec 32)) (v_prenex_622 (_ BitVec 32)) (v_prenex_621 (_ BitVec 32)) (v_prenex_620 (_ BitVec 32))) (let ((.cse75 (select (store |c_#length| v_prenex_622 v_prenex_620) v_arrayElimCell_190))) (or (bvsle (bvadd v_prenex_621 (_ bv4 32)) .cse75) (= v_arrayElimCell_190 v_prenex_622) (bvsle (bvadd v_prenex_619 (_ bv4 32)) .cse75) (not (bvsle (_ bv0 32) v_prenex_621)))))) (or .cse1 (forall ((v_arrayElimCell_150 (_ BitVec 32)) (v_prenex_202 (_ BitVec 32)) (v_arrayElimCell_382 (_ BitVec 32)) (v_prenex_201 (_ BitVec 32))) (or (= v_arrayElimCell_382 v_prenex_201) (not (bvsle (_ bv0 32) v_arrayElimCell_150)) (= v_arrayElimCell_382 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_150 (_ bv4 32)) (select (store |c_#length| v_prenex_201 v_prenex_202) v_arrayElimCell_382))))) (or .cse1 (forall ((v_arrayElimCell_533 (_ BitVec 32)) (v_prenex_191 (_ BitVec 32)) (v_prenex_190 (_ BitVec 32)) (v_prenex_69 (_ BitVec 32))) (or (= v_arrayElimCell_533 v_prenex_190) (bvsle (bvadd v_prenex_69 (_ bv4 32)) (select (store |c_#length| v_prenex_190 v_prenex_191) v_arrayElimCell_533)) (= v_arrayElimCell_533 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_69)))) .cse0) (or .cse1 .cse7 (forall ((v_prenex_162 (_ BitVec 32)) (v_prenex_161 (_ BitVec 32)) (v_arrayElimCell_610 (_ BitVec 32)) (v_prenex_39 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_39 (_ bv4 32)) (select (store |c_#length| v_prenex_162 v_prenex_161) v_arrayElimCell_610)) (not (bvsle (_ bv0 32) v_prenex_39)) (= v_arrayElimCell_610 v_prenex_162)))) (or .cse10 .cse1 .cse0 (forall ((v_prenex_529 (_ BitVec 32)) (v_prenex_528 (_ BitVec 32)) (v_prenex_527 (_ BitVec 32)) (v_arrayElimCell_628 (_ BitVec 32)) (v_prenex_530 (_ BitVec 32))) (let ((.cse76 (select (store |c_#length| v_prenex_530 v_prenex_528) v_arrayElimCell_628))) (or (bvsle (bvadd v_prenex_527 (_ bv4 32)) .cse76) (= v_arrayElimCell_628 v_prenex_530) (bvsle (bvadd v_prenex_529 (_ bv4 32)) .cse76) (not (bvsle (_ bv0 32) v_prenex_529)))))) (or .cse1 .cse43 .cse5 (forall ((v_arrayElimCell_355 (_ BitVec 32)) (v_prenex_345 (_ BitVec 32)) (v_prenex_344 (_ BitVec 32)) (v_prenex_343 (_ BitVec 32)) (v_prenex_342 (_ BitVec 32))) (let ((.cse77 (select (store |c_#length| v_prenex_342 v_prenex_344) v_arrayElimCell_355))) (or (bvsle (bvadd v_prenex_343 (_ bv4 32)) .cse77) (not (bvsle (_ bv0 32) v_prenex_345)) (bvsle (bvadd v_prenex_345 (_ bv4 32)) .cse77) (= v_arrayElimCell_355 c_main_~x~0.base) (= v_arrayElimCell_355 v_prenex_342))))) (or .cse1 .cse7 (forall ((v_arrayElimCell_379 (_ BitVec 32)) (v_prenex_764 (_ BitVec 32)) (v_prenex_763 (_ BitVec 32)) (v_prenex_762 (_ BitVec 32))) (or (= v_arrayElimCell_379 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_762)) (bvsle (bvadd v_prenex_762 (_ bv4 32)) (select (store |c_#length| v_prenex_764 v_prenex_763) v_arrayElimCell_379)) (= v_arrayElimCell_379 v_prenex_764)))) (or .cse0 .cse5 (forall ((v_prenex_160 (_ BitVec 32)) (v_prenex_534 (_ BitVec 32)) (v_prenex_533 (_ BitVec 32)) (v_prenex_532 (_ BitVec 32)) (v_prenex_531 (_ BitVec 32)) (v_prenex_14 (_ BitVec 32))) (let ((.cse80 (store |c_#length| v_prenex_534 v_prenex_533))) (let ((.cse79 (bvadd v_prenex_532 (_ bv4 32))) (.cse78 (select .cse80 v_prenex_160))) (or (bvsle (bvadd v_prenex_14 (_ bv4 32)) .cse78) (bvsle .cse79 (select .cse80 v_prenex_531)) (= v_prenex_160 c_main_~x~0.base) (bvsle .cse79 .cse78) (not (bvsle (_ bv0 32) v_prenex_14)) (= v_prenex_531 v_prenex_534) (= v_prenex_160 v_prenex_534)))))) (or (forall ((v_prenex_219 (_ BitVec 32)) (v_prenex_59 (_ BitVec 32)) (v_arrayElimCell_319 (_ BitVec 32)) (v_prenex_221 (_ BitVec 32)) (v_prenex_220 (_ BitVec 32))) (let ((.cse81 (select (store |c_#length| v_prenex_219 v_prenex_221) v_arrayElimCell_319))) (or (bvsle (bvadd v_prenex_59 (_ bv4 32)) .cse81) (bvsle (bvadd v_prenex_220 (_ bv4 32)) .cse81) (not (bvsle (_ bv0 32) v_prenex_59)) (= v_arrayElimCell_319 c_main_~x~0.base) (= v_arrayElimCell_319 v_prenex_219)))) .cse1 .cse5 .cse6) (or .cse1 (forall ((v_arrayElimCell_429 (_ BitVec 32)) (v_prenex_566 (_ BitVec 32)) (v_prenex_565 (_ BitVec 32)) (v_prenex_564 (_ BitVec 32)) (v_prenex_563 (_ BitVec 32)) (v_prenex_562 (_ BitVec 32))) (let ((.cse86 (store |c_#length| v_prenex_565 v_prenex_564))) (let ((.cse83 (select .cse86 v_arrayElimCell_429)) (.cse84 (bvadd v_prenex_563 (_ bv4 32))) (.cse82 (bvadd v_prenex_566 (_ bv4 32))) (.cse85 (select .cse86 v_prenex_562))) (or (= v_arrayElimCell_429 v_prenex_565) (not (bvsle (_ bv0 32) v_prenex_566)) (= v_prenex_562 v_prenex_565) (bvsle .cse82 .cse83) (bvsle .cse84 .cse83) (bvsle .cse84 .cse85) (bvsle .cse82 .cse85) (= v_arrayElimCell_429 c_main_~x~0.base))))) .cse0) (or (forall ((v_prenex_65 (_ BitVec 32)) (v_arrayElimCell_469 (_ BitVec 32)) (v_prenex_200 (_ BitVec 32)) (v_prenex_199 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_65)) (bvsle (bvadd v_prenex_65 (_ bv4 32)) (select (store |c_#length| v_prenex_199 v_prenex_200) v_arrayElimCell_469)) (= v_arrayElimCell_469 v_prenex_199))) .cse1 .cse0) (or .cse1 .cse7 (forall ((v_arrayElimCell_685 (_ BitVec 32)) (v_prenex_171 (_ BitVec 32)) (v_prenex_170 (_ BitVec 32)) (v_prenex_56 (_ BitVec 32))) (or (= v_arrayElimCell_685 v_prenex_171) (bvsle (bvadd v_prenex_56 (_ bv4 32)) (select (store |c_#length| v_prenex_171 v_prenex_170) v_arrayElimCell_685)) (not (bvsle (_ bv0 32) v_prenex_56)) (= v_arrayElimCell_685 c_main_~x~0.base)))) (or .cse1 .cse0 (forall ((v_prenex_395 (_ BitVec 32)) (v_prenex_394 (_ BitVec 32)) (v_arrayElimCell_377 (_ BitVec 32)) (v_prenex_396 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_396 (_ bv4 32)) (select (store |c_#length| v_prenex_394 v_prenex_395) v_arrayElimCell_377)) (= v_arrayElimCell_377 v_prenex_394) (= v_arrayElimCell_377 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_396))))) (or .cse1 (forall ((v_prenex_739 (_ BitVec 32)) (v_prenex_742 (_ BitVec 32)) (v_arrayElimCell_590 (_ BitVec 32)) (v_prenex_741 (_ BitVec 32)) (v_prenex_740 (_ BitVec 32))) (let ((.cse87 (select (store |c_#length| v_prenex_742 v_prenex_741) v_arrayElimCell_590))) (or (bvsle (bvadd v_prenex_740 (_ bv4 32)) .cse87) (= v_arrayElimCell_590 c_main_~x~0.base) (= v_arrayElimCell_590 v_prenex_742) (not (bvsle (_ bv0 32) v_prenex_739)) (bvsle (bvadd v_prenex_739 (_ bv4 32)) .cse87))))) (or .cse1 .cse5 (forall ((v_arrayElimCell_345 (_ BitVec 32)) (v_prenex_414 (_ BitVec 32)) (v_prenex_413 (_ BitVec 32)) (v_prenex_412 (_ BitVec 32)) (v_prenex_411 (_ BitVec 32))) (let ((.cse88 (select (store |c_#length| v_prenex_411 v_prenex_413) v_arrayElimCell_345))) (or (= v_arrayElimCell_345 v_prenex_411) (bvsle (bvadd v_prenex_412 (_ bv4 32)) .cse88) (not (bvsle (_ bv0 32) v_prenex_414)) (bvsle (bvadd v_prenex_414 (_ bv4 32)) .cse88) (= v_arrayElimCell_345 c_main_~x~0.base))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_585 (_ BitVec 32)) (v_prenex_526 (_ BitVec 32)) (v_prenex_525 (_ BitVec 32)) (v_prenex_49 (_ BitVec 32))) (or (= v_arrayElimCell_585 v_prenex_526) (bvsle (bvadd v_prenex_49 (_ bv4 32)) (select (store |c_#length| v_prenex_526 v_prenex_525) v_arrayElimCell_585)) (not (bvsle (_ bv0 32) v_prenex_49))))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_432 (_ BitVec 32)) (v_prenex_291 (_ BitVec 32)) (v_prenex_290 (_ BitVec 32)) (v_prenex_289 (_ BitVec 32)) (v_prenex_288 (_ BitVec 32))) (let ((.cse89 (select (store |c_#length| v_prenex_288 v_prenex_290) v_arrayElimCell_432))) (or (not (bvsle (_ bv0 32) v_prenex_291)) (bvsle (bvadd v_prenex_289 (_ bv4 32)) .cse89) (= v_arrayElimCell_432 v_prenex_288) (= v_arrayElimCell_432 c_main_~x~0.base) (bvsle (bvadd v_prenex_291 (_ bv4 32)) .cse89))))) (or .cse0 (forall ((v_prenex_387 (_ BitVec 32)) (v_arrayElimCell_494 (_ BitVec 32)) (v_prenex_386 (_ BitVec 32)) (v_prenex_385 (_ BitVec 32)) (v_prenex_25 (_ BitVec 32))) (let ((.cse90 (select (store |c_#length| v_prenex_385 v_prenex_387) v_arrayElimCell_494))) (or (bvsle (bvadd v_prenex_25 (_ bv4 32)) .cse90) (not (bvsle (_ bv0 32) v_prenex_25)) (= v_arrayElimCell_494 c_main_~x~0.base) (bvsle (bvadd v_prenex_386 (_ bv4 32)) .cse90) (= v_arrayElimCell_494 v_prenex_385))))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_465 (_ BitVec 32)) (v_prenex_44 (_ BitVec 32)) (v_prenex_452 (_ BitVec 32)) (v_prenex_451 (_ BitVec 32))) (or (= v_arrayElimCell_465 v_prenex_452) (bvsle (bvadd v_prenex_44 (_ bv4 32)) (select (store |c_#length| v_prenex_452 v_prenex_451) v_arrayElimCell_465)) (= v_arrayElimCell_465 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_44))))) (or .cse1 .cse43 .cse5 (forall ((v_arrayElimCell_257 (_ BitVec 32)) (v_prenex_759 (_ BitVec 32)) (v_prenex_758 (_ BitVec 32)) (v_prenex_761 (_ BitVec 32)) (v_prenex_760 (_ BitVec 32))) (let ((.cse91 (select (store |c_#length| v_prenex_761 v_prenex_760) v_arrayElimCell_257))) (or (bvsle (bvadd v_prenex_759 (_ bv4 32)) .cse91) (= v_arrayElimCell_257 v_prenex_761) (= v_arrayElimCell_257 c_main_~x~0.base) (bvsle (bvadd v_prenex_758 (_ bv4 32)) .cse91) (not (bvsle (_ bv0 32) v_prenex_758)))))) (or .cse1 (forall ((v_prenex_450 (_ BitVec 32)) (v_arrayElimCell_348 (_ BitVec 32)) (v_prenex_449 (_ BitVec 32)) (v_prenex_448 (_ BitVec 32)) (v_prenex_447 (_ BitVec 32))) (let ((.cse92 (select (store |c_#length| v_prenex_449 v_prenex_448) v_arrayElimCell_348))) (or (not (bvsle (_ bv0 32) v_prenex_450)) (bvsle (bvadd v_prenex_447 (_ bv4 32)) .cse92) (bvsle (bvadd v_prenex_450 (_ bv4 32)) .cse92) (= v_arrayElimCell_348 c_main_~x~0.base) (= v_arrayElimCell_348 v_prenex_449)))) .cse5 .cse6) (or .cse0 (forall ((v_prenex_426 (_ BitVec 32)) (v_prenex_425 (_ BitVec 32)) (v_prenex_424 (_ BitVec 32)) (v_prenex_423 (_ BitVec 32)) (v_prenex_18 (_ BitVec 32)) (v_arrayElimCell_241 (_ BitVec 32))) (let ((.cse93 (store |c_#length| v_prenex_426 v_prenex_425))) (or (not (bvsle (_ bv0 32) v_prenex_18)) (= v_prenex_423 v_prenex_426) (bvsle (bvadd v_prenex_424 (_ bv4 32)) (select .cse93 v_prenex_423)) (bvsle (bvadd v_prenex_18 (_ bv4 32)) (select .cse93 v_arrayElimCell_241)) (= v_arrayElimCell_241 v_prenex_426) (= v_arrayElimCell_241 c_main_~x~0.base)))) .cse5) (or .cse1 (forall ((v_arrayElimCell_136 (_ BitVec 32)) (v_arrayElimCell_502 (_ BitVec 32)) (v_prenex_586 (_ BitVec 32)) (v_prenex_585 (_ BitVec 32))) (or (= v_arrayElimCell_502 v_prenex_586) (= v_arrayElimCell_502 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_136)) (bvsle (bvadd v_arrayElimCell_136 (_ bv4 32)) (select (store |c_#length| v_prenex_586 v_prenex_585) v_arrayElimCell_502)))) .cse5 .cse6) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_658 (_ BitVec 32)) (v_prenex_326 (_ BitVec 32)) (v_prenex_325 (_ BitVec 32)) (v_prenex_324 (_ BitVec 32)) (v_prenex_323 (_ BitVec 32))) (let ((.cse94 (select (store |c_#length| v_prenex_323 v_prenex_325) v_arrayElimCell_658))) (or (bvsle (bvadd v_prenex_326 (_ bv4 32)) .cse94) (= v_arrayElimCell_658 v_prenex_323) (= v_arrayElimCell_658 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_326)) (bvsle (bvadd v_prenex_324 (_ bv4 32)) .cse94))))) (or .cse0 (forall ((v_prenex_626 (_ BitVec 32)) (v_prenex_625 (_ BitVec 32)) (v_prenex_624 (_ BitVec 32)) (v_prenex_623 (_ BitVec 32)) (v_prenex_159 (_ BitVec 32))) (let ((.cse95 (select (store |c_#length| v_prenex_625 v_prenex_624) v_prenex_159))) (or (bvsle (bvadd v_prenex_623 (_ bv4 32)) .cse95) (= v_prenex_159 v_prenex_625) (bvsle (bvadd v_prenex_626 (_ bv4 32)) .cse95) (= v_prenex_159 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_626)))))) (or .cse10 .cse1 (forall ((v_prenex_461 (_ BitVec 32)) (v_prenex_460 (_ BitVec 32)) (v_prenex_459 (_ BitVec 32)) (v_arrayElimCell_370 (_ BitVec 32)) (v_prenex_462 (_ BitVec 32))) (let ((.cse96 (select (store |c_#length| v_prenex_462 v_prenex_460) v_arrayElimCell_370))) (or (bvsle (bvadd v_prenex_461 (_ bv4 32)) .cse96) (bvsle (bvadd v_prenex_459 (_ bv4 32)) .cse96) (not (bvsle (_ bv0 32) v_prenex_461)) (= v_arrayElimCell_370 c_main_~x~0.base) (= v_arrayElimCell_370 v_prenex_462)))) .cse0) (or .cse10 .cse0 (forall ((v_prenex_142 (_ BitVec 32)) (v_prenex_681 (_ BitVec 32)) (v_prenex_680 (_ BitVec 32)) (v_prenex_679 (_ BitVec 32)) (v_prenex_682 (_ BitVec 32))) (let ((.cse97 (select (store |c_#length| v_prenex_682 v_prenex_680) v_prenex_142))) (or (= v_prenex_142 c_main_~x~0.base) (bvsle (bvadd v_prenex_679 (_ bv4 32)) .cse97) (bvsle (bvadd v_prenex_681 (_ bv4 32)) .cse97) (not (bvsle (_ bv0 32) v_prenex_681)) (= v_prenex_142 v_prenex_682))))) (or .cse1 (forall ((v_prenex_241 (_ BitVec 32)) (v_prenex_240 (_ BitVec 32)) (v_arrayElimCell_537 (_ BitVec 32)) (v_prenex_242 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_242)) (bvsle (bvadd v_prenex_242 (_ bv4 32)) (select (store |c_#length| v_prenex_240 v_prenex_241) v_arrayElimCell_537)) (= v_arrayElimCell_537 v_prenex_240) (= v_arrayElimCell_537 c_main_~x~0.base)))) (or .cse0 .cse5 (forall ((v_prenex_87 (_ BitVec 32)) (v_prenex_539 (_ BitVec 32)) (v_prenex_538 (_ BitVec 32)) (v_prenex_542 (_ BitVec 32)) (v_prenex_541 (_ BitVec 32)) (v_prenex_540 (_ BitVec 32))) (let ((.cse99 (store |c_#length| v_prenex_542 v_prenex_540))) (let ((.cse98 (bvadd v_prenex_539 (_ bv4 32))) (.cse100 (select .cse99 v_prenex_87))) (or (= v_prenex_87 v_prenex_542) (bvsle .cse98 (select .cse99 v_prenex_538)) (= v_prenex_87 c_main_~x~0.base) (bvsle (bvadd v_prenex_541 (_ bv4 32)) .cse100) (bvsle .cse98 .cse100) (not (bvsle (_ bv0 32) v_prenex_541)) (= v_prenex_538 v_prenex_542)))))) (or .cse1 .cse5 (forall ((v_arrayElimCell_225 (_ BitVec 32)) (v_prenex_514 (_ BitVec 32)) (v_prenex_513 (_ BitVec 32)) (v_prenex_512 (_ BitVec 32)) (v_prenex_511 (_ BitVec 32))) (let ((.cse101 (select (store |c_#length| v_prenex_514 v_prenex_512) v_arrayElimCell_225))) (or (= v_arrayElimCell_225 v_prenex_514) (bvsle (bvadd v_prenex_511 (_ bv4 32)) .cse101) (not (bvsle (_ bv0 32) v_prenex_513)) (bvsle (bvadd v_prenex_513 (_ bv4 32)) .cse101))))) (or (forall ((v_prenex_599 (_ BitVec 32)) (v_prenex_598 (_ BitVec 32)) (v_prenex_597 (_ BitVec 32)) (v_prenex_596 (_ BitVec 32)) (v_arrayElimCell_692 (_ BitVec 32)) (v_prenex_595 (_ BitVec 32))) (let ((.cse106 (store |c_#length| v_prenex_598 v_prenex_597))) (let ((.cse102 (bvadd v_prenex_596 (_ bv4 32))) (.cse104 (select .cse106 v_arrayElimCell_692)) (.cse105 (bvadd v_prenex_599 (_ bv4 32))) (.cse103 (select .cse106 v_prenex_595))) (or (bvsle .cse102 .cse103) (bvsle .cse102 .cse104) (bvsle .cse105 .cse104) (bvsle .cse105 .cse103) (= v_arrayElimCell_692 c_main_~x~0.base) (= v_prenex_595 v_prenex_598) (not (bvsle (_ bv0 32) v_prenex_599)) (= v_arrayElimCell_692 v_prenex_598))))) .cse0) (or .cse1 .cse0 (forall ((v_prenex_439 (_ BitVec 32)) (v_prenex_438 (_ BitVec 32)) (v_prenex_107 (_ BitVec 32)) (v_prenex_442 (_ BitVec 32)) (v_prenex_441 (_ BitVec 32)) (v_prenex_440 (_ BitVec 32))) (let ((.cse111 (store |c_#length| v_prenex_441 v_prenex_440))) (let ((.cse107 (bvadd v_prenex_439 (_ bv4 32))) (.cse108 (select .cse111 v_prenex_107)) (.cse110 (bvadd v_prenex_442 (_ bv4 32))) (.cse109 (select .cse111 v_prenex_438))) (or (bvsle .cse107 .cse108) (bvsle .cse107 .cse109) (not (bvsle (_ bv0 32) v_prenex_442)) (= v_prenex_107 c_main_~x~0.base) (= v_prenex_438 v_prenex_441) (= v_prenex_107 v_prenex_441) (bvsle .cse110 .cse108) (bvsle .cse110 .cse109)))))) (or .cse1 (forall ((v_arrayElimCell_435 (_ BitVec 32)) (v_prenex_400 (_ BitVec 32)) (v_prenex_399 (_ BitVec 32)) (v_prenex_398 (_ BitVec 32)) (v_prenex_397 (_ BitVec 32))) (let ((.cse112 (select (store |c_#length| v_prenex_397 v_prenex_399) v_arrayElimCell_435))) (or (not (bvsle (_ bv0 32) v_prenex_400)) (= v_arrayElimCell_435 v_prenex_397) (bvsle (bvadd v_prenex_400 (_ bv4 32)) .cse112) (= v_arrayElimCell_435 c_main_~x~0.base) (bvsle (bvadd v_prenex_398 (_ bv4 32)) .cse112)))) .cse0) (or .cse1 (forall ((v_prenex_659 (_ BitVec 32)) (v_prenex_658 (_ BitVec 32)) (v_prenex_657 (_ BitVec 32)) (v_prenex_656 (_ BitVec 32)) (v_arrayElimCell_340 (_ BitVec 32)) (v_prenex_660 (_ BitVec 32))) (let ((.cse115 (store |c_#length| v_prenex_659 v_prenex_658))) (let ((.cse113 (bvadd v_prenex_657 (_ bv4 32))) (.cse114 (select .cse115 v_arrayElimCell_340))) (or (bvsle .cse113 .cse114) (= v_arrayElimCell_340 c_main_~x~0.base) (= v_prenex_656 v_prenex_659) (bvsle .cse113 (select .cse115 v_prenex_656)) (= v_arrayElimCell_340 v_prenex_659) (not (bvsle (_ bv0 32) v_prenex_660)) (bvsle (bvadd v_prenex_660 (_ bv4 32)) .cse114))))) .cse5 .cse6) (or .cse10 (forall ((v_arrayElimCell_367 (_ BitVec 32)) (v_prenex_246 (_ BitVec 32)) (v_prenex_245 (_ BitVec 32)) (v_prenex_244 (_ BitVec 32)) (v_prenex_243 (_ BitVec 32))) (let ((.cse116 (select (store |c_#length| v_prenex_243 v_prenex_246) v_arrayElimCell_367))) (or (bvsle (bvadd v_prenex_245 (_ bv4 32)) .cse116) (= v_arrayElimCell_367 c_main_~x~0.base) (bvsle (bvadd v_prenex_244 (_ bv4 32)) .cse116) (= v_arrayElimCell_367 v_prenex_243) (not (bvsle (_ bv0 32) v_prenex_244))))) .cse1) (or .cse1 .cse0 (forall ((v_arrayElimCell_277 (_ BitVec 32)) (v_prenex_76 (_ BitVec 32)) (v_prenex_678 (_ BitVec 32)) (v_prenex_677 (_ BitVec 32)) (v_prenex_676 (_ BitVec 32))) (let ((.cse117 (select (store |c_#length| v_prenex_678 v_prenex_677) v_arrayElimCell_277))) (or (= v_arrayElimCell_277 v_prenex_678) (bvsle (bvadd v_prenex_676 (_ bv4 32)) .cse117) (bvsle (bvadd v_prenex_76 (_ bv4 32)) .cse117) (not (bvsle (_ bv0 32) v_prenex_76)))))) (or .cse1 (forall ((v_arrayElimCell_147 (_ BitVec 32)) (v_prenex_260 (_ BitVec 32)) (v_prenex_259 (_ BitVec 32)) (v_arrayElimCell_199 (_ BitVec 32))) (or (= v_arrayElimCell_199 v_prenex_259) (bvsle (bvadd v_arrayElimCell_147 (_ bv4 32)) (select (store |c_#length| v_prenex_259 v_prenex_260) v_arrayElimCell_199)) (not (bvsle (_ bv0 32) v_arrayElimCell_147)))) .cse0) (or .cse1 (forall ((v_prenex_74 (_ BitVec 32)) (v_prenex_492 (_ BitVec 32)) (v_prenex_491 (_ BitVec 32)) (v_arrayElimCell_335 (_ BitVec 32))) (or (= v_arrayElimCell_335 v_prenex_492) (not (bvsle (_ bv0 32) v_prenex_74)) (bvsle (bvadd v_prenex_74 (_ bv4 32)) (select (store |c_#length| v_prenex_492 v_prenex_491) v_arrayElimCell_335)))) .cse0) (or .cse1 .cse7 (forall ((v_prenex_705 (_ BitVec 32)) (v_prenex_704 (_ BitVec 32)) (v_prenex_703 (_ BitVec 32)) (v_arrayElimCell_668 (_ BitVec 32)) (v_prenex_702 (_ BitVec 32)) (v_prenex_701 (_ BitVec 32))) (let ((.cse119 (store |c_#length| v_prenex_705 v_prenex_704))) (let ((.cse118 (bvadd v_prenex_701 (_ bv4 32))) (.cse120 (select .cse119 v_prenex_702))) (or (bvsle .cse118 (select .cse119 v_arrayElimCell_668)) (= v_prenex_702 v_prenex_705) (bvsle .cse118 .cse120) (not (bvsle (_ bv0 32) v_prenex_701)) (= v_arrayElimCell_668 v_prenex_705) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_668) (bvsle (bvadd v_prenex_703 (_ bv4 32)) .cse120))))) .cse5) (or .cse10 .cse1 .cse7 (forall ((v_arrayElimCell_482 (_ BitVec 32)) (v_prenex_464 (_ BitVec 32)) (v_prenex_463 (_ BitVec 32)) (v_prenex_58 (_ BitVec 32))) (or (= v_arrayElimCell_482 v_prenex_464) (= v_arrayElimCell_482 c_main_~x~0.base) (bvsle (bvadd v_prenex_58 (_ bv4 32)) (select (store |c_#length| v_prenex_464 v_prenex_463) v_arrayElimCell_482)) (not (bvsle (_ bv0 32) v_prenex_58))))) (or .cse1 .cse5 .cse6 (forall ((v_prenex_174 (_ BitVec 32)) (v_prenex_173 (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_prenex_172 (_ BitVec 32)) (v_arrayElimCell_137 (_ BitVec 32)) (v_arrayElimCell_351 (_ BitVec 32))) (let ((.cse123 (store |c_#length| v_prenex_173 v_prenex_172))) (let ((.cse121 (bvadd v_prenex_174 (_ bv4 32))) (.cse122 (select .cse123 v_arrayElimCell_351))) (or (bvsle .cse121 .cse122) (bvsle .cse121 (select .cse123 v_subst_3)) (bvsle (bvadd v_arrayElimCell_137 (_ bv4 32)) .cse122) (= v_subst_3 v_prenex_173) (= v_arrayElimCell_351 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_137)) (= v_arrayElimCell_351 v_prenex_173)))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_448 (_ BitVec 32)) (v_prenex_614 (_ BitVec 32)) (v_prenex_613 (_ BitVec 32)) (v_prenex_612 (_ BitVec 32)) (v_prenex_611 (_ BitVec 32))) (let ((.cse124 (select (store |c_#length| v_prenex_613 v_prenex_612) v_arrayElimCell_448))) (or (= v_arrayElimCell_448 v_prenex_613) (bvsle (bvadd v_prenex_611 (_ bv4 32)) .cse124) (not (bvsle (_ bv0 32) v_prenex_614)) (= v_arrayElimCell_448 c_main_~x~0.base) (bvsle (bvadd v_prenex_614 (_ bv4 32)) .cse124))))) (or .cse10 .cse1 (forall ((v_arrayElimCell_453 (_ BitVec 32)) (v_prenex_197 (_ BitVec 32)) (v_prenex_196 (_ BitVec 32)) (v_prenex_195 (_ BitVec 32)) (v_prenex_198 (_ BitVec 32))) (let ((.cse125 (select (store |c_#length| v_prenex_195 v_prenex_198) v_arrayElimCell_453))) (or (= v_arrayElimCell_453 v_prenex_195) (= v_arrayElimCell_453 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_196)) (bvsle (bvadd v_prenex_196 (_ bv4 32)) .cse125) (bvsle (bvadd v_prenex_197 (_ bv4 32)) .cse125)))) .cse0) (or .cse1 .cse0 (forall ((v_arrayElimCell_490 (_ BitVec 32)) (v_arrayElimCell_163 (_ BitVec 32)) (v_prenex_573 (_ BitVec 32)) (v_prenex_572 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_163 (_ bv4 32)) (select (store |c_#length| v_prenex_573 v_prenex_572) v_arrayElimCell_490)) (= v_arrayElimCell_490 v_prenex_573) (not (bvsle (_ bv0 32) v_arrayElimCell_163)) (= v_arrayElimCell_490 c_main_~x~0.base)))) (or .cse10 .cse1 (forall ((v_prenex_209 (_ BitVec 32)) (v_arrayElimCell_513 (_ BitVec 32)) (v_prenex_208 (_ BitVec 32)) (v_prenex_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_208)) (= v_arrayElimCell_513 c_main_~x~0.base) (= v_arrayElimCell_513 v_prenex_207) (bvsle (bvadd v_prenex_208 (_ bv4 32)) (select (store |c_#length| v_prenex_207 v_prenex_209) v_arrayElimCell_513))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_596 (_ BitVec 32)) (v_prenex_499 (_ BitVec 32)) (v_prenex_498 (_ BitVec 32)) (v_prenex_497 (_ BitVec 32)) (v_prenex_496 (_ BitVec 32))) (let ((.cse126 (select (store |c_#length| v_prenex_499 v_prenex_497) v_arrayElimCell_596))) (or (= v_arrayElimCell_596 c_main_~x~0.base) (= v_arrayElimCell_596 v_prenex_499) (bvsle (bvadd v_prenex_496 (_ bv4 32)) .cse126) (bvsle (bvadd v_prenex_498 (_ bv4 32)) .cse126) (not (bvsle (_ bv0 32) v_prenex_498)))))) (or .cse0 (forall ((v_prenex_21 (_ BitVec 32)) (v_arrayElimCell_315 (_ BitVec 32)) (v_prenex_339 (_ BitVec 32)) (v_prenex_338 (_ BitVec 32)) (v_prenex_337 (_ BitVec 32))) (let ((.cse127 (select (store |c_#length| v_prenex_337 v_prenex_339) v_arrayElimCell_315))) (or (not (bvsle (_ bv0 32) v_prenex_21)) (= v_arrayElimCell_315 v_prenex_337) (= v_arrayElimCell_315 c_main_~x~0.base) (bvsle (bvadd v_prenex_21 (_ bv4 32)) .cse127) (bvsle (bvadd v_prenex_338 (_ bv4 32)) .cse127)))) .cse5) (or (forall ((v_arrayElimCell_327 (_ BitVec 32)) (v_arrayElimCell_108 (_ BitVec 32)) (v_prenex_204 (_ BitVec 32)) (v_prenex_203 (_ BitVec 32))) (or (= v_arrayElimCell_327 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_108)) (bvsle (bvadd v_arrayElimCell_108 (_ bv4 32)) (select (store |c_#length| v_prenex_203 v_prenex_204) v_arrayElimCell_327)) (= v_arrayElimCell_327 v_prenex_203))) .cse0) (or .cse10 .cse1 .cse0 (forall ((v_prenex_106 (_ BitVec 32)) (v_prenex_446 (_ BitVec 32)) (v_prenex_445 (_ BitVec 32)) (v_prenex_444 (_ BitVec 32)) (v_prenex_443 (_ BitVec 32))) (let ((.cse128 (select (store |c_#length| v_prenex_445 v_prenex_444) v_prenex_106))) (or (bvsle (bvadd v_prenex_443 (_ bv4 32)) .cse128) (= v_prenex_106 c_main_~x~0.base) (bvsle (bvadd v_prenex_446 (_ bv4 32)) .cse128) (= v_prenex_106 v_prenex_445) (not (bvsle (_ bv0 32) v_prenex_446)))))) (or .cse1 .cse0 (forall ((v_prenex_717 (_ BitVec 32)) (v_prenex_716 (_ BitVec 32)) (v_arrayElimCell_600 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_151)) (= v_arrayElimCell_600 v_prenex_717) (bvsle (bvadd v_arrayElimCell_151 (_ bv4 32)) (select (store |c_#length| v_prenex_717 v_prenex_716) v_arrayElimCell_600)) (= v_arrayElimCell_600 c_main_~x~0.base)))) (or (forall ((v_prenex_230 (_ BitVec 32)) (v_arrayElimCell_654 (_ BitVec 32)) (v_prenex_229 (_ BitVec 32)) (v_prenex_233 (_ BitVec 32)) (v_prenex_232 (_ BitVec 32)) (v_prenex_231 (_ BitVec 32))) (let ((.cse131 (store |c_#length| v_prenex_229 v_prenex_233))) (let ((.cse130 (bvadd v_prenex_230 (_ bv4 32))) (.cse129 (select .cse131 v_prenex_231))) (or (= v_arrayElimCell_654 c_main_~x~0.base) (= v_prenex_231 v_prenex_229) (bvsle (bvadd v_prenex_232 (_ bv4 32)) .cse129) (bvsle .cse130 (select .cse131 v_arrayElimCell_654)) (bvsle .cse130 .cse129) (= v_arrayElimCell_654 v_prenex_229) (not (bvsle (_ bv0 32) v_prenex_230)))))) .cse1 .cse5) (or .cse1 .cse0 (forall ((v_arrayElimCell_536 (_ BitVec 32)) (v_prenex_258 (_ BitVec 32)) (v_prenex_257 (_ BitVec 32)) (v_prenex_256 (_ BitVec 32))) (or (= v_arrayElimCell_536 v_prenex_256) (not (bvsle (_ bv0 32) v_prenex_258)) (bvsle (bvadd v_prenex_258 (_ bv4 32)) (select (store |c_#length| v_prenex_256 v_prenex_257) v_arrayElimCell_536)) (= v_arrayElimCell_536 c_main_~x~0.base)))) (or .cse1 (forall ((v_arrayElimCell_200 (_ BitVec 32)) (v_prenex_333 (_ BitVec 32)) (v_prenex_332 (_ BitVec 32)) (v_prenex_331 (_ BitVec 32))) (or (= v_arrayElimCell_200 v_prenex_331) (not (bvsle (_ bv0 32) v_prenex_333)) (bvsle (bvadd v_prenex_333 (_ bv4 32)) (select (store |c_#length| v_prenex_331 v_prenex_332) v_arrayElimCell_200))))) (or (forall ((v_prenex_359 (_ BitVec 32)) (v_prenex_358 (_ BitVec 32)) (v_prenex_16 (_ BitVec 32)) (v_prenex_357 (_ BitVec 32)) (v_prenex_356 (_ BitVec 32)) (v_prenex_143 (_ BitVec 32))) (let ((.cse136 (store |c_#length| v_prenex_356 v_prenex_359))) (let ((.cse133 (select .cse136 v_prenex_143)) (.cse134 (bvadd v_prenex_16 (_ bv4 32))) (.cse132 (bvadd v_prenex_358 (_ bv4 32))) (.cse135 (select .cse136 v_prenex_357))) (or (bvsle .cse132 .cse133) (bvsle .cse134 .cse133) (= v_prenex_143 v_prenex_356) (bvsle .cse134 .cse135) (= v_prenex_357 v_prenex_356) (bvsle .cse132 .cse135) (= v_prenex_143 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_16)))))) .cse0) (or .cse0 (forall ((v_prenex_340 (_ BitVec 32)) (v_arrayElimCell_648 (_ BitVec 32)) (v_prenex_24 (_ BitVec 32)) (v_prenex_341 (_ BitVec 32))) (or (= v_arrayElimCell_648 v_prenex_340) (not (bvsle (_ bv0 32) v_prenex_24)) (= v_arrayElimCell_648 c_main_~x~0.base) (bvsle (bvadd v_prenex_24 (_ bv4 32)) (select (store |c_#length| v_prenex_340 v_prenex_341) v_arrayElimCell_648))))) (or .cse1 .cse7 (forall ((v_arrayElimCell_520 (_ BitVec 32)) (v_prenex_70 (_ BitVec 32)) (v_prenex_167 (_ BitVec 32)) (v_prenex_166 (_ BitVec 32))) (or (= v_arrayElimCell_520 v_prenex_166) (= v_arrayElimCell_520 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_70)) (bvsle (bvadd v_prenex_70 (_ bv4 32)) (select (store |c_#length| v_prenex_166 v_prenex_167) v_arrayElimCell_520))))) (or .cse1 (forall ((v_prenex_472 (_ BitVec 32)) (v_prenex_471 (_ BitVec 32)) (v_arrayElimCell_444 (_ BitVec 32)) (v_prenex_475 (_ BitVec 32)) (v_prenex_474 (_ BitVec 32)) (v_prenex_473 (_ BitVec 32))) (let ((.cse141 (store |c_#length| v_prenex_474 v_prenex_473))) (let ((.cse138 (select .cse141 v_prenex_471)) (.cse139 (bvadd v_prenex_475 (_ bv4 32))) (.cse137 (bvadd v_prenex_472 (_ bv4 32))) (.cse140 (select .cse141 v_arrayElimCell_444))) (or (= v_arrayElimCell_444 c_main_~x~0.base) (bvsle .cse137 .cse138) (= v_arrayElimCell_444 v_prenex_474) (bvsle .cse139 .cse138) (bvsle .cse139 .cse140) (not (bvsle (_ bv0 32) v_prenex_475)) (bvsle .cse137 .cse140) (= v_prenex_471 v_prenex_474)))))) (or .cse10 (forall ((v_arrayElimCell_234 (_ BitVec 32)) (v_prenex_409 (_ BitVec 32)) (v_prenex_408 (_ BitVec 32)) (v_prenex_10 (_ BitVec 32)) (v_prenex_410 (_ BitVec 32))) (let ((.cse142 (select (store |c_#length| v_prenex_408 v_prenex_410) v_arrayElimCell_234))) (or (= v_arrayElimCell_234 v_prenex_408) (bvsle (bvadd v_prenex_10 (_ bv4 32)) .cse142) (not (bvsle (_ bv0 32) v_prenex_10)) (bvsle (bvadd v_prenex_409 (_ bv4 32)) .cse142)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_228 (_ BitVec 32)) (v_prenex_61 (_ BitVec 32)) (v_prenex_267 (_ BitVec 32)) (v_prenex_266 (_ BitVec 32)) (v_prenex_265 (_ BitVec 32))) (let ((.cse143 (select (store |c_#length| v_prenex_265 v_prenex_267) v_arrayElimCell_228))) (or (not (bvsle (_ bv0 32) v_prenex_61)) (bvsle (bvadd v_prenex_61 (_ bv4 32)) .cse143) (= v_arrayElimCell_228 v_prenex_265) (bvsle (bvadd v_prenex_266 (_ bv4 32)) .cse143)))) .cse5 .cse6) (or .cse1 (forall ((v_prenex_603 (_ BitVec 32)) (v_prenex_602 (_ BitVec 32)) (v_prenex_601 (_ BitVec 32)) (v_arrayElimCell_391 (_ BitVec 32)) (v_prenex_600 (_ BitVec 32))) (let ((.cse144 (select (store |c_#length| v_prenex_602 v_prenex_601) v_arrayElimCell_391))) (or (= v_arrayElimCell_391 c_main_~x~0.base) (bvsle (bvadd v_prenex_603 (_ bv4 32)) .cse144) (= v_arrayElimCell_391 v_prenex_602) (not (bvsle (_ bv0 32) v_prenex_603)) (bvsle (bvadd v_prenex_600 (_ bv4 32)) .cse144)))) .cse0) (or .cse1 (forall ((v_arrayElimCell_288 (_ BitVec 32)) (v_prenex_366 (_ BitVec 32)) (v_prenex_365 (_ BitVec 32)) (v_prenex_364 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_366)) (= v_arrayElimCell_288 c_main_~x~0.base) (bvsle (bvadd v_prenex_366 (_ bv4 32)) (select (store |c_#length| v_prenex_364 v_prenex_365) v_arrayElimCell_288)) (= v_arrayElimCell_288 v_prenex_364))) .cse5) (or .cse1 (forall ((v_prenex_355 (_ BitVec 32)) (v_prenex_354 (_ BitVec 32)) (v_prenex_353 (_ BitVec 32)) (v_arrayElimCell_682 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_355)) (bvsle (bvadd v_prenex_355 (_ bv4 32)) (select (store |c_#length| v_prenex_353 v_prenex_354) v_arrayElimCell_682)) (= v_arrayElimCell_682 v_prenex_353) (= v_arrayElimCell_682 c_main_~x~0.base))) .cse0) (or (forall ((v_arrayElimCell_695 (_ BitVec 32)) (v_prenex_250 (_ BitVec 32)) (v_prenex_249 (_ BitVec 32)) (v_prenex_248 (_ BitVec 32)) (v_prenex_247 (_ BitVec 32)) (v_arrayElimCell_91 (_ BitVec 32))) (let ((.cse146 (store |c_#length| v_prenex_247 v_prenex_250))) (let ((.cse145 (bvadd v_arrayElimCell_91 (_ bv4 32))) (.cse147 (select .cse146 v_prenex_248))) (or (bvsle .cse145 (select .cse146 v_arrayElimCell_695)) (bvsle .cse145 .cse147) (not (bvsle (_ bv0 32) v_arrayElimCell_91)) (= v_prenex_248 v_prenex_247) (bvsle (bvadd v_prenex_249 (_ bv4 32)) .cse147) (= v_arrayElimCell_695 c_main_~x~0.base) (= v_arrayElimCell_695 v_prenex_247))))) .cse0 .cse5) (or (forall ((v_prenex_524 (_ BitVec 32)) (v_prenex_523 (_ BitVec 32)) (v_prenex_522 (_ BitVec 32)) (v_arrayElimCell_618 (_ BitVec 32)) (v_prenex_521 (_ BitVec 32))) (let ((.cse148 (select (store |c_#length| v_prenex_524 v_prenex_522) v_arrayElimCell_618))) (or (bvsle (bvadd v_prenex_523 (_ bv4 32)) .cse148) (bvsle (bvadd v_prenex_521 (_ bv4 32)) .cse148) (= v_arrayElimCell_618 v_prenex_524) (= v_arrayElimCell_618 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_523))))) .cse0) .cse1 (or .cse1 .cse0 (forall ((v_arrayElimCell_112 (_ BitVec 32)) (v_arrayElimCell_401 (_ BitVec 32)) (v_prenex_189 (_ BitVec 32)) (v_prenex_188 (_ BitVec 32)) (v_prenex_187 (_ BitVec 32))) (let ((.cse149 (select (store |c_#length| v_prenex_187 v_prenex_189) v_arrayElimCell_401))) (or (bvsle (bvadd v_prenex_188 (_ bv4 32)) .cse149) (bvsle (bvadd v_arrayElimCell_112 (_ bv4 32)) .cse149) (= v_arrayElimCell_401 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_112)) (= v_arrayElimCell_401 v_prenex_187))))) (or .cse1 .cse43 (forall ((v_prenex_384 (_ BitVec 32)) (v_prenex_383 (_ BitVec 32)) (v_prenex_382 (_ BitVec 32)) (v_arrayElimCell_417 (_ BitVec 32)) (v_arrayElimCell_133 (_ BitVec 32))) (let ((.cse150 (select (store |c_#length| v_prenex_382 v_prenex_384) v_arrayElimCell_417))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_133)) (bvsle (bvadd v_prenex_383 (_ bv4 32)) .cse150) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_417) (bvsle (bvadd v_arrayElimCell_133 (_ bv4 32)) .cse150) (= v_arrayElimCell_417 v_prenex_382)))) .cse5) (or .cse1 (forall ((v_arrayElimCell_224 (_ BitVec 32)) (v_prenex_749 (_ BitVec 32)) (v_prenex_748 (_ BitVec 32)) (v_prenex_747 (_ BitVec 32)) (v_prenex_750 (_ BitVec 32))) (let ((.cse151 (select (store |c_#length| v_prenex_750 v_prenex_749) v_arrayElimCell_224))) (or (= v_arrayElimCell_224 v_prenex_750) (bvsle (bvadd v_prenex_748 (_ bv4 32)) .cse151) (bvsle (bvadd v_prenex_747 (_ bv4 32)) .cse151) (not (bvsle (_ bv0 32) v_prenex_747))))) .cse5 .cse6) (or .cse1 .cse5 (forall ((v_prenex_645 (_ BitVec 32)) (v_prenex_644 (_ BitVec 32)) (v_prenex_643 (_ BitVec 32)) (v_arrayElimCell_261 (_ BitVec 32)) (v_prenex_642 (_ BitVec 32))) (let ((.cse152 (select (store |c_#length| v_prenex_645 v_prenex_643) v_arrayElimCell_261))) (or (bvsle (bvadd v_prenex_644 (_ bv4 32)) .cse152) (not (bvsle (_ bv0 32) v_prenex_644)) (= v_arrayElimCell_261 v_prenex_645) (bvsle (bvadd v_prenex_642 (_ bv4 32)) .cse152) (= v_arrayElimCell_261 c_main_~x~0.base))))) (or (forall ((v_prenex_164 (_ BitVec 32)) (v_prenex_163 (_ BitVec 32)) (v_arrayElimCell_613 (_ BitVec 32)) (v_prenex_165 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_164)) (bvsle (bvadd v_prenex_164 (_ bv4 32)) (select (store |c_#length| v_prenex_163 v_prenex_165) v_arrayElimCell_613)) (= v_arrayElimCell_613 v_prenex_163))) .cse1) (or .cse1 .cse0 (forall ((v_arrayElimCell_524 (_ BitVec 32)) (v_prenex_555 (_ BitVec 32)) (v_prenex_554 (_ BitVec 32)) (v_prenex_553 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_554 (_ bv4 32)) (select (store |c_#length| v_prenex_555 v_prenex_553) v_arrayElimCell_524)) (= v_arrayElimCell_524 v_prenex_555) (not (bvsle (_ bv0 32) v_prenex_554)) (= v_arrayElimCell_524 c_main_~x~0.base)))) (or (forall ((v_arrayElimCell_498 (_ BitVec 32)) (v_prenex_194 (_ BitVec 32)) (v_prenex_193 (_ BitVec 32)) (v_prenex_192 (_ BitVec 32)) (v_prenex_23 (_ BitVec 32))) (let ((.cse153 (select (store |c_#length| v_prenex_192 v_prenex_194) v_arrayElimCell_498))) (or (not (bvsle (_ bv0 32) v_prenex_23)) (bvsle (bvadd v_prenex_193 (_ bv4 32)) .cse153) (bvsle (bvadd v_prenex_23 (_ bv4 32)) .cse153) (= v_arrayElimCell_498 v_prenex_192)))) .cse0) (or .cse1 (forall ((v_prenex_506 (_ BitVec 32)) (v_prenex_505 (_ BitVec 32)) (v_prenex_504 (_ BitVec 32)) (v_arrayElimCell_683 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_505 (_ bv4 32)) (select (store |c_#length| v_prenex_506 v_prenex_504) v_arrayElimCell_683)) (not (bvsle (_ bv0 32) v_prenex_505)) (= v_arrayElimCell_683 c_main_~x~0.base) (= v_arrayElimCell_683 v_prenex_506)))) (or .cse1 .cse0 (forall ((v_prenex_381 (_ BitVec 32)) (v_arrayElimCell_445 (_ BitVec 32)) (v_prenex_380 (_ BitVec 32)) (v_prenex_379 (_ BitVec 32)) (v_prenex_378 (_ BitVec 32)) (v_prenex_377 (_ BitVec 32))) (let ((.cse158 (store |c_#length| v_prenex_377 v_prenex_380))) (let ((.cse155 (select .cse158 v_prenex_378)) (.cse154 (bvadd v_prenex_381 (_ bv4 32))) (.cse156 (bvadd v_prenex_379 (_ bv4 32))) (.cse157 (select .cse158 v_arrayElimCell_445))) (or (bvsle .cse154 .cse155) (bvsle .cse156 .cse155) (not (bvsle (_ bv0 32) v_prenex_381)) (bvsle .cse154 .cse157) (bvsle .cse156 .cse157) (= v_arrayElimCell_445 c_main_~x~0.base) (= v_arrayElimCell_445 v_prenex_377) (= v_prenex_378 v_prenex_377)))))) (or .cse1 (forall ((v_prenex_303 (_ BitVec 32)) (v_prenex_302 (_ BitVec 32)) (v_prenex_301 (_ BitVec 32)) (v_arrayElimCell_196 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_303 (_ bv4 32)) (select (store |c_#length| v_prenex_301 v_prenex_302) v_arrayElimCell_196)) (not (bvsle (_ bv0 32) v_prenex_303)) (= v_arrayElimCell_196 v_prenex_301))) .cse7) (or .cse1 (forall ((v_prenex_296 (_ BitVec 32)) (v_prenex_295 (_ BitVec 32)) (v_prenex_294 (_ BitVec 32)) (v_prenex_293 (_ BitVec 32)) (v_prenex_292 (_ BitVec 32)) (v_arrayElimCell_671 (_ BitVec 32))) (let ((.cse161 (store |c_#length| v_prenex_292 v_prenex_295))) (let ((.cse159 (bvadd v_prenex_296 (_ bv4 32))) (.cse160 (select .cse161 v_prenex_293))) (or (bvsle .cse159 .cse160) (bvsle .cse159 (select .cse161 v_arrayElimCell_671)) (= v_arrayElimCell_671 v_prenex_292) (not (bvsle (_ bv0 32) v_prenex_296)) (= v_arrayElimCell_671 c_main_~x~0.base) (= v_prenex_293 v_prenex_292) (bvsle (bvadd v_prenex_294 (_ bv4 32)) .cse160))))) .cse0 .cse5) (or .cse10 .cse1 .cse7 (forall ((v_arrayElimCell_630 (_ BitVec 32)) (v_prenex_757 (_ BitVec 32)) (v_prenex_756 (_ BitVec 32)) (v_prenex_755 (_ BitVec 32)) (v_prenex_754 (_ BitVec 32))) (let ((.cse162 (select (store |c_#length| v_prenex_757 v_prenex_756) v_arrayElimCell_630))) (or (bvsle (bvadd v_prenex_754 (_ bv4 32)) .cse162) (bvsle (bvadd v_prenex_755 (_ bv4 32)) .cse162) (= v_arrayElimCell_630 v_prenex_757) (not (bvsle (_ bv0 32) v_prenex_754)))))) (or .cse10 .cse1 .cse0 (forall ((v_arrayElimCell_476 (_ BitVec 32)) (v_prenex_753 (_ BitVec 32)) (v_prenex_752 (_ BitVec 32)) (v_prenex_751 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_751 (_ bv4 32)) (select (store |c_#length| v_prenex_753 v_prenex_752) v_arrayElimCell_476)) (= v_arrayElimCell_476 v_prenex_753) (= v_arrayElimCell_476 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_751))))) (or (forall ((v_prenex_593 (_ BitVec 32)) (v_arrayElimCell_486 (_ BitVec 32)) (v_prenex_592 (_ BitVec 32)) (v_prenex_22 (_ BitVec 32)) (v_prenex_594 (_ BitVec 32))) (let ((.cse163 (select (store |c_#length| v_prenex_594 v_prenex_593) v_arrayElimCell_486))) (or (= v_arrayElimCell_486 v_prenex_594) (= v_arrayElimCell_486 c_main_~x~0.base) (bvsle (bvadd v_prenex_22 (_ bv4 32)) .cse163) (bvsle (bvadd v_prenex_592 (_ bv4 32)) .cse163) (not (bvsle (_ bv0 32) v_prenex_22))))) .cse0) (or .cse10 .cse1 (forall ((v_prenex_429 (_ BitVec 32)) (v_arrayElimCell_512 (_ BitVec 32)) (v_prenex_428 (_ BitVec 32)) (v_prenex_427 (_ BitVec 32))) (or (= v_arrayElimCell_512 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_428)) (= v_arrayElimCell_512 v_prenex_429) (bvsle (bvadd v_prenex_428 (_ bv4 32)) (select (store |c_#length| v_prenex_429 v_prenex_427) v_arrayElimCell_512)))) .cse0) (or .cse0 .cse5 (forall ((v_arrayElimCell_238 (_ BitVec 32)) (v_prenex_433 (_ BitVec 32)) (v_prenex_432 (_ BitVec 32)) (v_prenex_431 (_ BitVec 32)) (v_prenex_430 (_ BitVec 32))) (let ((.cse164 (select (store |c_#length| v_prenex_433 v_prenex_431) v_arrayElimCell_238))) (or (bvsle (bvadd v_prenex_432 (_ bv4 32)) .cse164) (= v_arrayElimCell_238 v_prenex_433) (bvsle (bvadd v_prenex_430 (_ bv4 32)) .cse164) (= v_arrayElimCell_238 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_432)))))) (or (forall ((v_prenex_738 (_ BitVec 32)) (v_prenex_737 (_ BitVec 32)) (v_prenex_19 (_ BitVec 32)) (v_arrayElimCell_703 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_19)) (bvsle (bvadd v_prenex_19 (_ bv4 32)) (select (store |c_#length| v_prenex_738 v_prenex_737) v_arrayElimCell_703)) (= v_arrayElimCell_703 v_prenex_738))) .cse0) .cse71 (or .cse0 (forall ((v_prenex_20 (_ BitVec 32)) (v_prenex_776 (_ BitVec 32)) (v_prenex_775 (_ BitVec 32)) (v_arrayElimCell_409 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_20)) (bvsle (bvadd v_prenex_20 (_ bv4 32)) (select (store |c_#length| v_prenex_776 v_prenex_775) v_arrayElimCell_409)) (= v_arrayElimCell_409 c_main_~x~0.base) (= v_arrayElimCell_409 v_prenex_776)))) (or .cse1 .cse7 (forall ((v_prenex_618 (_ BitVec 32)) (v_prenex_617 (_ BitVec 32)) (v_prenex_616 (_ BitVec 32)) (v_prenex_615 (_ BitVec 32)) (v_arrayElimCell_192 (_ BitVec 32))) (let ((.cse165 (select (store |c_#length| v_prenex_618 v_prenex_616) v_arrayElimCell_192))) (or (bvsle (bvadd v_prenex_615 (_ bv4 32)) .cse165) (= v_arrayElimCell_192 v_prenex_618) (not (bvsle (_ bv0 32) v_prenex_617)) (bvsle (bvadd v_prenex_617 (_ bv4 32)) .cse165))))) (or .cse1 .cse0 .cse5 (forall ((v_prenex_362 (_ BitVec 32)) (v_prenex_361 (_ BitVec 32)) (v_prenex_360 (_ BitVec 32)) (v_arrayElimCell_394 (_ BitVec 32)) (v_arrayElimCell_120 (_ BitVec 32)) (v_prenex_363 (_ BitVec 32))) (let ((.cse167 (store |c_#length| v_prenex_360 v_prenex_363))) (let ((.cse166 (bvadd v_arrayElimCell_120 (_ bv4 32))) (.cse168 (select .cse167 v_prenex_361))) (or (= v_arrayElimCell_394 c_main_~x~0.base) (bvsle .cse166 (select .cse167 v_arrayElimCell_394)) (bvsle (bvadd v_prenex_362 (_ bv4 32)) .cse168) (= v_arrayElimCell_394 v_prenex_360) (not (bvsle (_ bv0 32) v_arrayElimCell_120)) (bvsle .cse166 .cse168) (= v_prenex_361 v_prenex_360)))))) (or (forall ((v_prenex_708 (_ BitVec 32)) (v_arrayElimCell_189 (_ BitVec 32)) (v_prenex_707 (_ BitVec 32)) (v_prenex_706 (_ BitVec 32)) (v_prenex_709 (_ BitVec 32))) (let ((.cse169 (select (store |c_#length| v_prenex_709 v_prenex_708) v_arrayElimCell_189))) (or (bvsle (bvadd v_prenex_706 (_ bv4 32)) .cse169) (bvsle (bvadd v_prenex_707 (_ bv4 32)) .cse169) (= v_arrayElimCell_189 v_prenex_709) (not (bvsle (_ bv0 32) v_prenex_706))))) .cse1 .cse0) (or .cse1 (forall ((v_prenex_591 (_ BitVec 32)) (v_prenex_590 (_ BitVec 32)) (v_prenex_589 (_ BitVec 32)) (v_prenex_588 (_ BitVec 32)) (v_prenex_587 (_ BitVec 32)) (v_arrayElimCell_265 (_ BitVec 32))) (let ((.cse170 (store |c_#length| v_prenex_591 v_prenex_589))) (or (bvsle (bvadd v_prenex_590 (_ bv4 32)) (select .cse170 v_arrayElimCell_265)) (= v_prenex_587 v_prenex_591) (not (bvsle (_ bv0 32) v_prenex_590)) (= v_arrayElimCell_265 v_prenex_591) (bvsle (bvadd v_prenex_588 (_ bv4 32)) (select .cse170 v_prenex_587)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_265)))) .cse5) (or .cse1 .cse43 .cse5 (forall ((v_arrayElimCell_574 (_ BitVec 32)) (v_prenex_537 (_ BitVec 32)) (v_prenex_536 (_ BitVec 32)) (v_prenex_535 (_ BitVec 32))) (or (= v_arrayElimCell_574 v_prenex_537) (not (bvsle (_ bv0 32) v_prenex_536)) (bvsle (bvadd v_prenex_536 (_ bv4 32)) (select (store |c_#length| v_prenex_537 v_prenex_535) v_arrayElimCell_574))))) (or .cse1 (forall ((v_prenex_263 (_ BitVec 32)) (v_prenex_262 (_ BitVec 32)) (v_prenex_261 (_ BitVec 32)) (v_prenex_60 (_ BitVec 32)) (v_arrayElimCell_264 (_ BitVec 32)) (v_prenex_264 (_ BitVec 32))) (let ((.cse171 (store |c_#length| v_prenex_261 v_prenex_264))) (or (bvsle (bvadd v_prenex_263 (_ bv4 32)) (select .cse171 v_prenex_262)) (not (bvsle (_ bv0 32) v_prenex_60)) (bvsle (bvadd v_prenex_60 (_ bv4 32)) (select .cse171 v_arrayElimCell_264)) (= v_arrayElimCell_264 c_main_~x~0.base) (= v_prenex_262 v_prenex_261) (= v_arrayElimCell_264 v_prenex_261)))) .cse5 .cse6) (= |c_main_write~$Pointer$_#value.offset| (_ bv0 32)) (or .cse1 (forall ((v_prenex_40 (_ BitVec 32)) (v_prenex_214 (_ BitVec 32)) (v_prenex_213 (_ BitVec 32)) (v_arrayElimCell_331 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_40)) (bvsle (bvadd v_prenex_40 (_ bv4 32)) (select (store |c_#length| v_prenex_213 v_prenex_214) v_arrayElimCell_331)) (= v_arrayElimCell_331 v_prenex_213))) .cse5 .cse6) (or .cse1 .cse43 .cse5 (forall ((v_prenex_407 (_ BitVec 32)) (v_prenex_406 (_ BitVec 32)) (v_prenex_405 (_ BitVec 32)) (v_prenex_404 (_ BitVec 32)) (v_arrayElimCell_230 (_ BitVec 32))) (let ((.cse172 (select (store |c_#length| v_prenex_404 v_prenex_406) v_arrayElimCell_230))) (or (bvsle (bvadd v_prenex_407 (_ bv4 32)) .cse172) (= v_arrayElimCell_230 v_prenex_404) (not (bvsle (_ bv0 32) v_prenex_407)) (bvsle (bvadd v_prenex_405 (_ bv4 32)) .cse172))))) (or .cse1 (forall ((v_prenex_73 (_ BitVec 32)) (v_arrayElimCell_269 (_ BitVec 32)) (v_prenex_552 (_ BitVec 32)) (v_prenex_551 (_ BitVec 32)) (v_prenex_550 (_ BitVec 32))) (let ((.cse173 (select (store |c_#length| v_prenex_552 v_prenex_551) v_arrayElimCell_269))) (or (= v_arrayElimCell_269 c_main_~x~0.base) (bvsle (bvadd v_prenex_550 (_ bv4 32)) .cse173) (bvsle (bvadd v_prenex_73 (_ bv4 32)) .cse173) (= v_arrayElimCell_269 v_prenex_552) (not (bvsle (_ bv0 32) v_prenex_73))))) .cse0) (or .cse10 (forall ((v_prenex_328 (_ BitVec 32)) (v_prenex_9 (_ BitVec 32)) (v_prenex_327 (_ BitVec 32)) (v_arrayElimCell_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_9)) (= v_arrayElimCell_207 c_main_~x~0.base) (bvsle (bvadd v_prenex_9 (_ bv4 32)) (select (store |c_#length| v_prenex_327 v_prenex_328) v_arrayElimCell_207)) (= v_arrayElimCell_207 v_prenex_327))) .cse0) (or .cse1 (forall ((v_arrayElimCell_203 (_ BitVec 32)) (v_prenex_309 (_ BitVec 32)) (v_prenex_308 (_ BitVec 32)) (v_prenex_307 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_309 (_ bv4 32)) (select (store |c_#length| v_prenex_307 v_prenex_308) v_arrayElimCell_203)) (not (bvsle (_ bv0 32) v_prenex_309)) (= v_arrayElimCell_203 v_prenex_307))) .cse0) (or (forall ((v_arrayElimCell_260 (_ BitVec 32)) (v_prenex_686 (_ BitVec 32)) (v_prenex_685 (_ BitVec 32)) (v_prenex_684 (_ BitVec 32)) (v_prenex_683 (_ BitVec 32))) (let ((.cse174 (select (store |c_#length| v_prenex_686 v_prenex_684) v_arrayElimCell_260))) (or (not (bvsle (_ bv0 32) v_prenex_685)) (= v_arrayElimCell_260 v_prenex_686) (bvsle (bvadd v_prenex_685 (_ bv4 32)) .cse174) (bvsle (bvadd v_prenex_683 (_ bv4 32)) .cse174) (= v_arrayElimCell_260 c_main_~x~0.base)))) .cse1 .cse5 .cse6) (or .cse1 (forall ((v_arrayElimCell_255 (_ BitVec 32)) (v_prenex_272 (_ BitVec 32)) (v_prenex_271 (_ BitVec 32)) (v_prenex_270 (_ BitVec 32)) (v_prenex_269 (_ BitVec 32)) (v_prenex_268 (_ BitVec 32))) (let ((.cse175 (store |c_#length| v_prenex_268 v_prenex_271))) (or (not (bvsle (_ bv0 32) v_prenex_272)) (bvsle (bvadd v_prenex_270 (_ bv4 32)) (select .cse175 v_prenex_269)) (= v_arrayElimCell_255 v_prenex_268) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_255) (= v_prenex_269 v_prenex_268) (bvsle (bvadd v_prenex_272 (_ bv4 32)) (select .cse175 v_arrayElimCell_255))))) .cse43 .cse5) (= (bvadd (select |c_#length| |c_main_write~$Pointer$_#value.base|) (_ bv4294967280 32)) (_ bv0 32)) (or .cse1 .cse7 (forall ((v_prenex_372 (_ BitVec 32)) (v_prenex_371 (_ BitVec 32)) (v_prenex_370 (_ BitVec 32)) (v_prenex_71 (_ BitVec 32)) (v_arrayElimCell_593 (_ BitVec 32))) (let ((.cse176 (select (store |c_#length| v_prenex_370 v_prenex_372) v_arrayElimCell_593))) (or (= v_arrayElimCell_593 c_main_~x~0.base) (bvsle (bvadd v_prenex_371 (_ bv4 32)) .cse176) (bvsle (bvadd v_prenex_71 (_ bv4 32)) .cse176) (= v_arrayElimCell_593 v_prenex_370) (not (bvsle (_ bv0 32) v_prenex_71)))))) (or .cse0 (forall ((v_prenex_577 (_ BitVec 32)) (v_prenex_576 (_ BitVec 32)) (v_prenex_575 (_ BitVec 32)) (v_prenex_574 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_575)) (= v_prenex_574 v_prenex_577) (bvsle (bvadd v_prenex_575 (_ bv4 32)) (select (store |c_#length| v_prenex_577 v_prenex_576) v_prenex_574))))) .cse5 (or .cse1 .cse0 (forall ((v_prenex_648 (_ BitVec 32)) (v_prenex_647 (_ BitVec 32)) (v_arrayElimCell_547 (_ BitVec 32)) (v_prenex_646 (_ BitVec 32)) (v_prenex_68 (_ BitVec 32))) (let ((.cse177 (select (store |c_#length| v_prenex_648 v_prenex_647) v_arrayElimCell_547))) (or (= v_arrayElimCell_547 v_prenex_648) (bvsle (bvadd v_prenex_646 (_ bv4 32)) .cse177) (= v_arrayElimCell_547 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_68)) (bvsle (bvadd v_prenex_68 (_ bv4 32)) .cse177))))) (or .cse1 .cse0 (forall ((v_arrayElimCell_383 (_ BitVec 32)) (v_prenex_696 (_ BitVec 32)) (v_prenex_695 (_ BitVec 32)) (v_prenex_694 (_ BitVec 32))) (or (= v_arrayElimCell_383 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_696)) (= v_arrayElimCell_383 v_prenex_695) (bvsle (bvadd v_prenex_696 (_ bv4 32)) (select (store |c_#length| v_prenex_695 v_prenex_694) v_arrayElimCell_383))))) (or (forall ((v_prenex_403 (_ BitVec 32)) (v_prenex_402 (_ BitVec 32)) (v_arrayElimCell_539 (_ BitVec 32)) (v_prenex_401 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_403 (_ bv4 32)) (select (store |c_#length| v_prenex_401 v_prenex_402) v_arrayElimCell_539)) (= v_arrayElimCell_539 v_prenex_401) (= v_arrayElimCell_539 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_403)))) .cse1 .cse7) (or (forall ((v_prenex_571 (_ BitVec 32)) (v_prenex_570 (_ BitVec 32)) (v_prenex_569 (_ BitVec 32)) (v_prenex_568 (_ BitVec 32)) (v_arrayElimCell_637 (_ BitVec 32)) (v_prenex_567 (_ BitVec 32))) (let ((.cse178 (store |c_#length| v_prenex_571 v_prenex_569))) (or (= v_prenex_567 v_prenex_571) (not (bvsle (_ bv0 32) v_prenex_570)) (= v_arrayElimCell_637 v_prenex_571) (bvsle (bvadd v_prenex_568 (_ bv4 32)) (select .cse178 v_prenex_567)) (bvsle (bvadd v_prenex_570 (_ bv4 32)) (select .cse178 v_arrayElimCell_637)) (= v_arrayElimCell_637 c_main_~x~0.base)))) .cse1 .cse5 .cse6) .cse0 (or .cse0 (forall ((v_prenex_15 (_ BitVec 32)) (v_arrayElimCell_281 (_ BitVec 32)) (v_prenex_322 (_ BitVec 32)) (v_prenex_321 (_ BitVec 32))) (or (= v_arrayElimCell_281 v_prenex_321) (not (bvsle (_ bv0 32) v_prenex_15)) (bvsle (bvadd v_prenex_15 (_ bv4 32)) (select (store |c_#length| v_prenex_321 v_prenex_322) v_arrayElimCell_281)))) .cse5) (or .cse1 (forall ((v_prenex_637 (_ BitVec 32)) (v_prenex_636 (_ BitVec 32)) (v_prenex_635 (_ BitVec 32)) (v_prenex_634 (_ BitVec 32)) (v_arrayElimCell_250 (_ BitVec 32))) (let ((.cse179 (select (store |c_#length| v_prenex_637 v_prenex_635) v_arrayElimCell_250))) (or (not (bvsle (_ bv0 32) v_prenex_636)) (bvsle (bvadd v_prenex_634 (_ bv4 32)) .cse179) (= v_arrayElimCell_250 c_main_~x~0.base) (= v_arrayElimCell_250 v_prenex_637) (bvsle (bvadd v_prenex_636 (_ bv4 32)) .cse179)))) .cse5 .cse6) (= c_main_~x~0.offset (_ bv0 32)) (or .cse1 (forall ((v_prenex_175 (_ BitVec 32)) (v_arrayElimCell_653 (_ BitVec 32)) (v_prenex_38 (_ BitVec 32)) (v_prenex_178 (_ BitVec 32)) (v_prenex_177 (_ BitVec 32)) (v_prenex_176 (_ BitVec 32))) (let ((.cse181 (store |c_#length| v_prenex_176 v_prenex_175))) (let ((.cse180 (bvadd v_prenex_38 (_ bv4 32))) (.cse182 (select .cse181 v_prenex_177))) (or (= v_arrayElimCell_653 c_main_~x~0.base) (bvsle .cse180 (select .cse181 v_arrayElimCell_653)) (bvsle (bvadd v_prenex_178 (_ bv4 32)) .cse182) (= v_arrayElimCell_653 v_prenex_176) (not (bvsle (_ bv0 32) v_prenex_38)) (bvsle .cse180 .cse182) (= v_prenex_177 v_prenex_176))))) .cse5 .cse6) (or .cse10 .cse1 (forall ((v_prenex_184 (_ BitVec 32)) (v_prenex_183 (_ BitVec 32)) (v_prenex_182 (_ BitVec 32)) (v_arrayElimCell_121 (_ BitVec 32)) (v_arrayElimCell_452 (_ BitVec 32))) (let ((.cse183 (select (store |c_#length| v_prenex_182 v_prenex_184) v_arrayElimCell_452))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_121)) (bvsle (bvadd v_prenex_183 (_ bv4 32)) .cse183) (= v_arrayElimCell_452 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_121 (_ bv4 32)) .cse183) (= v_arrayElimCell_452 v_prenex_182))))) (or .cse10 (forall ((v_prenex_43 (_ BitVec 32)) (v_arrayElimCell_424 (_ BitVec 32)) (v_prenex_389 (_ BitVec 32)) (v_prenex_388 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_43)) (= v_arrayElimCell_424 c_main_~x~0.base) (bvsle (bvadd v_prenex_43 (_ bv4 32)) (select (store |c_#length| v_prenex_388 v_prenex_389) v_arrayElimCell_424)) (= v_arrayElimCell_424 v_prenex_388))) .cse1 .cse0) (or .cse1 (forall ((v_prenex_767 (_ BitVec 32)) (v_arrayElimCell_614 (_ BitVec 32)) (v_prenex_766 (_ BitVec 32)) (v_prenex_765 (_ BitVec 32))) (or (= v_arrayElimCell_614 v_prenex_767) (bvsle (bvadd v_prenex_765 (_ bv4 32)) (select (store |c_#length| v_prenex_767 v_prenex_766) v_arrayElimCell_614)) (not (bvsle (_ bv0 32) v_prenex_765)))) .cse0) (or .cse10 .cse1 .cse7 (forall ((v_prenex_54 (_ BitVec 32)) (v_arrayElimCell_506 (_ BitVec 32)) (v_prenex_169 (_ BitVec 32)) (v_prenex_168 (_ BitVec 32))) (or (= v_arrayElimCell_506 v_prenex_168) (not (bvsle (_ bv0 32) v_prenex_54)) (bvsle (bvadd v_prenex_54 (_ bv4 32)) (select (store |c_#length| v_prenex_168 v_prenex_169) v_arrayElimCell_506)) (= v_arrayElimCell_506 c_main_~x~0.base))))))) is different from true [2018-11-10 07:45:00,608 WARN L179 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 32 [2018-11-10 07:45:08,060 WARN L179 SmtUtils]: Spent 4.36 s on a formula simplification. DAG size of input: 3182 DAG size of output: 31 [2018-11-10 07:45:10,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:10,216 INFO L93 Difference]: Finished difference Result 289 states and 320 transitions. [2018-11-10 07:45:10,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-10 07:45:10,217 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 39 [2018-11-10 07:45:10,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:10,218 INFO L225 Difference]: With dead ends: 289 [2018-11-10 07:45:10,218 INFO L226 Difference]: Without dead ends: 289 [2018-11-10 07:45:10,219 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 130 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 309 ImplicationChecksByTransitivity, 16.5s TimeCoverageRelationStatistics Valid=263, Invalid=1228, Unknown=3, NotChecked=228, Total=1722 [2018-11-10 07:45:10,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2018-11-10 07:45:10,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 218. [2018-11-10 07:45:10,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-11-10 07:45:10,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 242 transitions. [2018-11-10 07:45:10,222 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 242 transitions. Word has length 39 [2018-11-10 07:45:10,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:10,222 INFO L481 AbstractCegarLoop]: Abstraction has 218 states and 242 transitions. [2018-11-10 07:45:10,222 INFO L482 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-11-10 07:45:10,222 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 242 transitions. [2018-11-10 07:45:10,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:45:10,223 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:10,223 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:10,223 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:10,224 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:10,224 INFO L82 PathProgramCache]: Analyzing trace with hash -895077231, now seen corresponding path program 1 times [2018-11-10 07:45:10,224 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:10,224 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:10,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:10,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:10,366 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:10,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:10,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:10,394 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,400 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:10,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:10,425 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,428 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,441 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,441 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-11-10 07:45:10,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:10,467 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:10,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:10,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,479 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:10,503 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:10,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:10,505 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,512 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,525 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,525 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:44, output treesize:18 [2018-11-10 07:45:10,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:10,565 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:10,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:10,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,577 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:10,599 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:10,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:10,602 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,609 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,623 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:44, output treesize:18 [2018-11-10 07:45:10,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:10,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:45:10,662 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,663 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:10,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:45:10,675 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,677 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,681 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:29, output treesize:7 [2018-11-10 07:45:10,699 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:10,699 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:10,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-11-10 07:45:10,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:10,896 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-11-10 07:45:10,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-11-10 07:45:10,936 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:10,952 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:10,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-11-10 07:45:10,971 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-11-10 07:45:10,978 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:10,984 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:10,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-11-10 07:45:10,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:10,999 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-11-10 07:45:11,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-11-10 07:45:11,037 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-11-10 07:45:11,058 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-11-10 07:45:11,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:11,068 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,074 INFO L267 ElimStorePlain]: Start of recursive call 10: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:11,081 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:11,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 07:45:11,089 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 4 variables, input treesize:41, output treesize:13 [2018-11-10 07:45:11,120 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:11,122 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:11,122 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:45:11,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:11,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:11,172 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:11,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:11,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:11,191 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:11,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:11,233 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,239 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,252 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 [2018-11-10 07:45:11,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:11,311 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:11,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:11,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,326 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:11,353 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:11,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:11,356 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,369 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,385 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,385 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15 [2018-11-10 07:45:11,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:11,448 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:11,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:11,451 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,462 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:11,490 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:11,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:11,492 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,503 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,518 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,518 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15 [2018-11-10 07:45:11,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:11,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:45:11,523 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,526 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:11,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:45:11,535 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,537 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,543 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,543 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:29, output treesize:7 [2018-11-10 07:45:11,547 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:11,547 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:11,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-11-10 07:45:11,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:11,587 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-11-10 07:45:11,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-11-10 07:45:11,633 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-11-10 07:45:11,656 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-10 07:45:11,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:11,667 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,674 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:11,680 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:11,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-11-10 07:45:11,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:11,695 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-11-10 07:45:11,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-11-10 07:45:11,732 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-11-10 07:45:11,754 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-11-10 07:45:11,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:11,765 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:11,772 INFO L267 ElimStorePlain]: Start of recursive call 10: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:11,778 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:45:11,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 07:45:11,786 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 4 variables, input treesize:41, output treesize:13 [2018-11-10 07:45:11,790 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:11,807 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-10 07:45:11,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 9, 8] total 16 [2018-11-10 07:45:11,807 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 07:45:11,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 07:45:11,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-11-10 07:45:11,808 INFO L87 Difference]: Start difference. First operand 218 states and 242 transitions. Second operand 16 states. [2018-11-10 07:45:13,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:13,577 INFO L93 Difference]: Finished difference Result 262 states and 285 transitions. [2018-11-10 07:45:13,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-10 07:45:13,578 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 41 [2018-11-10 07:45:13,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:13,578 INFO L225 Difference]: With dead ends: 262 [2018-11-10 07:45:13,579 INFO L226 Difference]: Without dead ends: 262 [2018-11-10 07:45:13,579 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 146 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=120, Invalid=480, Unknown=0, NotChecked=0, Total=600 [2018-11-10 07:45:13,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-11-10 07:45:13,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 249. [2018-11-10 07:45:13,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-11-10 07:45:13,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 277 transitions. [2018-11-10 07:45:13,581 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 277 transitions. Word has length 41 [2018-11-10 07:45:13,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:13,582 INFO L481 AbstractCegarLoop]: Abstraction has 249 states and 277 transitions. [2018-11-10 07:45:13,582 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 07:45:13,582 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 277 transitions. [2018-11-10 07:45:13,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:45:13,582 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:13,582 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:13,583 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:13,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:13,583 INFO L82 PathProgramCache]: Analyzing trace with hash -1232492750, now seen corresponding path program 1 times [2018-11-10 07:45:13,583 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:13,583 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:13,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:13,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:13,879 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:13,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:13,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:45:13,885 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:13,886 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:13,887 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:13,887 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-11-10 07:45:13,943 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:13,943 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:45:13,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:45:13,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 07:45:13,945 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:45:13,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:45:13,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:45:13,946 INFO L87 Difference]: Start difference. First operand 249 states and 277 transitions. Second operand 6 states. [2018-11-10 07:45:14,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:14,730 INFO L93 Difference]: Finished difference Result 248 states and 276 transitions. [2018-11-10 07:45:14,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:45:14,731 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2018-11-10 07:45:14,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:14,732 INFO L225 Difference]: With dead ends: 248 [2018-11-10 07:45:14,732 INFO L226 Difference]: Without dead ends: 248 [2018-11-10 07:45:14,732 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:45:14,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-11-10 07:45:14,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2018-11-10 07:45:14,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-11-10 07:45:14,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 276 transitions. [2018-11-10 07:45:14,735 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 276 transitions. Word has length 41 [2018-11-10 07:45:14,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:14,735 INFO L481 AbstractCegarLoop]: Abstraction has 248 states and 276 transitions. [2018-11-10 07:45:14,735 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:45:14,735 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 276 transitions. [2018-11-10 07:45:14,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:45:14,735 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:14,735 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:14,736 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:14,736 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:14,736 INFO L82 PathProgramCache]: Analyzing trace with hash -73627468, now seen corresponding path program 1 times [2018-11-10 07:45:14,736 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:14,736 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:14,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:14,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:14,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:14,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:45:14,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:45:14,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:14,893 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:14,898 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:14,898 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-11-10 07:45:14,936 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:14,936 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:45:14,939 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:45:14,939 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 07:45:14,940 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:45:14,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:45:14,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:45:14,940 INFO L87 Difference]: Start difference. First operand 248 states and 276 transitions. Second operand 8 states. [2018-11-10 07:45:16,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:16,220 INFO L93 Difference]: Finished difference Result 352 states and 388 transitions. [2018-11-10 07:45:16,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 07:45:16,221 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-11-10 07:45:16,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:16,221 INFO L225 Difference]: With dead ends: 352 [2018-11-10 07:45:16,221 INFO L226 Difference]: Without dead ends: 352 [2018-11-10 07:45:16,221 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:45:16,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2018-11-10 07:45:16,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 248. [2018-11-10 07:45:16,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-11-10 07:45:16,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 275 transitions. [2018-11-10 07:45:16,224 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 275 transitions. Word has length 44 [2018-11-10 07:45:16,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:16,225 INFO L481 AbstractCegarLoop]: Abstraction has 248 states and 275 transitions. [2018-11-10 07:45:16,225 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:45:16,225 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 275 transitions. [2018-11-10 07:45:16,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:45:16,225 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:16,225 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:16,225 INFO L424 AbstractCegarLoop]: === Iteration 43 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:16,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:16,225 INFO L82 PathProgramCache]: Analyzing trace with hash 2119239926, now seen corresponding path program 1 times [2018-11-10 07:45:16,226 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:16,226 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:16,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:16,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:16,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:16,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:16,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:45:16,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:16,566 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:16,570 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:16,570 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-11-10 07:45:16,683 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:16,683 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:45:16,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:45:16,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 07:45:16,685 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:45:16,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:45:16,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:45:16,685 INFO L87 Difference]: Start difference. First operand 248 states and 275 transitions. Second operand 8 states. [2018-11-10 07:45:17,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:17,904 INFO L93 Difference]: Finished difference Result 264 states and 293 transitions. [2018-11-10 07:45:17,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 07:45:17,905 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2018-11-10 07:45:17,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:17,906 INFO L225 Difference]: With dead ends: 264 [2018-11-10 07:45:17,906 INFO L226 Difference]: Without dead ends: 264 [2018-11-10 07:45:17,906 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-11-10 07:45:17,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-11-10 07:45:17,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 247. [2018-11-10 07:45:17,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-11-10 07:45:17,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 274 transitions. [2018-11-10 07:45:17,908 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 274 transitions. Word has length 45 [2018-11-10 07:45:17,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:17,908 INFO L481 AbstractCegarLoop]: Abstraction has 247 states and 274 transitions. [2018-11-10 07:45:17,908 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:45:17,908 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 274 transitions. [2018-11-10 07:45:17,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:45:17,909 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:17,909 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:17,909 INFO L424 AbstractCegarLoop]: === Iteration 44 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:17,909 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:17,909 INFO L82 PathProgramCache]: Analyzing trace with hash 1572123160, now seen corresponding path program 1 times [2018-11-10 07:45:17,909 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:17,910 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:17,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:18,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:18,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:18,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:45:18,110 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,117 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 07:45:18,127 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:18,128 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:18,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 07:45:18,129 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,138 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,139 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:16 [2018-11-10 07:45:18,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 07:45:18,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 07:45:18,157 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,160 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,174 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-11-10 07:45:18,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-11-10 07:45:18,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:45:18,214 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,221 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,229 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:14 [2018-11-10 07:45:18,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2018-11-10 07:45:18,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-10 07:45:18,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,285 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:18,286 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:10, output treesize:1 [2018-11-10 07:45:18,312 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:18,313 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 07:45:18,314 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:45:18,314 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-10 07:45:18,314 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 07:45:18,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 07:45:18,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:45:18,315 INFO L87 Difference]: Start difference. First operand 247 states and 274 transitions. Second operand 11 states. [2018-11-10 07:45:20,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:20,728 INFO L93 Difference]: Finished difference Result 329 states and 361 transitions. [2018-11-10 07:45:20,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-10 07:45:20,729 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 46 [2018-11-10 07:45:20,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:20,729 INFO L225 Difference]: With dead ends: 329 [2018-11-10 07:45:20,729 INFO L226 Difference]: Without dead ends: 329 [2018-11-10 07:45:20,730 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=211, Invalid=659, Unknown=0, NotChecked=0, Total=870 [2018-11-10 07:45:20,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-11-10 07:45:20,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 247. [2018-11-10 07:45:20,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-11-10 07:45:20,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 273 transitions. [2018-11-10 07:45:20,731 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 273 transitions. Word has length 46 [2018-11-10 07:45:20,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:20,731 INFO L481 AbstractCegarLoop]: Abstraction has 247 states and 273 transitions. [2018-11-10 07:45:20,731 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 07:45:20,732 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 273 transitions. [2018-11-10 07:45:20,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 07:45:20,732 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:20,732 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:20,732 INFO L424 AbstractCegarLoop]: === Iteration 45 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:20,733 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:20,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1271928381, now seen corresponding path program 1 times [2018-11-10 07:45:20,733 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:20,733 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:20,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:21,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:21,159 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:21,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:21,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:45:21,167 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,168 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:21,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-10 07:45:21,183 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,183 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,189 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,189 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-11-10 07:45:21,199 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:21,200 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:21,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-10 07:45:21,201 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,215 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:23 [2018-11-10 07:45:21,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:21,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:21,237 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,240 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,258 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:31 [2018-11-10 07:45:21,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-10 07:45:21,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:45:21,309 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,317 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:27 [2018-11-10 07:45:21,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:45:21,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:45:21,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,351 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:21,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:21,364 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:17 [2018-11-10 07:45:21,389 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:21,389 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:23,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 35 [2018-11-10 07:45:23,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:23,630 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-11-10 07:45:23,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-11-10 07:45:23,664 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,675 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-10 07:45:23,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:23,680 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,686 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 07:45:23,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 53 [2018-11-10 07:45:23,903 WARN L179 SmtUtils]: Spent 146.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-11-10 07:45:23,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-11-10 07:45:23,906 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-11-10 07:45:23,909 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-11-10 07:45:23,912 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:23,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-11-10 07:45:23,915 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 [2018-11-10 07:45:24,153 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 33 [2018-11-10 07:45:24,159 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-11-10 07:45:24,164 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-11-10 07:45:24,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:24,377 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:24,390 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,401 INFO L267 ElimStorePlain]: Start of recursive call 16: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 30 [2018-11-10 07:45:24,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:24,410 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:24,425 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,437 INFO L267 ElimStorePlain]: Start of recursive call 19: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-11-10 07:45:24,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:24,445 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:24,458 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,470 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,638 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-11-10 07:45:24,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-11-10 07:45:24,643 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,654 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-11-10 07:45:24,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-11-10 07:45:24,664 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,673 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:24,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-11-10 07:45:24,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2018-11-10 07:45:24,682 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,694 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 31 [2018-11-10 07:45:24,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-11-10 07:45:24,837 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-10 07:45:24,868 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,892 INFO L267 ElimStorePlain]: Start of recursive call 31: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:24,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-11-10 07:45:24,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-11-10 07:45:24,909 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-11-10 07:45:24,939 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:24,960 INFO L267 ElimStorePlain]: Start of recursive call 34: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:25,059 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 9 xjuncts. [2018-11-10 07:45:25,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 75 treesize of output 67 [2018-11-10 07:45:25,516 WARN L179 SmtUtils]: Spent 393.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 73 [2018-11-10 07:45:25,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:45:25,519 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-11-10 07:45:25,523 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-11-10 07:45:25,527 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 42 [2018-11-10 07:45:25,530 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:45:25,533 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-11-10 07:45:25,536 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-11-10 07:45:25,539 INFO L267 ElimStorePlain]: Start of recursive call 44: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 42 [2018-11-10 07:45:25,542 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-10 07:45:25,545 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-10 07:45:25,548 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-10 07:45:25,552 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-11-10 07:45:25,871 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-11-10 07:45:25,874 INFO L267 ElimStorePlain]: Start of recursive call 50: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:25,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 41 [2018-11-10 07:45:25,895 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 2 xjuncts. [2018-11-10 07:45:25,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-11-10 07:45:25,899 INFO L267 ElimStorePlain]: Start of recursive call 52: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2018-11-10 07:45:26,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:26,159 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:26,173 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,184 INFO L267 ElimStorePlain]: Start of recursive call 53: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-11-10 07:45:26,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:26,192 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-10 07:45:26,203 INFO L267 ElimStorePlain]: Start of recursive call 58: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,213 INFO L267 ElimStorePlain]: Start of recursive call 56: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-11-10 07:45:26,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:26,221 INFO L267 ElimStorePlain]: Start of recursive call 60: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:26,236 INFO L267 ElimStorePlain]: Start of recursive call 61: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,244 INFO L267 ElimStorePlain]: Start of recursive call 59: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-11-10 07:45:26,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:26,252 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:26,261 INFO L267 ElimStorePlain]: Start of recursive call 64: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,267 INFO L267 ElimStorePlain]: Start of recursive call 62: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-11-10 07:45:26,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-11-10 07:45:26,492 INFO L267 ElimStorePlain]: Start of recursive call 66: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 22 [2018-11-10 07:45:26,527 INFO L267 ElimStorePlain]: Start of recursive call 67: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:26,553 INFO L267 ElimStorePlain]: Start of recursive call 65: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:45:26,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 32 [2018-11-10 07:45:26,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-11-10 07:45:26,567 INFO L267 ElimStorePlain]: Start of recursive call 69: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 23 [2018-11-10 07:45:26,595 INFO L267 ElimStorePlain]: Start of recursive call 70: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:26,618 INFO L267 ElimStorePlain]: Start of recursive call 68: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:45:26,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-11-10 07:45:26,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-11-10 07:45:26,634 INFO L267 ElimStorePlain]: Start of recursive call 72: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:26,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-11-10 07:45:26,662 INFO L267 ElimStorePlain]: Start of recursive call 73: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:26,685 INFO L267 ElimStorePlain]: Start of recursive call 71: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:45:26,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 37 [2018-11-10 07:45:26,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:45:26,702 INFO L267 ElimStorePlain]: Start of recursive call 75: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,734 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:26,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2018-11-10 07:45:26,734 INFO L267 ElimStorePlain]: Start of recursive call 76: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,748 INFO L267 ElimStorePlain]: Start of recursive call 74: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:26,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-11-10 07:45:26,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 17 [2018-11-10 07:45:26,954 INFO L267 ElimStorePlain]: Start of recursive call 78: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:26,974 INFO L267 ElimStorePlain]: Start of recursive call 77: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:26,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-11-10 07:45:26,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-11-10 07:45:26,986 INFO L267 ElimStorePlain]: Start of recursive call 80: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:27,001 INFO L267 ElimStorePlain]: Start of recursive call 79: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:27,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-11-10 07:45:27,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-11-10 07:45:27,013 INFO L267 ElimStorePlain]: Start of recursive call 82: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:27,028 INFO L267 ElimStorePlain]: Start of recursive call 81: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:27,230 INFO L267 ElimStorePlain]: Start of recursive call 37: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 15 xjuncts. [2018-11-10 07:45:27,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 38 [2018-11-10 07:45:27,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:27,279 INFO L267 ElimStorePlain]: Start of recursive call 84: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 22 [2018-11-10 07:45:27,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:27,313 INFO L267 ElimStorePlain]: Start of recursive call 86: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-10 07:45:27,321 INFO L267 ElimStorePlain]: Start of recursive call 87: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:27,327 INFO L267 ElimStorePlain]: Start of recursive call 85: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:27,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-11-10 07:45:27,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:27,335 INFO L267 ElimStorePlain]: Start of recursive call 89: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:27,345 INFO L267 ElimStorePlain]: Start of recursive call 90: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,352 INFO L267 ElimStorePlain]: Start of recursive call 88: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-11-10 07:45:27,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:27,360 INFO L267 ElimStorePlain]: Start of recursive call 92: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,368 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:27,369 INFO L267 ElimStorePlain]: Start of recursive call 93: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:27,374 INFO L267 ElimStorePlain]: Start of recursive call 91: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:27,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2018-11-10 07:45:27,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:27,381 INFO L267 ElimStorePlain]: Start of recursive call 95: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:27,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:27,390 INFO L267 ElimStorePlain]: Start of recursive call 96: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:27,395 INFO L267 ElimStorePlain]: Start of recursive call 94: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:27,426 INFO L267 ElimStorePlain]: Start of recursive call 83: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-11-10 07:45:27,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 31 dim-0 vars, and 28 xjuncts. [2018-11-10 07:45:27,921 INFO L202 ElimStorePlain]: Needed 96 recursive calls to eliminate 3 variables, input treesize:57, output treesize:382 [2018-11-10 07:45:28,094 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:45:28,096 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:45:28,097 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:28,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 10 [2018-11-10 07:45:28,098 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,105 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,105 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:3 [2018-11-10 07:45:28,111 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:28,114 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:28,114 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:45:28,121 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:28,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:28,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:28,174 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:28,176 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:28,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-10 07:45:28,177 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,189 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,190 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:23 [2018-11-10 07:45:28,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:28,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:28,198 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,201 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,216 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:31 [2018-11-10 07:45:28,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-10 07:45:28,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-10 07:45:28,233 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,241 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,251 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,251 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:27 [2018-11-10 07:45:28,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:45:28,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 07:45:28,256 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,266 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:17 [2018-11-10 07:45:28,268 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:28,268 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:28,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 38 [2018-11-10 07:45:28,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:28,412 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-11-10 07:45:28,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:28,447 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:28,458 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,463 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-11-10 07:45:28,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:28,471 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:28,483 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,488 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-11-10 07:45:28,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:28,495 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:28,505 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,511 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 24 [2018-11-10 07:45:28,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:28,518 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:28,526 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,532 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:28,561 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-11-10 07:45:28,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 37 [2018-11-10 07:45:28,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:45:28,602 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-10 07:45:28,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:28,634 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,642 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-11-10 07:45:28,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-11-10 07:45:28,649 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,656 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:28,678 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 07:45:28,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 77 treesize of output 69 [2018-11-10 07:45:29,092 WARN L179 SmtUtils]: Spent 356.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 76 [2018-11-10 07:45:29,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:45:29,095 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-11-10 07:45:29,099 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-11-10 07:45:29,102 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-10 07:45:29,106 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-10 07:45:29,109 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-11-10 07:45:29,112 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-11-10 07:45:29,116 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-11-10 07:45:29,119 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 42 [2018-11-10 07:45:29,122 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-10 07:45:29,125 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 42 [2018-11-10 07:45:29,129 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 41 [2018-11-10 07:45:29,515 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 2 xjuncts. [2018-11-10 07:45:29,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-11-10 07:45:29,521 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-11-10 07:45:29,525 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-11-10 07:45:29,528 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-11-10 07:45:29,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 17 [2018-11-10 07:45:29,774 INFO L267 ElimStorePlain]: Start of recursive call 39: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:29,794 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:29,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-10 07:45:29,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2018-11-10 07:45:29,802 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,812 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:29,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-11-10 07:45:29,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-11-10 07:45:29,825 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:29,840 INFO L267 ElimStorePlain]: Start of recursive call 42: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:29,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-11-10 07:45:29,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-11-10 07:45:29,853 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:29,870 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:30,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-11-10 07:45:30,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-11-10 07:45:30,135 INFO L267 ElimStorePlain]: Start of recursive call 47: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 20 [2018-11-10 07:45:30,170 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:30,195 INFO L267 ElimStorePlain]: Start of recursive call 46: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:45:30,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 37 [2018-11-10 07:45:30,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 07:45:30,213 INFO L267 ElimStorePlain]: Start of recursive call 50: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:30,242 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:30,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2018-11-10 07:45:30,243 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:30,256 INFO L267 ElimStorePlain]: Start of recursive call 49: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:30,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 32 [2018-11-10 07:45:30,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-11-10 07:45:30,272 INFO L267 ElimStorePlain]: Start of recursive call 53: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 23 [2018-11-10 07:45:30,301 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:30,324 INFO L267 ElimStorePlain]: Start of recursive call 52: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:45:30,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-11-10 07:45:30,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-11-10 07:45:30,347 INFO L267 ElimStorePlain]: Start of recursive call 56: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:30,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-11-10 07:45:30,374 INFO L267 ElimStorePlain]: Start of recursive call 57: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,398 INFO L267 ElimStorePlain]: Start of recursive call 55: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 07:45:30,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-11-10 07:45:30,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:30,610 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:30,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-10 07:45:30,622 INFO L267 ElimStorePlain]: Start of recursive call 60: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,630 INFO L267 ElimStorePlain]: Start of recursive call 58: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-11-10 07:45:30,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:30,637 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:30,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:30,646 INFO L267 ElimStorePlain]: Start of recursive call 63: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,654 INFO L267 ElimStorePlain]: Start of recursive call 61: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-11-10 07:45:30,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:30,662 INFO L267 ElimStorePlain]: Start of recursive call 65: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:30,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 07:45:30,671 INFO L267 ElimStorePlain]: Start of recursive call 66: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,679 INFO L267 ElimStorePlain]: Start of recursive call 64: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:30,866 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 15 xjuncts. [2018-11-10 07:45:30,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 53 [2018-11-10 07:45:31,139 WARN L179 SmtUtils]: Spent 193.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-11-10 07:45:31,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-11-10 07:45:31,142 INFO L267 ElimStorePlain]: Start of recursive call 68: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-11-10 07:45:31,145 INFO L267 ElimStorePlain]: Start of recursive call 69: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-11-10 07:45:31,149 INFO L267 ElimStorePlain]: Start of recursive call 70: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-11-10 07:45:31,152 INFO L267 ElimStorePlain]: Start of recursive call 71: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-11-10 07:45:31,378 INFO L267 ElimStorePlain]: Start of recursive call 72: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-11-10 07:45:31,383 INFO L267 ElimStorePlain]: Start of recursive call 73: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 30 [2018-11-10 07:45:31,386 INFO L267 ElimStorePlain]: Start of recursive call 74: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2018-11-10 07:45:31,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-11-10 07:45:31,573 INFO L267 ElimStorePlain]: Start of recursive call 76: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,583 INFO L267 ElimStorePlain]: Start of recursive call 75: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-11-10 07:45:31,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-11-10 07:45:31,591 INFO L267 ElimStorePlain]: Start of recursive call 78: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,603 INFO L267 ElimStorePlain]: Start of recursive call 77: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-11-10 07:45:31,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 14 [2018-11-10 07:45:31,613 INFO L267 ElimStorePlain]: Start of recursive call 80: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,627 INFO L267 ElimStorePlain]: Start of recursive call 79: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-11-10 07:45:31,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:31,793 INFO L267 ElimStorePlain]: Start of recursive call 82: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-11-10 07:45:31,806 INFO L267 ElimStorePlain]: Start of recursive call 83: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,817 INFO L267 ElimStorePlain]: Start of recursive call 81: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 35 [2018-11-10 07:45:31,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-10 07:45:31,836 INFO L267 ElimStorePlain]: Start of recursive call 85: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-10 07:45:31,873 INFO L267 ElimStorePlain]: Start of recursive call 86: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-11-10 07:45:31,906 INFO L267 ElimStorePlain]: Start of recursive call 87: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,919 INFO L267 ElimStorePlain]: Start of recursive call 84: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-11-10 07:45:31,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 07:45:31,926 INFO L267 ElimStorePlain]: Start of recursive call 89: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:31,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:31,939 INFO L267 ElimStorePlain]: Start of recursive call 90: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:31,948 INFO L267 ElimStorePlain]: Start of recursive call 88: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:32,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 31 [2018-11-10 07:45:32,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-11-10 07:45:32,093 INFO L267 ElimStorePlain]: Start of recursive call 92: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:32,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-10 07:45:32,117 INFO L267 ElimStorePlain]: Start of recursive call 93: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:32,140 INFO L267 ElimStorePlain]: Start of recursive call 91: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:32,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-11-10 07:45:32,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-11-10 07:45:32,158 INFO L267 ElimStorePlain]: Start of recursive call 95: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:32,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-11-10 07:45:32,188 INFO L267 ElimStorePlain]: Start of recursive call 96: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 07:45:32,211 INFO L267 ElimStorePlain]: Start of recursive call 94: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 07:45:32,313 INFO L267 ElimStorePlain]: Start of recursive call 67: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 9 xjuncts. [2018-11-10 07:45:32,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 31 dim-0 vars, and 28 xjuncts. [2018-11-10 07:45:32,824 INFO L202 ElimStorePlain]: Needed 96 recursive calls to eliminate 3 variables, input treesize:57, output treesize:396 [2018-11-10 07:45:32,900 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:45:32,901 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:45:32,902 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:32,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 10 [2018-11-10 07:45:32,902 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:32,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:32,910 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:3 [2018-11-10 07:45:32,914 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:32,932 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-10 07:45:32,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 14 [2018-11-10 07:45:32,932 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-10 07:45:32,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-10 07:45:32,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=163, Unknown=1, NotChecked=0, Total=210 [2018-11-10 07:45:32,932 INFO L87 Difference]: Start difference. First operand 247 states and 273 transitions. Second operand 15 states. [2018-11-10 07:45:35,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:35,780 INFO L93 Difference]: Finished difference Result 340 states and 376 transitions. [2018-11-10 07:45:35,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:45:35,781 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 46 [2018-11-10 07:45:35,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:35,782 INFO L225 Difference]: With dead ends: 340 [2018-11-10 07:45:35,782 INFO L226 Difference]: Without dead ends: 340 [2018-11-10 07:45:35,782 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 170 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=113, Invalid=306, Unknown=1, NotChecked=0, Total=420 [2018-11-10 07:45:35,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-11-10 07:45:35,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 246. [2018-11-10 07:45:35,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-11-10 07:45:35,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 272 transitions. [2018-11-10 07:45:35,784 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 272 transitions. Word has length 46 [2018-11-10 07:45:35,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:35,784 INFO L481 AbstractCegarLoop]: Abstraction has 246 states and 272 transitions. [2018-11-10 07:45:35,784 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-10 07:45:35,784 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 272 transitions. [2018-11-10 07:45:35,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 07:45:35,784 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:35,784 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:35,785 INFO L424 AbstractCegarLoop]: === Iteration 46 === [mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 07:45:35,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:35,785 INFO L82 PathProgramCache]: Analyzing trace with hash 311917698, now seen corresponding path program 1 times [2018-11-10 07:45:35,785 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 07:45:35,785 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_99621773-dbb3-4991-80cc-c58af76f3389/bin-2019/utaipan/cvc4nyu Starting monitored process 50 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:45:35,804 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:35,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:36,029 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:36,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 07:45:36,032 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,058 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,058 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-11-10 07:45:36,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:36,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:36,085 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,089 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 07:45:36,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 07:45:36,107 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,109 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,123 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:39, output treesize:31 [2018-11-10 07:45:36,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:36,159 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:36,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:36,163 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,172 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:36,207 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:36,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 07:45:36,209 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,219 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,234 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:49, output treesize:23 [2018-11-10 07:45:36,250 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:36,253 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:36,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 07:45:36,254 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,270 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:36, output treesize:30 [2018-11-10 07:45:36,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:36,316 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:36,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-11-10 07:45:36,319 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 07:45:36,374 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 07:45:36,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-11-10 07:45:36,378 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,391 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,414 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,414 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:56, output treesize:40 [2018-11-10 07:45:36,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-11-10 07:45:36,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:45:36,514 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,526 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-11-10 07:45:36,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 07:45:36,559 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,571 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,589 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:74, output treesize:28 [2018-11-10 07:45:36,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-10 07:45:36,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-10 07:45:36,685 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,688 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-11-10 07:45:36,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 8 [2018-11-10 07:45:36,700 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,701 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:45:36,705 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:37, output treesize:7 [2018-11-10 07:45:36,733 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:36,734 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:45,473 WARN L179 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 45 [2018-11-10 07:46:12,289 WARN L179 SmtUtils]: Spent 4.23 s on a formula simplification that was a NOOP. DAG size: 55 [2018-11-10 07:46:12,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 61 [2018-11-10 07:46:12,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-11-10 07:46:12,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:12,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 7 case distinctions, treesize of input 39 treesize of output 74 [2018-11-10 07:46:14,287 WARN L179 SmtUtils]: Spent 1.74 s on a formula simplification. DAG size of input: 169 DAG size of output: 154 [2018-11-10 07:46:14,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 39 treesize of output 63 [2018-11-10 07:46:14,464 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:14,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 66 [2018-11-10 07:46:14,581 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:14,939 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:14,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 45 [2018-11-10 07:46:14,944 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:14,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 52 [2018-11-10 07:46:14,967 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:15,348 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:15,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 59 [2018-11-10 07:46:15,353 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:15,683 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:15,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 57 [2018-11-10 07:46:15,719 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 4 xjuncts. [2018-11-10 07:46:16,128 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:16,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 53 [2018-11-10 07:46:16,132 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:16,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 46 [2018-11-10 07:46:16,513 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:16,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 61 [2018-11-10 07:46:16,898 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 8 xjuncts. [2018-11-10 07:46:17,352 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:17,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-11-10 07:46:17,452 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:17,465 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:17,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-11-10 07:46:17,749 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:17,761 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:17,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-11-10 07:46:17,988 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:18,254 INFO L267 ElimStorePlain]: Start of recursive call 5: 8 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-11-10 07:46:20,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-11-10 07:46:20,519 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:20,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-11-10 07:46:20,525 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:20,563 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:46:22,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 46 [2018-11-10 07:46:22,642 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:22,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-11-10 07:46:22,647 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:22,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-11-10 07:46:22,704 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:22,742 INFO L267 ElimStorePlain]: Start of recursive call 19: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 07:46:25,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 47 [2018-11-10 07:46:25,013 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:25,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 48 [2018-11-10 07:46:25,017 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:25,115 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:25,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-11-10 07:46:25,397 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 2 xjuncts. [2018-11-10 07:46:25,547 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 07:46:27,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-11-10 07:46:27,681 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,681 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,682 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-10 07:46:27,696 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:27,712 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:46:27,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-11-10 07:46:27,722 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,722 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,723 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-10 07:46:27,735 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-11-10 07:46:27,750 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 07:46:27,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-11-10 07:46:27,768 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,769 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,769 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 07:46:27,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 49 [2018-11-10 07:46:27,810 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 8 xjuncts. [2018-11-10 07:46:27,888 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-10 07:46:29,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-11-10 07:46:29,994 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 50 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 07:46:29,994 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_932 term size 24 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:234) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-10 07:46:29,996 INFO L168 Benchmark]: Toolchain (without parser) took 553237.16 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.0 MB). Free memory was 943.3 MB in the beginning and 842.0 MB in the end (delta: 101.3 MB). Peak memory consumption was 301.0 MB. Max. memory is 11.5 GB. [2018-11-10 07:46:29,997 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:46:29,997 INFO L168 Benchmark]: CACSL2BoogieTranslator took 355.26 ms. Allocated memory is still 1.0 GB. Free memory was 943.3 MB in the beginning and 921.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-10 07:46:29,997 INFO L168 Benchmark]: Boogie Procedure Inliner took 85.23 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.8 MB). Free memory was 921.8 MB in the beginning and 1.1 GB in the end (delta: -200.7 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2018-11-10 07:46:29,997 INFO L168 Benchmark]: Boogie Preprocessor took 32.19 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:46:29,997 INFO L168 Benchmark]: RCFGBuilder took 827.44 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 79.3 MB). Peak memory consumption was 79.3 MB. Max. memory is 11.5 GB. [2018-11-10 07:46:29,997 INFO L168 Benchmark]: TraceAbstraction took 551934.31 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: -5.8 MB). Free memory was 1.0 GB in the beginning and 842.0 MB in the end (delta: 201.2 MB). Peak memory consumption was 265.1 MB. Max. memory is 11.5 GB. [2018-11-10 07:46:29,998 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 355.26 ms. Allocated memory is still 1.0 GB. Free memory was 943.3 MB in the beginning and 921.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 85.23 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.8 MB). Free memory was 921.8 MB in the beginning and 1.1 GB in the end (delta: -200.7 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 32.19 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 827.44 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 79.3 MB). Peak memory consumption was 79.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 551934.31 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: -5.8 MB). Free memory was 1.0 GB in the beginning and 842.0 MB in the end (delta: 201.2 MB). Peak memory consumption was 265.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_932 term size 24 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_932 term size 24: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...