./Ultimate.py --spec ../../sv-benchmarks/c/MemSafety.prp --file ../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7db66fa755812d372ccac4d56a0ec85104dbcc6e ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7db66fa755812d372ccac4d56a0ec85104dbcc6e ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_179 term size 41 --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 05:41:30,075 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 05:41:30,076 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 05:41:30,084 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 05:41:30,084 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 05:41:30,085 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 05:41:30,086 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 05:41:30,087 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 05:41:30,088 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 05:41:30,088 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 05:41:30,089 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 05:41:30,089 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 05:41:30,090 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 05:41:30,091 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 05:41:30,091 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 05:41:30,092 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 05:41:30,092 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 05:41:30,093 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 05:41:30,095 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 05:41:30,096 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 05:41:30,096 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 05:41:30,097 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 05:41:30,098 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 05:41:30,099 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 05:41:30,099 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 05:41:30,099 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 05:41:30,100 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 05:41:30,101 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 05:41:30,101 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 05:41:30,102 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 05:41:30,102 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 05:41:30,102 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 05:41:30,103 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 05:41:30,103 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 05:41:30,103 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 05:41:30,104 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 05:41:30,104 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-11-10 05:41:30,113 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 05:41:30,114 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 05:41:30,114 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 05:41:30,114 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-10 05:41:30,115 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-10 05:41:30,115 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-10 05:41:30,115 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-10 05:41:30,115 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-10 05:41:30,115 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-10 05:41:30,115 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-10 05:41:30,115 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-10 05:41:30,116 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 05:41:30,116 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 05:41:30,116 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 05:41:30,116 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 05:41:30,116 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-10 05:41:30,116 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 05:41:30,117 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 05:41:30,117 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 05:41:30,118 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-10 05:41:30,118 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 05:41:30,119 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 05:41:30,119 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7db66fa755812d372ccac4d56a0ec85104dbcc6e [2018-11-10 05:41:30,148 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 05:41:30,157 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 05:41:30,159 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 05:41:30,160 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 05:41:30,160 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 05:41:30,160 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-11-10 05:41:30,197 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/7c8108d56/afcdd6c484d54f97b0961f775dd37867/FLAGb0811f55e [2018-11-10 05:41:30,555 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 05:41:30,555 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-11-10 05:41:30,564 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/7c8108d56/afcdd6c484d54f97b0961f775dd37867/FLAGb0811f55e [2018-11-10 05:41:30,575 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/7c8108d56/afcdd6c484d54f97b0961f775dd37867 [2018-11-10 05:41:30,578 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 05:41:30,579 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 05:41:30,580 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 05:41:30,580 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 05:41:30,583 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 05:41:30,584 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:30,586 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66cdfcaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30, skipping insertion in model container [2018-11-10 05:41:30,586 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:30,595 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 05:41:30,625 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 05:41:30,845 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:41:30,853 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 05:41:30,886 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:41:30,919 INFO L193 MainTranslator]: Completed translation [2018-11-10 05:41:30,919 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30 WrapperNode [2018-11-10 05:41:30,919 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 05:41:30,920 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 05:41:30,920 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 05:41:30,920 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 05:41:30,965 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:30,974 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:30,994 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 05:41:30,994 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 05:41:30,994 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 05:41:30,994 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 05:41:31,000 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,003 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,003 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,010 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,013 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,015 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... [2018-11-10 05:41:31,017 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 05:41:31,017 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 05:41:31,018 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 05:41:31,018 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 05:41:31,018 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 05:41:31,056 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 05:41:31,057 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 05:41:31,057 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 05:41:31,057 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 05:41:31,057 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 05:41:31,057 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 05:41:31,057 INFO L130 BoogieDeclarations]: Found specification of procedure append [2018-11-10 05:41:31,057 INFO L138 BoogieDeclarations]: Found implementation of procedure append [2018-11-10 05:41:31,445 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 05:41:31,446 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:41:31 BoogieIcfgContainer [2018-11-10 05:41:31,446 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 05:41:31,446 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 05:41:31,447 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 05:41:31,449 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 05:41:31,449 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 05:41:30" (1/3) ... [2018-11-10 05:41:31,450 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1abdaf0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 05:41:31, skipping insertion in model container [2018-11-10 05:41:31,450 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:41:30" (2/3) ... [2018-11-10 05:41:31,450 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1abdaf0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 05:41:31, skipping insertion in model container [2018-11-10 05:41:31,450 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:41:31" (3/3) ... [2018-11-10 05:41:31,451 INFO L112 eAbstractionObserver]: Analyzing ICFG length_test03_true-valid-memsafety.i [2018-11-10 05:41:31,457 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 05:41:31,463 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 55 error locations. [2018-11-10 05:41:31,472 INFO L257 AbstractCegarLoop]: Starting to check reachability of 55 error locations. [2018-11-10 05:41:31,489 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 05:41:31,489 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-10 05:41:31,489 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 05:41:31,489 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 05:41:31,490 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 05:41:31,490 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 05:41:31,490 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 05:41:31,490 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 05:41:31,500 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states. [2018-11-10 05:41:31,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-11-10 05:41:31,507 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:31,507 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:31,509 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:31,514 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:31,514 INFO L82 PathProgramCache]: Analyzing trace with hash 1984049023, now seen corresponding path program 1 times [2018-11-10 05:41:31,515 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:31,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:31,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:31,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:31,552 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:31,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:31,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:31,624 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:31,624 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:41:31,624 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:31,627 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:41:31,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:41:31,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:31,637 INFO L87 Difference]: Start difference. First operand 141 states. Second operand 3 states. [2018-11-10 05:41:31,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:31,811 INFO L93 Difference]: Finished difference Result 141 states and 148 transitions. [2018-11-10 05:41:31,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:41:31,812 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-11-10 05:41:31,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:31,819 INFO L225 Difference]: With dead ends: 141 [2018-11-10 05:41:31,820 INFO L226 Difference]: Without dead ends: 138 [2018-11-10 05:41:31,821 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:31,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-11-10 05:41:31,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 136. [2018-11-10 05:41:31,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-10 05:41:31,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-11-10 05:41:31,854 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 7 [2018-11-10 05:41:31,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:31,855 INFO L481 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-11-10 05:41:31,855 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:41:31,855 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-11-10 05:41:31,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-11-10 05:41:31,855 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:31,855 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:31,856 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:31,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:31,857 INFO L82 PathProgramCache]: Analyzing trace with hash 1375977608, now seen corresponding path program 1 times [2018-11-10 05:41:31,857 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:31,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:31,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:31,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:31,858 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:31,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:31,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:31,898 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:31,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:41:31,899 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:31,900 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:41:31,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:41:31,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:31,901 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 3 states. [2018-11-10 05:41:32,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,026 INFO L93 Difference]: Finished difference Result 134 states and 140 transitions. [2018-11-10 05:41:32,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:41:32,026 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-11-10 05:41:32,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,027 INFO L225 Difference]: With dead ends: 134 [2018-11-10 05:41:32,027 INFO L226 Difference]: Without dead ends: 134 [2018-11-10 05:41:32,028 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:32,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-11-10 05:41:32,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-11-10 05:41:32,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-11-10 05:41:32,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-11-10 05:41:32,034 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 8 [2018-11-10 05:41:32,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,034 INFO L481 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-11-10 05:41:32,034 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:41:32,034 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-11-10 05:41:32,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-11-10 05:41:32,034 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,034 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,035 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,035 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,036 INFO L82 PathProgramCache]: Analyzing trace with hash -294367071, now seen corresponding path program 1 times [2018-11-10 05:41:32,036 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,037 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,037 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,075 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:32,075 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:41:32,075 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:32,076 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:41:32,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:41:32,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:41:32,076 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 5 states. [2018-11-10 05:41:32,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,236 INFO L93 Difference]: Finished difference Result 135 states and 142 transitions. [2018-11-10 05:41:32,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:41:32,236 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-11-10 05:41:32,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,241 INFO L225 Difference]: With dead ends: 135 [2018-11-10 05:41:32,242 INFO L226 Difference]: Without dead ends: 135 [2018-11-10 05:41:32,242 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:41:32,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-11-10 05:41:32,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 133. [2018-11-10 05:41:32,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-11-10 05:41:32,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 139 transitions. [2018-11-10 05:41:32,250 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 139 transitions. Word has length 9 [2018-11-10 05:41:32,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,250 INFO L481 AbstractCegarLoop]: Abstraction has 133 states and 139 transitions. [2018-11-10 05:41:32,251 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:41:32,251 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 139 transitions. [2018-11-10 05:41:32,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-10 05:41:32,251 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,251 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,252 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,253 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,253 INFO L82 PathProgramCache]: Analyzing trace with hash -535444566, now seen corresponding path program 1 times [2018-11-10 05:41:32,253 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,254 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,293 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:32,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:41:32,293 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:32,293 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:41:32,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:41:32,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:41:32,294 INFO L87 Difference]: Start difference. First operand 133 states and 139 transitions. Second operand 4 states. [2018-11-10 05:41:32,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,374 INFO L93 Difference]: Finished difference Result 132 states and 138 transitions. [2018-11-10 05:41:32,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:41:32,374 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-11-10 05:41:32,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,375 INFO L225 Difference]: With dead ends: 132 [2018-11-10 05:41:32,375 INFO L226 Difference]: Without dead ends: 132 [2018-11-10 05:41:32,375 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:41:32,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-10 05:41:32,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-11-10 05:41:32,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-11-10 05:41:32,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 138 transitions. [2018-11-10 05:41:32,381 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 138 transitions. Word has length 10 [2018-11-10 05:41:32,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,381 INFO L481 AbstractCegarLoop]: Abstraction has 132 states and 138 transitions. [2018-11-10 05:41:32,382 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:41:32,382 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 138 transitions. [2018-11-10 05:41:32,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-10 05:41:32,382 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,382 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,383 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,383 INFO L82 PathProgramCache]: Analyzing trace with hash 79516389, now seen corresponding path program 1 times [2018-11-10 05:41:32,383 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,384 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,413 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:32,413 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:41:32,413 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:32,413 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:41:32,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:41:32,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:41:32,414 INFO L87 Difference]: Start difference. First operand 132 states and 138 transitions. Second operand 5 states. [2018-11-10 05:41:32,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,516 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-11-10 05:41:32,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:41:32,516 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2018-11-10 05:41:32,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,517 INFO L225 Difference]: With dead ends: 133 [2018-11-10 05:41:32,517 INFO L226 Difference]: Without dead ends: 133 [2018-11-10 05:41:32,517 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:41:32,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-10 05:41:32,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 131. [2018-11-10 05:41:32,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-11-10 05:41:32,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 137 transitions. [2018-11-10 05:41:32,521 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 137 transitions. Word has length 13 [2018-11-10 05:41:32,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,522 INFO L481 AbstractCegarLoop]: Abstraction has 131 states and 137 transitions. [2018-11-10 05:41:32,522 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:41:32,522 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 137 transitions. [2018-11-10 05:41:32,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-10 05:41:32,522 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,522 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,523 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,523 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1829959186, now seen corresponding path program 1 times [2018-11-10 05:41:32,523 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,524 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,524 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,524 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,525 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:32,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:41:32,568 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:32,569 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:41:32,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:41:32,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:41:32,569 INFO L87 Difference]: Start difference. First operand 131 states and 137 transitions. Second operand 4 states. [2018-11-10 05:41:32,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,652 INFO L93 Difference]: Finished difference Result 132 states and 139 transitions. [2018-11-10 05:41:32,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:41:32,653 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-11-10 05:41:32,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,653 INFO L225 Difference]: With dead ends: 132 [2018-11-10 05:41:32,653 INFO L226 Difference]: Without dead ends: 132 [2018-11-10 05:41:32,654 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:41:32,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-10 05:41:32,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2018-11-10 05:41:32,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-11-10 05:41:32,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 136 transitions. [2018-11-10 05:41:32,658 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 136 transitions. Word has length 14 [2018-11-10 05:41:32,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,658 INFO L481 AbstractCegarLoop]: Abstraction has 130 states and 136 transitions. [2018-11-10 05:41:32,659 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:41:32,659 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 136 transitions. [2018-11-10 05:41:32,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-10 05:41:32,659 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,659 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,660 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,660 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,660 INFO L82 PathProgramCache]: Analyzing trace with hash -529089576, now seen corresponding path program 1 times [2018-11-10 05:41:32,660 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,661 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,691 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:32,691 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:41:32,691 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:32,691 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:41:32,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:41:32,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:32,692 INFO L87 Difference]: Start difference. First operand 130 states and 136 transitions. Second operand 3 states. [2018-11-10 05:41:32,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,777 INFO L93 Difference]: Finished difference Result 129 states and 135 transitions. [2018-11-10 05:41:32,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:41:32,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-11-10 05:41:32,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,778 INFO L225 Difference]: With dead ends: 129 [2018-11-10 05:41:32,778 INFO L226 Difference]: Without dead ends: 129 [2018-11-10 05:41:32,778 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:32,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-11-10 05:41:32,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-11-10 05:41:32,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-10 05:41:32,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 135 transitions. [2018-11-10 05:41:32,781 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 135 transitions. Word has length 18 [2018-11-10 05:41:32,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,782 INFO L481 AbstractCegarLoop]: Abstraction has 129 states and 135 transitions. [2018-11-10 05:41:32,782 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:41:32,782 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 135 transitions. [2018-11-10 05:41:32,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-10 05:41:32,782 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,782 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,783 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,783 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,783 INFO L82 PathProgramCache]: Analyzing trace with hash 778092487, now seen corresponding path program 1 times [2018-11-10 05:41:32,784 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,784 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,784 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,784 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,830 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:32,830 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:41:32,830 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:32,831 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:41:32,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:41:32,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:32,831 INFO L87 Difference]: Start difference. First operand 129 states and 135 transitions. Second operand 3 states. [2018-11-10 05:41:32,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:32,881 INFO L93 Difference]: Finished difference Result 128 states and 134 transitions. [2018-11-10 05:41:32,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:41:32,881 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2018-11-10 05:41:32,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:32,882 INFO L225 Difference]: With dead ends: 128 [2018-11-10 05:41:32,882 INFO L226 Difference]: Without dead ends: 128 [2018-11-10 05:41:32,883 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:32,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-11-10 05:41:32,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-11-10 05:41:32,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-10 05:41:32,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 134 transitions. [2018-11-10 05:41:32,886 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 134 transitions. Word has length 19 [2018-11-10 05:41:32,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:32,886 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 134 transitions. [2018-11-10 05:41:32,886 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:41:32,886 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 134 transitions. [2018-11-10 05:41:32,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-10 05:41:32,886 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:32,887 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:32,887 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:32,888 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:32,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1648936518, now seen corresponding path program 1 times [2018-11-10 05:41:32,888 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:32,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:32,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:32,889 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:32,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:32,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:32,999 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:33,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 05:41:33,000 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:33,000 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 05:41:33,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 05:41:33,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-10 05:41:33,000 INFO L87 Difference]: Start difference. First operand 128 states and 134 transitions. Second operand 9 states. [2018-11-10 05:41:33,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:33,305 INFO L93 Difference]: Finished difference Result 225 states and 236 transitions. [2018-11-10 05:41:33,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:41:33,305 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 20 [2018-11-10 05:41:33,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:33,306 INFO L225 Difference]: With dead ends: 225 [2018-11-10 05:41:33,306 INFO L226 Difference]: Without dead ends: 225 [2018-11-10 05:41:33,306 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-11-10 05:41:33,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-11-10 05:41:33,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 159. [2018-11-10 05:41:33,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-11-10 05:41:33,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 186 transitions. [2018-11-10 05:41:33,311 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 186 transitions. Word has length 20 [2018-11-10 05:41:33,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:33,311 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 186 transitions. [2018-11-10 05:41:33,311 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 05:41:33,311 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 186 transitions. [2018-11-10 05:41:33,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-10 05:41:33,312 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:33,312 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:33,313 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:33,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:33,313 INFO L82 PathProgramCache]: Analyzing trace with hash 422575657, now seen corresponding path program 1 times [2018-11-10 05:41:33,313 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:33,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:33,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:33,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:33,314 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:33,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:33,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:33,424 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:33,424 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-10 05:41:33,424 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:33,425 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 05:41:33,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 05:41:33,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-10 05:41:33,425 INFO L87 Difference]: Start difference. First operand 159 states and 186 transitions. Second operand 9 states. [2018-11-10 05:41:33,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:33,697 INFO L93 Difference]: Finished difference Result 249 states and 260 transitions. [2018-11-10 05:41:33,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:41:33,698 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-11-10 05:41:33,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:33,699 INFO L225 Difference]: With dead ends: 249 [2018-11-10 05:41:33,699 INFO L226 Difference]: Without dead ends: 249 [2018-11-10 05:41:33,699 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-11-10 05:41:33,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-11-10 05:41:33,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 188. [2018-11-10 05:41:33,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-11-10 05:41:33,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 235 transitions. [2018-11-10 05:41:33,704 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 235 transitions. Word has length 21 [2018-11-10 05:41:33,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:33,704 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 235 transitions. [2018-11-10 05:41:33,704 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 05:41:33,705 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 235 transitions. [2018-11-10 05:41:33,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 05:41:33,708 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:33,708 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:33,709 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:33,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:33,709 INFO L82 PathProgramCache]: Analyzing trace with hash 402418015, now seen corresponding path program 1 times [2018-11-10 05:41:33,709 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:33,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:33,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:33,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:33,710 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:33,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:33,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:33,852 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:33,853 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-10 05:41:33,853 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:33,853 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 05:41:33,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 05:41:33,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-10 05:41:33,853 INFO L87 Difference]: Start difference. First operand 188 states and 235 transitions. Second operand 10 states. [2018-11-10 05:41:34,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:34,339 INFO L93 Difference]: Finished difference Result 246 states and 257 transitions. [2018-11-10 05:41:34,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 05:41:34,340 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-11-10 05:41:34,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:34,341 INFO L225 Difference]: With dead ends: 246 [2018-11-10 05:41:34,341 INFO L226 Difference]: Without dead ends: 246 [2018-11-10 05:41:34,341 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-10 05:41:34,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-11-10 05:41:34,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 188. [2018-11-10 05:41:34,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-11-10 05:41:34,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 232 transitions. [2018-11-10 05:41:34,345 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 232 transitions. Word has length 24 [2018-11-10 05:41:34,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:34,345 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 232 transitions. [2018-11-10 05:41:34,345 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 05:41:34,346 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 232 transitions. [2018-11-10 05:41:34,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 05:41:34,346 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:34,346 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:34,347 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:34,347 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:34,347 INFO L82 PathProgramCache]: Analyzing trace with hash 402424037, now seen corresponding path program 1 times [2018-11-10 05:41:34,347 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:34,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:34,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,348 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:34,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:34,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:34,378 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:34,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:41:34,379 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:34,379 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:41:34,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:41:34,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:34,379 INFO L87 Difference]: Start difference. First operand 188 states and 232 transitions. Second operand 3 states. [2018-11-10 05:41:34,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:34,386 INFO L93 Difference]: Finished difference Result 190 states and 234 transitions. [2018-11-10 05:41:34,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:41:34,386 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-10 05:41:34,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:34,387 INFO L225 Difference]: With dead ends: 190 [2018-11-10 05:41:34,387 INFO L226 Difference]: Without dead ends: 190 [2018-11-10 05:41:34,387 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:34,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-11-10 05:41:34,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 190. [2018-11-10 05:41:34,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-11-10 05:41:34,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 234 transitions. [2018-11-10 05:41:34,390 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 234 transitions. Word has length 24 [2018-11-10 05:41:34,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:34,391 INFO L481 AbstractCegarLoop]: Abstraction has 190 states and 234 transitions. [2018-11-10 05:41:34,391 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:41:34,391 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 234 transitions. [2018-11-10 05:41:34,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 05:41:34,391 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:34,391 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:34,392 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:34,392 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:34,392 INFO L82 PathProgramCache]: Analyzing trace with hash 176661409, now seen corresponding path program 1 times [2018-11-10 05:41:34,393 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:34,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:34,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,393 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:34,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:34,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:34,430 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:34,430 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:41:34,430 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:34,430 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:41:34,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:41:34,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:41:34,431 INFO L87 Difference]: Start difference. First operand 190 states and 234 transitions. Second operand 5 states. [2018-11-10 05:41:34,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:34,581 INFO L93 Difference]: Finished difference Result 184 states and 225 transitions. [2018-11-10 05:41:34,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:41:34,582 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-11-10 05:41:34,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:34,583 INFO L225 Difference]: With dead ends: 184 [2018-11-10 05:41:34,583 INFO L226 Difference]: Without dead ends: 184 [2018-11-10 05:41:34,584 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:41:34,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-11-10 05:41:34,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-11-10 05:41:34,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-11-10 05:41:34,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 225 transitions. [2018-11-10 05:41:34,588 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 225 transitions. Word has length 26 [2018-11-10 05:41:34,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:34,588 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 225 transitions. [2018-11-10 05:41:34,588 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:41:34,588 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 225 transitions. [2018-11-10 05:41:34,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 05:41:34,589 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:34,589 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:34,589 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:34,590 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:34,590 INFO L82 PathProgramCache]: Analyzing trace with hash 182972007, now seen corresponding path program 1 times [2018-11-10 05:41:34,590 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:34,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:34,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,592 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:34,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:34,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:34,641 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:34,641 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:41:34,641 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:34,642 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 05:41:34,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 05:41:34,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:41:34,642 INFO L87 Difference]: Start difference. First operand 184 states and 225 transitions. Second operand 6 states. [2018-11-10 05:41:34,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:34,769 INFO L93 Difference]: Finished difference Result 180 states and 217 transitions. [2018-11-10 05:41:34,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:41:34,771 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-11-10 05:41:34,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:34,771 INFO L225 Difference]: With dead ends: 180 [2018-11-10 05:41:34,772 INFO L226 Difference]: Without dead ends: 180 [2018-11-10 05:41:34,772 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:41:34,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-11-10 05:41:34,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-11-10 05:41:34,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-11-10 05:41:34,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 217 transitions. [2018-11-10 05:41:34,775 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 217 transitions. Word has length 26 [2018-11-10 05:41:34,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:34,776 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 217 transitions. [2018-11-10 05:41:34,776 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 05:41:34,776 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 217 transitions. [2018-11-10 05:41:34,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 05:41:34,776 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:34,776 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:34,777 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:34,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:34,777 INFO L82 PathProgramCache]: Analyzing trace with hash 1181536563, now seen corresponding path program 1 times [2018-11-10 05:41:34,777 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:34,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:34,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:34,778 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:34,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:34,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:34,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:34,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:41:34,870 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:34,870 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:41:34,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:41:34,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:41:34,870 INFO L87 Difference]: Start difference. First operand 180 states and 217 transitions. Second operand 8 states. [2018-11-10 05:41:35,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:35,048 INFO L93 Difference]: Finished difference Result 189 states and 217 transitions. [2018-11-10 05:41:35,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:41:35,049 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-11-10 05:41:35,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:35,050 INFO L225 Difference]: With dead ends: 189 [2018-11-10 05:41:35,050 INFO L226 Difference]: Without dead ends: 189 [2018-11-10 05:41:35,051 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:41:35,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-10 05:41:35,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 150. [2018-11-10 05:41:35,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-11-10 05:41:35,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 165 transitions. [2018-11-10 05:41:35,053 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 165 transitions. Word has length 27 [2018-11-10 05:41:35,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:35,054 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 165 transitions. [2018-11-10 05:41:35,054 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:41:35,054 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 165 transitions. [2018-11-10 05:41:35,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 05:41:35,054 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:35,055 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:35,055 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:35,055 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:35,055 INFO L82 PathProgramCache]: Analyzing trace with hash 1377165122, now seen corresponding path program 1 times [2018-11-10 05:41:35,055 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:35,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:35,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,056 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:35,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:35,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:35,115 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:35,115 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:41:35,115 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:35,116 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:41:35,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:41:35,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:41:35,116 INFO L87 Difference]: Start difference. First operand 150 states and 165 transitions. Second operand 5 states. [2018-11-10 05:41:35,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:35,200 INFO L93 Difference]: Finished difference Result 148 states and 161 transitions. [2018-11-10 05:41:35,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:41:35,200 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-11-10 05:41:35,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:35,201 INFO L225 Difference]: With dead ends: 148 [2018-11-10 05:41:35,201 INFO L226 Difference]: Without dead ends: 148 [2018-11-10 05:41:35,201 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:41:35,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-11-10 05:41:35,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-11-10 05:41:35,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-10 05:41:35,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 161 transitions. [2018-11-10 05:41:35,204 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 161 transitions. Word has length 27 [2018-11-10 05:41:35,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:35,205 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 161 transitions. [2018-11-10 05:41:35,205 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:41:35,205 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 161 transitions. [2018-11-10 05:41:35,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 05:41:35,205 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:35,205 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:35,206 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:35,206 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:35,206 INFO L82 PathProgramCache]: Analyzing trace with hash 1585276725, now seen corresponding path program 1 times [2018-11-10 05:41:35,206 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:35,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:35,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,207 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:35,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:35,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:35,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:35,272 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:41:35,272 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:35,272 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:41:35,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:41:35,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:41:35,272 INFO L87 Difference]: Start difference. First operand 148 states and 161 transitions. Second operand 8 states. [2018-11-10 05:41:35,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:35,404 INFO L93 Difference]: Finished difference Result 156 states and 163 transitions. [2018-11-10 05:41:35,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:41:35,404 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-11-10 05:41:35,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:35,405 INFO L225 Difference]: With dead ends: 156 [2018-11-10 05:41:35,405 INFO L226 Difference]: Without dead ends: 156 [2018-11-10 05:41:35,406 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:41:35,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-11-10 05:41:35,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 148. [2018-11-10 05:41:35,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-10 05:41:35,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 159 transitions. [2018-11-10 05:41:35,409 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 159 transitions. Word has length 29 [2018-11-10 05:41:35,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:35,409 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 159 transitions. [2018-11-10 05:41:35,409 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:41:35,409 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 159 transitions. [2018-11-10 05:41:35,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 05:41:35,410 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:35,410 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:35,410 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:35,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:35,411 INFO L82 PathProgramCache]: Analyzing trace with hash 605761572, now seen corresponding path program 1 times [2018-11-10 05:41:35,411 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:35,411 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,411 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:35,411 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,411 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:35,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:35,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:35,465 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:35,465 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 05:41:35,465 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:35,466 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 05:41:35,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 05:41:35,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:41:35,466 INFO L87 Difference]: Start difference. First operand 148 states and 159 transitions. Second operand 6 states. [2018-11-10 05:41:35,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:35,583 INFO L93 Difference]: Finished difference Result 150 states and 159 transitions. [2018-11-10 05:41:35,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:41:35,583 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2018-11-10 05:41:35,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:35,584 INFO L225 Difference]: With dead ends: 150 [2018-11-10 05:41:35,584 INFO L226 Difference]: Without dead ends: 150 [2018-11-10 05:41:35,584 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:41:35,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-11-10 05:41:35,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 146. [2018-11-10 05:41:35,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-11-10 05:41:35,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-11-10 05:41:35,587 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 29 [2018-11-10 05:41:35,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:35,588 INFO L481 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-11-10 05:41:35,588 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 05:41:35,588 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-11-10 05:41:35,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 05:41:35,588 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:35,588 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:35,589 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:35,589 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:35,589 INFO L82 PathProgramCache]: Analyzing trace with hash -1209380723, now seen corresponding path program 1 times [2018-11-10 05:41:35,589 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:35,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:35,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:35,590 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:35,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:35,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:35,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:35,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-10 05:41:35,725 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:35,726 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 05:41:35,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 05:41:35,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:41:35,726 INFO L87 Difference]: Start difference. First operand 146 states and 155 transitions. Second operand 12 states. [2018-11-10 05:41:36,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:36,008 INFO L93 Difference]: Finished difference Result 163 states and 174 transitions. [2018-11-10 05:41:36,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 05:41:36,008 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-11-10 05:41:36,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:36,009 INFO L225 Difference]: With dead ends: 163 [2018-11-10 05:41:36,009 INFO L226 Difference]: Without dead ends: 163 [2018-11-10 05:41:36,010 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2018-11-10 05:41:36,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-11-10 05:41:36,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 154. [2018-11-10 05:41:36,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-10 05:41:36,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 164 transitions. [2018-11-10 05:41:36,014 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 164 transitions. Word has length 32 [2018-11-10 05:41:36,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:36,014 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 164 transitions. [2018-11-10 05:41:36,014 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 05:41:36,014 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 164 transitions. [2018-11-10 05:41:36,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 05:41:36,015 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:36,015 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:36,015 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:36,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:36,015 INFO L82 PathProgramCache]: Analyzing trace with hash -394987703, now seen corresponding path program 1 times [2018-11-10 05:41:36,015 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:36,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:36,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:36,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:36,016 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:36,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:36,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:36,221 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:36,222 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-10 05:41:36,222 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:36,222 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-10 05:41:36,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-10 05:41:36,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-11-10 05:41:36,222 INFO L87 Difference]: Start difference. First operand 154 states and 164 transitions. Second operand 13 states. [2018-11-10 05:41:36,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:36,522 INFO L93 Difference]: Finished difference Result 159 states and 169 transitions. [2018-11-10 05:41:36,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 05:41:36,523 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-11-10 05:41:36,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:36,523 INFO L225 Difference]: With dead ends: 159 [2018-11-10 05:41:36,523 INFO L226 Difference]: Without dead ends: 159 [2018-11-10 05:41:36,523 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2018-11-10 05:41:36,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-11-10 05:41:36,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 157. [2018-11-10 05:41:36,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-11-10 05:41:36,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 167 transitions. [2018-11-10 05:41:36,526 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 167 transitions. Word has length 34 [2018-11-10 05:41:36,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:36,526 INFO L481 AbstractCegarLoop]: Abstraction has 157 states and 167 transitions. [2018-11-10 05:41:36,526 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-10 05:41:36,526 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 167 transitions. [2018-11-10 05:41:36,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 05:41:36,527 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:36,527 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:36,527 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:36,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:36,528 INFO L82 PathProgramCache]: Analyzing trace with hash 226936518, now seen corresponding path program 1 times [2018-11-10 05:41:36,528 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:36,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:36,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:36,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:36,529 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:36,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:36,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:36,575 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:36,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:41:36,575 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:36,575 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:41:36,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:41:36,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:36,576 INFO L87 Difference]: Start difference. First operand 157 states and 167 transitions. Second operand 3 states. [2018-11-10 05:41:36,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:36,586 INFO L93 Difference]: Finished difference Result 172 states and 183 transitions. [2018-11-10 05:41:36,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:41:36,587 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2018-11-10 05:41:36,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:36,587 INFO L225 Difference]: With dead ends: 172 [2018-11-10 05:41:36,588 INFO L226 Difference]: Without dead ends: 172 [2018-11-10 05:41:36,588 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:41:36,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-11-10 05:41:36,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 161. [2018-11-10 05:41:36,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-10 05:41:36,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 171 transitions. [2018-11-10 05:41:36,591 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 171 transitions. Word has length 42 [2018-11-10 05:41:36,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:36,591 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 171 transitions. [2018-11-10 05:41:36,591 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:41:36,591 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 171 transitions. [2018-11-10 05:41:36,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 05:41:36,592 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:36,592 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:36,592 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:36,593 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:36,594 INFO L82 PathProgramCache]: Analyzing trace with hash 577923455, now seen corresponding path program 1 times [2018-11-10 05:41:36,594 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:36,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:36,595 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:36,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:36,595 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:36,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:36,730 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:36,730 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:36,730 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 05:41:36,731 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-11-10 05:41:36,732 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [31], [37], [41], [46], [125], [127], [129], [130], [131], [133], [136], [138], [140], [146], [148], [150], [152], [154], [156], [158], [160], [162], [188], [189], [190], [191], [193], [194], [195] [2018-11-10 05:41:36,767 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 05:41:36,768 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 05:41:37,605 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 05:41:37,606 INFO L272 AbstractInterpreter]: Visited 42 different actions 61 times. Never merged. Never widened. Never found a fixpoint. Largest state had 54 variables. [2018-11-10 05:41:37,610 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:37,611 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 05:41:37,611 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:37,611 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:41:37,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:37,617 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 05:41:37,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:37,669 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:41:37,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:41:37,698 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:37,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:37,701 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:41:37,730 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_#res.base| Int)) (and (= 0 (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)) (= (store |c_old(#valid)| |append_#Ultimate.alloc_#res.base| 1) |c_#valid|))) is different from true [2018-11-10 05:41:37,751 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:37,751 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:37,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:41:37,752 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:37,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:41:37,759 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-10 05:41:37,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-11-10 05:41:37,796 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:37,802 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:41:37,803 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:20 [2018-11-10 05:41:37,851 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-11-10 05:41:37,851 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:41:38,317 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:38,338 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 05:41:38,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 19 [2018-11-10 05:41:38,339 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 05:41:38,339 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-10 05:41:38,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-10 05:41:38,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=288, Unknown=2, NotChecked=34, Total=380 [2018-11-10 05:41:38,340 INFO L87 Difference]: Start difference. First operand 161 states and 171 transitions. Second operand 17 states. [2018-11-10 05:41:39,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:39,185 INFO L93 Difference]: Finished difference Result 195 states and 204 transitions. [2018-11-10 05:41:39,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 05:41:39,188 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 45 [2018-11-10 05:41:39,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:39,189 INFO L225 Difference]: With dead ends: 195 [2018-11-10 05:41:39,189 INFO L226 Difference]: Without dead ends: 195 [2018-11-10 05:41:39,189 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 80 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 184 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=134, Invalid=621, Unknown=5, NotChecked=52, Total=812 [2018-11-10 05:41:39,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-11-10 05:41:39,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 162. [2018-11-10 05:41:39,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-11-10 05:41:39,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-11-10 05:41:39,197 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 45 [2018-11-10 05:41:39,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:39,197 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-11-10 05:41:39,198 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-10 05:41:39,198 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-11-10 05:41:39,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-10 05:41:39,199 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:39,199 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:39,200 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:39,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:39,200 INFO L82 PathProgramCache]: Analyzing trace with hash 735758084, now seen corresponding path program 1 times [2018-11-10 05:41:39,200 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:39,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:39,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:39,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:39,201 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:39,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:39,333 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:39,334 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:39,334 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 05:41:39,334 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 47 with the following transitions: [2018-11-10 05:41:39,334 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [31], [37], [41], [46], [125], [127], [129], [131], [132], [133], [136], [138], [140], [146], [148], [150], [152], [154], [156], [158], [160], [162], [188], [189], [190], [191], [193], [194], [195] [2018-11-10 05:41:39,337 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 05:41:39,337 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 05:41:40,125 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 05:41:40,125 INFO L272 AbstractInterpreter]: Visited 42 different actions 61 times. Never merged. Never widened. Never found a fixpoint. Largest state had 54 variables. [2018-11-10 05:41:40,133 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:40,133 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 05:41:40,133 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:40,133 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:41:40,143 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:40,143 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 05:41:40,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:40,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:41:40,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:41:40,207 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:41:40,213 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,218 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,218 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-10 05:41:40,237 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| Int) (|append_#Ultimate.alloc_#res.base| Int)) (and (= 0 (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)) (= (store |c_old(#valid)| |append_#Ultimate.alloc_#res.base| 1) |c_#valid|) (= (store |c_old(#length)| |append_#Ultimate.alloc_#res.base| |append_#Ultimate.alloc_~size|) |c_#length|))) is different from true [2018-11-10 05:41:40,269 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:40,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:41:40,271 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,290 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:40,291 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:40,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:41:40,291 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:41:40,299 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:31, output treesize:23 [2018-11-10 05:41:40,333 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:40,334 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:40,335 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:40,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-10 05:41:40,336 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:41:40,345 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:40,352 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:34, output treesize:9 [2018-11-10 05:41:40,376 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2018-11-10 05:41:40,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:41:44,497 WARN L179 SmtUtils]: Spent 4.07 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-10 05:41:46,553 WARN L179 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-10 05:41:48,658 WARN L179 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 39 [2018-11-10 05:41:48,665 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-11-10 05:41:48,748 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 48 [2018-11-10 05:41:49,285 WARN L179 SmtUtils]: Spent 440.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 36 [2018-11-10 05:41:49,424 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:49,442 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 05:41:49,442 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 22 [2018-11-10 05:41:49,442 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 05:41:49,443 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 05:41:49,443 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 05:41:49,443 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=397, Unknown=1, NotChecked=40, Total=506 [2018-11-10 05:41:49,443 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 16 states. [2018-11-10 05:41:52,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:52,060 INFO L93 Difference]: Finished difference Result 346 states and 369 transitions. [2018-11-10 05:41:52,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-10 05:41:52,060 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 46 [2018-11-10 05:41:52,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:52,062 INFO L225 Difference]: With dead ends: 346 [2018-11-10 05:41:52,062 INFO L226 Difference]: Without dead ends: 346 [2018-11-10 05:41:52,062 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 79 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 10.8s TimeCoverageRelationStatistics Valid=193, Invalid=926, Unknown=7, NotChecked=64, Total=1190 [2018-11-10 05:41:52,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-11-10 05:41:52,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 270. [2018-11-10 05:41:52,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-11-10 05:41:52,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 323 transitions. [2018-11-10 05:41:52,071 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 323 transitions. Word has length 46 [2018-11-10 05:41:52,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:52,071 INFO L481 AbstractCegarLoop]: Abstraction has 270 states and 323 transitions. [2018-11-10 05:41:52,072 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 05:41:52,072 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 323 transitions. [2018-11-10 05:41:52,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-10 05:41:52,072 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:52,072 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:52,073 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:52,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:52,077 INFO L82 PathProgramCache]: Analyzing trace with hash 1751133860, now seen corresponding path program 1 times [2018-11-10 05:41:52,077 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:52,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:52,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:52,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:52,078 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:52,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:52,252 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:52,253 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:52,253 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 05:41:52,253 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 50 with the following transitions: [2018-11-10 05:41:52,253 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [31], [37], [41], [46], [125], [127], [129], [131], [133], [136], [138], [139], [140], [146], [148], [150], [152], [154], [156], [158], [160], [162], [188], [189], [190], [191], [193], [194], [195] [2018-11-10 05:41:52,255 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 05:41:52,255 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 05:41:52,825 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 05:41:52,825 INFO L272 AbstractInterpreter]: Visited 42 different actions 61 times. Never merged. Never widened. Never found a fixpoint. Largest state had 54 variables. [2018-11-10 05:41:52,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:52,833 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 05:41:52,833 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:52,833 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:41:52,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:52,839 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 05:41:52,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:52,878 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:41:52,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:41:52,881 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:41:52,887 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,891 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,891 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-10 05:41:52,905 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| Int) (|append_#Ultimate.alloc_#res.base| Int)) (and (= 0 (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)) (= (store |c_old(#valid)| |append_#Ultimate.alloc_#res.base| 1) |c_#valid|) (= (store |c_old(#length)| |append_#Ultimate.alloc_#res.base| |append_#Ultimate.alloc_~size|) |c_#length|))) is different from true [2018-11-10 05:41:52,915 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:52,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:41:52,919 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,928 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:52,928 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:52,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:41:52,929 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,937 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:41:52,937 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:31, output treesize:23 [2018-11-10 05:41:52,971 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:52,972 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:52,972 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:52,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-10 05:41:52,973 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:41:52,981 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:52,988 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:34, output treesize:9 [2018-11-10 05:41:53,013 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 7 not checked. [2018-11-10 05:41:53,013 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:41:56,137 WARN L179 SmtUtils]: Spent 3.08 s on a formula simplification that was a NOOP. DAG size: 27 [2018-11-10 05:41:56,265 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-11-10 05:41:56,282 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 21 [2018-11-10 05:41:56,753 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:56,780 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 05:41:56,780 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 23 [2018-11-10 05:41:56,781 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 05:41:56,781 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-10 05:41:56,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-10 05:41:56,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=437, Unknown=1, NotChecked=42, Total=552 [2018-11-10 05:41:56,781 INFO L87 Difference]: Start difference. First operand 270 states and 323 transitions. Second operand 17 states. [2018-11-10 05:41:58,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:58,153 INFO L93 Difference]: Finished difference Result 340 states and 363 transitions. [2018-11-10 05:41:58,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-10 05:41:58,153 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 49 [2018-11-10 05:41:58,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:58,154 INFO L225 Difference]: With dead ends: 340 [2018-11-10 05:41:58,154 INFO L226 Difference]: Without dead ends: 340 [2018-11-10 05:41:58,155 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 85 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=231, Invalid=1098, Unknown=7, NotChecked=70, Total=1406 [2018-11-10 05:41:58,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-11-10 05:41:58,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 270. [2018-11-10 05:41:58,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-11-10 05:41:58,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 317 transitions. [2018-11-10 05:41:58,160 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 317 transitions. Word has length 49 [2018-11-10 05:41:58,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:58,160 INFO L481 AbstractCegarLoop]: Abstraction has 270 states and 317 transitions. [2018-11-10 05:41:58,160 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-10 05:41:58,160 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 317 transitions. [2018-11-10 05:41:58,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-10 05:41:58,161 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:58,161 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:58,161 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:58,161 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:58,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1356220878, now seen corresponding path program 1 times [2018-11-10 05:41:58,162 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:58,162 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:58,162 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:58,162 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:58,163 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:58,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:58,239 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:58,239 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:58,239 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:41:58,239 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:58,239 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:41:58,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:41:58,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:41:58,240 INFO L87 Difference]: Start difference. First operand 270 states and 317 transitions. Second operand 8 states. [2018-11-10 05:41:58,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:58,440 INFO L93 Difference]: Finished difference Result 277 states and 320 transitions. [2018-11-10 05:41:58,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:41:58,440 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-11-10 05:41:58,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:58,441 INFO L225 Difference]: With dead ends: 277 [2018-11-10 05:41:58,441 INFO L226 Difference]: Without dead ends: 277 [2018-11-10 05:41:58,441 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:41:58,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-11-10 05:41:58,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 241. [2018-11-10 05:41:58,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2018-11-10 05:41:58,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 268 transitions. [2018-11-10 05:41:58,444 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 268 transitions. Word has length 52 [2018-11-10 05:41:58,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:58,444 INFO L481 AbstractCegarLoop]: Abstraction has 241 states and 268 transitions. [2018-11-10 05:41:58,444 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:41:58,444 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 268 transitions. [2018-11-10 05:41:58,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 05:41:58,445 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:58,445 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:58,445 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:58,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:58,445 INFO L82 PathProgramCache]: Analyzing trace with hash 1953178896, now seen corresponding path program 1 times [2018-11-10 05:41:58,445 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:58,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:58,446 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:58,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:58,446 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:58,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:58,530 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:58,530 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:41:58,530 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:41:58,530 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 05:41:58,530 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:41:58,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:41:58,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:41:58,531 INFO L87 Difference]: Start difference. First operand 241 states and 268 transitions. Second operand 8 states. [2018-11-10 05:41:58,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:41:58,703 INFO L93 Difference]: Finished difference Result 254 states and 275 transitions. [2018-11-10 05:41:58,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:41:58,704 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 54 [2018-11-10 05:41:58,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:41:58,704 INFO L225 Difference]: With dead ends: 254 [2018-11-10 05:41:58,704 INFO L226 Difference]: Without dead ends: 254 [2018-11-10 05:41:58,704 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:41:58,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-11-10 05:41:58,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 239. [2018-11-10 05:41:58,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-11-10 05:41:58,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 262 transitions. [2018-11-10 05:41:58,708 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 262 transitions. Word has length 54 [2018-11-10 05:41:58,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:41:58,709 INFO L481 AbstractCegarLoop]: Abstraction has 239 states and 262 transitions. [2018-11-10 05:41:58,709 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:41:58,709 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 262 transitions. [2018-11-10 05:41:58,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 05:41:58,709 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:41:58,709 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:41:58,709 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:41:58,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:58,709 INFO L82 PathProgramCache]: Analyzing trace with hash 1093930211, now seen corresponding path program 1 times [2018-11-10 05:41:58,709 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 05:41:58,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:58,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:58,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 05:41:58,710 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 05:41:58,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:59,153 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:41:59,153 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:59,153 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 05:41:59,154 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 56 with the following transitions: [2018-11-10 05:41:59,154 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [33], [125], [127], [129], [131], [133], [136], [138], [140], [142], [146], [148], [150], [152], [154], [156], [158], [160], [162], [163], [165], [167], [169], [171], [173], [175], [177], [179], [180], [188], [189], [190], [191], [193], [194] [2018-11-10 05:41:59,157 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 05:41:59,157 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 05:41:59,571 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 05:41:59,571 INFO L272 AbstractInterpreter]: Visited 48 different actions 50 times. Merged at 1 different actions 1 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 58 variables. [2018-11-10 05:41:59,573 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:41:59,573 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 05:41:59,573 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:41:59,573 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:41:59,579 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:41:59,579 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 05:41:59,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:41:59,632 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:41:59,638 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:41:59,638 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,647 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:41:59,675 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:59,676 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:41:59,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:41:59,677 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,683 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:41:59,683 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:18 [2018-11-10 05:41:59,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:41:59,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:41:59,814 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,815 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-11-10 05:41:59,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-11-10 05:41:59,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-10 05:41:59,859 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-11-10 05:41:59,875 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-11-10 05:41:59,883 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:41:59,893 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:41:59,894 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:47 [2018-11-10 05:41:59,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 57 [2018-11-10 05:41:59,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 52 [2018-11-10 05:41:59,961 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:41:59,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 34 [2018-11-10 05:41:59,996 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-11-10 05:42:00,018 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:42:00,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-10 05:42:00,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:00,042 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,045 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:42:00,063 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:76, output treesize:42 [2018-11-10 05:42:00,101 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-11-10 05:42:00,101 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,111 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,112 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,113 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 52 [2018-11-10 05:42:00,114 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,123 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:00,123 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:49 [2018-11-10 05:42:00,205 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,207 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,208 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:00,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 75 [2018-11-10 05:42:00,209 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,224 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:00,224 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:63, output treesize:75 [2018-11-10 05:42:00,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-11-10 05:42:00,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:00,441 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,448 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:00,464 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:89, output treesize:78 [2018-11-10 05:42:00,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-11-10 05:42:00,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:00,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,526 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,541 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:00,541 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:91, output treesize:80 [2018-11-10 05:42:00,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 39 [2018-11-10 05:42:00,599 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:00,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 23 [2018-11-10 05:42:00,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:00,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:00,620 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:87, output treesize:45 [2018-11-10 05:42:00,671 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:00,671 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:42:02,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 62 [2018-11-10 05:42:02,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:42:02,079 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:02,093 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:02,094 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:02,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 74 [2018-11-10 05:42:02,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 52 [2018-11-10 05:42:02,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-11-10 05:42:02,190 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-10 05:42:02,205 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:42:02,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 52 [2018-11-10 05:42:02,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 53 [2018-11-10 05:42:02,255 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-11-10 05:42:02,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 45 treesize of output 70 [2018-11-10 05:42:02,295 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 8 xjuncts. [2018-11-10 05:42:02,340 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-11-10 05:42:02,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-10 05:42:02,407 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:02,408 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:02,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 42 [2018-11-10 05:42:02,416 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 05:42:02,436 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-10 05:42:02,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-11-10 05:42:02,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 44 [2018-11-10 05:42:02,455 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-11-10 05:42:02,491 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-11-10 05:42:02,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-10 05:42:02,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 44 [2018-11-10 05:42:02,509 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-11-10 05:42:02,540 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-11-10 05:42:02,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 05:42:02,546 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:02,552 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:02,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 36 treesize of output 70 [2018-11-10 05:42:02,578 INFO L267 ElimStorePlain]: Start of recursive call 17: 8 dim-0 vars, End of recursive call: 8 dim-0 vars, and 20 xjuncts. [2018-11-10 05:42:02,747 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 8 dim-0 vars, and 13 xjuncts. [2018-11-10 05:42:02,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-11-10 05:42:02,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-11-10 05:42:02,755 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:02,766 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:03,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-11-10 05:42:03,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-11-10 05:42:03,057 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-11-10 05:42:03,065 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:03,065 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:03,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-10 05:42:03,066 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:03,072 INFO L267 ElimStorePlain]: Start of recursive call 20: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:03,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-11-10 05:42:03,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 05:42:03,077 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:03,091 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:03,092 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:03,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-10 05:42:03,093 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:03,099 INFO L267 ElimStorePlain]: Start of recursive call 23: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:03,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 42 [2018-11-10 05:42:03,358 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:03,361 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:03,572 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:42:03,573 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_66 term size 41 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:383) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:216) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-10 05:42:03,575 INFO L168 Benchmark]: Toolchain (without parser) took 32996.86 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 793.2 MB). Free memory was 957.5 MB in the beginning and 1.6 GB in the end (delta: -636.4 MB). Peak memory consumption was 839.4 MB. Max. memory is 11.5 GB. [2018-11-10 05:42:03,575 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 05:42:03,576 INFO L168 Benchmark]: CACSL2BoogieTranslator took 339.76 ms. Allocated memory is still 1.0 GB. Free memory was 957.5 MB in the beginning and 936.0 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-10 05:42:03,576 INFO L168 Benchmark]: Boogie Procedure Inliner took 73.83 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 936.0 MB in the beginning and 1.1 GB in the end (delta: -213.6 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2018-11-10 05:42:03,576 INFO L168 Benchmark]: Boogie Preprocessor took 23.41 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2018-11-10 05:42:03,576 INFO L168 Benchmark]: RCFGBuilder took 428.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.2 MB). Peak memory consumption was 51.2 MB. Max. memory is 11.5 GB. [2018-11-10 05:42:03,576 INFO L168 Benchmark]: TraceAbstraction took 32128.34 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 638.1 MB). Free memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: -498.7 MB). Peak memory consumption was 821.9 MB. Max. memory is 11.5 GB. [2018-11-10 05:42:03,578 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 339.76 ms. Allocated memory is still 1.0 GB. Free memory was 957.5 MB in the beginning and 936.0 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 73.83 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 936.0 MB in the beginning and 1.1 GB in the end (delta: -213.6 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.41 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 428.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.2 MB). Peak memory consumption was 51.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 32128.34 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 638.1 MB). Free memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: -498.7 MB). Peak memory consumption was 821.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_66 term size 41 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_66 term size 41: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-11-10 05:42:04,942 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 05:42:04,943 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 05:42:04,950 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 05:42:04,950 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 05:42:04,951 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 05:42:04,952 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 05:42:04,953 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 05:42:04,954 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 05:42:04,954 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 05:42:04,955 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 05:42:04,955 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 05:42:04,956 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 05:42:04,957 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 05:42:04,957 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 05:42:04,958 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 05:42:04,959 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 05:42:04,960 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 05:42:04,962 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 05:42:04,963 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 05:42:04,964 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 05:42:04,965 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 05:42:04,967 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 05:42:04,967 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 05:42:04,967 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 05:42:04,968 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 05:42:04,969 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 05:42:04,970 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 05:42:04,970 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 05:42:04,971 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 05:42:04,971 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 05:42:04,972 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 05:42:04,972 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 05:42:04,972 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 05:42:04,973 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 05:42:04,974 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 05:42:04,974 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-11-10 05:42:04,985 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 05:42:04,985 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 05:42:04,986 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 05:42:04,986 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-10 05:42:04,986 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-10 05:42:04,986 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-10 05:42:04,986 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-10 05:42:04,986 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-10 05:42:04,986 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-10 05:42:04,987 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 05:42:04,987 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 05:42:04,988 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 05:42:04,988 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 05:42:04,989 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 05:42:04,989 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 05:42:04,990 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 05:42:04,990 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 05:42:04,991 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 05:42:04,991 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-10 05:42:04,991 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 05:42:04,991 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-10 05:42:04,991 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7db66fa755812d372ccac4d56a0ec85104dbcc6e [2018-11-10 05:42:05,024 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 05:42:05,033 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 05:42:05,036 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 05:42:05,037 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 05:42:05,037 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 05:42:05,038 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-11-10 05:42:05,079 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/83e29e5b7/b06452e4e2f04be397a6ab950ddf4e3e/FLAG00115b166 [2018-11-10 05:42:05,515 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 05:42:05,516 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-11-10 05:42:05,525 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/83e29e5b7/b06452e4e2f04be397a6ab950ddf4e3e/FLAG00115b166 [2018-11-10 05:42:05,534 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/data/83e29e5b7/b06452e4e2f04be397a6ab950ddf4e3e [2018-11-10 05:42:05,536 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 05:42:05,537 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 05:42:05,537 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 05:42:05,537 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 05:42:05,539 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 05:42:05,540 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,541 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@50737c6f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05, skipping insertion in model container [2018-11-10 05:42:05,541 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,547 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 05:42:05,575 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 05:42:05,771 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:42:05,783 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 05:42:05,820 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 05:42:05,848 INFO L193 MainTranslator]: Completed translation [2018-11-10 05:42:05,849 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05 WrapperNode [2018-11-10 05:42:05,849 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 05:42:05,849 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 05:42:05,849 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 05:42:05,849 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 05:42:05,854 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,868 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,935 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 05:42:05,936 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 05:42:05,936 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 05:42:05,936 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 05:42:05,945 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,945 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,949 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,950 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,961 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,964 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,966 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... [2018-11-10 05:42:05,968 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 05:42:05,969 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 05:42:05,969 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 05:42:05,969 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 05:42:05,970 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 05:42:06,001 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 05:42:06,001 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 05:42:06,001 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 05:42:06,001 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 05:42:06,001 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 05:42:06,001 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 05:42:06,001 INFO L130 BoogieDeclarations]: Found specification of procedure append [2018-11-10 05:42:06,001 INFO L138 BoogieDeclarations]: Found implementation of procedure append [2018-11-10 05:42:06,579 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 05:42:06,579 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:42:06 BoogieIcfgContainer [2018-11-10 05:42:06,579 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 05:42:06,580 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 05:42:06,580 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 05:42:06,582 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 05:42:06,582 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 05:42:05" (1/3) ... [2018-11-10 05:42:06,583 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7507cea8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 05:42:06, skipping insertion in model container [2018-11-10 05:42:06,583 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 05:42:05" (2/3) ... [2018-11-10 05:42:06,583 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7507cea8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 05:42:06, skipping insertion in model container [2018-11-10 05:42:06,583 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 05:42:06" (3/3) ... [2018-11-10 05:42:06,584 INFO L112 eAbstractionObserver]: Analyzing ICFG length_test03_true-valid-memsafety.i [2018-11-10 05:42:06,590 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 05:42:06,595 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 55 error locations. [2018-11-10 05:42:06,604 INFO L257 AbstractCegarLoop]: Starting to check reachability of 55 error locations. [2018-11-10 05:42:06,620 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-11-10 05:42:06,621 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 05:42:06,621 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-10 05:42:06,621 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 05:42:06,621 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 05:42:06,621 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 05:42:06,621 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 05:42:06,621 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 05:42:06,621 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 05:42:06,633 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states. [2018-11-10 05:42:06,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-11-10 05:42:06,640 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:06,641 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:06,643 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:06,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:06,647 INFO L82 PathProgramCache]: Analyzing trace with hash 1096514590, now seen corresponding path program 1 times [2018-11-10 05:42:06,649 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:06,649 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:06,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:06,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:06,701 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:06,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:06,742 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:06,749 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:06,750 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:42:06,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:06,755 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:06,757 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:06,757 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:42:06,759 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:42:06,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:42:06,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:06,769 INFO L87 Difference]: Start difference. First operand 140 states. Second operand 3 states. [2018-11-10 05:42:07,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:07,105 INFO L93 Difference]: Finished difference Result 140 states and 147 transitions. [2018-11-10 05:42:07,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:42:07,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-11-10 05:42:07,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:07,116 INFO L225 Difference]: With dead ends: 140 [2018-11-10 05:42:07,116 INFO L226 Difference]: Without dead ends: 137 [2018-11-10 05:42:07,118 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:07,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-11-10 05:42:07,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 135. [2018-11-10 05:42:07,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-11-10 05:42:07,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 141 transitions. [2018-11-10 05:42:07,153 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 141 transitions. Word has length 7 [2018-11-10 05:42:07,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:07,153 INFO L481 AbstractCegarLoop]: Abstraction has 135 states and 141 transitions. [2018-11-10 05:42:07,153 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:42:07,154 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 141 transitions. [2018-11-10 05:42:07,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-11-10 05:42:07,154 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:07,154 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:07,155 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:07,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:07,155 INFO L82 PathProgramCache]: Analyzing trace with hash -367786039, now seen corresponding path program 1 times [2018-11-10 05:42:07,156 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:07,156 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:07,179 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:07,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:07,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:07,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:07,207 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:07,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:07,216 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-11-10 05:42:07,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:07,236 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:07,241 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:07,241 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:42:07,242 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:42:07,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:42:07,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:07,243 INFO L87 Difference]: Start difference. First operand 135 states and 141 transitions. Second operand 3 states. [2018-11-10 05:42:07,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:07,494 INFO L93 Difference]: Finished difference Result 133 states and 139 transitions. [2018-11-10 05:42:07,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:42:07,494 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-11-10 05:42:07,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:07,495 INFO L225 Difference]: With dead ends: 133 [2018-11-10 05:42:07,495 INFO L226 Difference]: Without dead ends: 133 [2018-11-10 05:42:07,496 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:07,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-10 05:42:07,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-11-10 05:42:07,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-11-10 05:42:07,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 139 transitions. [2018-11-10 05:42:07,503 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 139 transitions. Word has length 8 [2018-11-10 05:42:07,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:07,504 INFO L481 AbstractCegarLoop]: Abstraction has 133 states and 139 transitions. [2018-11-10 05:42:07,504 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:42:07,504 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 139 transitions. [2018-11-10 05:42:07,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-11-10 05:42:07,504 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:07,505 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:07,506 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:07,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:07,506 INFO L82 PathProgramCache]: Analyzing trace with hash 1483534720, now seen corresponding path program 1 times [2018-11-10 05:42:07,506 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:07,506 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:07,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:07,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:07,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:07,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:07,547 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:07,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:07,550 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:07,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:07,567 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:07,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:07,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:42:07,568 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:42:07,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:42:07,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:07,569 INFO L87 Difference]: Start difference. First operand 133 states and 139 transitions. Second operand 5 states. [2018-11-10 05:42:07,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:07,868 INFO L93 Difference]: Finished difference Result 134 states and 141 transitions. [2018-11-10 05:42:07,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:42:07,869 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-11-10 05:42:07,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:07,870 INFO L225 Difference]: With dead ends: 134 [2018-11-10 05:42:07,870 INFO L226 Difference]: Without dead ends: 134 [2018-11-10 05:42:07,870 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-10 05:42:07,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-11-10 05:42:07,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 132. [2018-11-10 05:42:07,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-11-10 05:42:07,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 138 transitions. [2018-11-10 05:42:07,875 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 138 transitions. Word has length 9 [2018-11-10 05:42:07,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:07,876 INFO L481 AbstractCegarLoop]: Abstraction has 132 states and 138 transitions. [2018-11-10 05:42:07,876 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:42:07,876 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 138 transitions. [2018-11-10 05:42:07,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-10 05:42:07,876 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:07,876 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:07,877 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:07,877 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:07,877 INFO L82 PathProgramCache]: Analyzing trace with hash -1255063893, now seen corresponding path program 1 times [2018-11-10 05:42:07,878 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:07,878 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:07,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:07,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:07,915 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:07,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:07,919 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:07,926 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:07,927 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:07,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:07,949 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:07,950 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:07,950 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:07,951 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:42:07,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:42:07,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:42:07,951 INFO L87 Difference]: Start difference. First operand 132 states and 138 transitions. Second operand 4 states. [2018-11-10 05:42:08,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:08,287 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-11-10 05:42:08,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:42:08,289 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-11-10 05:42:08,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:08,290 INFO L225 Difference]: With dead ends: 133 [2018-11-10 05:42:08,290 INFO L226 Difference]: Without dead ends: 133 [2018-11-10 05:42:08,290 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:08,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-10 05:42:08,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 131. [2018-11-10 05:42:08,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-11-10 05:42:08,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 137 transitions. [2018-11-10 05:42:08,298 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 137 transitions. Word has length 10 [2018-11-10 05:42:08,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:08,299 INFO L481 AbstractCegarLoop]: Abstraction has 131 states and 137 transitions. [2018-11-10 05:42:08,299 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:42:08,299 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 137 transitions. [2018-11-10 05:42:08,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-10 05:42:08,299 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:08,299 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:08,300 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:08,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:08,301 INFO L82 PathProgramCache]: Analyzing trace with hash -1918079932, now seen corresponding path program 1 times [2018-11-10 05:42:08,301 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:08,301 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:08,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:08,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:08,354 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:08,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:08,358 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:08,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:08,359 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:42:08,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:08,373 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:08,378 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:08,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:08,379 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:42:08,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:42:08,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:42:08,379 INFO L87 Difference]: Start difference. First operand 131 states and 137 transitions. Second operand 4 states. [2018-11-10 05:42:08,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:08,666 INFO L93 Difference]: Finished difference Result 132 states and 139 transitions. [2018-11-10 05:42:08,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:42:08,666 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-11-10 05:42:08,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:08,666 INFO L225 Difference]: With dead ends: 132 [2018-11-10 05:42:08,667 INFO L226 Difference]: Without dead ends: 132 [2018-11-10 05:42:08,667 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:08,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-10 05:42:08,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2018-11-10 05:42:08,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-11-10 05:42:08,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 136 transitions. [2018-11-10 05:42:08,671 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 136 transitions. Word has length 13 [2018-11-10 05:42:08,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:08,671 INFO L481 AbstractCegarLoop]: Abstraction has 130 states and 136 transitions. [2018-11-10 05:42:08,671 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:42:08,671 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 136 transitions. [2018-11-10 05:42:08,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-10 05:42:08,672 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:08,672 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:08,673 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:08,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:08,674 INFO L82 PathProgramCache]: Analyzing trace with hash 669064303, now seen corresponding path program 1 times [2018-11-10 05:42:08,674 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:08,675 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:08,699 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:08,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:08,749 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:08,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:08,753 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:08,756 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:08,756 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:08,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:08,768 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:08,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:08,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:08,770 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:42:08,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:42:08,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:42:08,771 INFO L87 Difference]: Start difference. First operand 130 states and 136 transitions. Second operand 4 states. [2018-11-10 05:42:09,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:09,073 INFO L93 Difference]: Finished difference Result 131 states and 138 transitions. [2018-11-10 05:42:09,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:42:09,074 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-11-10 05:42:09,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:09,074 INFO L225 Difference]: With dead ends: 131 [2018-11-10 05:42:09,075 INFO L226 Difference]: Without dead ends: 131 [2018-11-10 05:42:09,075 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:09,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-11-10 05:42:09,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-11-10 05:42:09,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-10 05:42:09,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 135 transitions. [2018-11-10 05:42:09,079 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 135 transitions. Word has length 14 [2018-11-10 05:42:09,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:09,079 INFO L481 AbstractCegarLoop]: Abstraction has 129 states and 135 transitions. [2018-11-10 05:42:09,080 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:42:09,080 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 135 transitions. [2018-11-10 05:42:09,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-10 05:42:09,081 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:09,081 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:09,082 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:09,082 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:09,083 INFO L82 PathProgramCache]: Analyzing trace with hash -534011400, now seen corresponding path program 1 times [2018-11-10 05:42:09,083 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:09,083 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:09,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:09,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:09,173 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:09,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:09,177 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,178 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,179 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:42:09,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:09,181 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:09,182 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:09,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:42:09,183 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:42:09,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:42:09,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:09,183 INFO L87 Difference]: Start difference. First operand 129 states and 135 transitions. Second operand 3 states. [2018-11-10 05:42:09,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:09,360 INFO L93 Difference]: Finished difference Result 128 states and 134 transitions. [2018-11-10 05:42:09,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:42:09,360 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-11-10 05:42:09,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:09,361 INFO L225 Difference]: With dead ends: 128 [2018-11-10 05:42:09,361 INFO L226 Difference]: Without dead ends: 128 [2018-11-10 05:42:09,361 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:09,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-11-10 05:42:09,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-11-10 05:42:09,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-11-10 05:42:09,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 134 transitions. [2018-11-10 05:42:09,374 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 134 transitions. Word has length 18 [2018-11-10 05:42:09,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:09,374 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 134 transitions. [2018-11-10 05:42:09,375 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:42:09,375 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 134 transitions. [2018-11-10 05:42:09,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-10 05:42:09,375 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:09,375 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:09,376 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:09,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:09,377 INFO L82 PathProgramCache]: Analyzing trace with hash 625515942, now seen corresponding path program 1 times [2018-11-10 05:42:09,377 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:09,377 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:09,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:09,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:09,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:09,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:09,462 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,468 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,468 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-11-10 05:42:09,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:09,477 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:09,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:09,479 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-10 05:42:09,479 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:42:09,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:42:09,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:09,480 INFO L87 Difference]: Start difference. First operand 128 states and 134 transitions. Second operand 3 states. [2018-11-10 05:42:09,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:09,690 INFO L93 Difference]: Finished difference Result 127 states and 133 transitions. [2018-11-10 05:42:09,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:42:09,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2018-11-10 05:42:09,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:09,691 INFO L225 Difference]: With dead ends: 127 [2018-11-10 05:42:09,692 INFO L226 Difference]: Without dead ends: 127 [2018-11-10 05:42:09,692 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:09,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-11-10 05:42:09,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-11-10 05:42:09,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-11-10 05:42:09,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 133 transitions. [2018-11-10 05:42:09,695 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 133 transitions. Word has length 19 [2018-11-10 05:42:09,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:09,695 INFO L481 AbstractCegarLoop]: Abstraction has 127 states and 133 transitions. [2018-11-10 05:42:09,695 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:42:09,695 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 133 transitions. [2018-11-10 05:42:09,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-10 05:42:09,696 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:09,696 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:09,697 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:09,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:09,697 INFO L82 PathProgramCache]: Analyzing trace with hash -2083842118, now seen corresponding path program 1 times [2018-11-10 05:42:09,699 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:09,699 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:09,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:09,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:09,806 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:09,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:09,810 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,815 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:09,835 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:09,836 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:09,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:42:09,837 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,842 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:09,842 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-10 05:42:09,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-10 05:42:09,880 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:09,888 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:09,888 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:23, output treesize:20 [2018-11-10 05:42:09,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:09,924 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:09,933 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:09,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:42:09,934 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:42:09,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:42:09,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:42:09,934 INFO L87 Difference]: Start difference. First operand 127 states and 133 transitions. Second operand 8 states. [2018-11-10 05:42:10,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:10,810 INFO L93 Difference]: Finished difference Result 224 states and 235 transitions. [2018-11-10 05:42:10,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 05:42:10,811 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-11-10 05:42:10,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:10,812 INFO L225 Difference]: With dead ends: 224 [2018-11-10 05:42:10,812 INFO L226 Difference]: Without dead ends: 224 [2018-11-10 05:42:10,812 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-11-10 05:42:10,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-11-10 05:42:10,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 158. [2018-11-10 05:42:10,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-11-10 05:42:10,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 185 transitions. [2018-11-10 05:42:10,818 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 185 transitions. Word has length 20 [2018-11-10 05:42:10,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:10,818 INFO L481 AbstractCegarLoop]: Abstraction has 158 states and 185 transitions. [2018-11-10 05:42:10,818 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:42:10,818 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 185 transitions. [2018-11-10 05:42:10,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-10 05:42:10,819 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:10,819 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:10,820 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:10,820 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:10,820 INFO L82 PathProgramCache]: Analyzing trace with hash -174596056, now seen corresponding path program 1 times [2018-11-10 05:42:10,821 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:10,821 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:10,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:10,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:10,937 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:10,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:10,942 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:10,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:10,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:10,956 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:10,956 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-10 05:42:10,967 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:10,968 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:10,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 05:42:10,969 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:10,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:42:10,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:10,987 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:10,987 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-10 05:42:11,004 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:11,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-11-10 05:42:11,011 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-10 05:42:11,022 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:11,022 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-11-10 05:42:11,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:11,063 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:11,065 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:11,065 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-10 05:42:11,065 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 05:42:11,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 05:42:11,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:42:11,066 INFO L87 Difference]: Start difference. First operand 158 states and 185 transitions. Second operand 7 states. [2018-11-10 05:42:12,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:12,036 INFO L93 Difference]: Finished difference Result 229 states and 259 transitions. [2018-11-10 05:42:12,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 05:42:12,036 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-11-10 05:42:12,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:12,037 INFO L225 Difference]: With dead ends: 229 [2018-11-10 05:42:12,037 INFO L226 Difference]: Without dead ends: 229 [2018-11-10 05:42:12,037 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:42:12,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-11-10 05:42:12,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 191. [2018-11-10 05:42:12,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-11-10 05:42:12,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 239 transitions. [2018-11-10 05:42:12,042 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 239 transitions. Word has length 21 [2018-11-10 05:42:12,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:12,042 INFO L481 AbstractCegarLoop]: Abstraction has 191 states and 239 transitions. [2018-11-10 05:42:12,042 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 05:42:12,042 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 239 transitions. [2018-11-10 05:42:12,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 05:42:12,043 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:12,043 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:12,043 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:12,043 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:12,044 INFO L82 PathProgramCache]: Analyzing trace with hash -185544929, now seen corresponding path program 1 times [2018-11-10 05:42:12,044 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:12,044 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:12,064 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:12,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:12,190 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:12,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:12,197 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:12,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:12,207 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:12,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:12,215 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-10 05:42:12,228 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:12,229 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:12,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 05:42:12,230 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:12,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:42:12,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:12,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:12,253 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-10 05:42:12,280 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:12,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-11-10 05:42:12,291 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-10 05:42:12,303 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:12,303 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-11-10 05:42:12,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:12,399 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:12,401 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:12,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:42:12,401 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:42:12,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:42:12,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:42:12,402 INFO L87 Difference]: Start difference. First operand 191 states and 239 transitions. Second operand 8 states. [2018-11-10 05:42:13,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:13,609 INFO L93 Difference]: Finished difference Result 226 states and 256 transitions. [2018-11-10 05:42:13,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 05:42:13,609 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 24 [2018-11-10 05:42:13,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:13,610 INFO L225 Difference]: With dead ends: 226 [2018-11-10 05:42:13,610 INFO L226 Difference]: Without dead ends: 226 [2018-11-10 05:42:13,611 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-10 05:42:13,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-11-10 05:42:13,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 191. [2018-11-10 05:42:13,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-11-10 05:42:13,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 236 transitions. [2018-11-10 05:42:13,615 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 236 transitions. Word has length 24 [2018-11-10 05:42:13,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:13,615 INFO L481 AbstractCegarLoop]: Abstraction has 191 states and 236 transitions. [2018-11-10 05:42:13,616 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:42:13,616 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 236 transitions. [2018-11-10 05:42:13,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-10 05:42:13,616 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:13,616 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:13,617 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:13,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:13,617 INFO L82 PathProgramCache]: Analyzing trace with hash -185538907, now seen corresponding path program 1 times [2018-11-10 05:42:13,618 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:13,618 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:13,639 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:13,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:13,678 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:13,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:13,682 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:13,683 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:13,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:13,684 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:42:13,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:42:13,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:13,684 INFO L87 Difference]: Start difference. First operand 191 states and 236 transitions. Second operand 3 states. [2018-11-10 05:42:13,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:13,695 INFO L93 Difference]: Finished difference Result 194 states and 239 transitions. [2018-11-10 05:42:13,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:42:13,696 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-11-10 05:42:13,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:13,697 INFO L225 Difference]: With dead ends: 194 [2018-11-10 05:42:13,697 INFO L226 Difference]: Without dead ends: 194 [2018-11-10 05:42:13,697 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:13,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-11-10 05:42:13,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 194. [2018-11-10 05:42:13,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-10 05:42:13,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 239 transitions. [2018-11-10 05:42:13,701 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 239 transitions. Word has length 24 [2018-11-10 05:42:13,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:13,701 INFO L481 AbstractCegarLoop]: Abstraction has 194 states and 239 transitions. [2018-11-10 05:42:13,701 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:42:13,701 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 239 transitions. [2018-11-10 05:42:13,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 05:42:13,702 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:13,702 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:13,704 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:13,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:13,704 INFO L82 PathProgramCache]: Analyzing trace with hash 2079955265, now seen corresponding path program 1 times [2018-11-10 05:42:13,704 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:13,704 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:13,723 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:13,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:13,843 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:13,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:13,864 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:13,865 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:13,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 05:42:13,866 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 05:42:13,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 05:42:13,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:13,866 INFO L87 Difference]: Start difference. First operand 194 states and 239 transitions. Second operand 5 states. [2018-11-10 05:42:14,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:14,157 INFO L93 Difference]: Finished difference Result 188 states and 227 transitions. [2018-11-10 05:42:14,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 05:42:14,157 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-11-10 05:42:14,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:14,158 INFO L225 Difference]: With dead ends: 188 [2018-11-10 05:42:14,158 INFO L226 Difference]: Without dead ends: 188 [2018-11-10 05:42:14,158 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-10 05:42:14,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-11-10 05:42:14,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2018-11-10 05:42:14,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-11-10 05:42:14,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 227 transitions. [2018-11-10 05:42:14,167 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 227 transitions. Word has length 26 [2018-11-10 05:42:14,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:14,167 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 227 transitions. [2018-11-10 05:42:14,167 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 05:42:14,167 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 227 transitions. [2018-11-10 05:42:14,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-10 05:42:14,168 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:14,168 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:14,169 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:14,172 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:14,172 INFO L82 PathProgramCache]: Analyzing trace with hash 2086265863, now seen corresponding path program 1 times [2018-11-10 05:42:14,172 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:14,172 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:14,183 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:14,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:14,260 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:14,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:14,263 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:14,264 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:14,264 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:42:14,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:14,279 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:14,280 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:14,280 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:14,280 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:42:14,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:42:14,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:42:14,281 INFO L87 Difference]: Start difference. First operand 188 states and 227 transitions. Second operand 4 states. [2018-11-10 05:42:14,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:14,527 INFO L93 Difference]: Finished difference Result 184 states and 215 transitions. [2018-11-10 05:42:14,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:42:14,527 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 26 [2018-11-10 05:42:14,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:14,528 INFO L225 Difference]: With dead ends: 184 [2018-11-10 05:42:14,528 INFO L226 Difference]: Without dead ends: 184 [2018-11-10 05:42:14,528 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:14,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-11-10 05:42:14,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-11-10 05:42:14,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-11-10 05:42:14,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 215 transitions. [2018-11-10 05:42:14,531 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 215 transitions. Word has length 26 [2018-11-10 05:42:14,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:14,531 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 215 transitions. [2018-11-10 05:42:14,531 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:42:14,531 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 215 transitions. [2018-11-10 05:42:14,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 05:42:14,532 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:14,532 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:14,532 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:14,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:14,533 INFO L82 PathProgramCache]: Analyzing trace with hash 54103954, now seen corresponding path program 1 times [2018-11-10 05:42:14,536 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:14,536 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:14,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:14,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:14,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:14,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:14,736 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:14,738 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:14,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:42:14,738 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:42:14,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:42:14,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:42:14,739 INFO L87 Difference]: Start difference. First operand 184 states and 215 transitions. Second operand 8 states. [2018-11-10 05:42:15,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:15,216 INFO L93 Difference]: Finished difference Result 198 states and 215 transitions. [2018-11-10 05:42:15,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:42:15,217 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-11-10 05:42:15,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:15,217 INFO L225 Difference]: With dead ends: 198 [2018-11-10 05:42:15,217 INFO L226 Difference]: Without dead ends: 198 [2018-11-10 05:42:15,218 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:42:15,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-10 05:42:15,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 185. [2018-11-10 05:42:15,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-11-10 05:42:15,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 213 transitions. [2018-11-10 05:42:15,221 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 213 transitions. Word has length 27 [2018-11-10 05:42:15,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:15,221 INFO L481 AbstractCegarLoop]: Abstraction has 185 states and 213 transitions. [2018-11-10 05:42:15,221 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:42:15,221 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 213 transitions. [2018-11-10 05:42:15,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-10 05:42:15,222 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:15,222 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:15,222 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:15,222 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:15,222 INFO L82 PathProgramCache]: Analyzing trace with hash 249732513, now seen corresponding path program 1 times [2018-11-10 05:42:15,223 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:15,223 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:15,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:15,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:15,322 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:15,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:15,325 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:15,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:15,329 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:15,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:15,347 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:15,353 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:15,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:15,353 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:42:15,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:42:15,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:42:15,354 INFO L87 Difference]: Start difference. First operand 185 states and 213 transitions. Second operand 4 states. [2018-11-10 05:42:15,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:15,661 INFO L93 Difference]: Finished difference Result 183 states and 207 transitions. [2018-11-10 05:42:15,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:42:15,662 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-11-10 05:42:15,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:15,662 INFO L225 Difference]: With dead ends: 183 [2018-11-10 05:42:15,662 INFO L226 Difference]: Without dead ends: 183 [2018-11-10 05:42:15,662 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:15,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-11-10 05:42:15,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-11-10 05:42:15,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-11-10 05:42:15,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 207 transitions. [2018-11-10 05:42:15,665 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 207 transitions. Word has length 27 [2018-11-10 05:42:15,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:15,665 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 207 transitions. [2018-11-10 05:42:15,666 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:42:15,666 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 207 transitions. [2018-11-10 05:42:15,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 05:42:15,666 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:15,666 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:15,666 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:15,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:15,667 INFO L82 PathProgramCache]: Analyzing trace with hash 454298036, now seen corresponding path program 1 times [2018-11-10 05:42:15,667 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:15,667 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:15,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:15,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:15,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:15,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:15,833 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:15,834 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:15,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:42:15,835 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:42:15,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:42:15,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:42:15,835 INFO L87 Difference]: Start difference. First operand 183 states and 207 transitions. Second operand 8 states. [2018-11-10 05:42:16,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:16,304 INFO L93 Difference]: Finished difference Result 196 states and 209 transitions. [2018-11-10 05:42:16,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:42:16,305 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-11-10 05:42:16,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:16,306 INFO L225 Difference]: With dead ends: 196 [2018-11-10 05:42:16,306 INFO L226 Difference]: Without dead ends: 196 [2018-11-10 05:42:16,306 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:42:16,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-11-10 05:42:16,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 183. [2018-11-10 05:42:16,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-11-10 05:42:16,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 203 transitions. [2018-11-10 05:42:16,310 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 203 transitions. Word has length 29 [2018-11-10 05:42:16,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:16,311 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 203 transitions. [2018-11-10 05:42:16,311 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:42:16,311 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 203 transitions. [2018-11-10 05:42:16,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-10 05:42:16,311 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:16,311 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:16,312 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:16,312 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:16,312 INFO L82 PathProgramCache]: Analyzing trace with hash -525217117, now seen corresponding path program 1 times [2018-11-10 05:42:16,312 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:16,312 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:16,336 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:16,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:16,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:16,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:16,458 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:16,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:16,471 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:16,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:16,540 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:16,545 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:16,545 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:16,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 05:42:16,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 05:42:16,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 05:42:16,546 INFO L87 Difference]: Start difference. First operand 183 states and 203 transitions. Second operand 4 states. [2018-11-10 05:42:16,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:16,904 INFO L93 Difference]: Finished difference Result 187 states and 203 transitions. [2018-11-10 05:42:16,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 05:42:16,905 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2018-11-10 05:42:16,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:16,906 INFO L225 Difference]: With dead ends: 187 [2018-11-10 05:42:16,906 INFO L226 Difference]: Without dead ends: 187 [2018-11-10 05:42:16,906 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-10 05:42:16,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-11-10 05:42:16,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 181. [2018-11-10 05:42:16,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-11-10 05:42:16,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 197 transitions. [2018-11-10 05:42:16,909 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 197 transitions. Word has length 29 [2018-11-10 05:42:16,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:16,909 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 197 transitions. [2018-11-10 05:42:16,909 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 05:42:16,909 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 197 transitions. [2018-11-10 05:42:16,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-10 05:42:16,909 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:16,910 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:16,910 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:16,910 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:16,910 INFO L82 PathProgramCache]: Analyzing trace with hash -177068595, now seen corresponding path program 1 times [2018-11-10 05:42:16,910 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:16,910 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:16,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:17,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:17,105 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:17,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:17,109 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,117 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-11-10 05:42:17,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 05:42:17,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:17,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,138 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-10 05:42:17,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:17,163 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,165 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,180 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:41, output treesize:33 [2018-11-10 05:42:17,200 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:17,202 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:17,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 05:42:17,203 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 05:42:17,249 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:17,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 05:42:17,252 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,263 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-10 05:42:17,302 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:17,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 05:42:17,304 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,311 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,327 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:57, output treesize:25 [2018-11-10 05:42:17,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-10 05:42:17,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:17,354 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-10 05:42:17,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:17,383 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,390 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,402 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:44, output treesize:22 [2018-11-10 05:42:17,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-10 05:42:17,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:17,428 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,435 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-10 05:42:17,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:17,457 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,463 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,481 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:44, output treesize:18 [2018-11-10 05:42:17,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 05:42:17,542 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-11-10 05:42:17,546 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:17,547 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:1 [2018-11-10 05:42:17,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:17,560 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:17,562 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:17,562 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-10 05:42:17,562 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 05:42:17,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 05:42:17,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-11-10 05:42:17,563 INFO L87 Difference]: Start difference. First operand 181 states and 197 transitions. Second operand 11 states. [2018-11-10 05:42:18,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:18,546 INFO L93 Difference]: Finished difference Result 180 states and 195 transitions. [2018-11-10 05:42:18,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 05:42:18,547 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-11-10 05:42:18,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:18,548 INFO L225 Difference]: With dead ends: 180 [2018-11-10 05:42:18,548 INFO L226 Difference]: Without dead ends: 180 [2018-11-10 05:42:18,548 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2018-11-10 05:42:18,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-11-10 05:42:18,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-11-10 05:42:18,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-11-10 05:42:18,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 195 transitions. [2018-11-10 05:42:18,551 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 195 transitions. Word has length 32 [2018-11-10 05:42:18,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:18,551 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 195 transitions. [2018-11-10 05:42:18,551 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 05:42:18,551 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 195 transitions. [2018-11-10 05:42:18,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-10 05:42:18,552 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:18,552 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:18,552 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:18,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:18,553 INFO L82 PathProgramCache]: Analyzing trace with hash -480478103, now seen corresponding path program 1 times [2018-11-10 05:42:18,553 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:18,553 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:18,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:18,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:18,777 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:18,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:18,780 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,784 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:18,806 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:18,808 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:18,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-10 05:42:18,809 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:42:18,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:42:18,832 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,834 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:42:18,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:42:18,848 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,850 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,859 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:43, output treesize:29 [2018-11-10 05:42:18,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-11-10 05:42:18,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:18,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,896 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-11-10 05:42:18,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:18,921 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,931 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,952 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,953 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:48, output treesize:26 [2018-11-10 05:42:18,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-11-10 05:42:18,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:18,981 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:18,994 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:19,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-11-10 05:42:19,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:42:19,018 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:19,024 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:19,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:19,037 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:48, output treesize:22 [2018-11-10 05:42:19,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:19,129 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:19,131 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:19,131 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-10 05:42:19,131 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-10 05:42:19,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-10 05:42:19,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-11-10 05:42:19,132 INFO L87 Difference]: Start difference. First operand 180 states and 195 transitions. Second operand 11 states. [2018-11-10 05:42:19,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:19,855 INFO L93 Difference]: Finished difference Result 168 states and 180 transitions. [2018-11-10 05:42:19,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 05:42:19,857 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 34 [2018-11-10 05:42:19,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:19,857 INFO L225 Difference]: With dead ends: 168 [2018-11-10 05:42:19,858 INFO L226 Difference]: Without dead ends: 168 [2018-11-10 05:42:19,858 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2018-11-10 05:42:19,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-11-10 05:42:19,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-11-10 05:42:19,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-10 05:42:19,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 180 transitions. [2018-11-10 05:42:19,861 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 180 transitions. Word has length 34 [2018-11-10 05:42:19,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:19,861 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 180 transitions. [2018-11-10 05:42:19,861 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-10 05:42:19,861 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 180 transitions. [2018-11-10 05:42:19,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 05:42:19,862 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:19,862 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:19,862 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:19,862 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:19,862 INFO L82 PathProgramCache]: Analyzing trace with hash 1152905065, now seen corresponding path program 1 times [2018-11-10 05:42:19,863 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:19,863 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:19,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:19,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:20,014 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:20,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:20,029 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:42:20,032 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:42:20,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 05:42:20,032 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 05:42:20,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 05:42:20,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:20,033 INFO L87 Difference]: Start difference. First operand 168 states and 180 transitions. Second operand 3 states. [2018-11-10 05:42:20,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:42:20,051 INFO L93 Difference]: Finished difference Result 183 states and 196 transitions. [2018-11-10 05:42:20,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 05:42:20,052 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2018-11-10 05:42:20,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:42:20,053 INFO L225 Difference]: With dead ends: 183 [2018-11-10 05:42:20,053 INFO L226 Difference]: Without dead ends: 183 [2018-11-10 05:42:20,053 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 05:42:20,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-11-10 05:42:20,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 172. [2018-11-10 05:42:20,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-10 05:42:20,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 184 transitions. [2018-11-10 05:42:20,057 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 184 transitions. Word has length 41 [2018-11-10 05:42:20,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:42:20,058 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 184 transitions. [2018-11-10 05:42:20,058 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 05:42:20,058 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 184 transitions. [2018-11-10 05:42:20,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-10 05:42:20,059 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:42:20,059 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:42:20,059 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:42:20,059 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:42:20,059 INFO L82 PathProgramCache]: Analyzing trace with hash -2007997801, now seen corresponding path program 1 times [2018-11-10 05:42:20,059 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:42:20,060 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:42:20,072 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:20,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:20,336 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:20,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:42:20,338 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,341 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,341 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:42:20,347 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:20,348 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:20,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:42:20,349 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:20,355 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:18 [2018-11-10 05:42:20,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-10 05:42:20,486 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,498 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:20,498 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:33, output treesize:30 [2018-11-10 05:42:20,601 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:20,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 05:42:20,605 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,630 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:20,632 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:20,633 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:20,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-10 05:42:20,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:20,654 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:11 [2018-11-10 05:42:20,725 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:20,725 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:42:23,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-10 05:42:23,834 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:23,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-11-10 05:42:23,907 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:23,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 25 [2018-11-10 05:42:23,910 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:23,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2018-11-10 05:42:23,983 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:42:24,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-1 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-11-10 05:42:24,060 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 10 variables, input treesize:73, output treesize:86 [2018-11-10 05:42:28,527 WARN L179 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 51 [2018-11-10 05:42:28,530 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:42:28,530 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:42:28,535 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:42:28,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:42:28,593 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:42:29,237 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:29,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-10 05:42:29,240 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:29,255 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:29,256 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:42:29,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 05:42:29,257 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:29,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:42:29,267 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-11-10 05:42:29,273 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:29,274 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:42:33,721 WARN L179 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 33 [2018-11-10 05:42:33,829 INFO L267 ElimStorePlain]: Start of recursive call 1: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:33,829 INFO L202 ElimStorePlain]: Needed 1 recursive calls to eliminate 9 variables, input treesize:98, output treesize:1 [2018-11-10 05:42:38,615 WARN L179 SmtUtils]: Spent 116.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-10 05:42:39,105 WARN L179 SmtUtils]: Spent 157.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-11-10 05:42:39,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 54 [2018-11-10 05:42:39,135 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:39,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 53 treesize of output 71 [2018-11-10 05:42:39,202 INFO L267 ElimStorePlain]: Start of recursive call 3: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 8 xjuncts. [2018-11-10 05:42:39,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 69 [2018-11-10 05:42:39,254 INFO L267 ElimStorePlain]: Start of recursive call 4: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 8 xjuncts. [2018-11-10 05:42:41,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 50 [2018-11-10 05:42:41,284 INFO L267 ElimStorePlain]: Start of recursive call 5: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:43,368 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 48 [2018-11-10 05:42:43,369 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-11-10 05:42:45,560 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 65 dim-0 vars, and 22 xjuncts. [2018-11-10 05:42:45,561 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:142, output treesize:1066 [2018-11-10 05:42:49,508 WARN L179 SmtUtils]: Spent 1.87 s on a formula simplification. DAG size of input: 390 DAG size of output: 93 [2018-11-10 05:42:49,517 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:49,518 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:49,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-11-10 05:42:49,519 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:49,749 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:49,750 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:49,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-11-10 05:42:49,751 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:49,984 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:49,984 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:49,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 28 [2018-11-10 05:42:49,985 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:50,242 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,242 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 42 [2018-11-10 05:42:50,243 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:50,476 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,476 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 25 [2018-11-10 05:42:50,477 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:50,727 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,727 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2018-11-10 05:42:50,728 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:50,910 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,910 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:42:50,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-11-10 05:42:50,911 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-10 05:42:51,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 7 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-11-10 05:42:51,032 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 16 variables, input treesize:286, output treesize:138 [2018-11-10 05:42:51,402 WARN L179 SmtUtils]: Spent 148.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-11-10 05:42:51,789 WARN L179 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 32 [2018-11-10 05:42:51,811 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:42:51,833 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 05:42:51,833 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 10] total 32 [2018-11-10 05:42:51,833 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-10 05:42:51,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-10 05:42:51,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=1000, Unknown=6, NotChecked=0, Total=1122 [2018-11-10 05:42:51,834 INFO L87 Difference]: Start difference. First operand 172 states and 184 transitions. Second operand 33 states. [2018-11-10 05:42:53,235 WARN L179 SmtUtils]: Spent 317.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-11-10 05:42:53,784 WARN L179 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 41 [2018-11-10 05:42:54,150 WARN L179 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 48 [2018-11-10 05:42:55,220 WARN L179 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 32 [2018-11-10 05:42:55,680 WARN L179 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 32 [2018-11-10 05:42:56,643 WARN L179 SmtUtils]: Spent 387.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 37 [2018-11-10 05:42:57,634 WARN L179 SmtUtils]: Spent 450.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 44 [2018-11-10 05:43:00,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:43:00,920 INFO L93 Difference]: Finished difference Result 207 states and 217 transitions. [2018-11-10 05:43:00,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-10 05:43:00,923 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 43 [2018-11-10 05:43:00,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:43:00,923 INFO L225 Difference]: With dead ends: 207 [2018-11-10 05:43:00,923 INFO L226 Difference]: Without dead ends: 207 [2018-11-10 05:43:00,924 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 101 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 437 ImplicationChecksByTransitivity, 25.4s TimeCoverageRelationStatistics Valid=327, Invalid=1828, Unknown=7, NotChecked=0, Total=2162 [2018-11-10 05:43:00,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-11-10 05:43:00,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 169. [2018-11-10 05:43:00,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-11-10 05:43:00,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions. [2018-11-10 05:43:00,927 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 43 [2018-11-10 05:43:00,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:43:00,927 INFO L481 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions. [2018-11-10 05:43:00,928 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-10 05:43:00,928 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions. [2018-11-10 05:43:00,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 05:43:00,928 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:43:00,928 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:43:00,928 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:43:00,928 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:43:00,928 INFO L82 PathProgramCache]: Analyzing trace with hash -468036069, now seen corresponding path program 1 times [2018-11-10 05:43:00,928 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:43:00,929 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:43:00,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:01,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:01,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:01,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:01,158 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,165 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,166 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:43:01,180 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_write~$Pointer$_#value.base| (_ BitVec 32))) (and (= |c_#valid| (store |c_old(#valid)| |append_write~$Pointer$_#value.base| (_ bv1 1))) (= (select |c_old(#valid)| |append_write~$Pointer$_#value.base|) (_ bv0 1)))) is different from true [2018-11-10 05:43:01,186 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:01,186 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:01,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-10 05:43:01,187 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:01,192 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:16 [2018-11-10 05:43:01,220 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:01,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2018-11-10 05:43:01,221 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,227 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:01,227 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:20 [2018-11-10 05:43:01,258 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:01,258 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:01,360 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:43:01,360 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:43:01,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:01,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:01,438 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:01,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:01,441 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,442 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-10 05:43:01,445 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#t~malloc2.base| (_ BitVec 32))) (and (= |c_#valid| (store |c_old(#valid)| |append_#t~malloc2.base| (_ bv1 1))) (= (select |c_old(#valid)| |append_#t~malloc2.base|) (_ bv0 1)))) is different from true [2018-11-10 05:43:01,454 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:01,455 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:01,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:43:01,456 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,460 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:01,461 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:16 [2018-11-10 05:43:01,471 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:01,472 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:01,473 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:01,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 42 [2018-11-10 05:43:01,473 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:01,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:01,484 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:31 [2018-11-10 05:43:01,580 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-11-10 05:43:01,580 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:01,872 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:43:01,872 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 12 [2018-11-10 05:43:01,872 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-10 05:43:01,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-10 05:43:01,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=228, Unknown=2, NotChecked=62, Total=342 [2018-11-10 05:43:01,872 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 13 states. [2018-11-10 05:43:02,742 WARN L179 SmtUtils]: Spent 221.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-11-10 05:43:04,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:43:04,317 INFO L93 Difference]: Finished difference Result 199 states and 207 transitions. [2018-11-10 05:43:04,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:43:04,318 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 44 [2018-11-10 05:43:04,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:43:04,319 INFO L225 Difference]: With dead ends: 199 [2018-11-10 05:43:04,319 INFO L226 Difference]: Without dead ends: 199 [2018-11-10 05:43:04,319 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 86 SyntacticMatches, 7 SemanticMatches, 20 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=78, Invalid=308, Unknown=2, NotChecked=74, Total=462 [2018-11-10 05:43:04,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-11-10 05:43:04,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 168. [2018-11-10 05:43:04,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-10 05:43:04,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 177 transitions. [2018-11-10 05:43:04,322 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 177 transitions. Word has length 44 [2018-11-10 05:43:04,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:43:04,322 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 177 transitions. [2018-11-10 05:43:04,322 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-10 05:43:04,322 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 177 transitions. [2018-11-10 05:43:04,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 05:43:04,323 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:43:04,323 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:43:04,323 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:43:04,323 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:43:04,323 INFO L82 PathProgramCache]: Analyzing trace with hash -1624216089, now seen corresponding path program 1 times [2018-11-10 05:43:04,324 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:43:04,324 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:43:04,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:04,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:04,619 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:04,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:04,622 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:04,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:04,630 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:04,635 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:04,635 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-10 05:43:04,660 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_write~$Pointer$_#value.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |append_write~$Pointer$_#value.base| |append_#Ultimate.alloc_~size|)) (= (select |c_old(#valid)| |append_write~$Pointer$_#value.base|) (_ bv0 1)))) is different from true [2018-11-10 05:43:04,667 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:04,668 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:04,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 05:43:04,669 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:04,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:43:04,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:04,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:04,690 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-11-10 05:43:04,726 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:04,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-11-10 05:43:04,732 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:04,747 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:43:04,747 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-11-10 05:43:04,807 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:04,807 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:05,258 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:43:05,259 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:43:05,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:05,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:05,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:05,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:05,342 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:05,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:05,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:05,354 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:05,354 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-11-10 05:43:05,381 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_#Ultimate.alloc_#res.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |append_#Ultimate.alloc_#res.base| |append_#Ultimate.alloc_~size|)) (= (_ bv0 1) (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)))) is different from true [2018-11-10 05:43:05,390 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:05,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:43:05,392 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:05,403 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:05,404 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:05,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 05:43:05,404 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:05,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:05,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-11-10 05:43:05,415 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:05,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-11-10 05:43:05,420 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:05,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:43:05,433 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-11-10 05:43:05,448 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2018-11-10 05:43:05,448 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:05,696 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:43:05,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-11-10 05:43:05,697 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 05:43:05,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 05:43:05,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=174, Unknown=2, NotChecked=54, Total=272 [2018-11-10 05:43:05,697 INFO L87 Difference]: Start difference. First operand 168 states and 177 transitions. Second operand 12 states. [2018-11-10 05:43:07,622 WARN L179 SmtUtils]: Spent 1.26 s on a formula simplification. DAG size of input: 52 DAG size of output: 45 [2018-11-10 05:43:08,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:43:08,639 INFO L93 Difference]: Finished difference Result 214 states and 227 transitions. [2018-11-10 05:43:08,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 05:43:08,639 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2018-11-10 05:43:08,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:43:08,640 INFO L225 Difference]: With dead ends: 214 [2018-11-10 05:43:08,640 INFO L226 Difference]: Without dead ends: 214 [2018-11-10 05:43:08,640 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 92 SyntacticMatches, 8 SemanticMatches, 18 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=60, Invalid=252, Unknown=2, NotChecked=66, Total=380 [2018-11-10 05:43:08,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-11-10 05:43:08,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 207. [2018-11-10 05:43:08,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-11-10 05:43:08,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 224 transitions. [2018-11-10 05:43:08,644 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 224 transitions. Word has length 45 [2018-11-10 05:43:08,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:43:08,644 INFO L481 AbstractCegarLoop]: Abstraction has 207 states and 224 transitions. [2018-11-10 05:43:08,644 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 05:43:08,644 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 224 transitions. [2018-11-10 05:43:08,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-10 05:43:08,644 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:43:08,644 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:43:08,645 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:43:08,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:43:08,647 INFO L82 PathProgramCache]: Analyzing trace with hash 80213248, now seen corresponding path program 1 times [2018-11-10 05:43:08,647 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:43:08,648 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:43:08,671 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:08,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:08,925 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:08,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:08,928 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:08,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:08,934 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:08,939 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:08,939 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-11-10 05:43:08,964 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_write~$Pointer$_#value.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |append_write~$Pointer$_#value.base| |append_#Ultimate.alloc_~size|)) (= (select |c_old(#valid)| |append_write~$Pointer$_#value.base|) (_ bv0 1)))) is different from true [2018-11-10 05:43:08,971 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:08,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:43:08,974 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:08,987 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:08,988 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:08,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-11-10 05:43:08,989 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:08,997 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:08,997 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-11-10 05:43:09,018 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:09,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-11-10 05:43:09,023 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:09,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:43:09,034 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-11-10 05:43:09,145 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:09,145 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:10,028 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:43:10,029 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:43:10,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:10,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:10,116 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:10,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:10,119 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:10,127 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,134 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-11-10 05:43:10,230 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_write~$Pointer$_#ptr.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |append_write~$Pointer$_#ptr.base|) (_ bv0 1)) (= |c_#length| (store |c_old(#length)| |append_write~$Pointer$_#ptr.base| |append_#Ultimate.alloc_~size|)) (= |c_#valid| (store |c_old(#valid)| |append_write~$Pointer$_#ptr.base| (_ bv1 1))))) is different from true [2018-11-10 05:43:10,234 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-10 05:43:10,236 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,249 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,250 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-11-10 05:43:10,251 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,262 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:10,262 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:33, output treesize:24 [2018-11-10 05:43:10,362 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,363 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,363 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-11-10 05:43:10,364 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,379 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,379 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:10,380 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:10,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 05:43:10,381 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:10,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:10,390 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:16 [2018-11-10 05:43:10,584 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:10,584 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:11,209 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 50 [2018-11-10 05:43:12,555 WARN L179 SmtUtils]: Spent 155.00 ms on a formula simplification that was a NOOP. DAG size: 72 [2018-11-10 05:43:12,573 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:43:12,573 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 18 [2018-11-10 05:43:12,573 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-10 05:43:12,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-10 05:43:12,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=694, Unknown=2, NotChecked=110, Total=930 [2018-11-10 05:43:12,574 INFO L87 Difference]: Start difference. First operand 207 states and 224 transitions. Second operand 19 states. [2018-11-10 05:43:13,774 WARN L179 SmtUtils]: Spent 305.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-10 05:43:15,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:43:15,637 INFO L93 Difference]: Finished difference Result 234 states and 248 transitions. [2018-11-10 05:43:15,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-10 05:43:15,637 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 48 [2018-11-10 05:43:15,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:43:15,638 INFO L225 Difference]: With dead ends: 234 [2018-11-10 05:43:15,638 INFO L226 Difference]: Without dead ends: 234 [2018-11-10 05:43:15,638 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 90 SyntacticMatches, 7 SemanticMatches, 34 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 307 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=194, Invalid=934, Unknown=2, NotChecked=130, Total=1260 [2018-11-10 05:43:15,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-11-10 05:43:15,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 162. [2018-11-10 05:43:15,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-11-10 05:43:15,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 171 transitions. [2018-11-10 05:43:15,640 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 171 transitions. Word has length 48 [2018-11-10 05:43:15,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:43:15,640 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 171 transitions. [2018-11-10 05:43:15,640 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-10 05:43:15,640 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 171 transitions. [2018-11-10 05:43:15,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-10 05:43:15,641 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:43:15,641 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:43:15,641 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:43:15,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:43:15,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1631228433, now seen corresponding path program 1 times [2018-11-10 05:43:15,641 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:43:15,641 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:43:15,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:15,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:15,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:15,915 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:15,915 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-10 05:43:15,917 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 05:43:15,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-10 05:43:15,918 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 05:43:15,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 05:43:15,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-11-10 05:43:15,918 INFO L87 Difference]: Start difference. First operand 162 states and 171 transitions. Second operand 8 states. [2018-11-10 05:43:16,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:43:16,618 INFO L93 Difference]: Finished difference Result 165 states and 172 transitions. [2018-11-10 05:43:16,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 05:43:16,619 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-11-10 05:43:16,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:43:16,619 INFO L225 Difference]: With dead ends: 165 [2018-11-10 05:43:16,619 INFO L226 Difference]: Without dead ends: 165 [2018-11-10 05:43:16,619 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-11-10 05:43:16,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-11-10 05:43:16,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 161. [2018-11-10 05:43:16,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-10 05:43:16,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 170 transitions. [2018-11-10 05:43:16,621 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 170 transitions. Word has length 51 [2018-11-10 05:43:16,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:43:16,622 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 170 transitions. [2018-11-10 05:43:16,622 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 05:43:16,622 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 170 transitions. [2018-11-10 05:43:16,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-10 05:43:16,622 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:43:16,622 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:43:16,622 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:43:16,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:43:16,622 INFO L82 PathProgramCache]: Analyzing trace with hash -1950672898, now seen corresponding path program 1 times [2018-11-10 05:43:16,623 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:43:16,623 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:43:16,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:16,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:17,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:17,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:17,046 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,053 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-11-10 05:43:17,077 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,081 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:43:17,082 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,089 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-11-10 05:43:17,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:43:17,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:43:17,156 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,158 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,167 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,167 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-10 05:43:17,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-11-10 05:43:17,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-10 05:43:17,236 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-11-10 05:43:17,315 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:17,346 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:17,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:17,375 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:32, output treesize:37 [2018-11-10 05:43:17,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-10 05:43:17,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:43:17,416 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,421 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 47 treesize of output 52 [2018-11-10 05:43:17,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-11-10 05:43:17,484 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 34 [2018-11-10 05:43:17,581 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:17,622 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:17,702 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:17,702 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:71, output treesize:37 [2018-11-10 05:43:17,742 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-11-10 05:43:17,742 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,756 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,757 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,758 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 54 [2018-11-10 05:43:17,759 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:17,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:75, output treesize:51 [2018-11-10 05:43:17,863 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,864 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,865 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,866 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:17,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 77 [2018-11-10 05:43:17,867 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:17,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:17,900 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:60, output treesize:69 [2018-11-10 05:43:18,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 53 [2018-11-10 05:43:18,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 05:43:18,112 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:18,130 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:18,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:18,166 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:82, output treesize:78 [2018-11-10 05:43:18,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 56 [2018-11-10 05:43:18,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-11-10 05:43:18,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:18,329 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:18,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-11-10 05:43:18,392 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:91, output treesize:150 [2018-11-10 05:43:18,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 32 [2018-11-10 05:43:18,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 19 [2018-11-10 05:43:18,490 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:18,498 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:18,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:18,515 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:71, output treesize:48 [2018-11-10 05:43:18,576 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:18,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:43:24,888 WARN L179 SmtUtils]: Spent 460.00 ms on a formula simplification that was a NOOP. DAG size: 26 [2018-11-10 05:43:34,040 WARN L179 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 24 [2018-11-10 05:43:43,609 WARN L179 SmtUtils]: Spent 240.00 ms on a formula simplification that was a NOOP. DAG size: 68 [2018-11-10 05:43:43,761 WARN L179 SmtUtils]: Spent 151.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-11-10 05:43:43,978 WARN L179 SmtUtils]: Spent 215.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2018-11-10 05:43:44,161 WARN L179 SmtUtils]: Spent 182.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-11-10 05:43:44,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 81 [2018-11-10 05:43:44,356 WARN L179 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 50 [2018-11-10 05:43:44,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:43:44,366 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:44,427 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:44,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 56 treesize of output 75 [2018-11-10 05:43:44,717 WARN L179 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 75 [2018-11-10 05:43:44,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 55 [2018-11-10 05:43:44,791 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:44,795 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:44,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 63 [2018-11-10 05:43:44,829 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 3 xjuncts. [2018-11-10 05:43:45,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 53 [2018-11-10 05:43:45,340 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:45,456 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:43:45,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 59 [2018-11-10 05:43:45,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-11-10 05:43:45,706 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:45,741 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:45,950 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:45,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 53 [2018-11-10 05:43:45,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-11-10 05:43:45,968 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:45,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-11-10 05:43:46,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-11-10 05:43:46,042 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,051 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,068 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:46,071 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:43:46,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 51 [2018-11-10 05:43:46,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-11-10 05:43:46,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-11-10 05:43:46,128 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,138 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 05:43:46,161 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,172 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-11-10 05:43:46,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-11-10 05:43:46,546 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,561 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:46,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-10 05:43:46,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 26 [2018-11-10 05:43:46,586 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:46,614 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:46,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-11-10 05:43:46,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 22 [2018-11-10 05:43:46,634 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:46,660 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:46,730 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:43:46,773 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:43:46,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 3 xjuncts. [2018-11-10 05:43:46,827 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 10 variables, input treesize:145, output treesize:86 [2018-11-10 05:43:46,944 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 05:43:46,944 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 05:43:46,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:43:47,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:43:47,037 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:43:47,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:43:47,039 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,049 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:43:47,057 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:47,061 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:47,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:43:47,062 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,071 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:47,071 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:18 [2018-11-10 05:43:47,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:43:47,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:43:47,586 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,589 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,603 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,603 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-11-10 05:43:47,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-11-10 05:43:47,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-11-10 05:43:47,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:47,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-11-10 05:43:47,841 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:47,871 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:47,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:47,909 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:44, output treesize:61 [2018-11-10 05:43:50,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 25 [2018-11-10 05:43:50,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:43:50,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:50,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:50,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 59 treesize of output 64 [2018-11-10 05:43:50,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 59 [2018-11-10 05:43:50,176 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:50,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 40 [2018-11-10 05:43:50,305 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-10 05:43:50,389 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:43:50,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:43:50,464 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:88, output treesize:71 [2018-11-10 05:43:50,601 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,602 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,603 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 69 [2018-11-10 05:43:50,604 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:50,636 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:50,637 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:92, output treesize:53 [2018-11-10 05:43:50,713 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,714 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,714 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,715 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:43:50,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 77 [2018-11-10 05:43:50,716 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:50,737 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:50,737 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:60, output treesize:69 [2018-11-10 05:43:51,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47 [2018-11-10 05:43:51,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:43:51,011 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:51,027 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:51,058 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:51,058 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:65 [2018-11-10 05:43:51,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47 [2018-11-10 05:43:51,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:43:51,207 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:51,221 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:51,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:51,253 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:80, output treesize:69 [2018-11-10 05:43:51,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 32 [2018-11-10 05:43:51,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 19 [2018-11-10 05:43:51,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:43:51,322 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:43:51,340 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-10 05:43:51,340 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:71, output treesize:48 [2018-11-10 05:43:51,352 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:43:51,352 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:44:09,144 WARN L179 SmtUtils]: Spent 265.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-11-10 05:44:13,712 WARN L179 SmtUtils]: Spent 279.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-11-10 05:44:13,900 WARN L179 SmtUtils]: Spent 187.00 ms on a formula simplification that was a NOOP. DAG size: 53 [2018-11-10 05:44:14,165 WARN L179 SmtUtils]: Spent 263.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-11-10 05:44:14,405 WARN L179 SmtUtils]: Spent 240.00 ms on a formula simplification that was a NOOP. DAG size: 59 [2018-11-10 05:44:14,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 64 [2018-11-10 05:44:14,538 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 49 [2018-11-10 05:44:14,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:44:14,546 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:14,577 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:14,578 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:44:14,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 68 [2018-11-10 05:44:14,794 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 33 treesize of output 63 [2018-11-10 05:44:15,718 WARN L179 SmtUtils]: Spent 921.00 ms on a formula simplification. DAG size of input: 123 DAG size of output: 116 [2018-11-10 05:44:15,735 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:15,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 40 treesize of output 52 [2018-11-10 05:44:15,774 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 3 xjuncts. [2018-11-10 05:44:16,604 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:16,607 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:44:16,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 33 [2018-11-10 05:44:16,611 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:20,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 40 [2018-11-10 05:44:20,874 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:21,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 32 [2018-11-10 05:44:21,342 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:22,215 INFO L267 ElimStorePlain]: Start of recursive call 5: 4 dim-0 vars, 7 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:44:22,468 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 57 treesize of output 84 [2018-11-10 05:44:23,730 WARN L179 SmtUtils]: Spent 1.26 s on a formula simplification. DAG size of input: 164 DAG size of output: 160 [2018-11-10 05:44:23,749 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:23,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 63 [2018-11-10 05:44:23,754 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:23,777 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:23,777 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:44:23,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 66 [2018-11-10 05:44:23,783 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:23,797 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:23,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-11-10 05:44:23,798 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:24,593 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:24,600 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:44:24,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 66 [2018-11-10 05:44:24,635 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 3 xjuncts. [2018-11-10 05:44:25,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 63 [2018-11-10 05:44:25,436 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:25,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 55 [2018-11-10 05:44:25,899 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:28,249 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:28,261 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:44:28,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 68 [2018-11-10 05:44:28,338 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 3 xjuncts. [2018-11-10 05:44:28,910 INFO L267 ElimStorePlain]: Start of recursive call 10: 4 dim-0 vars, 7 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:44:28,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-11-10 05:44:29,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 22 [2018-11-10 05:44:29,055 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:29,090 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:29,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 34 [2018-11-10 05:44:29,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-11-10 05:44:29,100 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:29,116 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:29,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-11-10 05:44:29,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 22 [2018-11-10 05:44:29,137 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:29,169 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:29,225 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:29,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:29,306 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-11-10 05:44:29,306 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 11 variables, input treesize:123, output treesize:69 [2018-11-10 05:44:33,514 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 05:44:33,514 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21] total 30 [2018-11-10 05:44:33,514 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-11-10 05:44:33,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-11-10 05:44:33,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=1885, Unknown=15, NotChecked=0, Total=2070 [2018-11-10 05:44:33,515 INFO L87 Difference]: Start difference. First operand 161 states and 170 transitions. Second operand 31 states. [2018-11-10 05:44:35,397 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 47 [2018-11-10 05:44:35,857 WARN L179 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 52 [2018-11-10 05:44:36,632 WARN L179 SmtUtils]: Spent 399.00 ms on a formula simplification that was a NOOP. DAG size: 32 [2018-11-10 05:44:37,701 WARN L179 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 67 [2018-11-10 05:44:38,014 WARN L179 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 67 [2018-11-10 05:44:38,483 WARN L179 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 58 [2018-11-10 05:44:38,756 WARN L179 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 70 [2018-11-10 05:44:39,376 WARN L179 SmtUtils]: Spent 272.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 69 [2018-11-10 05:44:40,562 WARN L179 SmtUtils]: Spent 505.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 75 [2018-11-10 05:44:41,865 WARN L179 SmtUtils]: Spent 281.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 70 [2018-11-10 05:44:42,524 WARN L179 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 47 [2018-11-10 05:44:43,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 05:44:43,657 INFO L93 Difference]: Finished difference Result 198 states and 208 transitions. [2018-11-10 05:44:43,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-10 05:44:43,659 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 54 [2018-11-10 05:44:43,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 05:44:43,659 INFO L225 Difference]: With dead ends: 198 [2018-11-10 05:44:43,659 INFO L226 Difference]: Without dead ends: 198 [2018-11-10 05:44:43,660 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 96 SyntacticMatches, 6 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1064 ImplicationChecksByTransitivity, 60.1s TimeCoverageRelationStatistics Valid=489, Invalid=3656, Unknown=15, NotChecked=0, Total=4160 [2018-11-10 05:44:43,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-10 05:44:43,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 161. [2018-11-10 05:44:43,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-10 05:44:43,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 169 transitions. [2018-11-10 05:44:43,663 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 169 transitions. Word has length 54 [2018-11-10 05:44:43,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 05:44:43,663 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 169 transitions. [2018-11-10 05:44:43,663 INFO L482 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-11-10 05:44:43,663 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 169 transitions. [2018-11-10 05:44:43,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 05:44:43,664 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 05:44:43,664 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 05:44:43,664 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-11-10 05:44:43,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 05:44:43,664 INFO L82 PathProgramCache]: Analyzing trace with hash -341317482, now seen corresponding path program 1 times [2018-11-10 05:44:43,665 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-10 05:44:43,665 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_661b0639-4f72-43a6-aea2-372d417ae742/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:44:43,677 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 05:44:44,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 05:44:44,145 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 05:44:44,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:44:44,148 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,165 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,165 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-11-10 05:44:44,176 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:44,177 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:44,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-10 05:44:44,178 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,185 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-11-10 05:44:44,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-10 05:44:44,215 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,232 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:27, output treesize:26 [2018-11-10 05:44:44,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:44:44,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:44:44,303 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,306 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-10 05:44:44,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-10 05:44:44,329 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,333 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,349 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:46, output treesize:38 [2018-11-10 05:44:44,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-11-10 05:44:44,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-10 05:44:44,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-11-10 05:44:44,547 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:44,602 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:44,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-11-10 05:44:44,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-10 05:44:44,717 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:44,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-11-10 05:44:44,807 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:44,843 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:44,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 05:44:44,905 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:59, output treesize:122 [2018-11-10 05:44:45,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 92 treesize of output 110 [2018-11-10 05:44:45,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 90 treesize of output 103 [2018-11-10 05:44:45,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:45,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 82 [2018-11-10 05:44:45,203 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:45,273 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:45,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-11-10 05:44:45,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:44:45,535 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:45,546 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:45,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 62 [2018-11-10 05:44:45,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 38 [2018-11-10 05:44:45,691 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:45,707 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:45,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 82 treesize of output 83 [2018-11-10 05:44:45,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 82 [2018-11-10 05:44:45,747 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:45,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 66 treesize of output 57 [2018-11-10 05:44:45,951 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:46,042 INFO L267 ElimStorePlain]: Start of recursive call 9: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:46,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 32 [2018-11-10 05:44:46,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:44:46,170 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,180 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:44:46,266 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 10 variables, input treesize:132, output treesize:83 [2018-11-10 05:44:46,332 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-11-10 05:44:46,333 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,355 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,356 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,358 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 54 [2018-11-10 05:44:46,359 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,378 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:44:46,378 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:102, output treesize:73 [2018-11-10 05:44:46,490 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-10 05:44:46,493 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,521 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,522 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,523 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,524 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:44:46,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 37 [2018-11-10 05:44:46,525 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,551 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,551 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:40 [2018-11-10 05:44:46,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-11-10 05:44:46,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-11-10 05:44:46,718 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,726 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-11-10 05:44:46,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:44:46,761 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,772 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,795 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-10 05:44:46,795 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:70, output treesize:55 [2018-11-10 05:44:46,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-11-10 05:44:46,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-11-10 05:44:46,893 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-11-10 05:44:46,918 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:44:46,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-11-10 05:44:46,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-10 05:44:46,984 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:46,999 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:47,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-10 05:44:47,047 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:77, output treesize:88 [2018-11-10 05:44:47,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-11-10 05:44:47,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-10 05:44:47,119 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:47,121 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:47,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 05:44:47,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-10 05:44:47,132 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-10 05:44:47,135 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:47,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:44:47,141 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:44, output treesize:14 [2018-11-10 05:44:47,190 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 05:44:47,190 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 05:44:48,330 WARN L179 SmtUtils]: Spent 479.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-11-10 05:44:54,895 WARN L179 SmtUtils]: Spent 165.00 ms on a formula simplification that was a NOOP. DAG size: 66 [2018-11-10 05:44:55,612 WARN L179 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 60 [2018-11-10 05:45:00,344 WARN L179 SmtUtils]: Spent 128.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-11-10 05:45:09,279 WARN L179 SmtUtils]: Spent 3.90 s on a formula simplification that was a NOOP. DAG size: 78 [2018-11-10 05:45:14,467 WARN L179 SmtUtils]: Spent 810.00 ms on a formula simplification that was a NOOP. DAG size: 78 [2018-11-10 05:45:15,858 WARN L179 SmtUtils]: Spent 1.39 s on a formula simplification that was a NOOP. DAG size: 104 [2018-11-10 05:45:16,723 WARN L179 SmtUtils]: Spent 863.00 ms on a formula simplification that was a NOOP. DAG size: 78 [2018-11-10 05:45:17,812 WARN L179 SmtUtils]: Spent 1.09 s on a formula simplification that was a NOOP. DAG size: 86 [2018-11-10 05:45:18,922 WARN L179 SmtUtils]: Spent 1.11 s on a formula simplification that was a NOOP. DAG size: 84 [2018-11-10 05:45:18,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 224 treesize of output 227 [2018-11-10 05:45:19,175 WARN L179 SmtUtils]: Spent 231.00 ms on a formula simplification that was a NOOP. DAG size: 73 [2018-11-10 05:45:19,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 83 [2018-11-10 05:45:19,185 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:19,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 209 treesize of output 209 [2018-11-10 05:45:19,319 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-10 05:45:19,615 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-11-10 05:45:22,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 255 treesize of output 146 [2018-11-10 05:45:22,843 WARN L179 SmtUtils]: Spent 437.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 47 [2018-11-10 05:45:22,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:45:22,852 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:22,929 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:23,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 86 treesize of output 92 [2018-11-10 05:45:23,564 WARN L179 SmtUtils]: Spent 538.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 75 [2018-11-10 05:45:23,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 76 [2018-11-10 05:45:23,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-11-10 05:45:23,589 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:23,635 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:24,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 54 [2018-11-10 05:45:24,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 55 [2018-11-10 05:45:24,259 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:24,386 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:45:24,394 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:24,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 47 treesize of output 68 [2018-11-10 05:45:24,470 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 3 xjuncts. [2018-11-10 05:45:24,871 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:45:25,525 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:25,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 61 [2018-11-10 05:45:25,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 36 [2018-11-10 05:45:25,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-11-10 05:45:25,608 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:25,619 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:45:25,633 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:45:26,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 05:45:26,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 18 [2018-11-10 05:45:26,111 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:26,156 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:26,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-11-10 05:45:26,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 18 [2018-11-10 05:45:26,192 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:26,228 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:26,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-11-10 05:45:26,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-11-10 05:45:26,264 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:26,283 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:45:26,394 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:45:26,533 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:45:29,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 301 treesize of output 232 [2018-11-10 05:45:29,411 WARN L179 SmtUtils]: Spent 321.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 67 [2018-11-10 05:45:29,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:45:29,427 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:29,581 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:29,643 INFO L303 Elim1Store]: Index analysis took 119 ms [2018-11-10 05:45:29,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 73 treesize of output 83 [2018-11-10 05:45:29,995 WARN L179 SmtUtils]: Spent 301.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 70 [2018-11-10 05:45:30,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 56 [2018-11-10 05:45:30,157 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:45:30,167 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:30,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 64 [2018-11-10 05:45:30,194 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 3 xjuncts. [2018-11-10 05:45:30,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 50 [2018-11-10 05:45:30,634 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:30,957 INFO L267 ElimStorePlain]: Start of recursive call 25: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:45:31,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 60 [2018-11-10 05:45:31,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-11-10 05:45:31,330 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:31,408 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:31,825 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:31,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 52 [2018-11-10 05:45:31,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 42 [2018-11-10 05:45:32,078 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 36 [2018-11-10 05:45:32,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 05:45:32,085 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:32,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 19 [2018-11-10 05:45:32,094 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:32,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 18 [2018-11-10 05:45:32,104 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:32,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 23 [2018-11-10 05:45:32,280 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:32,358 INFO L267 ElimStorePlain]: Start of recursive call 31: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:32,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 05:45:32,492 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:32,638 INFO L267 ElimStorePlain]: Start of recursive call 30: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:32,642 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:32,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-11-10 05:45:32,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 42 [2018-11-10 05:45:32,910 WARN L179 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 36 [2018-11-10 05:45:32,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 18 [2018-11-10 05:45:32,918 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:32,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-10 05:45:32,933 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:32,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 19 [2018-11-10 05:45:32,945 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:33,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 23 [2018-11-10 05:45:33,092 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:33,170 INFO L267 ElimStorePlain]: Start of recursive call 38: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:33,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-11-10 05:45:33,324 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:33,440 INFO L267 ElimStorePlain]: Start of recursive call 37: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-10 05:45:35,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-11-10 05:45:35,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 21 [2018-11-10 05:45:35,786 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:35,909 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:35,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-11-10 05:45:35,943 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:45:35,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-11-10 05:45:35,945 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:36,022 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:45:36,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-11-10 05:45:36,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 21 [2018-11-10 05:45:36,096 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:36,235 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:36,572 INFO L267 ElimStorePlain]: Start of recursive call 24: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 05:45:36,830 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 05:45:36,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 340 treesize of output 311 [2018-11-10 05:45:37,137 WARN L179 SmtUtils]: Spent 259.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 68 [2018-11-10 05:45:37,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:45:37,148 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:37,297 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:37,359 INFO L303 Elim1Store]: Index analysis took 104 ms [2018-11-10 05:45:37,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 42 treesize of output 63 [2018-11-10 05:45:37,615 WARN L179 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 67 [2018-11-10 05:45:37,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 48 [2018-11-10 05:45:37,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-11-10 05:45:37,644 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:37,720 INFO L267 ElimStorePlain]: Start of recursive call 53: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:38,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 44 [2018-11-10 05:45:38,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 41 [2018-11-10 05:45:38,121 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:38,352 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:45:38,362 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:38,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 52 [2018-11-10 05:45:38,405 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 3 xjuncts. [2018-11-10 05:45:38,705 INFO L267 ElimStorePlain]: Start of recursive call 55: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-11-10 05:45:39,043 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:39,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 39 [2018-11-10 05:45:39,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-11-10 05:45:39,058 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:39,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 32 [2018-11-10 05:45:39,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 20 [2018-11-10 05:45:39,345 INFO L267 ElimStorePlain]: Start of recursive call 61: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:39,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 13 [2018-11-10 05:45:39,574 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:39,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 15 [2018-11-10 05:45:39,581 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:39,638 INFO L267 ElimStorePlain]: Start of recursive call 60: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:39,751 INFO L267 ElimStorePlain]: Start of recursive call 58: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:39,757 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:39,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 41 [2018-11-10 05:45:39,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 32 [2018-11-10 05:45:39,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 13 [2018-11-10 05:45:39,931 INFO L267 ElimStorePlain]: Start of recursive call 66: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:39,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 15 [2018-11-10 05:45:39,938 INFO L267 ElimStorePlain]: Start of recursive call 67: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:39,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-10 05:45:39,945 INFO L267 ElimStorePlain]: Start of recursive call 68: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:40,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 20 [2018-11-10 05:45:40,096 INFO L267 ElimStorePlain]: Start of recursive call 69: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:40,163 INFO L267 ElimStorePlain]: Start of recursive call 65: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:40,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-11-10 05:45:40,273 INFO L267 ElimStorePlain]: Start of recursive call 70: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:40,360 INFO L267 ElimStorePlain]: Start of recursive call 64: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-10 05:45:41,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-10 05:45:41,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 18 [2018-11-10 05:45:41,202 INFO L267 ElimStorePlain]: Start of recursive call 72: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:41,274 INFO L267 ElimStorePlain]: Start of recursive call 71: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:41,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2018-11-10 05:45:41,304 INFO L700 Elim1Store]: detected not equals via solver [2018-11-10 05:45:41,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2018-11-10 05:45:41,305 INFO L267 ElimStorePlain]: Start of recursive call 74: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:41,380 INFO L267 ElimStorePlain]: Start of recursive call 73: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-10 05:45:41,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-11-10 05:45:41,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 18 [2018-11-10 05:45:41,427 INFO L267 ElimStorePlain]: Start of recursive call 76: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:41,546 INFO L267 ElimStorePlain]: Start of recursive call 75: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:41,801 INFO L267 ElimStorePlain]: Start of recursive call 52: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-11-10 05:45:42,162 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-11-10 05:45:42,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 219 treesize of output 190 [2018-11-10 05:45:42,470 WARN L179 SmtUtils]: Spent 268.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 65 [2018-11-10 05:45:42,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-10 05:45:42,483 INFO L267 ElimStorePlain]: Start of recursive call 78: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:42,631 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:42,694 INFO L303 Elim1Store]: Index analysis took 110 ms [2018-11-10 05:45:42,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 42 treesize of output 63 [2018-11-10 05:45:42,994 WARN L179 SmtUtils]: Spent 258.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 68 [2018-11-10 05:45:43,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 47 [2018-11-10 05:45:43,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 40 treesize of output 65 [2018-11-10 05:45:43,256 INFO L267 ElimStorePlain]: Start of recursive call 81: End of recursive call: and 8 xjuncts. [2018-11-10 05:45:43,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 29 treesize of output 35 [2018-11-10 05:45:43,810 INFO L267 ElimStorePlain]: Start of recursive call 82: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:43,926 INFO L267 ElimStorePlain]: Start of recursive call 80: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:44,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 44 [2018-11-10 05:45:44,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-11-10 05:45:44,249 INFO L267 ElimStorePlain]: Start of recursive call 84: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:44,314 INFO L267 ElimStorePlain]: Start of recursive call 83: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-10 05:45:44,658 INFO L682 Elim1Store]: detected equality via solver [2018-11-10 05:45:44,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 51 [2018-11-10 05:45:44,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-11-10 05:45:44,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-11-10 05:45:44,797 INFO L267 ElimStorePlain]: Start of recursive call 87: End of recursive call: and 2 xjuncts. [2018-11-10 05:45:44,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 6 [2018-11-10 05:45:44,805 INFO L267 ElimStorePlain]: Start of recursive call 88: End of recursive call: and 1 xjuncts. [2018-11-10 05:45:44,908 INFO L267 ElimStorePlain]: Start of recursive call 86: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-11-10 05:45:45,704 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-10 05:45:45,705 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_179 term size 41 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:383) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:234) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-10 05:45:45,708 INFO L168 Benchmark]: Toolchain (without parser) took 220171.51 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 240.1 MB). Free memory was 943.3 MB in the beginning and 1.1 GB in the end (delta: -130.2 MB). Peak memory consumption was 423.8 MB. Max. memory is 11.5 GB. [2018-11-10 05:45:45,708 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 05:45:45,708 INFO L168 Benchmark]: CACSL2BoogieTranslator took 311.90 ms. Allocated memory is still 1.0 GB. Free memory was 943.3 MB in the beginning and 921.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-10 05:45:45,708 INFO L168 Benchmark]: Boogie Procedure Inliner took 86.19 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.7 MB). Free memory was 921.8 MB in the beginning and 1.1 GB in the end (delta: -187.7 MB). Peak memory consumption was 16.8 MB. Max. memory is 11.5 GB. [2018-11-10 05:45:45,709 INFO L168 Benchmark]: Boogie Preprocessor took 32.97 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 05:45:45,709 INFO L168 Benchmark]: RCFGBuilder took 610.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.4 MB). Peak memory consumption was 60.4 MB. Max. memory is 11.5 GB. [2018-11-10 05:45:45,709 INFO L168 Benchmark]: TraceAbstraction took 219127.14 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 117.4 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -24.4 MB). Peak memory consumption was 406.9 MB. Max. memory is 11.5 GB. [2018-11-10 05:45:45,710 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 311.90 ms. Allocated memory is still 1.0 GB. Free memory was 943.3 MB in the beginning and 921.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 86.19 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.7 MB). Free memory was 921.8 MB in the beginning and 1.1 GB in the end (delta: -187.7 MB). Peak memory consumption was 16.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 32.97 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 610.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.4 MB). Peak memory consumption was 60.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 219127.14 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 117.4 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -24.4 MB). Peak memory consumption was 406.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_179 term size 41 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_179 term size 41: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...