./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c -s /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 747981090a474d9d2269aea1ffd03eef2ddc8848 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 07:40:43,462 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 07:40:43,463 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 07:40:43,469 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 07:40:43,470 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 07:40:43,470 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 07:40:43,471 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 07:40:43,472 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 07:40:43,473 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 07:40:43,474 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 07:40:43,475 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 07:40:43,475 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 07:40:43,475 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 07:40:43,476 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 07:40:43,476 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 07:40:43,477 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 07:40:43,477 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 07:40:43,478 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 07:40:43,480 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 07:40:43,481 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 07:40:43,482 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 07:40:43,482 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 07:40:43,484 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 07:40:43,484 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 07:40:43,484 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 07:40:43,485 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 07:40:43,485 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 07:40:43,486 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 07:40:43,486 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 07:40:43,487 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 07:40:43,487 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 07:40:43,487 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 07:40:43,487 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 07:40:43,487 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 07:40:43,488 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 07:40:43,488 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 07:40:43,488 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-10 07:40:43,496 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 07:40:43,497 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 07:40:43,497 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 07:40:43,497 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-10 07:40:43,497 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-10 07:40:43,497 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-10 07:40:43,497 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-10 07:40:43,497 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-10 07:40:43,498 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-10 07:40:43,498 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-10 07:40:43,499 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 07:40:43,499 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-10 07:40:43,499 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-10 07:40:43,500 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 07:40:43,500 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 07:40:43,500 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-10 07:40:43,500 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 747981090a474d9d2269aea1ffd03eef2ddc8848 [2018-11-10 07:40:43,524 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 07:40:43,533 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 07:40:43,535 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 07:40:43,536 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 07:40:43,536 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 07:40:43,536 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-10 07:40:43,571 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/data/8e7cc144f/4b1cdec74899413c88103556e55e3f17/FLAG0ce2263d9 [2018-11-10 07:40:43,992 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 07:40:43,993 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-10 07:40:44,002 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/data/8e7cc144f/4b1cdec74899413c88103556e55e3f17/FLAG0ce2263d9 [2018-11-10 07:40:44,012 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/data/8e7cc144f/4b1cdec74899413c88103556e55e3f17 [2018-11-10 07:40:44,014 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 07:40:44,015 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 07:40:44,016 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 07:40:44,016 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 07:40:44,018 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 07:40:44,019 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,020 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d841a26 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44, skipping insertion in model container [2018-11-10 07:40:44,020 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,026 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 07:40:44,055 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 07:40:44,221 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:40:44,225 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 07:40:44,273 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 07:40:44,284 INFO L193 MainTranslator]: Completed translation [2018-11-10 07:40:44,284 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44 WrapperNode [2018-11-10 07:40:44,284 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 07:40:44,285 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 07:40:44,285 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 07:40:44,285 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 07:40:44,290 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,296 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,300 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 07:40:44,300 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 07:40:44,301 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 07:40:44,301 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 07:40:44,348 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,348 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,350 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,351 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,364 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,373 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,377 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... [2018-11-10 07:40:44,381 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 07:40:44,381 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 07:40:44,381 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 07:40:44,381 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 07:40:44,382 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 07:40:44,436 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 07:40:44,436 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 07:40:44,436 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 07:40:44,436 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 07:40:44,436 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 07:40:44,436 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 07:40:45,018 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 07:40:45,018 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:40:45 BoogieIcfgContainer [2018-11-10 07:40:45,018 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 07:40:45,019 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 07:40:45,019 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 07:40:45,022 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 07:40:45,023 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 07:40:44" (1/3) ... [2018-11-10 07:40:45,023 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d34a7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 07:40:45, skipping insertion in model container [2018-11-10 07:40:45,023 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 07:40:44" (2/3) ... [2018-11-10 07:40:45,024 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d34a7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 07:40:45, skipping insertion in model container [2018-11-10 07:40:45,024 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:40:45" (3/3) ... [2018-11-10 07:40:45,025 INFO L112 eAbstractionObserver]: Analyzing ICFG psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-10 07:40:45,034 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 07:40:45,041 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-10 07:40:45,054 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-10 07:40:45,080 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 07:40:45,080 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-10 07:40:45,080 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 07:40:45,080 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 07:40:45,080 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 07:40:45,080 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 07:40:45,081 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 07:40:45,081 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 07:40:45,097 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states. [2018-11-10 07:40:45,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-10 07:40:45,103 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:45,103 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:45,105 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:45,110 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:45,110 INFO L82 PathProgramCache]: Analyzing trace with hash -662778961, now seen corresponding path program 1 times [2018-11-10 07:40:45,112 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:45,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:45,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,155 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:45,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:45,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:40:45,248 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:40:45,248 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:40:45,248 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:45,252 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:45,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:45,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,266 INFO L87 Difference]: Start difference. First operand 115 states. Second operand 3 states. [2018-11-10 07:40:45,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:45,501 INFO L93 Difference]: Finished difference Result 331 states and 635 transitions. [2018-11-10 07:40:45,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:45,502 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-10 07:40:45,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:45,512 INFO L225 Difference]: With dead ends: 331 [2018-11-10 07:40:45,513 INFO L226 Difference]: Without dead ends: 206 [2018-11-10 07:40:45,516 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-11-10 07:40:45,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 182. [2018-11-10 07:40:45,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-11-10 07:40:45,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 314 transitions. [2018-11-10 07:40:45,552 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 314 transitions. Word has length 14 [2018-11-10 07:40:45,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:45,553 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 314 transitions. [2018-11-10 07:40:45,553 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:45,553 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 314 transitions. [2018-11-10 07:40:45,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-10 07:40:45,553 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:45,554 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:45,554 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:45,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:45,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1058783719, now seen corresponding path program 1 times [2018-11-10 07:40:45,554 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:45,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:45,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,555 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:45,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:45,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:40:45,603 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:40:45,603 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:40:45,603 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:45,604 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:45,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:45,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,604 INFO L87 Difference]: Start difference. First operand 182 states and 314 transitions. Second operand 3 states. [2018-11-10 07:40:45,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:45,646 INFO L93 Difference]: Finished difference Result 365 states and 632 transitions. [2018-11-10 07:40:45,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:45,647 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-11-10 07:40:45,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:45,649 INFO L225 Difference]: With dead ends: 365 [2018-11-10 07:40:45,649 INFO L226 Difference]: Without dead ends: 189 [2018-11-10 07:40:45,650 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-10 07:40:45,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2018-11-10 07:40:45,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-11-10 07:40:45,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 322 transitions. [2018-11-10 07:40:45,660 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 322 transitions. Word has length 15 [2018-11-10 07:40:45,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:45,660 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 322 transitions. [2018-11-10 07:40:45,660 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:45,661 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 322 transitions. [2018-11-10 07:40:45,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-10 07:40:45,661 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:45,661 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:45,661 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:45,662 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:45,662 INFO L82 PathProgramCache]: Analyzing trace with hash -426524154, now seen corresponding path program 1 times [2018-11-10 07:40:45,662 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:45,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,663 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:45,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,663 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:45,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:45,726 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:40:45,726 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:40:45,727 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:40:45,727 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:45,727 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:45,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:45,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,728 INFO L87 Difference]: Start difference. First operand 189 states and 322 transitions. Second operand 3 states. [2018-11-10 07:40:45,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:45,819 INFO L93 Difference]: Finished difference Result 290 states and 484 transitions. [2018-11-10 07:40:45,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:45,822 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2018-11-10 07:40:45,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:45,824 INFO L225 Difference]: With dead ends: 290 [2018-11-10 07:40:45,824 INFO L226 Difference]: Without dead ends: 274 [2018-11-10 07:40:45,824 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-11-10 07:40:45,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 259. [2018-11-10 07:40:45,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-11-10 07:40:45,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 436 transitions. [2018-11-10 07:40:45,837 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 436 transitions. Word has length 21 [2018-11-10 07:40:45,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:45,837 INFO L481 AbstractCegarLoop]: Abstraction has 259 states and 436 transitions. [2018-11-10 07:40:45,837 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:45,837 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 436 transitions. [2018-11-10 07:40:45,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-10 07:40:45,838 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:45,838 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:45,838 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:45,839 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:45,839 INFO L82 PathProgramCache]: Analyzing trace with hash -1881066880, now seen corresponding path program 1 times [2018-11-10 07:40:45,839 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:45,840 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,840 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:45,840 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,840 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:45,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:45,894 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:40:45,895 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:40:45,895 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:40:45,895 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:45,895 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:45,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:45,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,896 INFO L87 Difference]: Start difference. First operand 259 states and 436 transitions. Second operand 3 states. [2018-11-10 07:40:45,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:45,928 INFO L93 Difference]: Finished difference Result 468 states and 791 transitions. [2018-11-10 07:40:45,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:45,929 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-11-10 07:40:45,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:45,930 INFO L225 Difference]: With dead ends: 468 [2018-11-10 07:40:45,930 INFO L226 Difference]: Without dead ends: 216 [2018-11-10 07:40:45,931 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:45,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-11-10 07:40:45,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 214. [2018-11-10 07:40:45,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-11-10 07:40:45,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 355 transitions. [2018-11-10 07:40:45,939 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 355 transitions. Word has length 22 [2018-11-10 07:40:45,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:45,940 INFO L481 AbstractCegarLoop]: Abstraction has 214 states and 355 transitions. [2018-11-10 07:40:45,940 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:45,940 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 355 transitions. [2018-11-10 07:40:45,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-10 07:40:45,941 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:45,941 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:45,941 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:45,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:45,941 INFO L82 PathProgramCache]: Analyzing trace with hash 30525515, now seen corresponding path program 1 times [2018-11-10 07:40:45,942 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:45,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:45,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:45,943 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:45,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:46,004 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 11 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:40:46,004 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:40:46,004 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:40:46,005 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 29 with the following transitions: [2018-11-10 07:40:46,006 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [54], [56], [526], [529], [530], [531] [2018-11-10 07:40:46,039 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:40:46,039 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:40:46,537 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:40:48,257 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:40:48,258 INFO L272 AbstractInterpreter]: Visited 21 different actions 45 times. Merged at 11 different actions 17 times. Never widened. Found 5 fixpoints after 4 different actions. Largest state had 38 variables. [2018-11-10 07:40:48,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:48,266 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:40:48,266 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:40:48,266 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:40:48,272 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:48,272 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:40:48,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:48,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:40:48,327 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:40:48,328 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:40:48,345 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-10 07:40:48,374 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-10 07:40:48,374 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [4] total 6 [2018-11-10 07:40:48,374 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:48,374 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:48,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:48,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:40:48,375 INFO L87 Difference]: Start difference. First operand 214 states and 355 transitions. Second operand 3 states. [2018-11-10 07:40:48,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:48,405 INFO L93 Difference]: Finished difference Result 389 states and 646 transitions. [2018-11-10 07:40:48,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:48,406 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2018-11-10 07:40:48,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:48,407 INFO L225 Difference]: With dead ends: 389 [2018-11-10 07:40:48,407 INFO L226 Difference]: Without dead ends: 182 [2018-11-10 07:40:48,407 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 07:40:48,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-11-10 07:40:48,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 180. [2018-11-10 07:40:48,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-11-10 07:40:48,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 291 transitions. [2018-11-10 07:40:48,414 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 291 transitions. Word has length 28 [2018-11-10 07:40:48,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:48,414 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 291 transitions. [2018-11-10 07:40:48,414 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:48,414 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 291 transitions. [2018-11-10 07:40:48,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-10 07:40:48,415 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:48,415 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:48,415 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:48,416 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:48,416 INFO L82 PathProgramCache]: Analyzing trace with hash 1381236108, now seen corresponding path program 1 times [2018-11-10 07:40:48,416 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:48,416 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:48,417 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:48,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:48,417 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:48,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:48,462 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:40:48,462 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:40:48,462 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:40:48,463 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 31 with the following transitions: [2018-11-10 07:40:48,463 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [239], [242], [245], [526], [529], [530], [531] [2018-11-10 07:40:48,465 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:40:48,465 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:40:48,754 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:40:49,982 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-10 07:40:49,982 INFO L272 AbstractInterpreter]: Visited 25 different actions 55 times. Merged at 16 different actions 22 times. Never widened. Found 4 fixpoints after 3 different actions. Largest state had 39 variables. [2018-11-10 07:40:49,984 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:49,984 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-10 07:40:50,475 INFO L227 lantSequenceWeakener]: Weakened 28 states. On average, predicates are now at 91.12% of their original sizes. [2018-11-10 07:40:50,475 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-10 07:40:50,647 INFO L415 sIntCurrentIteration]: We unified 29 AI predicates to 29 [2018-11-10 07:40:50,647 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-10 07:40:50,647 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-10 07:40:50,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [4] total 16 [2018-11-10 07:40:50,648 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:50,648 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-10 07:40:50,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-10 07:40:50,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:40:50,648 INFO L87 Difference]: Start difference. First operand 180 states and 291 transitions. Second operand 14 states. [2018-11-10 07:40:53,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:53,774 INFO L93 Difference]: Finished difference Result 375 states and 610 transitions. [2018-11-10 07:40:53,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 07:40:53,774 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 30 [2018-11-10 07:40:53,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:53,775 INFO L225 Difference]: With dead ends: 375 [2018-11-10 07:40:53,775 INFO L226 Difference]: Without dead ends: 220 [2018-11-10 07:40:53,775 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 36 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=283, Unknown=0, NotChecked=0, Total=380 [2018-11-10 07:40:53,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-11-10 07:40:53,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 217. [2018-11-10 07:40:53,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-11-10 07:40:53,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 338 transitions. [2018-11-10 07:40:53,781 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 338 transitions. Word has length 30 [2018-11-10 07:40:53,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:53,781 INFO L481 AbstractCegarLoop]: Abstraction has 217 states and 338 transitions. [2018-11-10 07:40:53,781 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-10 07:40:53,782 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 338 transitions. [2018-11-10 07:40:53,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 07:40:53,782 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:53,783 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:53,783 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:53,783 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:53,783 INFO L82 PathProgramCache]: Analyzing trace with hash 1339641340, now seen corresponding path program 1 times [2018-11-10 07:40:53,783 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:53,784 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:53,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:53,784 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:53,784 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:53,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:53,822 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-10 07:40:53,822 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:40:53,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:40:53,823 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:53,823 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:53,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:53,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:53,823 INFO L87 Difference]: Start difference. First operand 217 states and 338 transitions. Second operand 3 states. [2018-11-10 07:40:53,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:53,864 INFO L93 Difference]: Finished difference Result 391 states and 620 transitions. [2018-11-10 07:40:53,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:53,864 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2018-11-10 07:40:53,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:53,865 INFO L225 Difference]: With dead ends: 391 [2018-11-10 07:40:53,865 INFO L226 Difference]: Without dead ends: 223 [2018-11-10 07:40:53,866 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:53,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-11-10 07:40:53,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 221. [2018-11-10 07:40:53,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-11-10 07:40:53,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 341 transitions. [2018-11-10 07:40:53,871 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 341 transitions. Word has length 40 [2018-11-10 07:40:53,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:53,872 INFO L481 AbstractCegarLoop]: Abstraction has 221 states and 341 transitions. [2018-11-10 07:40:53,872 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:53,872 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 341 transitions. [2018-11-10 07:40:53,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-10 07:40:53,874 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:53,874 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:53,874 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:53,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:53,874 INFO L82 PathProgramCache]: Analyzing trace with hash 2019699710, now seen corresponding path program 1 times [2018-11-10 07:40:53,875 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:53,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:53,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:53,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:53,875 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:53,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:53,910 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:40:53,910 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:40:53,910 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:40:53,911 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:40:53,911 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:40:53,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:40:53,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:53,911 INFO L87 Difference]: Start difference. First operand 221 states and 341 transitions. Second operand 3 states. [2018-11-10 07:40:53,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:53,935 INFO L93 Difference]: Finished difference Result 395 states and 619 transitions. [2018-11-10 07:40:53,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:40:53,935 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2018-11-10 07:40:53,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:53,936 INFO L225 Difference]: With dead ends: 395 [2018-11-10 07:40:53,936 INFO L226 Difference]: Without dead ends: 223 [2018-11-10 07:40:53,936 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:40:53,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-11-10 07:40:53,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 221. [2018-11-10 07:40:53,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-11-10 07:40:53,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 339 transitions. [2018-11-10 07:40:53,941 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 339 transitions. Word has length 40 [2018-11-10 07:40:53,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:53,941 INFO L481 AbstractCegarLoop]: Abstraction has 221 states and 339 transitions. [2018-11-10 07:40:53,941 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:40:53,942 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 339 transitions. [2018-11-10 07:40:53,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-10 07:40:53,942 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:53,942 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:53,943 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:53,943 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:53,943 INFO L82 PathProgramCache]: Analyzing trace with hash 937434793, now seen corresponding path program 1 times [2018-11-10 07:40:53,943 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:53,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:53,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:53,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:53,944 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:53,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:54,035 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 14 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-10 07:40:54,035 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:40:54,035 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:40:54,035 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-11-10 07:40:54,035 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [335], [338], [341], [526], [529], [530], [531] [2018-11-10 07:40:54,037 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:40:54,037 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:40:54,265 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:40:58,525 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:40:58,525 INFO L272 AbstractInterpreter]: Visited 31 different actions 145 times. Merged at 24 different actions 96 times. Widened at 2 different actions 4 times. Found 17 fixpoints after 6 different actions. Largest state had 41 variables. [2018-11-10 07:40:58,537 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:58,537 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:40:58,537 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:40:58,538 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:40:58,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:58,554 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:40:58,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:58,581 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:40:58,618 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:40:58,618 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:40:58,730 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:40:58,746 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:40:58,746 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2018-11-10 07:40:58,746 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:40:58,746 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:40:58,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:40:58,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:40:58,747 INFO L87 Difference]: Start difference. First operand 221 states and 339 transitions. Second operand 7 states. [2018-11-10 07:40:58,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:40:58,958 INFO L93 Difference]: Finished difference Result 474 states and 733 transitions. [2018-11-10 07:40:58,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:40:58,958 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-11-10 07:40:58,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:40:58,960 INFO L225 Difference]: With dead ends: 474 [2018-11-10 07:40:58,960 INFO L226 Difference]: Without dead ends: 292 [2018-11-10 07:40:58,961 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 80 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-11-10 07:40:58,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-11-10 07:40:58,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 272. [2018-11-10 07:40:58,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272 states. [2018-11-10 07:40:58,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 419 transitions. [2018-11-10 07:40:58,971 INFO L78 Accepts]: Start accepts. Automaton has 272 states and 419 transitions. Word has length 41 [2018-11-10 07:40:58,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:40:58,972 INFO L481 AbstractCegarLoop]: Abstraction has 272 states and 419 transitions. [2018-11-10 07:40:58,972 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:40:58,972 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 419 transitions. [2018-11-10 07:40:58,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 07:40:58,972 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:40:58,972 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:40:58,973 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:40:58,973 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:40:58,973 INFO L82 PathProgramCache]: Analyzing trace with hash -992845957, now seen corresponding path program 1 times [2018-11-10 07:40:58,973 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:40:58,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:58,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:40:58,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:40:58,974 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:40:58,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:40:59,023 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:40:59,023 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:40:59,023 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:40:59,024 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-11-10 07:40:59,024 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [350], [353], [356], [526], [529], [530], [531] [2018-11-10 07:40:59,025 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:40:59,026 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:40:59,359 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:41:03,458 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:41:03,458 INFO L272 AbstractInterpreter]: Visited 32 different actions 147 times. Merged at 25 different actions 95 times. Widened at 2 different actions 4 times. Found 17 fixpoints after 6 different actions. Largest state had 42 variables. [2018-11-10 07:41:03,465 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:03,465 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:41:03,465 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:03,466 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:41:03,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:03,482 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:41:03,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:03,508 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:41:03,515 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:41:03,515 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:41:03,537 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-10 07:41:03,553 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:41:03,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 4 [2018-11-10 07:41:03,554 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:41:03,554 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 07:41:03,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 07:41:03,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:41:03,554 INFO L87 Difference]: Start difference. First operand 272 states and 419 transitions. Second operand 4 states. [2018-11-10 07:41:03,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:03,626 INFO L93 Difference]: Finished difference Result 446 states and 695 transitions. [2018-11-10 07:41:03,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 07:41:03,626 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-11-10 07:41:03,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:03,627 INFO L225 Difference]: With dead ends: 446 [2018-11-10 07:41:03,627 INFO L226 Difference]: Without dead ends: 424 [2018-11-10 07:41:03,628 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 07:41:03,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2018-11-10 07:41:03,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 422. [2018-11-10 07:41:03,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 422 states. [2018-11-10 07:41:03,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 636 transitions. [2018-11-10 07:41:03,637 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 636 transitions. Word has length 42 [2018-11-10 07:41:03,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:03,638 INFO L481 AbstractCegarLoop]: Abstraction has 422 states and 636 transitions. [2018-11-10 07:41:03,638 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 07:41:03,638 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 636 transitions. [2018-11-10 07:41:03,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-10 07:41:03,638 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:03,638 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:03,638 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:03,639 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:03,639 INFO L82 PathProgramCache]: Analyzing trace with hash -275920596, now seen corresponding path program 1 times [2018-11-10 07:41:03,639 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:03,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:03,639 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:03,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:03,639 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:03,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:03,723 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:03,723 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:03,723 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:41:03,724 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-10 07:41:03,724 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [386], [526], [529], [530], [531] [2018-11-10 07:41:03,725 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:41:03,725 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:41:03,964 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:41:09,441 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:41:09,441 INFO L272 AbstractInterpreter]: Visited 34 different actions 157 times. Merged at 27 different actions 105 times. Widened at 2 different actions 4 times. Found 17 fixpoints after 6 different actions. Largest state had 44 variables. [2018-11-10 07:41:09,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:09,445 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:41:09,446 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:09,446 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:41:09,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:09,461 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:41:09,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:09,496 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:41:09,509 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:09,509 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:41:09,678 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:09,697 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:41:09,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 8 [2018-11-10 07:41:09,697 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:41:09,698 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:41:09,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:41:09,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:41:09,698 INFO L87 Difference]: Start difference. First operand 422 states and 636 transitions. Second operand 5 states. [2018-11-10 07:41:09,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:09,776 INFO L93 Difference]: Finished difference Result 431 states and 643 transitions. [2018-11-10 07:41:09,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:41:09,777 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2018-11-10 07:41:09,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:09,778 INFO L225 Difference]: With dead ends: 431 [2018-11-10 07:41:09,778 INFO L226 Difference]: Without dead ends: 429 [2018-11-10 07:41:09,778 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 84 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:41:09,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2018-11-10 07:41:09,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 423. [2018-11-10 07:41:09,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2018-11-10 07:41:09,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 637 transitions. [2018-11-10 07:41:09,789 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 637 transitions. Word has length 44 [2018-11-10 07:41:09,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:09,789 INFO L481 AbstractCegarLoop]: Abstraction has 423 states and 637 transitions. [2018-11-10 07:41:09,789 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:41:09,789 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 637 transitions. [2018-11-10 07:41:09,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 07:41:09,789 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:09,790 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:09,790 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:09,790 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:09,790 INFO L82 PathProgramCache]: Analyzing trace with hash 161633879, now seen corresponding path program 1 times [2018-11-10 07:41:09,790 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:09,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:09,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:09,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:09,791 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:09,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:09,818 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:41:09,818 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:41:09,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:41:09,818 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:41:09,819 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:41:09,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:41:09,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:41:09,819 INFO L87 Difference]: Start difference. First operand 423 states and 637 transitions. Second operand 3 states. [2018-11-10 07:41:09,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:09,846 INFO L93 Difference]: Finished difference Result 795 states and 1193 transitions. [2018-11-10 07:41:09,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:41:09,847 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2018-11-10 07:41:09,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:09,848 INFO L225 Difference]: With dead ends: 795 [2018-11-10 07:41:09,848 INFO L226 Difference]: Without dead ends: 421 [2018-11-10 07:41:09,849 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:41:09,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 421 states. [2018-11-10 07:41:09,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 421 to 399. [2018-11-10 07:41:09,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 399 states. [2018-11-10 07:41:09,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 399 states to 399 states and 584 transitions. [2018-11-10 07:41:09,859 INFO L78 Accepts]: Start accepts. Automaton has 399 states and 584 transitions. Word has length 45 [2018-11-10 07:41:09,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:09,860 INFO L481 AbstractCegarLoop]: Abstraction has 399 states and 584 transitions. [2018-11-10 07:41:09,860 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:41:09,860 INFO L276 IsEmpty]: Start isEmpty. Operand 399 states and 584 transitions. [2018-11-10 07:41:09,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-10 07:41:09,860 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:09,860 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:09,861 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:09,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:09,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1614817955, now seen corresponding path program 1 times [2018-11-10 07:41:09,861 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:09,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:09,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:09,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:09,862 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:09,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:09,884 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-10 07:41:09,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 07:41:09,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-10 07:41:09,885 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:41:09,885 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-10 07:41:09,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-10 07:41:09,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:41:09,885 INFO L87 Difference]: Start difference. First operand 399 states and 584 transitions. Second operand 3 states. [2018-11-10 07:41:09,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:09,925 INFO L93 Difference]: Finished difference Result 555 states and 812 transitions. [2018-11-10 07:41:09,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-10 07:41:09,925 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2018-11-10 07:41:09,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:09,926 INFO L225 Difference]: With dead ends: 555 [2018-11-10 07:41:09,926 INFO L226 Difference]: Without dead ends: 225 [2018-11-10 07:41:09,927 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-10 07:41:09,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-11-10 07:41:09,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 223. [2018-11-10 07:41:09,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-11-10 07:41:09,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 316 transitions. [2018-11-10 07:41:09,935 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 316 transitions. Word has length 55 [2018-11-10 07:41:09,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:09,935 INFO L481 AbstractCegarLoop]: Abstraction has 223 states and 316 transitions. [2018-11-10 07:41:09,935 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-10 07:41:09,935 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 316 transitions. [2018-11-10 07:41:09,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:41:09,936 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:09,936 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:09,936 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:09,936 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:09,936 INFO L82 PathProgramCache]: Analyzing trace with hash 1860919614, now seen corresponding path program 1 times [2018-11-10 07:41:09,936 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:09,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:09,937 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:09,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:09,937 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:09,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:09,979 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:41:09,979 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:09,979 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:41:09,979 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-11-10 07:41:09,979 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [526], [529], [530], [531] [2018-11-10 07:41:09,981 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:41:09,981 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:41:10,226 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:41:17,561 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:41:17,561 INFO L272 AbstractInterpreter]: Visited 41 different actions 233 times. Merged at 33 different actions 152 times. Widened at 3 different actions 6 times. Found 27 fixpoints after 8 different actions. Largest state had 46 variables. [2018-11-10 07:41:17,565 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:17,565 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:41:17,565 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:17,565 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:41:17,571 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:17,571 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:41:17,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:17,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:41:17,610 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:41:17,610 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:41:17,639 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:41:17,667 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:41:17,667 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 8 [2018-11-10 07:41:17,667 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:41:17,667 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:41:17,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:41:17,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:41:17,668 INFO L87 Difference]: Start difference. First operand 223 states and 316 transitions. Second operand 5 states. [2018-11-10 07:41:17,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:17,812 INFO L93 Difference]: Finished difference Result 597 states and 858 transitions. [2018-11-10 07:41:17,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:41:17,813 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-11-10 07:41:17,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:17,815 INFO L225 Difference]: With dead ends: 597 [2018-11-10 07:41:17,815 INFO L226 Difference]: Without dead ends: 442 [2018-11-10 07:41:17,816 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-10 07:41:17,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2018-11-10 07:41:17,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 326. [2018-11-10 07:41:17,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-11-10 07:41:17,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 472 transitions. [2018-11-10 07:41:17,834 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 472 transitions. Word has length 56 [2018-11-10 07:41:17,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:17,835 INFO L481 AbstractCegarLoop]: Abstraction has 326 states and 472 transitions. [2018-11-10 07:41:17,835 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:41:17,835 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 472 transitions. [2018-11-10 07:41:17,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-10 07:41:17,835 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:17,835 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:17,836 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:17,836 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:17,836 INFO L82 PathProgramCache]: Analyzing trace with hash 2119085052, now seen corresponding path program 1 times [2018-11-10 07:41:17,836 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:17,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:17,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:17,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:17,837 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:17,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:17,924 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:41:17,924 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:17,924 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:41:17,924 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-11-10 07:41:17,924 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [526], [529], [530], [531] [2018-11-10 07:41:17,929 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:41:17,929 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:41:18,242 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:41:25,474 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:41:25,474 INFO L272 AbstractInterpreter]: Visited 40 different actions 222 times. Merged at 33 different actions 152 times. Widened at 3 different actions 6 times. Found 27 fixpoints after 8 different actions. Largest state had 46 variables. [2018-11-10 07:41:25,475 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:25,475 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:41:25,475 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:25,475 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:41:25,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:25,482 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:41:25,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:25,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:41:25,533 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:41:25,533 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:41:25,556 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:41:25,573 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:41:25,573 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 4] total 7 [2018-11-10 07:41:25,573 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:41:25,573 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 07:41:25,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 07:41:25,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:41:25,574 INFO L87 Difference]: Start difference. First operand 326 states and 472 transitions. Second operand 5 states. [2018-11-10 07:41:25,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:25,665 INFO L93 Difference]: Finished difference Result 373 states and 538 transitions. [2018-11-10 07:41:25,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 07:41:25,665 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-11-10 07:41:25,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:25,666 INFO L225 Difference]: With dead ends: 373 [2018-11-10 07:41:25,666 INFO L226 Difference]: Without dead ends: 367 [2018-11-10 07:41:25,667 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-10 07:41:25,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2018-11-10 07:41:25,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 364. [2018-11-10 07:41:25,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-11-10 07:41:25,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 526 transitions. [2018-11-10 07:41:25,677 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 526 transitions. Word has length 56 [2018-11-10 07:41:25,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:25,677 INFO L481 AbstractCegarLoop]: Abstraction has 364 states and 526 transitions. [2018-11-10 07:41:25,677 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 07:41:25,677 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 526 transitions. [2018-11-10 07:41:25,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-10 07:41:25,677 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:25,678 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:25,678 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:25,678 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:25,678 INFO L82 PathProgramCache]: Analyzing trace with hash 807144158, now seen corresponding path program 1 times [2018-11-10 07:41:25,678 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:25,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:25,679 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:25,679 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:25,679 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:25,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:25,779 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:25,780 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:25,780 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:41:25,780 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 61 with the following transitions: [2018-11-10 07:41:25,780 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [512], [526], [529], [530], [531] [2018-11-10 07:41:25,782 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:41:25,782 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:41:26,011 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:41:33,834 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:41:33,834 INFO L272 AbstractInterpreter]: Visited 44 different actions 243 times. Merged at 37 different actions 170 times. Widened at 3 different actions 6 times. Found 27 fixpoints after 8 different actions. Largest state had 50 variables. [2018-11-10 07:41:33,837 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:33,837 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:41:33,837 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:33,837 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:41:33,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:33,843 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:41:33,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:33,878 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:41:33,918 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:33,918 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:41:33,992 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:34,008 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:41:34,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 14 [2018-11-10 07:41:34,008 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:41:34,008 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 07:41:34,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 07:41:34,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:41:34,009 INFO L87 Difference]: Start difference. First operand 364 states and 526 transitions. Second operand 10 states. [2018-11-10 07:41:34,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:41:34,123 INFO L93 Difference]: Finished difference Result 367 states and 528 transitions. [2018-11-10 07:41:34,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:41:34,123 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 60 [2018-11-10 07:41:34,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:41:34,125 INFO L225 Difference]: With dead ends: 367 [2018-11-10 07:41:34,125 INFO L226 Difference]: Without dead ends: 365 [2018-11-10 07:41:34,125 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 113 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2018-11-10 07:41:34,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2018-11-10 07:41:34,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 364. [2018-11-10 07:41:34,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-11-10 07:41:34,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 525 transitions. [2018-11-10 07:41:34,135 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 525 transitions. Word has length 60 [2018-11-10 07:41:34,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:41:34,135 INFO L481 AbstractCegarLoop]: Abstraction has 364 states and 525 transitions. [2018-11-10 07:41:34,135 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 07:41:34,135 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 525 transitions. [2018-11-10 07:41:34,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-10 07:41:34,135 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:41:34,136 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:41:34,136 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:41:34,136 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:41:34,136 INFO L82 PathProgramCache]: Analyzing trace with hash -743255307, now seen corresponding path program 1 times [2018-11-10 07:41:34,136 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:41:34,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:34,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:41:34,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:41:34,137 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:41:34,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:41:34,280 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:41:34,281 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:41:34,281 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:41:34,281 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 68 with the following transitions: [2018-11-10 07:41:34,281 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [54], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:41:34,282 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:41:34,283 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:41:34,511 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:42:05,416 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:42:05,416 INFO L272 AbstractInterpreter]: Visited 45 different actions 781 times. Merged at 38 different actions 630 times. Widened at 5 different actions 41 times. Found 105 fixpoints after 14 different actions. Largest state had 50 variables. [2018-11-10 07:42:05,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:42:05,421 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:42:05,421 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:42:05,421 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:42:05,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:42:05,427 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:42:05,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:42:05,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:42:05,502 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:42:05,502 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:42:05,748 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 44 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-10 07:42:05,770 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:42:05,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7] total 14 [2018-11-10 07:42:05,770 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:42:05,771 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 07:42:05,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 07:42:05,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:42:05,771 INFO L87 Difference]: Start difference. First operand 364 states and 525 transitions. Second operand 9 states. [2018-11-10 07:42:05,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:42:05,962 INFO L93 Difference]: Finished difference Result 368 states and 529 transitions. [2018-11-10 07:42:05,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 07:42:05,962 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2018-11-10 07:42:05,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:42:05,963 INFO L225 Difference]: With dead ends: 368 [2018-11-10 07:42:05,964 INFO L226 Difference]: Without dead ends: 366 [2018-11-10 07:42:05,964 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 124 SyntacticMatches, 6 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=42, Invalid=168, Unknown=0, NotChecked=0, Total=210 [2018-11-10 07:42:05,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-11-10 07:42:05,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 365. [2018-11-10 07:42:05,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2018-11-10 07:42:05,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 526 transitions. [2018-11-10 07:42:05,979 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 526 transitions. Word has length 67 [2018-11-10 07:42:05,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:42:05,979 INFO L481 AbstractCegarLoop]: Abstraction has 365 states and 526 transitions. [2018-11-10 07:42:05,979 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 07:42:05,979 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 526 transitions. [2018-11-10 07:42:05,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 07:42:05,980 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:42:05,980 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:42:05,980 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:42:05,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:42:05,980 INFO L82 PathProgramCache]: Analyzing trace with hash -1746386041, now seen corresponding path program 1 times [2018-11-10 07:42:05,980 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:42:05,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:42:05,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:42:05,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:42:05,981 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:42:05,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:42:06,057 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:42:06,057 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:42:06,057 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:42:06,057 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 78 with the following transitions: [2018-11-10 07:42:06,057 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [260], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:42:06,058 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:42:06,059 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:42:06,310 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:42:42,827 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:42:42,827 INFO L272 AbstractInterpreter]: Visited 46 different actions 945 times. Merged at 39 different actions 734 times. Widened at 5 different actions 46 times. Found 128 fixpoints after 16 different actions. Largest state had 50 variables. [2018-11-10 07:42:42,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:42:42,833 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:42:42,833 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:42:42,834 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:42:42,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:42:42,839 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:42:42,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:42:42,871 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:42:42,878 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:42:42,878 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:42:42,936 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:42:42,952 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:42:42,952 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2018-11-10 07:42:42,952 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:42:42,952 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 07:42:42,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 07:42:42,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:42:42,953 INFO L87 Difference]: Start difference. First operand 365 states and 526 transitions. Second operand 6 states. [2018-11-10 07:42:43,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:42:43,093 INFO L93 Difference]: Finished difference Result 825 states and 1192 transitions. [2018-11-10 07:42:43,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 07:42:43,093 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2018-11-10 07:42:43,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:42:43,095 INFO L225 Difference]: With dead ends: 825 [2018-11-10 07:42:43,095 INFO L226 Difference]: Without dead ends: 568 [2018-11-10 07:42:43,095 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-10 07:42:43,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2018-11-10 07:42:43,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 446. [2018-11-10 07:42:43,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 446 states. [2018-11-10 07:42:43,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 446 states to 446 states and 649 transitions. [2018-11-10 07:42:43,112 INFO L78 Accepts]: Start accepts. Automaton has 446 states and 649 transitions. Word has length 77 [2018-11-10 07:42:43,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:42:43,113 INFO L481 AbstractCegarLoop]: Abstraction has 446 states and 649 transitions. [2018-11-10 07:42:43,113 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 07:42:43,113 INFO L276 IsEmpty]: Start isEmpty. Operand 446 states and 649 transitions. [2018-11-10 07:42:43,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-10 07:42:43,116 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:42:43,116 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:42:43,116 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:42:43,116 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:42:43,116 INFO L82 PathProgramCache]: Analyzing trace with hash -2139413051, now seen corresponding path program 1 times [2018-11-10 07:42:43,116 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:42:43,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:42:43,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:42:43,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:42:43,117 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:42:43,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:42:43,230 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:42:43,230 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:42:43,230 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:42:43,230 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 78 with the following transitions: [2018-11-10 07:42:43,230 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [260], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:42:43,232 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:42:43,232 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:42:43,585 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:43:12,196 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:43:12,197 INFO L272 AbstractInterpreter]: Visited 45 different actions 785 times. Merged at 38 different actions 632 times. Widened at 5 different actions 42 times. Found 104 fixpoints after 13 different actions. Largest state had 50 variables. [2018-11-10 07:43:12,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:43:12,200 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:43:12,200 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:43:12,200 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:43:12,206 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:43:12,206 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:43:12,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:43:12,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:43:12,305 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 70 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:43:12,305 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:43:12,365 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 35 proven. 43 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:43:12,381 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:43:12,382 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 16 [2018-11-10 07:43:12,382 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:43:12,382 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 07:43:12,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 07:43:12,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=190, Unknown=0, NotChecked=0, Total=240 [2018-11-10 07:43:12,382 INFO L87 Difference]: Start difference. First operand 446 states and 649 transitions. Second operand 12 states. [2018-11-10 07:43:12,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:43:12,500 INFO L93 Difference]: Finished difference Result 472 states and 685 transitions. [2018-11-10 07:43:12,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 07:43:12,501 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 77 [2018-11-10 07:43:12,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:43:12,502 INFO L225 Difference]: With dead ends: 472 [2018-11-10 07:43:12,502 INFO L226 Difference]: Without dead ends: 468 [2018-11-10 07:43:12,503 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-11-10 07:43:12,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 468 states. [2018-11-10 07:43:12,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 468 to 468. [2018-11-10 07:43:12,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 468 states. [2018-11-10 07:43:12,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 679 transitions. [2018-11-10 07:43:12,513 INFO L78 Accepts]: Start accepts. Automaton has 468 states and 679 transitions. Word has length 77 [2018-11-10 07:43:12,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:43:12,513 INFO L481 AbstractCegarLoop]: Abstraction has 468 states and 679 transitions. [2018-11-10 07:43:12,513 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 07:43:12,513 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 679 transitions. [2018-11-10 07:43:12,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-10 07:43:12,514 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:43:12,514 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:43:12,514 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:43:12,514 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:43:12,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1314627048, now seen corresponding path program 1 times [2018-11-10 07:43:12,514 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:43:12,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:43:12,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:43:12,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:43:12,515 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:43:12,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:43:12,614 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 26 proven. 99 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-10 07:43:12,614 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:43:12,614 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:43:12,614 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 88 with the following transitions: [2018-11-10 07:43:12,614 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [335], [338], [341], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:43:12,615 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:43:12,616 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:43:12,845 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:43:43,515 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:43:43,516 INFO L272 AbstractInterpreter]: Visited 47 different actions 822 times. Merged at 40 different actions 670 times. Widened at 5 different actions 44 times. Found 104 fixpoints after 13 different actions. Largest state had 50 variables. [2018-11-10 07:43:43,521 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:43:43,521 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:43:43,521 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:43:43,522 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:43:43,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:43:43,537 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:43:43,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:43:43,577 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:43:43,599 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 99 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:43:43,599 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:43:43,784 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 58 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2018-11-10 07:43:43,807 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:43:43,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 5] total 12 [2018-11-10 07:43:43,807 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:43:43,807 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 07:43:43,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 07:43:43,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:43:43,808 INFO L87 Difference]: Start difference. First operand 468 states and 679 transitions. Second operand 9 states. [2018-11-10 07:43:43,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:43:43,963 INFO L93 Difference]: Finished difference Result 498 states and 717 transitions. [2018-11-10 07:43:43,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 07:43:43,963 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-11-10 07:43:43,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:43:43,964 INFO L225 Difference]: With dead ends: 498 [2018-11-10 07:43:43,964 INFO L226 Difference]: Without dead ends: 494 [2018-11-10 07:43:43,964 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 171 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-11-10 07:43:43,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2018-11-10 07:43:43,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 487. [2018-11-10 07:43:43,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 487 states. [2018-11-10 07:43:43,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 487 states to 487 states and 705 transitions. [2018-11-10 07:43:43,974 INFO L78 Accepts]: Start accepts. Automaton has 487 states and 705 transitions. Word has length 87 [2018-11-10 07:43:43,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:43:43,974 INFO L481 AbstractCegarLoop]: Abstraction has 487 states and 705 transitions. [2018-11-10 07:43:43,975 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 07:43:43,975 INFO L276 IsEmpty]: Start isEmpty. Operand 487 states and 705 transitions. [2018-11-10 07:43:43,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-10 07:43:43,975 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:43:43,975 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:43:43,975 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:43:43,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:43:43,976 INFO L82 PathProgramCache]: Analyzing trace with hash 233904989, now seen corresponding path program 1 times [2018-11-10 07:43:43,976 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:43:43,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:43:43,976 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:43:43,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:43:43,977 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:43:44,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:43:44,161 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:43:44,161 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:43:44,161 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:43:44,161 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 91 with the following transitions: [2018-11-10 07:43:44,161 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [386], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:43:44,162 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:43:44,162 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:43:44,395 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:44:17,362 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:44:17,362 INFO L272 AbstractInterpreter]: Visited 45 different actions 786 times. Merged at 38 different actions 636 times. Widened at 5 different actions 44 times. Found 104 fixpoints after 13 different actions. Largest state had 50 variables. [2018-11-10 07:44:17,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:44:17,365 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:44:17,365 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:44:17,365 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:44:17,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:44:17,372 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:44:17,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:44:17,435 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:44:17,513 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 110 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:44:17,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:44:18,025 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 67 proven. 64 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:44:18,048 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:44:18,048 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 20 [2018-11-10 07:44:18,048 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:44:18,048 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-10 07:44:18,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-10 07:44:18,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=308, Unknown=1, NotChecked=0, Total=380 [2018-11-10 07:44:18,049 INFO L87 Difference]: Start difference. First operand 487 states and 705 transitions. Second operand 14 states. [2018-11-10 07:44:18,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:44:18,261 INFO L93 Difference]: Finished difference Result 492 states and 710 transitions. [2018-11-10 07:44:18,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:44:18,262 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 90 [2018-11-10 07:44:18,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:44:18,263 INFO L225 Difference]: With dead ends: 492 [2018-11-10 07:44:18,263 INFO L226 Difference]: Without dead ends: 490 [2018-11-10 07:44:18,264 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 170 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=92, Invalid=413, Unknown=1, NotChecked=0, Total=506 [2018-11-10 07:44:18,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2018-11-10 07:44:18,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 488. [2018-11-10 07:44:18,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 488 states. [2018-11-10 07:44:18,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 488 states to 488 states and 706 transitions. [2018-11-10 07:44:18,280 INFO L78 Accepts]: Start accepts. Automaton has 488 states and 706 transitions. Word has length 90 [2018-11-10 07:44:18,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:44:18,280 INFO L481 AbstractCegarLoop]: Abstraction has 488 states and 706 transitions. [2018-11-10 07:44:18,280 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-10 07:44:18,280 INFO L276 IsEmpty]: Start isEmpty. Operand 488 states and 706 transitions. [2018-11-10 07:44:18,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-10 07:44:18,281 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:44:18,281 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:44:18,281 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:44:18,282 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:44:18,282 INFO L82 PathProgramCache]: Analyzing trace with hash -1342705169, now seen corresponding path program 1 times [2018-11-10 07:44:18,282 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:44:18,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:44:18,282 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:44:18,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:44:18,283 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:44:18,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:44:18,356 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:44:18,357 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:44:18,357 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:44:18,357 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 103 with the following transitions: [2018-11-10 07:44:18,357 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:44:18,358 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:44:18,358 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:44:18,771 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:44:54,951 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:44:54,951 INFO L272 AbstractInterpreter]: Visited 48 different actions 980 times. Merged at 41 different actions 770 times. Widened at 5 different actions 46 times. Found 127 fixpoints after 16 different actions. Largest state had 50 variables. [2018-11-10 07:44:54,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:44:54,955 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:44:54,955 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:44:54,955 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:44:54,962 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:44:54,962 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:44:55,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:44:55,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:44:55,014 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:44:55,015 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:44:55,096 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:44:55,112 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:44:55,112 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2018-11-10 07:44:55,112 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:44:55,113 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:44:55,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:44:55,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:44:55,113 INFO L87 Difference]: Start difference. First operand 488 states and 706 transitions. Second operand 7 states. [2018-11-10 07:44:55,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:44:55,208 INFO L93 Difference]: Finished difference Result 1039 states and 1504 transitions. [2018-11-10 07:44:55,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:44:55,209 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-10 07:44:55,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:44:55,211 INFO L225 Difference]: With dead ends: 1039 [2018-11-10 07:44:55,211 INFO L226 Difference]: Without dead ends: 701 [2018-11-10 07:44:55,212 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 07:44:55,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2018-11-10 07:44:55,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 569. [2018-11-10 07:44:55,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 569 states. [2018-11-10 07:44:55,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 569 states and 829 transitions. [2018-11-10 07:44:55,231 INFO L78 Accepts]: Start accepts. Automaton has 569 states and 829 transitions. Word has length 102 [2018-11-10 07:44:55,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:44:55,231 INFO L481 AbstractCegarLoop]: Abstraction has 569 states and 829 transitions. [2018-11-10 07:44:55,231 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:44:55,231 INFO L276 IsEmpty]: Start isEmpty. Operand 569 states and 829 transitions. [2018-11-10 07:44:55,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-10 07:44:55,232 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:44:55,232 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:44:55,232 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:44:55,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:44:55,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1084539731, now seen corresponding path program 1 times [2018-11-10 07:44:55,233 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:44:55,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:44:55,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:44:55,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:44:55,234 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:44:55,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:44:55,338 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:44:55,338 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:44:55,338 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:44:55,338 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 103 with the following transitions: [2018-11-10 07:44:55,339 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:44:55,340 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:44:55,340 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:44:55,574 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:45:24,044 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:45:24,045 INFO L272 AbstractInterpreter]: Visited 47 different actions 813 times. Merged at 40 different actions 660 times. Widened at 5 different actions 41 times. Found 104 fixpoints after 13 different actions. Largest state had 50 variables. [2018-11-10 07:45:24,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:24,046 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:45:24,046 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:24,046 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:45:24,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:24,053 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:45:24,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:24,094 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:24,105 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:45:24,105 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:24,130 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 84 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2018-11-10 07:45:24,147 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:45:24,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 4] total 9 [2018-11-10 07:45:24,147 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:45:24,147 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-10 07:45:24,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-10 07:45:24,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:45:24,147 INFO L87 Difference]: Start difference. First operand 569 states and 829 transitions. Second operand 7 states. [2018-11-10 07:45:24,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:24,220 INFO L93 Difference]: Finished difference Result 616 states and 895 transitions. [2018-11-10 07:45:24,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-10 07:45:24,221 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-10 07:45:24,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:24,222 INFO L225 Difference]: With dead ends: 616 [2018-11-10 07:45:24,222 INFO L226 Difference]: Without dead ends: 610 [2018-11-10 07:45:24,223 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 205 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-10 07:45:24,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2018-11-10 07:45:24,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 607. [2018-11-10 07:45:24,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 607 states. [2018-11-10 07:45:24,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 607 states to 607 states and 883 transitions. [2018-11-10 07:45:24,235 INFO L78 Accepts]: Start accepts. Automaton has 607 states and 883 transitions. Word has length 102 [2018-11-10 07:45:24,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:24,235 INFO L481 AbstractCegarLoop]: Abstraction has 607 states and 883 transitions. [2018-11-10 07:45:24,235 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-10 07:45:24,235 INFO L276 IsEmpty]: Start isEmpty. Operand 607 states and 883 transitions. [2018-11-10 07:45:24,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-11-10 07:45:24,236 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:24,236 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:24,236 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:45:24,236 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:24,236 INFO L82 PathProgramCache]: Analyzing trace with hash 35576591, now seen corresponding path program 1 times [2018-11-10 07:45:24,236 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:45:24,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:24,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:24,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:24,237 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:45:24,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:24,399 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:24,400 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:24,400 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:45:24,400 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 107 with the following transitions: [2018-11-10 07:45:24,400 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [512], [514], [526], [529], [530], [531] [2018-11-10 07:45:24,401 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:45:24,401 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:45:24,643 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:45:54,028 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:45:54,028 INFO L272 AbstractInterpreter]: Visited 45 different actions 782 times. Merged at 38 different actions 632 times. Widened at 5 different actions 42 times. Found 104 fixpoints after 13 different actions. Largest state had 50 variables. [2018-11-10 07:45:54,030 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:54,030 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:45:54,030 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:54,030 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:45:54,037 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:54,037 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:45:54,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:54,077 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:54,140 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 160 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:45:54,140 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:54,275 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 94 proven. 90 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-10 07:45:54,291 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:45:54,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 22 [2018-11-10 07:45:54,291 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:45:54,291 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-10 07:45:54,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-10 07:45:54,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2018-11-10 07:45:54,292 INFO L87 Difference]: Start difference. First operand 607 states and 883 transitions. Second operand 15 states. [2018-11-10 07:45:54,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:54,522 INFO L93 Difference]: Finished difference Result 610 states and 885 transitions. [2018-11-10 07:45:54,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-10 07:45:54,522 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 106 [2018-11-10 07:45:54,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:54,524 INFO L225 Difference]: With dead ends: 610 [2018-11-10 07:45:54,524 INFO L226 Difference]: Without dead ends: 608 [2018-11-10 07:45:54,524 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 201 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=456, Unknown=0, NotChecked=0, Total=552 [2018-11-10 07:45:54,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2018-11-10 07:45:54,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 607. [2018-11-10 07:45:54,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 607 states. [2018-11-10 07:45:54,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 607 states to 607 states and 882 transitions. [2018-11-10 07:45:54,544 INFO L78 Accepts]: Start accepts. Automaton has 607 states and 882 transitions. Word has length 106 [2018-11-10 07:45:54,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:54,544 INFO L481 AbstractCegarLoop]: Abstraction has 607 states and 882 transitions. [2018-11-10 07:45:54,544 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-10 07:45:54,544 INFO L276 IsEmpty]: Start isEmpty. Operand 607 states and 882 transitions. [2018-11-10 07:45:54,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-11-10 07:45:54,545 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:54,546 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 9, 6, 6, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:54,546 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:45:54,546 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:54,546 INFO L82 PathProgramCache]: Analyzing trace with hash -234907228, now seen corresponding path program 2 times [2018-11-10 07:45:54,546 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:45:54,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:54,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:45:54,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:54,547 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:45:54,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:54,798 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 208 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:45:54,798 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:54,798 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:45:54,798 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:45:54,799 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:45:54,799 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:54,799 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:45:54,804 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 07:45:54,804 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 07:45:54,842 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-11-10 07:45:54,842 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:45:54,844 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:54,955 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 140 proven. 31 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-11-10 07:45:54,955 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:55,104 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 139 proven. 32 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-11-10 07:45:55,120 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:45:55,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 19 [2018-11-10 07:45:55,120 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:45:55,121 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-10 07:45:55,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-10 07:45:55,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:45:55,121 INFO L87 Difference]: Start difference. First operand 607 states and 882 transitions. Second operand 18 states. [2018-11-10 07:45:55,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:55,761 INFO L93 Difference]: Finished difference Result 1001 states and 1436 transitions. [2018-11-10 07:45:55,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-11-10 07:45:55,761 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 113 [2018-11-10 07:45:55,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:55,763 INFO L225 Difference]: With dead ends: 1001 [2018-11-10 07:45:55,763 INFO L226 Difference]: Without dead ends: 574 [2018-11-10 07:45:55,764 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 273 GetRequests, 229 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=180, Invalid=1460, Unknown=0, NotChecked=0, Total=1640 [2018-11-10 07:45:55,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 574 states. [2018-11-10 07:45:55,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 574 to 509. [2018-11-10 07:45:55,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 509 states. [2018-11-10 07:45:55,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 710 transitions. [2018-11-10 07:45:55,782 INFO L78 Accepts]: Start accepts. Automaton has 509 states and 710 transitions. Word has length 113 [2018-11-10 07:45:55,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:55,782 INFO L481 AbstractCegarLoop]: Abstraction has 509 states and 710 transitions. [2018-11-10 07:45:55,782 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-10 07:45:55,782 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 710 transitions. [2018-11-10 07:45:55,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-11-10 07:45:55,783 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:55,784 INFO L375 BasicCegarLoop]: trace histogram [11, 10, 10, 7, 7, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:55,784 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:45:55,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:55,784 INFO L82 PathProgramCache]: Analyzing trace with hash -238306442, now seen corresponding path program 2 times [2018-11-10 07:45:55,784 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:45:55,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:55,785 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:45:55,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:55,785 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:45:55,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:55,862 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:45:55,862 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:55,862 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:45:55,862 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:45:55,862 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:45:55,863 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:55,863 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:45:55,875 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 07:45:55,876 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 07:45:55,972 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-10 07:45:55,972 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:45:55,975 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:45:55,983 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:45:55,983 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:45:56,030 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:45:56,056 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:45:56,056 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2018-11-10 07:45:56,056 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:45:56,056 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:45:56,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:45:56,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:45:56,057 INFO L87 Difference]: Start difference. First operand 509 states and 710 transitions. Second operand 8 states. [2018-11-10 07:45:56,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:45:56,132 INFO L93 Difference]: Finished difference Result 698 states and 965 transitions. [2018-11-10 07:45:56,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:45:56,132 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 123 [2018-11-10 07:45:56,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:45:56,134 INFO L225 Difference]: With dead ends: 698 [2018-11-10 07:45:56,134 INFO L226 Difference]: Without dead ends: 610 [2018-11-10 07:45:56,134 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-10 07:45:56,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2018-11-10 07:45:56,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 548. [2018-11-10 07:45:56,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 548 states. [2018-11-10 07:45:56,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 548 states to 548 states and 766 transitions. [2018-11-10 07:45:56,153 INFO L78 Accepts]: Start accepts. Automaton has 548 states and 766 transitions. Word has length 123 [2018-11-10 07:45:56,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:45:56,154 INFO L481 AbstractCegarLoop]: Abstraction has 548 states and 766 transitions. [2018-11-10 07:45:56,154 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:45:56,154 INFO L276 IsEmpty]: Start isEmpty. Operand 548 states and 766 transitions. [2018-11-10 07:45:56,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-11-10 07:45:56,155 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:45:56,155 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:45:56,155 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:45:56,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:45:56,156 INFO L82 PathProgramCache]: Analyzing trace with hash 564488152, now seen corresponding path program 1 times [2018-11-10 07:45:56,156 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:45:56,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:56,156 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:45:56,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:45:56,156 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:45:56,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:45:56,354 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 36 proven. 302 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-10 07:45:56,354 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:45:56,354 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:45:56,354 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 136 with the following transitions: [2018-11-10 07:45:56,355 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [365], [368], [371], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:45:56,356 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:45:56,356 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:45:56,677 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:46:29,415 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:46:29,415 INFO L272 AbstractInterpreter]: Visited 47 different actions 822 times. Merged at 40 different actions 670 times. Widened at 5 different actions 44 times. Found 104 fixpoints after 13 different actions. Largest state had 50 variables. [2018-11-10 07:46:29,417 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:46:29,417 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:46:29,417 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:46:29,417 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:46:29,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:46:29,426 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:46:29,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:46:29,477 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:46:29,529 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 335 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:46:29,529 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:46:29,694 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 277 proven. 64 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:46:29,711 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-10 07:46:29,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [9, 9] total 21 [2018-11-10 07:46:29,711 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 07:46:29,712 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 07:46:29,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 07:46:29,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=262, Unknown=0, NotChecked=0, Total=420 [2018-11-10 07:46:29,712 INFO L87 Difference]: Start difference. First operand 548 states and 766 transitions. Second operand 8 states. [2018-11-10 07:46:29,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:46:29,775 INFO L93 Difference]: Finished difference Result 658 states and 916 transitions. [2018-11-10 07:46:29,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 07:46:29,775 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 135 [2018-11-10 07:46:29,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:46:29,776 INFO L225 Difference]: With dead ends: 658 [2018-11-10 07:46:29,776 INFO L226 Difference]: Without dead ends: 654 [2018-11-10 07:46:29,776 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 285 GetRequests, 262 SyntacticMatches, 4 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=158, Invalid=262, Unknown=0, NotChecked=0, Total=420 [2018-11-10 07:46:29,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 654 states. [2018-11-10 07:46:29,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 654 to 650. [2018-11-10 07:46:29,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 650 states. [2018-11-10 07:46:29,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 650 states to 650 states and 909 transitions. [2018-11-10 07:46:29,790 INFO L78 Accepts]: Start accepts. Automaton has 650 states and 909 transitions. Word has length 135 [2018-11-10 07:46:29,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:46:29,790 INFO L481 AbstractCegarLoop]: Abstraction has 650 states and 909 transitions. [2018-11-10 07:46:29,790 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 07:46:29,790 INFO L276 IsEmpty]: Start isEmpty. Operand 650 states and 909 transitions. [2018-11-10 07:46:29,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-11-10 07:46:29,791 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:46:29,791 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:46:29,791 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:46:29,792 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:46:29,792 INFO L82 PathProgramCache]: Analyzing trace with hash 330710990, now seen corresponding path program 2 times [2018-11-10 07:46:29,792 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:46:29,792 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:46:29,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:46:29,792 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:46:29,792 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:46:29,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:46:30,117 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:46:30,117 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:46:30,117 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:46:30,118 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:46:30,118 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:46:30,118 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:46:30,118 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:46:30,135 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 07:46:30,136 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 07:46:30,240 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-10 07:46:30,240 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:46:30,244 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:46:30,334 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 314 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:46:30,335 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:46:30,601 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 191 proven. 156 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:46:30,618 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:46:30,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 10, 10] total 28 [2018-11-10 07:46:30,619 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:46:30,619 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-10 07:46:30,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-10 07:46:30,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=629, Unknown=0, NotChecked=0, Total=756 [2018-11-10 07:46:30,620 INFO L87 Difference]: Start difference. First operand 650 states and 909 transitions. Second operand 20 states. [2018-11-10 07:46:31,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:46:31,107 INFO L93 Difference]: Finished difference Result 728 states and 1001 transitions. [2018-11-10 07:46:31,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-10 07:46:31,108 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 136 [2018-11-10 07:46:31,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:46:31,110 INFO L225 Difference]: With dead ends: 728 [2018-11-10 07:46:31,110 INFO L226 Difference]: Without dead ends: 726 [2018-11-10 07:46:31,111 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 298 GetRequests, 258 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=216, Invalid=1266, Unknown=0, NotChecked=0, Total=1482 [2018-11-10 07:46:31,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 726 states. [2018-11-10 07:46:31,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 726 to 692. [2018-11-10 07:46:31,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 692 states. [2018-11-10 07:46:31,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 692 states to 692 states and 966 transitions. [2018-11-10 07:46:31,136 INFO L78 Accepts]: Start accepts. Automaton has 692 states and 966 transitions. Word has length 136 [2018-11-10 07:46:31,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:46:31,136 INFO L481 AbstractCegarLoop]: Abstraction has 692 states and 966 transitions. [2018-11-10 07:46:31,136 INFO L482 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-10 07:46:31,136 INFO L276 IsEmpty]: Start isEmpty. Operand 692 states and 966 transitions. [2018-11-10 07:46:31,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-11-10 07:46:31,137 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:46:31,138 INFO L375 BasicCegarLoop]: trace histogram [13, 12, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:46:31,138 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:46:31,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:46:31,138 INFO L82 PathProgramCache]: Analyzing trace with hash 2022069990, now seen corresponding path program 1 times [2018-11-10 07:46:31,138 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:46:31,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:46:31,138 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:46:31,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:46:31,139 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:46:31,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:46:31,239 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:46:31,239 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:46:31,239 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:46:31,239 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 152 with the following transitions: [2018-11-10 07:46:31,239 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [491], [494], [497], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-10 07:46:31,240 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 07:46:31,240 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 07:46:31,476 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 07:47:08,488 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 07:47:08,488 INFO L272 AbstractInterpreter]: Visited 48 different actions 982 times. Merged at 41 different actions 774 times. Widened at 5 different actions 48 times. Found 126 fixpoints after 15 different actions. Largest state had 50 variables. [2018-11-10 07:47:08,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:08,490 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 07:47:08,490 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:08,490 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:08,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:47:08,497 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:47:08,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:08,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:08,563 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:47:08,564 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:08,621 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-10 07:47:08,637 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:08,638 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 16 [2018-11-10 07:47:08,638 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:08,638 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 07:47:08,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 07:47:08,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-10 07:47:08,638 INFO L87 Difference]: Start difference. First operand 692 states and 966 transitions. Second operand 9 states. [2018-11-10 07:47:08,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:08,717 INFO L93 Difference]: Finished difference Result 1213 states and 1690 transitions. [2018-11-10 07:47:08,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 07:47:08,717 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 151 [2018-11-10 07:47:08,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:08,719 INFO L225 Difference]: With dead ends: 1213 [2018-11-10 07:47:08,719 INFO L226 Difference]: Without dead ends: 837 [2018-11-10 07:47:08,720 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 301 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-10 07:47:08,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 837 states. [2018-11-10 07:47:08,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 837 to 734. [2018-11-10 07:47:08,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 734 states. [2018-11-10 07:47:08,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1025 transitions. [2018-11-10 07:47:08,737 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1025 transitions. Word has length 151 [2018-11-10 07:47:08,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:08,737 INFO L481 AbstractCegarLoop]: Abstraction has 734 states and 1025 transitions. [2018-11-10 07:47:08,737 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 07:47:08,737 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1025 transitions. [2018-11-10 07:47:08,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-11-10 07:47:08,738 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:08,738 INFO L375 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:08,739 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:08,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:08,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1545010560, now seen corresponding path program 2 times [2018-11-10 07:47:08,739 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:08,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:08,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:47:08,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:08,740 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:08,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:09,065 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-10 07:47:09,066 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:09,066 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:47:09,066 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:47:09,066 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:47:09,066 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:09,066 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:09,073 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 07:47:09,073 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 07:47:09,161 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-10 07:47:09,161 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:47:09,165 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:09,404 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 414 proven. 19 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-10 07:47:09,404 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:09,727 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 380 proven. 57 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-10 07:47:09,744 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:09,744 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 11, 12] total 34 [2018-11-10 07:47:09,744 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:09,744 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-10 07:47:09,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-10 07:47:09,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=318, Invalid=804, Unknown=0, NotChecked=0, Total=1122 [2018-11-10 07:47:09,745 INFO L87 Difference]: Start difference. First operand 734 states and 1025 transitions. Second operand 24 states. [2018-11-10 07:47:10,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:10,441 INFO L93 Difference]: Finished difference Result 800 states and 1097 transitions. [2018-11-10 07:47:10,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-11-10 07:47:10,441 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 152 [2018-11-10 07:47:10,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:10,443 INFO L225 Difference]: With dead ends: 800 [2018-11-10 07:47:10,443 INFO L226 Difference]: Without dead ends: 798 [2018-11-10 07:47:10,444 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 289 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 547 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=712, Invalid=2480, Unknown=0, NotChecked=0, Total=3192 [2018-11-10 07:47:10,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2018-11-10 07:47:10,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 734. [2018-11-10 07:47:10,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 734 states. [2018-11-10 07:47:10,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1023 transitions. [2018-11-10 07:47:10,462 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1023 transitions. Word has length 152 [2018-11-10 07:47:10,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:10,462 INFO L481 AbstractCegarLoop]: Abstraction has 734 states and 1023 transitions. [2018-11-10 07:47:10,462 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-10 07:47:10,462 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1023 transitions. [2018-11-10 07:47:10,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-11-10 07:47:10,463 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:10,463 INFO L375 BasicCegarLoop]: trace histogram [15, 14, 14, 10, 10, 6, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:10,463 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:10,463 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:10,463 INFO L82 PathProgramCache]: Analyzing trace with hash -348083931, now seen corresponding path program 3 times [2018-11-10 07:47:10,463 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:10,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:10,464 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:47:10,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:10,464 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:10,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:10,586 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 07:47:10,587 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:10,587 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:47:10,587 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:47:10,587 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:47:10,587 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:10,587 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:10,600 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 07:47:10,600 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 07:47:10,681 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 07:47:10,681 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:47:10,686 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:10,710 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 07:47:10,710 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:10,827 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-10 07:47:10,855 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:10,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 18 [2018-11-10 07:47:10,855 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:10,856 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 07:47:10,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 07:47:10,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:47:10,856 INFO L87 Difference]: Start difference. First operand 734 states and 1023 transitions. Second operand 10 states. [2018-11-10 07:47:10,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:10,995 INFO L93 Difference]: Finished difference Result 1012 states and 1396 transitions. [2018-11-10 07:47:10,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-10 07:47:10,996 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 169 [2018-11-10 07:47:10,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:10,998 INFO L225 Difference]: With dead ends: 1012 [2018-11-10 07:47:10,998 INFO L226 Difference]: Without dead ends: 924 [2018-11-10 07:47:10,999 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 337 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:47:10,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 924 states. [2018-11-10 07:47:11,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 924 to 812. [2018-11-10 07:47:11,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 812 states. [2018-11-10 07:47:11,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 812 states to 812 states and 1133 transitions. [2018-11-10 07:47:11,019 INFO L78 Accepts]: Start accepts. Automaton has 812 states and 1133 transitions. Word has length 169 [2018-11-10 07:47:11,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:11,020 INFO L481 AbstractCegarLoop]: Abstraction has 812 states and 1133 transitions. [2018-11-10 07:47:11,020 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 07:47:11,020 INFO L276 IsEmpty]: Start isEmpty. Operand 812 states and 1133 transitions. [2018-11-10 07:47:11,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-11-10 07:47:11,021 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:11,021 INFO L375 BasicCegarLoop]: trace histogram [17, 16, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:11,021 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:11,021 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:11,021 INFO L82 PathProgramCache]: Analyzing trace with hash -1339885547, now seen corresponding path program 2 times [2018-11-10 07:47:11,022 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:11,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:11,022 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:47:11,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:11,022 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:11,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:11,204 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-10 07:47:11,204 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:11,204 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:47:11,205 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:47:11,205 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:47:11,205 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:11,205 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:11,213 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 07:47:11,213 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 07:47:11,271 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-11-10 07:47:11,271 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:47:11,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:11,409 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 295 proven. 4 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-11-10 07:47:11,410 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:11,481 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 295 proven. 4 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-11-10 07:47:11,497 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:11,498 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 6, 6] total 18 [2018-11-10 07:47:11,498 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:11,498 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-10 07:47:11,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-10 07:47:11,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=190, Unknown=0, NotChecked=0, Total=306 [2018-11-10 07:47:11,499 INFO L87 Difference]: Start difference. First operand 812 states and 1133 transitions. Second operand 15 states. [2018-11-10 07:47:11,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:11,899 INFO L93 Difference]: Finished difference Result 1007 states and 1391 transitions. [2018-11-10 07:47:11,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-10 07:47:11,899 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 197 [2018-11-10 07:47:11,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:11,900 INFO L225 Difference]: With dead ends: 1007 [2018-11-10 07:47:11,900 INFO L226 Difference]: Without dead ends: 550 [2018-11-10 07:47:11,901 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 436 GetRequests, 401 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=407, Invalid=853, Unknown=0, NotChecked=0, Total=1260 [2018-11-10 07:47:11,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states. [2018-11-10 07:47:11,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 522. [2018-11-10 07:47:11,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 522 states. [2018-11-10 07:47:11,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 522 states to 522 states and 717 transitions. [2018-11-10 07:47:11,916 INFO L78 Accepts]: Start accepts. Automaton has 522 states and 717 transitions. Word has length 197 [2018-11-10 07:47:11,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:11,917 INFO L481 AbstractCegarLoop]: Abstraction has 522 states and 717 transitions. [2018-11-10 07:47:11,917 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-10 07:47:11,917 INFO L276 IsEmpty]: Start isEmpty. Operand 522 states and 717 transitions. [2018-11-10 07:47:11,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-11-10 07:47:11,917 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:11,918 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 16, 16, 10, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:11,918 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:11,918 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:11,918 INFO L82 PathProgramCache]: Analyzing trace with hash -438655549, now seen corresponding path program 4 times [2018-11-10 07:47:11,918 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:11,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:11,919 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:47:11,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:11,919 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:11,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:12,076 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-10 07:47:12,076 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:12,076 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:47:12,076 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:47:12,077 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:47:12,077 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:12,077 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:12,084 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:47:12,084 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 07:47:12,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:12,188 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:12,230 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-10 07:47:12,230 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:12,370 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-10 07:47:12,387 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:12,387 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 19 [2018-11-10 07:47:12,387 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:12,388 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-10 07:47:12,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-10 07:47:12,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:47:12,388 INFO L87 Difference]: Start difference. First operand 522 states and 717 transitions. Second operand 14 states. [2018-11-10 07:47:12,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:12,483 INFO L93 Difference]: Finished difference Result 737 states and 1014 transitions. [2018-11-10 07:47:12,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-10 07:47:12,483 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 261 [2018-11-10 07:47:12,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:12,485 INFO L225 Difference]: With dead ends: 737 [2018-11-10 07:47:12,485 INFO L226 Difference]: Without dead ends: 649 [2018-11-10 07:47:12,485 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 545 GetRequests, 515 SyntacticMatches, 13 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:47:12,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2018-11-10 07:47:12,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 603. [2018-11-10 07:47:12,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 603 states. [2018-11-10 07:47:12,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 603 states to 603 states and 828 transitions. [2018-11-10 07:47:12,502 INFO L78 Accepts]: Start accepts. Automaton has 603 states and 828 transitions. Word has length 261 [2018-11-10 07:47:12,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:12,502 INFO L481 AbstractCegarLoop]: Abstraction has 603 states and 828 transitions. [2018-11-10 07:47:12,502 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-10 07:47:12,502 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 828 transitions. [2018-11-10 07:47:12,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2018-11-10 07:47:12,503 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:12,503 INFO L375 BasicCegarLoop]: trace histogram [27, 26, 26, 19, 19, 12, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:12,503 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:12,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:12,503 INFO L82 PathProgramCache]: Analyzing trace with hash -209480526, now seen corresponding path program 5 times [2018-11-10 07:47:12,503 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:12,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:12,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 07:47:12,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:12,504 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:12,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:12,747 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-10 07:47:12,747 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:12,747 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:47:12,747 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:47:12,747 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:47:12,747 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:12,748 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:12,755 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 07:47:12,755 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 07:47:12,971 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-11-10 07:47:12,971 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:47:12,979 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:13,047 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-10 07:47:13,047 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:13,271 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-10 07:47:13,288 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:13,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 19 [2018-11-10 07:47:13,289 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:13,289 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 07:47:13,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 07:47:13,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:47:13,289 INFO L87 Difference]: Start difference. First operand 603 states and 828 transitions. Second operand 16 states. [2018-11-10 07:47:13,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:13,399 INFO L93 Difference]: Finished difference Result 818 states and 1125 transitions. [2018-11-10 07:47:13,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 07:47:13,400 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 307 [2018-11-10 07:47:13,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:13,402 INFO L225 Difference]: With dead ends: 818 [2018-11-10 07:47:13,402 INFO L226 Difference]: Without dead ends: 730 [2018-11-10 07:47:13,402 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 641 GetRequests, 603 SyntacticMatches, 21 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:47:13,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 730 states. [2018-11-10 07:47:13,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 730 to 684. [2018-11-10 07:47:13,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 684 states. [2018-11-10 07:47:13,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 684 states to 684 states and 939 transitions. [2018-11-10 07:47:13,425 INFO L78 Accepts]: Start accepts. Automaton has 684 states and 939 transitions. Word has length 307 [2018-11-10 07:47:13,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:13,426 INFO L481 AbstractCegarLoop]: Abstraction has 684 states and 939 transitions. [2018-11-10 07:47:13,426 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 07:47:13,426 INFO L276 IsEmpty]: Start isEmpty. Operand 684 states and 939 transitions. [2018-11-10 07:47:13,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2018-11-10 07:47:13,428 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:13,428 INFO L375 BasicCegarLoop]: trace histogram [31, 30, 30, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:13,428 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:13,428 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:13,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1748649631, now seen corresponding path program 6 times [2018-11-10 07:47:13,428 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:13,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:13,429 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:47:13,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:13,429 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:13,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 07:47:13,665 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-10 07:47:13,665 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:13,665 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 07:47:13,666 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 07:47:13,666 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 07:47:13,666 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 07:47:13,666 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 07:47:13,673 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 07:47:13,674 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 07:47:13,839 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 07:47:13,839 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 07:47:13,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 07:47:13,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-10 07:47:13,926 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 07:47:14,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-10 07:47:14,168 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-10 07:47:14,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 19 [2018-11-10 07:47:14,168 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 07:47:14,169 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-10 07:47:14,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-10 07:47:14,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:47:14,169 INFO L87 Difference]: Start difference. First operand 684 states and 939 transitions. Second operand 18 states. [2018-11-10 07:47:14,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 07:47:14,287 INFO L93 Difference]: Finished difference Result 899 states and 1236 transitions. [2018-11-10 07:47:14,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-10 07:47:14,287 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 353 [2018-11-10 07:47:14,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 07:47:14,289 INFO L225 Difference]: With dead ends: 899 [2018-11-10 07:47:14,289 INFO L226 Difference]: Without dead ends: 811 [2018-11-10 07:47:14,289 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 737 GetRequests, 691 SyntacticMatches, 29 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-10 07:47:14,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 811 states. [2018-11-10 07:47:14,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 811 to 765. [2018-11-10 07:47:14,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 765 states. [2018-11-10 07:47:14,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 765 states to 765 states and 1050 transitions. [2018-11-10 07:47:14,311 INFO L78 Accepts]: Start accepts. Automaton has 765 states and 1050 transitions. Word has length 353 [2018-11-10 07:47:14,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 07:47:14,312 INFO L481 AbstractCegarLoop]: Abstraction has 765 states and 1050 transitions. [2018-11-10 07:47:14,312 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-10 07:47:14,312 INFO L276 IsEmpty]: Start isEmpty. Operand 765 states and 1050 transitions. [2018-11-10 07:47:14,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 400 [2018-11-10 07:47:14,314 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 07:47:14,314 INFO L375 BasicCegarLoop]: trace histogram [35, 34, 34, 25, 25, 16, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 07:47:14,314 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 07:47:14,314 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 07:47:14,315 INFO L82 PathProgramCache]: Analyzing trace with hash -1805057072, now seen corresponding path program 7 times [2018-11-10 07:47:14,315 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 07:47:14,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:14,315 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 07:47:14,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 07:47:14,315 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 07:47:14,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 07:47:15,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-10 07:47:15,573 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-10 07:47:15,672 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.11 07:47:15 BoogieIcfgContainer [2018-11-10 07:47:15,672 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-10 07:47:15,672 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-10 07:47:15,672 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-10 07:47:15,673 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-10 07:47:15,673 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 07:40:45" (3/4) ... [2018-11-10 07:47:15,675 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-10 07:47:15,840 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_8dafbc07-961a-47bf-b8c5-5c555c5806c0/bin-2019/utaipan/witness.graphml [2018-11-10 07:47:15,840 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-10 07:47:15,841 INFO L168 Benchmark]: Toolchain (without parser) took 391826.38 ms. Allocated memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: 2.8 GB). Free memory was 960.3 MB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.1 GB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,843 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 07:47:15,843 INFO L168 Benchmark]: CACSL2BoogieTranslator took 268.91 ms. Allocated memory is still 1.0 GB. Free memory was 960.3 MB in the beginning and 938.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,843 INFO L168 Benchmark]: Boogie Procedure Inliner took 15.54 ms. Allocated memory is still 1.0 GB. Free memory was 938.8 MB in the beginning and 936.2 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,843 INFO L168 Benchmark]: Boogie Preprocessor took 80.27 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 159.9 MB). Free memory was 936.2 MB in the beginning and 1.2 GB in the end (delta: -217.8 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,843 INFO L168 Benchmark]: RCFGBuilder took 637.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 55.9 MB). Peak memory consumption was 55.9 MB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,844 INFO L168 Benchmark]: TraceAbstraction took 390652.98 ms. Allocated memory was 1.2 GB in the beginning and 3.9 GB in the end (delta: 2.7 GB). Free memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,844 INFO L168 Benchmark]: Witness Printer took 167.89 ms. Allocated memory is still 3.9 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. [2018-11-10 07:47:15,845 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 268.91 ms. Allocated memory is still 1.0 GB. Free memory was 960.3 MB in the beginning and 938.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 15.54 ms. Allocated memory is still 1.0 GB. Free memory was 938.8 MB in the beginning and 936.2 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 80.27 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 159.9 MB). Free memory was 936.2 MB in the beginning and 1.2 GB in the end (delta: -217.8 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 637.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 55.9 MB). Peak memory consumption was 55.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 390652.98 ms. Allocated memory was 1.2 GB in the beginning and 3.9 GB in the end (delta: 2.7 GB). Free memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. * Witness Printer took 167.89 ms. Allocated memory is still 3.9 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 569]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L5] int m_Protocol = 1; [L6] int m_msg_2 = 2; [L7] int m_recv_ack_2 = 3; [L8] int m_msg_1_1 = 4; [L9] int m_msg_1_2 = 5; [L10] int m_recv_ack_1_1 = 6; [L11] int m_recv_ack_1_2 = 7; VAL [\old(m_msg_1_1)=23, \old(m_msg_1_2)=20, \old(m_msg_2)=21, \old(m_Protocol)=25, \old(m_recv_ack_1_1)=22, \old(m_recv_ack_1_2)=24, \old(m_recv_ack_2)=26, m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L16] int q = 0; [L17] int method_id; [L20] int this_expect = 0; [L21] int this_buffer_empty = 0; VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, q=0, this_buffer_empty=0, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=0, this_buffer_empty=0, this_expect=0] [L43] COND TRUE q == 0 [L44] COND TRUE __VERIFIER_nondet_int() [L46] COND TRUE 1 [L48] method_id = 1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=0, this_buffer_empty=0, this_expect=0] [L50] COND FALSE !(0) [L54] q = 1 [L56] this_expect=0 [L56] this_buffer_empty=1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=3, this_buffer_empty=0, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=1, this_buffer_empty=1, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=1, this_buffer_empty=1, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=1, this_buffer_empty=1, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=17] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND TRUE this_expect > 16 [L39] this_expect = -16 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L286] COND TRUE (((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2)))) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L569] __VERIFIER_error() VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 115 locations, 1 error locations. UNSAFE Result, 390.5s OverallTime, 36 OverallIterations, 35 TraceHistogramMax, 8.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6721 SDtfs, 10345 SDslu, 30640 SDs, 0 SdLazy, 5803 SolverSat, 801 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.6s Time, PredicateUnifierStatistics: 2 DeclaredPredicates, 6736 GetRequests, 6174 SyntacticMatches, 107 SemanticMatches, 455 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 2131 ImplicationChecksByTransitivity, 7.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=812occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 367.8s AbstIntTime, 18 AbstIntIterations, 1 AbstIntStrong, 0.949160035366932 AbsIntWeakeningRatio, 1.5517241379310345 AbsIntAvgWeakeningVarsNumRemoved, 593.7931034482758 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 35 MinimizatonAttempts, 1100 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 2.4s SatisfiabilityAnalysisTime, 7.9s InterpolantComputationTime, 6945 NumberOfCodeBlocks, 6761 NumberOfCodeBlocksAsserted, 121 NumberOfCheckSat, 9591 ConstructedInterpolants, 368 QuantifiedInterpolants, 6880378 SizeOfPredicates, 79 NumberOfNonLiveVariables, 17902 ConjunctsInSsa, 434 ConjunctsInUnsatCore, 87 InterpolantComputations, 11 PerfectInterpolantSequences, 8912/34533 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...