./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum60_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum60_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4405509d043dde59d941f33192dd2cdce1daabca .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-11-10 10:57:29,857 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-10 10:57:29,858 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-10 10:57:29,865 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-10 10:57:29,865 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-10 10:57:29,866 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-10 10:57:29,867 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-10 10:57:29,868 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-10 10:57:29,869 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-10 10:57:29,869 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-10 10:57:29,870 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-10 10:57:29,870 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-10 10:57:29,871 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-10 10:57:29,871 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-10 10:57:29,872 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-10 10:57:29,873 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-10 10:57:29,873 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-10 10:57:29,874 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-10 10:57:29,876 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-10 10:57:29,877 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-10 10:57:29,877 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-10 10:57:29,878 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-10 10:57:29,880 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-10 10:57:29,880 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-10 10:57:29,880 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-10 10:57:29,881 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-10 10:57:29,881 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-10 10:57:29,882 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-10 10:57:29,882 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-10 10:57:29,883 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-10 10:57:29,883 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-10 10:57:29,884 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-10 10:57:29,884 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-10 10:57:29,884 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-10 10:57:29,884 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-10 10:57:29,885 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-10 10:57:29,885 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-10 10:57:29,895 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-10 10:57:29,895 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-10 10:57:29,895 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-10 10:57:29,895 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-10 10:57:29,896 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-10 10:57:29,896 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-10 10:57:29,896 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-10 10:57:29,896 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-10 10:57:29,896 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-10 10:57:29,896 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-10 10:57:29,896 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-10 10:57:29,897 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-10 10:57:29,897 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-10 10:57:29,897 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-10 10:57:29,897 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-10 10:57:29,897 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-10 10:57:29,898 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-10 10:57:29,898 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-10 10:57:29,898 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-10 10:57:29,898 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-10 10:57:29,898 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-10 10:57:29,898 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-10 10:57:29,898 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 10:57:29,899 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-10 10:57:29,899 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-10 10:57:29,900 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-10 10:57:29,900 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-10 10:57:29,900 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4405509d043dde59d941f33192dd2cdce1daabca [2018-11-10 10:57:29,925 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-10 10:57:29,932 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-10 10:57:29,934 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-10 10:57:29,935 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-10 10:57:29,935 INFO L276 PluginConnector]: CDTParser initialized [2018-11-10 10:57:29,936 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/../../sv-benchmarks/c/reducercommutativity/rangesum60_false-unreach-call.i [2018-11-10 10:57:29,973 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/data/a53367649/74fcb8cad18b4117a0e86702e68fb038/FLAG60134551c [2018-11-10 10:57:30,306 INFO L298 CDTParser]: Found 1 translation units. [2018-11-10 10:57:30,307 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/sv-benchmarks/c/reducercommutativity/rangesum60_false-unreach-call.i [2018-11-10 10:57:30,311 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/data/a53367649/74fcb8cad18b4117a0e86702e68fb038/FLAG60134551c [2018-11-10 10:57:30,320 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/data/a53367649/74fcb8cad18b4117a0e86702e68fb038 [2018-11-10 10:57:30,322 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-10 10:57:30,323 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-10 10:57:30,324 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-10 10:57:30,324 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-10 10:57:30,326 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-10 10:57:30,327 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,329 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4acbd9ea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30, skipping insertion in model container [2018-11-10 10:57:30,329 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,335 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-10 10:57:30,348 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-10 10:57:30,452 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 10:57:30,458 INFO L189 MainTranslator]: Completed pre-run [2018-11-10 10:57:30,474 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-10 10:57:30,483 INFO L193 MainTranslator]: Completed translation [2018-11-10 10:57:30,483 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30 WrapperNode [2018-11-10 10:57:30,483 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-10 10:57:30,483 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-10 10:57:30,484 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-10 10:57:30,484 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-10 10:57:30,488 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,494 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,509 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-10 10:57:30,509 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-10 10:57:30,509 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-10 10:57:30,509 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-10 10:57:30,515 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,515 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,516 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,517 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,520 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,523 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,524 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... [2018-11-10 10:57:30,525 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-10 10:57:30,525 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-10 10:57:30,525 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-10 10:57:30,526 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-10 10:57:30,526 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-10 10:57:30,605 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-10 10:57:30,605 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-10 10:57:30,606 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-10 10:57:30,606 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-10 10:57:30,606 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-10 10:57:30,606 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-10 10:57:30,606 INFO L130 BoogieDeclarations]: Found specification of procedure rangesum [2018-11-10 10:57:30,606 INFO L138 BoogieDeclarations]: Found implementation of procedure rangesum [2018-11-10 10:57:30,606 INFO L130 BoogieDeclarations]: Found specification of procedure init_nondet [2018-11-10 10:57:30,606 INFO L138 BoogieDeclarations]: Found implementation of procedure init_nondet [2018-11-10 10:57:30,785 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-10 10:57:30,786 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 10:57:30 BoogieIcfgContainer [2018-11-10 10:57:30,786 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-10 10:57:30,786 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-10 10:57:30,786 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-10 10:57:30,789 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-10 10:57:30,789 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.11 10:57:30" (1/3) ... [2018-11-10 10:57:30,790 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26301dcc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 10:57:30, skipping insertion in model container [2018-11-10 10:57:30,790 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:57:30" (2/3) ... [2018-11-10 10:57:30,790 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26301dcc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.11 10:57:30, skipping insertion in model container [2018-11-10 10:57:30,790 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 10:57:30" (3/3) ... [2018-11-10 10:57:30,791 INFO L112 eAbstractionObserver]: Analyzing ICFG rangesum60_false-unreach-call.i [2018-11-10 10:57:30,801 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-10 10:57:30,807 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-10 10:57:30,815 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-10 10:57:30,835 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-10 10:57:30,836 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-10 10:57:30,836 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-10 10:57:30,836 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-10 10:57:30,836 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-10 10:57:30,836 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-10 10:57:30,836 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-10 10:57:30,836 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-10 10:57:30,846 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-11-10 10:57:30,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-10 10:57:30,850 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:30,851 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:30,852 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:30,857 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:30,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1049289672, now seen corresponding path program 1 times [2018-11-10 10:57:30,858 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:30,887 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:30,887 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:30,887 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:30,887 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:30,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:30,943 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2018-11-10 10:57:30,943 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:30,943 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-10 10:57:30,944 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 38 with the following transitions: [2018-11-10 10:57:30,946 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [24], [26], [28], [31], [32], [39], [57], [61], [63], [64], [77], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-11-10 10:57:30,984 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 10:57:30,984 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 10:57:31,100 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-10 10:57:31,101 INFO L272 AbstractInterpreter]: Visited 9 different actions 9 times. Never merged. Never widened. Never found a fixpoint. Largest state had 37 variables. [2018-11-10 10:57:31,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:31,107 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-10 10:57:31,177 INFO L227 lantSequenceWeakener]: Weakened 8 states. On average, predicates are now at 93.06% of their original sizes. [2018-11-10 10:57:31,178 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-10 10:57:31,199 INFO L415 sIntCurrentIteration]: We unified 36 AI predicates to 36 [2018-11-10 10:57:31,199 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-10 10:57:31,200 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:57:31,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-10 10:57:31,201 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 10:57:31,207 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-10 10:57:31,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-10 10:57:31,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 10:57:31,212 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 4 states. [2018-11-10 10:57:31,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:31,384 INFO L93 Difference]: Finished difference Result 69 states and 90 transitions. [2018-11-10 10:57:31,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-10 10:57:31,385 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-11-10 10:57:31,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:31,392 INFO L225 Difference]: With dead ends: 69 [2018-11-10 10:57:31,392 INFO L226 Difference]: Without dead ends: 35 [2018-11-10 10:57:31,394 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 36 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-10 10:57:31,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-10 10:57:31,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-11-10 10:57:31,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-10 10:57:31,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 41 transitions. [2018-11-10 10:57:31,427 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 41 transitions. Word has length 37 [2018-11-10 10:57:31,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:31,427 INFO L481 AbstractCegarLoop]: Abstraction has 35 states and 41 transitions. [2018-11-10 10:57:31,427 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-10 10:57:31,427 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-10 10:57:31,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-10 10:57:31,431 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:31,431 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:31,431 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:31,432 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:31,432 INFO L82 PathProgramCache]: Analyzing trace with hash 1338067039, now seen corresponding path program 1 times [2018-11-10 10:57:31,432 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:31,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:31,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:31,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:31,433 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:31,445 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:31,445 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:31,445 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:31,455 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:31,455 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:31,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:31,488 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-11-10 10:57:31,488 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [61], [63], [64], [68], [71], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-11-10 10:57:31,490 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 10:57:31,490 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 10:57:31,506 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-10 10:57:31,507 INFO L272 AbstractInterpreter]: Visited 10 different actions 10 times. Never merged. Never widened. Never found a fixpoint. Largest state had 37 variables. [2018-11-10 10:57:31,508 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:31,508 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-10 10:57:31,537 INFO L227 lantSequenceWeakener]: Weakened 9 states. On average, predicates are now at 91.36% of their original sizes. [2018-11-10 10:57:31,537 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-10 10:57:31,565 INFO L415 sIntCurrentIteration]: We unified 41 AI predicates to 41 [2018-11-10 10:57:31,565 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-10 10:57:31,565 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:57:31,565 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-10 10:57:31,565 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 10:57:31,566 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-10 10:57:31,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-10 10:57:31,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-10 10:57:31,567 INFO L87 Difference]: Start difference. First operand 35 states and 41 transitions. Second operand 5 states. [2018-11-10 10:57:31,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:31,771 INFO L93 Difference]: Finished difference Result 62 states and 74 transitions. [2018-11-10 10:57:31,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-10 10:57:31,772 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2018-11-10 10:57:31,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:31,773 INFO L225 Difference]: With dead ends: 62 [2018-11-10 10:57:31,773 INFO L226 Difference]: Without dead ends: 38 [2018-11-10 10:57:31,773 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 42 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:31,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-11-10 10:57:31,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2018-11-10 10:57:31,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-10 10:57:31,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 43 transitions. [2018-11-10 10:57:31,778 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 43 transitions. Word has length 42 [2018-11-10 10:57:31,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:31,779 INFO L481 AbstractCegarLoop]: Abstraction has 37 states and 43 transitions. [2018-11-10 10:57:31,779 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-10 10:57:31,779 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 43 transitions. [2018-11-10 10:57:31,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-10 10:57:31,780 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:31,780 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:31,780 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:31,780 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:31,781 INFO L82 PathProgramCache]: Analyzing trace with hash -1866850875, now seen corresponding path program 1 times [2018-11-10 10:57:31,781 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:31,781 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:31,782 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:31,782 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:31,782 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:31,795 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:31,795 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:31,795 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:31,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:31,810 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:31,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:31,841 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-11-10 10:57:31,841 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-11-10 10:57:31,843 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 10:57:31,843 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 10:57:31,986 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-10 10:57:31,986 INFO L272 AbstractInterpreter]: Visited 19 different actions 54 times. Merged at 3 different actions 26 times. Widened at 1 different actions 5 times. Found 1 fixpoints after 1 different actions. Largest state had 37 variables. [2018-11-10 10:57:32,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:32,010 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-10 10:57:32,057 INFO L227 lantSequenceWeakener]: Weakened 19 states. On average, predicates are now at 85.03% of their original sizes. [2018-11-10 10:57:32,057 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-10 10:57:32,124 INFO L415 sIntCurrentIteration]: We unified 44 AI predicates to 44 [2018-11-10 10:57:32,124 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-10 10:57:32,124 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:57:32,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-10 10:57:32,125 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 10:57:32,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-10 10:57:32,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-10 10:57:32,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-10 10:57:32,126 INFO L87 Difference]: Start difference. First operand 37 states and 43 transitions. Second operand 9 states. [2018-11-10 10:57:32,361 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 10:57:32,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:32,628 INFO L93 Difference]: Finished difference Result 61 states and 76 transitions. [2018-11-10 10:57:32,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 10:57:32,629 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 45 [2018-11-10 10:57:32,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:32,629 INFO L225 Difference]: With dead ends: 61 [2018-11-10 10:57:32,630 INFO L226 Difference]: Without dead ends: 41 [2018-11-10 10:57:32,631 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 48 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:32,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-11-10 10:57:32,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 40. [2018-11-10 10:57:32,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-10 10:57:32,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 46 transitions. [2018-11-10 10:57:32,638 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 46 transitions. Word has length 45 [2018-11-10 10:57:32,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:32,639 INFO L481 AbstractCegarLoop]: Abstraction has 40 states and 46 transitions. [2018-11-10 10:57:32,639 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-10 10:57:32,639 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 46 transitions. [2018-11-10 10:57:32,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-10 10:57:32,640 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:32,640 INFO L375 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:32,642 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:32,642 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:32,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1254084674, now seen corresponding path program 1 times [2018-11-10 10:57:32,642 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:32,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:32,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:32,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:32,643 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:32,658 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:32,658 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:32,659 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:32,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:32,680 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:32,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:32,715 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 58 with the following transitions: [2018-11-10 10:57:32,716 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [48], [53], [55], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-11-10 10:57:32,717 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 10:57:32,717 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 10:57:32,864 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-10 10:57:32,864 INFO L272 AbstractInterpreter]: Visited 22 different actions 105 times. Merged at 7 different actions 64 times. Widened at 2 different actions 11 times. Found 2 fixpoints after 2 different actions. Largest state had 37 variables. [2018-11-10 10:57:32,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:32,870 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-10 10:57:32,926 INFO L227 lantSequenceWeakener]: Weakened 23 states. On average, predicates are now at 82.89% of their original sizes. [2018-11-10 10:57:32,926 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-10 10:57:33,049 INFO L415 sIntCurrentIteration]: We unified 56 AI predicates to 56 [2018-11-10 10:57:33,049 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-10 10:57:33,049 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:57:33,050 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-10 10:57:33,050 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 10:57:33,050 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-10 10:57:33,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-10 10:57:33,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-10 10:57:33,051 INFO L87 Difference]: Start difference. First operand 40 states and 46 transitions. Second operand 10 states. [2018-11-10 10:57:33,267 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 10:57:33,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:33,422 INFO L93 Difference]: Finished difference Result 67 states and 82 transitions. [2018-11-10 10:57:33,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-10 10:57:33,422 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 57 [2018-11-10 10:57:33,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:33,423 INFO L225 Difference]: With dead ends: 67 [2018-11-10 10:57:33,423 INFO L226 Difference]: Without dead ends: 44 [2018-11-10 10:57:33,424 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 61 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-11-10 10:57:33,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-11-10 10:57:33,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-11-10 10:57:33,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-10 10:57:33,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2018-11-10 10:57:33,431 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 51 transitions. Word has length 57 [2018-11-10 10:57:33,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:33,432 INFO L481 AbstractCegarLoop]: Abstraction has 44 states and 51 transitions. [2018-11-10 10:57:33,432 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-10 10:57:33,432 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2018-11-10 10:57:33,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-10 10:57:33,433 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:33,433 INFO L375 BasicCegarLoop]: trace histogram [9, 6, 6, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:33,433 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:33,434 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:33,434 INFO L82 PathProgramCache]: Analyzing trace with hash -1360907787, now seen corresponding path program 1 times [2018-11-10 10:57:33,436 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:33,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:33,437 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:33,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:33,437 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:33,452 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:33,452 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:33,452 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:33,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:33,465 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:33,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:33,513 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 70 with the following transitions: [2018-11-10 10:57:33,513 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [48], [51], [53], [55], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-11-10 10:57:33,515 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 10:57:33,516 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 10:57:33,695 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 10:57:34,393 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-10 10:57:34,393 INFO L272 AbstractInterpreter]: Visited 32 different actions 352 times. Merged at 11 different actions 231 times. Widened at 2 different actions 34 times. Found 37 fixpoints after 6 different actions. Largest state had 37 variables. [2018-11-10 10:57:34,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:34,395 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-10 10:57:34,536 INFO L227 lantSequenceWeakener]: Weakened 49 states. On average, predicates are now at 77.76% of their original sizes. [2018-11-10 10:57:34,536 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-10 10:57:34,802 INFO L415 sIntCurrentIteration]: We unified 68 AI predicates to 68 [2018-11-10 10:57:34,802 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-10 10:57:34,802 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-10 10:57:34,803 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-11-10 10:57:34,803 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-10 10:57:34,803 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-10 10:57:34,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-10 10:57:34,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-11-10 10:57:34,804 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. Second operand 19 states. [2018-11-10 10:57:36,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:36,153 INFO L93 Difference]: Finished difference Result 75 states and 91 transitions. [2018-11-10 10:57:36,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-10 10:57:36,153 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 69 [2018-11-10 10:57:36,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:36,154 INFO L225 Difference]: With dead ends: 75 [2018-11-10 10:57:36,154 INFO L226 Difference]: Without dead ends: 48 [2018-11-10 10:57:36,155 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 78 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=117, Invalid=639, Unknown=0, NotChecked=0, Total=756 [2018-11-10 10:57:36,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-11-10 10:57:36,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 46. [2018-11-10 10:57:36,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-10 10:57:36,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2018-11-10 10:57:36,163 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 69 [2018-11-10 10:57:36,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:36,165 INFO L481 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2018-11-10 10:57:36,165 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-10 10:57:36,165 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2018-11-10 10:57:36,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-10 10:57:36,166 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:36,166 INFO L375 BasicCegarLoop]: trace histogram [9, 6, 6, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:36,166 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:36,167 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:36,167 INFO L82 PathProgramCache]: Analyzing trace with hash 1443367440, now seen corresponding path program 1 times [2018-11-10 10:57:36,167 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:36,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:36,168 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:36,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:36,168 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:36,180 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:36,180 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:36,180 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:36,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:36,194 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:36,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:36,224 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 73 with the following transitions: [2018-11-10 10:57:36,224 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [20], [22], [26], [28], [31], [32], [39], [43], [46], [48], [51], [53], [55], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-11-10 10:57:36,225 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-11-10 10:57:36,225 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-10 10:57:36,381 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-11-10 10:57:38,162 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-10 10:57:38,162 INFO L272 AbstractInterpreter]: Visited 40 different actions 723 times. Merged at 20 different actions 489 times. Widened at 3 different actions 75 times. Found 74 fixpoints after 8 different actions. Largest state had 39 variables. [2018-11-10 10:57:38,178 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:38,178 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-10 10:57:38,179 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:38,179 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:38,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:38,188 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 10:57:38,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:38,234 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:38,322 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-10 10:57:38,323 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:38,365 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-10 10:57:38,381 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:38,382 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-10 10:57:38,382 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:38,382 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 10:57:38,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 10:57:38,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:38,384 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand 6 states. [2018-11-10 10:57:38,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:38,402 INFO L93 Difference]: Finished difference Result 88 states and 102 transitions. [2018-11-10 10:57:38,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 10:57:38,405 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-10 10:57:38,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:38,406 INFO L225 Difference]: With dead ends: 88 [2018-11-10 10:57:38,406 INFO L226 Difference]: Without dead ends: 55 [2018-11-10 10:57:38,407 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:38,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-11-10 10:57:38,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-11-10 10:57:38,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-11-10 10:57:38,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 61 transitions. [2018-11-10 10:57:38,415 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 61 transitions. Word has length 72 [2018-11-10 10:57:38,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:38,415 INFO L481 AbstractCegarLoop]: Abstraction has 55 states and 61 transitions. [2018-11-10 10:57:38,415 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 10:57:38,415 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 61 transitions. [2018-11-10 10:57:38,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-11-10 10:57:38,416 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:38,416 INFO L375 BasicCegarLoop]: trace histogram [9, 6, 6, 5, 4, 4, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:38,416 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:38,417 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:38,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1140034890, now seen corresponding path program 2 times [2018-11-10 10:57:38,417 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:38,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:38,420 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:38,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:38,420 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:38,433 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:38,433 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:38,433 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:38,444 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:38,444 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:38,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:38,477 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:38,477 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:38,477 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:38,478 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:38,486 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:57:38,487 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 10:57:38,519 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-10 10:57:38,520 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:38,523 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:38,552 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 47 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-10 10:57:38,552 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:38,610 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 47 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-10 10:57:38,626 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:38,626 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-10 10:57:38,626 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:38,627 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-10 10:57:38,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-10 10:57:38,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-10 10:57:38,628 INFO L87 Difference]: Start difference. First operand 55 states and 61 transitions. Second operand 8 states. [2018-11-10 10:57:38,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:38,657 INFO L93 Difference]: Finished difference Result 103 states and 125 transitions. [2018-11-10 10:57:38,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-10 10:57:38,657 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2018-11-10 10:57:38,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:38,659 INFO L225 Difference]: With dead ends: 103 [2018-11-10 10:57:38,659 INFO L226 Difference]: Without dead ends: 74 [2018-11-10 10:57:38,660 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-10 10:57:38,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-11-10 10:57:38,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 70. [2018-11-10 10:57:38,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-11-10 10:57:38,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 79 transitions. [2018-11-10 10:57:38,669 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 79 transitions. Word has length 81 [2018-11-10 10:57:38,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:38,669 INFO L481 AbstractCegarLoop]: Abstraction has 70 states and 79 transitions. [2018-11-10 10:57:38,669 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-10 10:57:38,669 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 79 transitions. [2018-11-10 10:57:38,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-10 10:57:38,672 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:38,673 INFO L375 BasicCegarLoop]: trace histogram [21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:38,673 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:38,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:38,673 INFO L82 PathProgramCache]: Analyzing trace with hash 12732450, now seen corresponding path program 3 times [2018-11-10 10:57:38,673 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:38,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:38,674 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:38,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:38,676 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:38,692 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:38,693 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:38,693 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:38,713 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:38,713 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:38,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:38,748 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:38,748 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:38,748 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:38,748 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:38,753 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 10:57:38,753 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 10:57:38,806 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 10:57:38,806 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:38,812 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:38,845 INFO L134 CoverageAnalysis]: Checked inductivity of 766 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-11-10 10:57:38,845 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:38,897 INFO L134 CoverageAnalysis]: Checked inductivity of 766 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-11-10 10:57:38,912 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:38,913 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-10 10:57:38,913 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:38,913 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 10:57:38,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 10:57:38,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:38,913 INFO L87 Difference]: Start difference. First operand 70 states and 79 transitions. Second operand 12 states. [2018-11-10 10:57:38,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:38,954 INFO L93 Difference]: Finished difference Result 136 states and 159 transitions. [2018-11-10 10:57:38,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 10:57:38,955 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-11-10 10:57:38,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:38,956 INFO L225 Difference]: With dead ends: 136 [2018-11-10 10:57:38,956 INFO L226 Difference]: Without dead ends: 88 [2018-11-10 10:57:38,957 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:38,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-11-10 10:57:38,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-11-10 10:57:38,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-11-10 10:57:38,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 97 transitions. [2018-11-10 10:57:38,967 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 97 transitions. Word has length 129 [2018-11-10 10:57:38,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:38,967 INFO L481 AbstractCegarLoop]: Abstraction has 88 states and 97 transitions. [2018-11-10 10:57:38,967 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 10:57:38,967 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 97 transitions. [2018-11-10 10:57:38,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-11-10 10:57:38,969 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:38,969 INFO L375 BasicCegarLoop]: trace histogram [21, 18, 18, 15, 11, 10, 10, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:38,969 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:38,969 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:38,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1495303522, now seen corresponding path program 4 times [2018-11-10 10:57:38,969 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:38,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:38,972 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:38,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:38,973 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:38,991 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:38,991 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:38,992 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:38,997 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:38,997 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:39,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:39,032 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:39,032 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:39,032 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:39,032 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:39,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:39,038 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 10:57:39,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:39,083 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:39,173 INFO L134 CoverageAnalysis]: Checked inductivity of 895 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-11-10 10:57:39,173 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:39,305 INFO L134 CoverageAnalysis]: Checked inductivity of 895 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-11-10 10:57:39,321 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:39,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-10 10:57:39,322 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:39,322 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-10 10:57:39,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-10 10:57:39,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-11-10 10:57:39,322 INFO L87 Difference]: Start difference. First operand 88 states and 97 transitions. Second operand 24 states. [2018-11-10 10:57:39,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:39,373 INFO L93 Difference]: Finished difference Result 172 states and 201 transitions. [2018-11-10 10:57:39,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-10 10:57:39,374 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 147 [2018-11-10 10:57:39,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:39,375 INFO L225 Difference]: With dead ends: 172 [2018-11-10 10:57:39,375 INFO L226 Difference]: Without dead ends: 124 [2018-11-10 10:57:39,376 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 271 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-11-10 10:57:39,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-11-10 10:57:39,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-11-10 10:57:39,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-10 10:57:39,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 133 transitions. [2018-11-10 10:57:39,388 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 133 transitions. Word has length 147 [2018-11-10 10:57:39,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:39,389 INFO L481 AbstractCegarLoop]: Abstraction has 124 states and 133 transitions. [2018-11-10 10:57:39,389 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-10 10:57:39,389 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 133 transitions. [2018-11-10 10:57:39,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2018-11-10 10:57:39,391 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:39,391 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 21, 18, 18, 15, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:39,391 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:39,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:39,391 INFO L82 PathProgramCache]: Analyzing trace with hash -2103799838, now seen corresponding path program 5 times [2018-11-10 10:57:39,391 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:39,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:39,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:39,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:39,392 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:39,420 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:39,420 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:39,420 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:39,431 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:39,432 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:39,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:39,498 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:39,498 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:39,498 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:39,498 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:39,505 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:57:39,505 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 10:57:39,541 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-10 10:57:39,541 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:39,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:39,586 INFO L134 CoverageAnalysis]: Checked inductivity of 1477 backedges. 348 proven. 2 refuted. 0 times theorem prover too weak. 1127 trivial. 0 not checked. [2018-11-10 10:57:39,586 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:39,613 INFO L134 CoverageAnalysis]: Checked inductivity of 1477 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1475 trivial. 0 not checked. [2018-11-10 10:57:39,629 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:39,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-10 10:57:39,629 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:39,629 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 10:57:39,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 10:57:39,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:39,630 INFO L87 Difference]: Start difference. First operand 124 states and 133 transitions. Second operand 6 states. [2018-11-10 10:57:39,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:39,650 INFO L93 Difference]: Finished difference Result 169 states and 186 transitions. [2018-11-10 10:57:39,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 10:57:39,651 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 183 [2018-11-10 10:57:39,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:39,652 INFO L225 Difference]: With dead ends: 169 [2018-11-10 10:57:39,652 INFO L226 Difference]: Without dead ends: 133 [2018-11-10 10:57:39,652 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 365 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:39,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-10 10:57:39,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-11-10 10:57:39,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-11-10 10:57:39,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 142 transitions. [2018-11-10 10:57:39,660 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 142 transitions. Word has length 183 [2018-11-10 10:57:39,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:39,660 INFO L481 AbstractCegarLoop]: Abstraction has 133 states and 142 transitions. [2018-11-10 10:57:39,661 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 10:57:39,661 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 142 transitions. [2018-11-10 10:57:39,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-11-10 10:57:39,662 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:39,662 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:39,662 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:39,662 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:39,662 INFO L82 PathProgramCache]: Analyzing trace with hash -295793557, now seen corresponding path program 6 times [2018-11-10 10:57:39,662 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:39,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:39,663 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:39,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:39,663 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:39,687 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:39,688 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:39,688 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:39,695 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:39,695 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:39,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:39,746 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:39,747 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:39,747 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:39,747 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:39,753 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 10:57:39,753 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 10:57:39,836 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 10:57:39,836 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:39,839 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:40,007 INFO L134 CoverageAnalysis]: Checked inductivity of 1501 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 764 trivial. 0 not checked. [2018-11-10 10:57:40,007 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:40,461 INFO L134 CoverageAnalysis]: Checked inductivity of 1501 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 764 trivial. 0 not checked. [2018-11-10 10:57:40,477 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:40,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-10 10:57:40,477 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:40,478 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-10 10:57:40,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-10 10:57:40,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-11-10 10:57:40,479 INFO L87 Difference]: Start difference. First operand 133 states and 142 transitions. Second operand 48 states. [2018-11-10 10:57:40,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:40,588 INFO L93 Difference]: Finished difference Result 262 states and 303 transitions. [2018-11-10 10:57:40,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-10 10:57:40,588 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 192 [2018-11-10 10:57:40,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:40,589 INFO L225 Difference]: With dead ends: 262 [2018-11-10 10:57:40,589 INFO L226 Difference]: Without dead ends: 205 [2018-11-10 10:57:40,590 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 337 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-11-10 10:57:40,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-11-10 10:57:40,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2018-11-10 10:57:40,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-11-10 10:57:40,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 214 transitions. [2018-11-10 10:57:40,601 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 214 transitions. Word has length 192 [2018-11-10 10:57:40,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:40,601 INFO L481 AbstractCegarLoop]: Abstraction has 205 states and 214 transitions. [2018-11-10 10:57:40,601 INFO L482 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-10 10:57:40,601 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 214 transitions. [2018-11-10 10:57:40,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-11-10 10:57:40,603 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:40,604 INFO L375 BasicCegarLoop]: trace histogram [47, 46, 46, 21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:40,604 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:40,604 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:40,604 INFO L82 PathProgramCache]: Analyzing trace with hash 454285163, now seen corresponding path program 7 times [2018-11-10 10:57:40,604 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:40,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:40,605 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:40,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:40,605 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:40,635 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:40,635 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:40,635 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:40,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:40,650 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:40,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:40,710 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:40,711 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:40,711 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:40,711 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:40,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:40,722 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 10:57:40,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:40,812 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:41,431 INFO L134 CoverageAnalysis]: Checked inductivity of 3961 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 764 trivial. 0 not checked. [2018-11-10 10:57:41,431 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:42,391 INFO L134 CoverageAnalysis]: Checked inductivity of 3961 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 764 trivial. 0 not checked. [2018-11-10 10:57:42,407 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:42,407 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 62 [2018-11-10 10:57:42,407 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:42,408 INFO L460 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-11-10 10:57:42,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-11-10 10:57:42,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-11-10 10:57:42,409 INFO L87 Difference]: Start difference. First operand 205 states and 214 transitions. Second operand 62 states. [2018-11-10 10:57:42,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:42,533 INFO L93 Difference]: Finished difference Result 304 states and 335 transitions. [2018-11-10 10:57:42,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-11-10 10:57:42,534 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 264 [2018-11-10 10:57:42,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:42,535 INFO L225 Difference]: With dead ends: 304 [2018-11-10 10:57:42,535 INFO L226 Difference]: Without dead ends: 247 [2018-11-10 10:57:42,536 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 527 GetRequests, 433 SyntacticMatches, 34 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1003 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-11-10 10:57:42,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-11-10 10:57:42,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2018-11-10 10:57:42,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-11-10 10:57:42,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 256 transitions. [2018-11-10 10:57:42,551 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 256 transitions. Word has length 264 [2018-11-10 10:57:42,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:42,551 INFO L481 AbstractCegarLoop]: Abstraction has 247 states and 256 transitions. [2018-11-10 10:57:42,551 INFO L482 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-11-10 10:57:42,551 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 256 transitions. [2018-11-10 10:57:42,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 307 [2018-11-10 10:57:42,555 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:42,555 INFO L375 BasicCegarLoop]: trace histogram [61, 60, 60, 21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:42,555 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:42,555 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:42,556 INFO L82 PathProgramCache]: Analyzing trace with hash 532876075, now seen corresponding path program 8 times [2018-11-10 10:57:42,556 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:42,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:42,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:42,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:42,557 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:42,594 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:42,594 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:42,594 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:42,604 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:42,604 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:42,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:42,740 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:42,740 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:42,740 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:42,740 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:42,749 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:57:42,749 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 10:57:43,094 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-11-10 10:57:43,094 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:43,098 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:43,169 INFO L134 CoverageAnalysis]: Checked inductivity of 6194 backedges. 348 proven. 26 refuted. 0 times theorem prover too weak. 5820 trivial. 0 not checked. [2018-11-10 10:57:43,169 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:43,247 INFO L134 CoverageAnalysis]: Checked inductivity of 6194 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 6168 trivial. 0 not checked. [2018-11-10 10:57:43,268 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:43,269 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-10 10:57:43,269 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:43,269 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 10:57:43,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 10:57:43,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:43,269 INFO L87 Difference]: Start difference. First operand 247 states and 256 transitions. Second operand 12 states. [2018-11-10 10:57:43,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:43,303 INFO L93 Difference]: Finished difference Result 301 states and 321 transitions. [2018-11-10 10:57:43,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 10:57:43,304 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 306 [2018-11-10 10:57:43,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:43,305 INFO L225 Difference]: With dead ends: 301 [2018-11-10 10:57:43,305 INFO L226 Difference]: Without dead ends: 265 [2018-11-10 10:57:43,305 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 611 GetRequests, 601 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:43,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states. [2018-11-10 10:57:43,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 265. [2018-11-10 10:57:43,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2018-11-10 10:57:43,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 274 transitions. [2018-11-10 10:57:43,314 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 274 transitions. Word has length 306 [2018-11-10 10:57:43,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:43,314 INFO L481 AbstractCegarLoop]: Abstraction has 265 states and 274 transitions. [2018-11-10 10:57:43,315 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 10:57:43,315 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 274 transitions. [2018-11-10 10:57:43,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2018-11-10 10:57:43,316 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:43,316 INFO L375 BasicCegarLoop]: trace histogram [61, 60, 60, 21, 18, 18, 15, 11, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:43,316 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:43,316 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:43,316 INFO L82 PathProgramCache]: Analyzing trace with hash 978924811, now seen corresponding path program 9 times [2018-11-10 10:57:43,316 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:43,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:43,317 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:43,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:43,317 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:43,344 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:43,345 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:43,345 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:43,356 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:43,356 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:43,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:43,435 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:43,435 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:43,435 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:43,435 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:43,441 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 10:57:43,441 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 10:57:43,551 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 10:57:43,551 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:43,556 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:43,594 INFO L134 CoverageAnalysis]: Checked inductivity of 6323 backedges. 127 proven. 3 refuted. 0 times theorem prover too weak. 6193 trivial. 0 not checked. [2018-11-10 10:57:43,594 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:43,643 INFO L134 CoverageAnalysis]: Checked inductivity of 6323 backedges. 33 proven. 349 refuted. 0 times theorem prover too weak. 5941 trivial. 0 not checked. [2018-11-10 10:57:43,660 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:43,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-10 10:57:43,660 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:43,660 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-10 10:57:43,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-10 10:57:43,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:43,660 INFO L87 Difference]: Start difference. First operand 265 states and 274 transitions. Second operand 6 states. [2018-11-10 10:57:43,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:43,679 INFO L93 Difference]: Finished difference Result 348 states and 370 transitions. [2018-11-10 10:57:43,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-10 10:57:43,679 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 324 [2018-11-10 10:57:43,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:43,681 INFO L225 Difference]: With dead ends: 348 [2018-11-10 10:57:43,681 INFO L226 Difference]: Without dead ends: 277 [2018-11-10 10:57:43,681 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 647 GetRequests, 643 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-10 10:57:43,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-11-10 10:57:43,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 277. [2018-11-10 10:57:43,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-11-10 10:57:43,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 286 transitions. [2018-11-10 10:57:43,694 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 286 transitions. Word has length 324 [2018-11-10 10:57:43,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:43,695 INFO L481 AbstractCegarLoop]: Abstraction has 277 states and 286 transitions. [2018-11-10 10:57:43,695 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-10 10:57:43,695 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 286 transitions. [2018-11-10 10:57:43,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 361 [2018-11-10 10:57:43,697 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:43,697 INFO L375 BasicCegarLoop]: trace histogram [61, 60, 60, 30, 27, 27, 15, 12, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:43,697 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:43,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:43,697 INFO L82 PathProgramCache]: Analyzing trace with hash -586419466, now seen corresponding path program 10 times [2018-11-10 10:57:43,697 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:43,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:43,698 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:43,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:43,698 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:43,726 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:43,727 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:43,727 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:43,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:43,736 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:43,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:43,831 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:43,831 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:43,832 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:43,832 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:43,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:43,839 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 10:57:43,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:43,983 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:44,037 INFO L134 CoverageAnalysis]: Checked inductivity of 7169 backedges. 454 proven. 36 refuted. 0 times theorem prover too weak. 6679 trivial. 0 not checked. [2018-11-10 10:57:44,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:44,134 INFO L134 CoverageAnalysis]: Checked inductivity of 7169 backedges. 90 proven. 766 refuted. 0 times theorem prover too weak. 6313 trivial. 0 not checked. [2018-11-10 10:57:44,149 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:44,150 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-10 10:57:44,150 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:44,150 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-10 10:57:44,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-10 10:57:44,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:44,150 INFO L87 Difference]: Start difference. First operand 277 states and 286 transitions. Second operand 12 states. [2018-11-10 10:57:44,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:44,189 INFO L93 Difference]: Finished difference Result 384 states and 409 transitions. [2018-11-10 10:57:44,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-10 10:57:44,189 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 360 [2018-11-10 10:57:44,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:44,190 INFO L225 Difference]: With dead ends: 384 [2018-11-10 10:57:44,190 INFO L226 Difference]: Without dead ends: 301 [2018-11-10 10:57:44,190 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 719 GetRequests, 709 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-10 10:57:44,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-11-10 10:57:44,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 301. [2018-11-10 10:57:44,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301 states. [2018-11-10 10:57:44,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301 states to 301 states and 310 transitions. [2018-11-10 10:57:44,202 INFO L78 Accepts]: Start accepts. Automaton has 301 states and 310 transitions. Word has length 360 [2018-11-10 10:57:44,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:44,202 INFO L481 AbstractCegarLoop]: Abstraction has 301 states and 310 transitions. [2018-11-10 10:57:44,202 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-10 10:57:44,202 INFO L276 IsEmpty]: Start isEmpty. Operand 301 states and 310 transitions. [2018-11-10 10:57:44,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 433 [2018-11-10 10:57:44,204 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:44,204 INFO L375 BasicCegarLoop]: trace histogram [61, 60, 60, 48, 45, 45, 30, 15, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:44,204 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:44,204 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:44,205 INFO L82 PathProgramCache]: Analyzing trace with hash -1890280372, now seen corresponding path program 11 times [2018-11-10 10:57:44,205 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:44,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:44,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:44,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:44,205 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:44,226 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:44,226 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:44,226 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:44,234 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:44,234 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:44,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:44,310 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:44,310 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:44,310 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:44,310 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:44,315 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:57:44,315 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 10:57:44,564 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-11-10 10:57:44,564 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:44,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:44,637 INFO L134 CoverageAnalysis]: Checked inductivity of 9833 backedges. 944 proven. 55 refuted. 0 times theorem prover too weak. 8834 trivial. 0 not checked. [2018-11-10 10:57:44,637 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:44,764 INFO L134 CoverageAnalysis]: Checked inductivity of 9833 backedges. 944 proven. 55 refuted. 0 times theorem prover too weak. 8834 trivial. 0 not checked. [2018-11-10 10:57:44,780 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:44,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-11-10 10:57:44,781 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:44,781 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-10 10:57:44,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-10 10:57:44,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-10 10:57:44,782 INFO L87 Difference]: Start difference. First operand 301 states and 310 transitions. Second operand 16 states. [2018-11-10 10:57:44,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:44,853 INFO L93 Difference]: Finished difference Result 440 states and 475 transitions. [2018-11-10 10:57:44,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-10 10:57:44,856 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 432 [2018-11-10 10:57:44,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:44,857 INFO L225 Difference]: With dead ends: 440 [2018-11-10 10:57:44,857 INFO L226 Difference]: Without dead ends: 333 [2018-11-10 10:57:44,858 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 863 GetRequests, 849 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-10 10:57:44,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-11-10 10:57:44,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 333. [2018-11-10 10:57:44,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2018-11-10 10:57:44,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 350 transitions. [2018-11-10 10:57:44,869 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 350 transitions. Word has length 432 [2018-11-10 10:57:44,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:44,870 INFO L481 AbstractCegarLoop]: Abstraction has 333 states and 350 transitions. [2018-11-10 10:57:44,870 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-10 10:57:44,870 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 350 transitions. [2018-11-10 10:57:44,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 529 [2018-11-10 10:57:44,872 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:44,872 INFO L375 BasicCegarLoop]: trace histogram [72, 69, 69, 61, 60, 60, 39, 30, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:44,872 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:44,873 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:44,873 INFO L82 PathProgramCache]: Analyzing trace with hash 1074105348, now seen corresponding path program 12 times [2018-11-10 10:57:44,873 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:44,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:44,873 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:44,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:44,874 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:44,895 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:44,895 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:44,895 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:44,902 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:44,902 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:44,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:44,992 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:44,992 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:44,993 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:44,993 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:44,997 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 10:57:44,998 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 10:57:45,155 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 10:57:45,155 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:45,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:45,451 INFO L134 CoverageAnalysis]: Checked inductivity of 15401 backedges. 4578 proven. 903 refuted. 0 times theorem prover too weak. 9920 trivial. 0 not checked. [2018-11-10 10:57:45,451 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:45,818 INFO L134 CoverageAnalysis]: Checked inductivity of 15401 backedges. 4578 proven. 903 refuted. 0 times theorem prover too weak. 9920 trivial. 0 not checked. [2018-11-10 10:57:45,846 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:45,846 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 33 [2018-11-10 10:57:45,846 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:45,847 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-10 10:57:45,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-10 10:57:45,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-11-10 10:57:45,847 INFO L87 Difference]: Start difference. First operand 333 states and 350 transitions. Second operand 33 states. [2018-11-10 10:57:45,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:45,939 INFO L93 Difference]: Finished difference Result 556 states and 612 transitions. [2018-11-10 10:57:45,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-11-10 10:57:45,940 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 528 [2018-11-10 10:57:45,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:45,941 INFO L225 Difference]: With dead ends: 556 [2018-11-10 10:57:45,942 INFO L226 Difference]: Without dead ends: 417 [2018-11-10 10:57:45,942 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1055 GetRequests, 1011 SyntacticMatches, 13 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-11-10 10:57:45,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 417 states. [2018-11-10 10:57:45,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 417 to 417. [2018-11-10 10:57:45,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2018-11-10 10:57:45,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 434 transitions. [2018-11-10 10:57:45,958 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 434 transitions. Word has length 528 [2018-11-10 10:57:45,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:45,959 INFO L481 AbstractCegarLoop]: Abstraction has 417 states and 434 transitions. [2018-11-10 10:57:45,959 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-10 10:57:45,959 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 434 transitions. [2018-11-10 10:57:45,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2018-11-10 10:57:45,963 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:45,963 INFO L375 BasicCegarLoop]: trace histogram [135, 132, 132, 93, 61, 60, 60, 39, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:45,963 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:45,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:45,963 INFO L82 PathProgramCache]: Analyzing trace with hash 93832817, now seen corresponding path program 13 times [2018-11-10 10:57:45,963 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:45,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:45,964 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:45,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:45,964 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:45,987 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:45,987 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:45,987 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:45,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:45,993 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:46,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:46,108 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:46,108 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:46,108 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:46,109 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:46,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:46,117 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 10:57:46,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:46,314 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:47,012 INFO L134 CoverageAnalysis]: Checked inductivity of 40979 backedges. 15846 proven. 3872 refuted. 0 times theorem prover too weak. 21261 trivial. 0 not checked. [2018-11-10 10:57:47,012 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:48,040 INFO L134 CoverageAnalysis]: Checked inductivity of 40979 backedges. 0 proven. 19722 refuted. 0 times theorem prover too weak. 21257 trivial. 0 not checked. [2018-11-10 10:57:48,056 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:48,057 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 62 [2018-11-10 10:57:48,057 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:48,057 INFO L460 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-11-10 10:57:48,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-11-10 10:57:48,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-11-10 10:57:48,059 INFO L87 Difference]: Start difference. First operand 417 states and 434 transitions. Second operand 62 states. [2018-11-10 10:57:48,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:48,310 INFO L93 Difference]: Finished difference Result 704 states and 771 transitions. [2018-11-10 10:57:48,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-11-10 10:57:48,314 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 780 [2018-11-10 10:57:48,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:48,316 INFO L225 Difference]: With dead ends: 704 [2018-11-10 10:57:48,317 INFO L226 Difference]: Without dead ends: 481 [2018-11-10 10:57:48,318 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1559 GetRequests, 1469 SyntacticMatches, 30 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 885 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-11-10 10:57:48,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states. [2018-11-10 10:57:48,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 481. [2018-11-10 10:57:48,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 481 states. [2018-11-10 10:57:48,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 481 states to 481 states and 514 transitions. [2018-11-10 10:57:48,344 INFO L78 Accepts]: Start accepts. Automaton has 481 states and 514 transitions. Word has length 780 [2018-11-10 10:57:48,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:48,345 INFO L481 AbstractCegarLoop]: Abstraction has 481 states and 514 transitions. [2018-11-10 10:57:48,345 INFO L482 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-11-10 10:57:48,345 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 514 transitions. [2018-11-10 10:57:48,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 973 [2018-11-10 10:57:48,352 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:48,352 INFO L375 BasicCegarLoop]: trace histogram [183, 180, 180, 93, 87, 61, 60, 60, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:48,352 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:48,352 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:48,353 INFO L82 PathProgramCache]: Analyzing trace with hash -1206460959, now seen corresponding path program 14 times [2018-11-10 10:57:48,353 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:48,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:48,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:48,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:48,354 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:48,394 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:48,394 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:48,394 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:48,402 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:48,402 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:48,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:48,530 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:48,530 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:48,530 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:48,530 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:48,535 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-10 10:57:48,535 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-10 10:57:48,868 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-10 10:57:48,869 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:48,878 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:49,178 INFO L134 CoverageAnalysis]: Checked inductivity of 71123 backedges. 29292 proven. 155 refuted. 0 times theorem prover too weak. 41676 trivial. 0 not checked. [2018-11-10 10:57:49,178 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:49,498 INFO L134 CoverageAnalysis]: Checked inductivity of 71123 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 70968 trivial. 0 not checked. [2018-11-10 10:57:49,514 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:49,515 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-10 10:57:49,515 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:49,515 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-10 10:57:49,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-10 10:57:49,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-11-10 10:57:49,516 INFO L87 Difference]: Start difference. First operand 481 states and 514 transitions. Second operand 24 states. [2018-11-10 10:57:49,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:49,589 INFO L93 Difference]: Finished difference Result 769 states and 843 transitions. [2018-11-10 10:57:49,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-10 10:57:49,590 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 972 [2018-11-10 10:57:49,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:49,592 INFO L225 Difference]: With dead ends: 769 [2018-11-10 10:57:49,592 INFO L226 Difference]: Without dead ends: 517 [2018-11-10 10:57:49,592 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1943 GetRequests, 1921 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-11-10 10:57:49,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2018-11-10 10:57:49,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 517. [2018-11-10 10:57:49,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 517 states. [2018-11-10 10:57:49,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 550 transitions. [2018-11-10 10:57:49,614 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 550 transitions. Word has length 972 [2018-11-10 10:57:49,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:49,615 INFO L481 AbstractCegarLoop]: Abstraction has 517 states and 550 transitions. [2018-11-10 10:57:49,615 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-10 10:57:49,615 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 550 transitions. [2018-11-10 10:57:49,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1009 [2018-11-10 10:57:49,622 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:49,622 INFO L375 BasicCegarLoop]: trace histogram [183, 180, 180, 93, 87, 61, 60, 60, 23, 22, 22, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:49,623 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:49,623 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:49,623 INFO L82 PathProgramCache]: Analyzing trace with hash -913464415, now seen corresponding path program 15 times [2018-11-10 10:57:49,623 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:49,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:49,624 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:49,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:49,624 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:49,654 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:49,654 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:49,654 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:49,660 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:49,660 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:49,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:49,848 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:49,848 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:49,848 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:49,848 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:49,854 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-10 10:57:49,854 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-10 10:57:50,161 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-10 10:57:50,161 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-10 10:57:50,177 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:50,606 INFO L134 CoverageAnalysis]: Checked inductivity of 71705 backedges. 29292 proven. 737 refuted. 0 times theorem prover too weak. 41676 trivial. 0 not checked. [2018-11-10 10:57:50,606 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:51,277 INFO L134 CoverageAnalysis]: Checked inductivity of 71705 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 70968 trivial. 0 not checked. [2018-11-10 10:57:51,294 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:51,295 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-10 10:57:51,295 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:51,296 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-10 10:57:51,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-10 10:57:51,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-11-10 10:57:51,297 INFO L87 Difference]: Start difference. First operand 517 states and 550 transitions. Second operand 48 states. [2018-11-10 10:57:51,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:51,405 INFO L93 Difference]: Finished difference Result 841 states and 927 transitions. [2018-11-10 10:57:51,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-10 10:57:51,405 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 1008 [2018-11-10 10:57:51,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:51,407 INFO L225 Difference]: With dead ends: 841 [2018-11-10 10:57:51,407 INFO L226 Difference]: Without dead ends: 589 [2018-11-10 10:57:51,408 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2015 GetRequests, 1969 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-11-10 10:57:51,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 589 states. [2018-11-10 10:57:51,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 589 to 589. [2018-11-10 10:57:51,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 589 states. [2018-11-10 10:57:51,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 589 states to 589 states and 622 transitions. [2018-11-10 10:57:51,427 INFO L78 Accepts]: Start accepts. Automaton has 589 states and 622 transitions. Word has length 1008 [2018-11-10 10:57:51,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:51,428 INFO L481 AbstractCegarLoop]: Abstraction has 589 states and 622 transitions. [2018-11-10 10:57:51,428 INFO L482 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-10 10:57:51,428 INFO L276 IsEmpty]: Start isEmpty. Operand 589 states and 622 transitions. [2018-11-10 10:57:51,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1081 [2018-11-10 10:57:51,434 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:51,434 INFO L375 BasicCegarLoop]: trace histogram [183, 180, 180, 93, 87, 61, 60, 60, 47, 46, 46, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:51,434 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:51,434 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:51,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1194619103, now seen corresponding path program 16 times [2018-11-10 10:57:51,435 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:51,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:51,435 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:51,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:51,435 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:51,460 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:51,460 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:51,461 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:51,470 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:51,470 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:51,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:51,645 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-10 10:57:51,645 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-10 10:57:51,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-10 10:57:51,646 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-10 10:57:51,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:51,653 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-10 10:57:51,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-10 10:57:52,010 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-10 10:57:52,898 INFO L134 CoverageAnalysis]: Checked inductivity of 74165 backedges. 29292 proven. 3197 refuted. 0 times theorem prover too weak. 41676 trivial. 0 not checked. [2018-11-10 10:57:52,899 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-10 10:57:53,954 INFO L134 CoverageAnalysis]: Checked inductivity of 74165 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 70968 trivial. 0 not checked. [2018-11-10 10:57:53,972 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-10 10:57:53,973 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 61 [2018-11-10 10:57:53,973 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-10 10:57:53,974 INFO L460 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-11-10 10:57:53,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-11-10 10:57:53,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1830, Invalid=1830, Unknown=0, NotChecked=0, Total=3660 [2018-11-10 10:57:53,975 INFO L87 Difference]: Start difference. First operand 589 states and 622 transitions. Second operand 61 states. [2018-11-10 10:57:54,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-10 10:57:54,113 INFO L93 Difference]: Finished difference Result 880 states and 955 transitions. [2018-11-10 10:57:54,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-11-10 10:57:54,114 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 1080 [2018-11-10 10:57:54,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-10 10:57:54,116 INFO L225 Difference]: With dead ends: 880 [2018-11-10 10:57:54,116 INFO L226 Difference]: Without dead ends: 628 [2018-11-10 10:57:54,117 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2159 GetRequests, 2065 SyntacticMatches, 35 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1015 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1830, Invalid=1830, Unknown=0, NotChecked=0, Total=3660 [2018-11-10 10:57:54,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 628 states. [2018-11-10 10:57:54,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 628 to 628. [2018-11-10 10:57:54,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 628 states. [2018-11-10 10:57:54,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 661 transitions. [2018-11-10 10:57:54,150 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 661 transitions. Word has length 1080 [2018-11-10 10:57:54,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-10 10:57:54,151 INFO L481 AbstractCegarLoop]: Abstraction has 628 states and 661 transitions. [2018-11-10 10:57:54,151 INFO L482 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-11-10 10:57:54,151 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 661 transitions. [2018-11-10 10:57:54,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1120 [2018-11-10 10:57:54,163 INFO L367 BasicCegarLoop]: Found error trace [2018-11-10 10:57:54,163 INFO L375 BasicCegarLoop]: trace histogram [183, 180, 180, 93, 87, 61, 60, 60, 60, 59, 59, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-10 10:57:54,163 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-10 10:57:54,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-10 10:57:54,163 INFO L82 PathProgramCache]: Analyzing trace with hash -2117153536, now seen corresponding path program 17 times [2018-11-10 10:57:54,163 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-10 10:57:54,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:54,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-10 10:57:54,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-10 10:57:54,164 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-10 10:57:54,203 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-11-10 10:57:54,203 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-11-10 10:57:54,203 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_69782564-c555-462c-9f70-db25af69888d/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-11-10 10:57:54,212 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-10 10:57:54,213 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-11-10 10:57:56,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-10 10:57:56,428 INFO L285 seRefinementStrategy]: Strategy TaipanRefinementStrategy was unsuccessful and could not determine trace feasibility. [2018-11-10 10:57:56,428 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-10 10:57:56,510 WARN L208 ceAbstractionStarter]: Unable to decide correctness. Please check the following counterexample manually. [2018-11-10 10:57:56,511 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.11 10:57:56 BoogieIcfgContainer [2018-11-10 10:57:56,511 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-10 10:57:56,511 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-10 10:57:56,511 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-10 10:57:56,511 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-10 10:57:56,512 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.11 10:57:30" (3/4) ... [2018-11-10 10:57:56,515 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-10 10:57:56,515 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-10 10:57:56,515 INFO L168 Benchmark]: Toolchain (without parser) took 26192.66 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.7 GB). Free memory was 963.8 MB in the beginning and 2.6 GB in the end (delta: -1.6 GB). Peak memory consumption was 53.7 MB. Max. memory is 11.5 GB. [2018-11-10 10:57:56,516 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 982.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 10:57:56,517 INFO L168 Benchmark]: CACSL2BoogieTranslator took 159.50 ms. Allocated memory is still 1.0 GB. Free memory was 963.8 MB in the beginning and 953.1 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-11-10 10:57:56,517 INFO L168 Benchmark]: Boogie Procedure Inliner took 25.39 ms. Allocated memory is still 1.0 GB. Free memory was 953.1 MB in the beginning and 947.7 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-10 10:57:56,517 INFO L168 Benchmark]: Boogie Preprocessor took 16.10 ms. Allocated memory is still 1.0 GB. Free memory is still 947.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 10:57:56,518 INFO L168 Benchmark]: RCFGBuilder took 260.56 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 151.0 MB). Free memory was 947.7 MB in the beginning and 1.1 GB in the end (delta: -176.2 MB). Peak memory consumption was 15.5 MB. Max. memory is 11.5 GB. [2018-11-10 10:57:56,518 INFO L168 Benchmark]: TraceAbstraction took 25724.32 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 62.8 MB. Max. memory is 11.5 GB. [2018-11-10 10:57:56,518 INFO L168 Benchmark]: Witness Printer took 3.80 ms. Allocated memory is still 2.7 GB. Free memory is still 2.6 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-10 10:57:56,520 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 982.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 159.50 ms. Allocated memory is still 1.0 GB. Free memory was 963.8 MB in the beginning and 953.1 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 25.39 ms. Allocated memory is still 1.0 GB. Free memory was 953.1 MB in the beginning and 947.7 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 16.10 ms. Allocated memory is still 1.0 GB. Free memory is still 947.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 260.56 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 151.0 MB). Free memory was 947.7 MB in the beginning and 1.1 GB in the end (delta: -176.2 MB). Peak memory consumption was 15.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 25724.32 ms. Allocated memory was 1.2 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 62.8 MB. Max. memory is 11.5 GB. * Witness Printer took 3.80 ms. Allocated memory is still 2.7 GB. Free memory is still 2.6 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 50]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L31] CALL int x[60]; [L31] RET int x[60]; [L32] CALL init_nondet(x) [L5] int i; [L6] i = 0 [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 60 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND FALSE, RET !(i < 60) [L32] init_nondet(x) [L33] int temp; [L34] int ret; [L35] int ret2; [L36] int ret5; [L38] CALL, EXPR rangesum(x) [L13] int i; [L14] long long ret; [L15] ret = 0 [L16] int cnt = 0; [L17] i = 0 [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND FALSE !(i < 60) [L23] COND TRUE cnt !=0 [L24] RET return ret / cnt; [L38] EXPR rangesum(x) [L38] ret = rangesum(x) [L40] CALL, EXPR x[0] [L40] RET, EXPR x[0] [L40] temp=x[0] [L40] CALL, EXPR x[1] [L40] RET, EXPR x[1] [L40] CALL x[0] = x[1] [L40] RET x[0] = x[1] [L40] CALL x[1] = temp [L40] RET x[1] = temp [L41] CALL, EXPR rangesum(x) [L13] int i; [L14] long long ret; [L15] ret = 0 [L16] int cnt = 0; [L17] i = 0 [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND FALSE !(i < 60) [L23] COND TRUE cnt !=0 [L24] RET return ret / cnt; [L41] EXPR rangesum(x) [L41] ret2 = rangesum(x) [L42] CALL, EXPR x[0] [L42] RET, EXPR x[0] [L42] temp=x[0] [L43] int i =0 ; [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<60 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND FALSE !(i<60 -1) [L46] CALL x[60 -1] = temp [L46] RET x[60 -1] = temp [L47] CALL, EXPR rangesum(x) [L13] int i; [L14] long long ret; [L15] ret = 0 [L16] int cnt = 0; [L17] i = 0 [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND FALSE !(i > 60/2) [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 60 [L18] COND TRUE i > 60/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND FALSE !(i < 60) [L23] COND TRUE cnt !=0 [L24] RET return ret / cnt; [L47] EXPR rangesum(x) [L47] ret5 = rangesum(x) [L49] COND TRUE ret != ret2 || ret !=ret5 [L50] __VERIFIER_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 40 locations, 1 error locations. UNKNOWN Result, 25.6s OverallTime, 22 OverallIterations, 183 TraceHistogramMax, 3.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 740 SDtfs, 941 SDslu, 2554 SDs, 0 SdLazy, 1068 SolverSat, 282 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time, PredicateUnifierStatistics: 10 DeclaredPredicates, 13965 GetRequests, 13391 SyntacticMatches, 112 SemanticMatches, 462 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3217 ImplicationChecksByTransitivity, 7.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=628occurred in iteration=21, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 3.3s AbstIntTime, 6 AbstIntIterations, 5 AbstIntStrong, 0.9726047715521402 AbsIntWeakeningRatio, 1.6408163265306122 AbsIntAvgWeakeningVarsNumRemoved, 42.74285714285714 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 21 MinimizatonAttempts, 8 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.1s SsaConstructionTime, 4.7s SatisfiabilityAnalysisTime, 9.5s InterpolantComputationTime, 15085 NumberOfCodeBlocks, 13638 NumberOfCodeBlocksAsserted, 71 NumberOfCheckSat, 13684 ConstructedInterpolants, 0 QuantifiedInterpolants, 11477148 SizeOfPredicates, 18 NumberOfNonLiveVariables, 21715 ConjunctsInSsa, 276 ConjunctsInUnsatCore, 32 InterpolantComputations, 0 PerfectInterpolantSequences, 580366/623504 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...