./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 75de94c5f78b6878c3cbd09fac99b01e14f23f29 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 75de94c5f78b6878c3cbd09fac99b01e14f23f29 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 16:13:00,414 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 16:13:00,416 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 16:13:00,422 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 16:13:00,422 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 16:13:00,423 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 16:13:00,424 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 16:13:00,425 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 16:13:00,426 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 16:13:00,427 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 16:13:00,427 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 16:13:00,427 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 16:13:00,428 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 16:13:00,429 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 16:13:00,429 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 16:13:00,429 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 16:13:00,430 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 16:13:00,431 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 16:13:00,432 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 16:13:00,433 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 16:13:00,433 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 16:13:00,434 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 16:13:00,436 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 16:13:00,436 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 16:13:00,436 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 16:13:00,437 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 16:13:00,437 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 16:13:00,437 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 16:13:00,438 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 16:13:00,439 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 16:13:00,439 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 16:13:00,439 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 16:13:00,439 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 16:13:00,440 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 16:13:00,440 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 16:13:00,441 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 16:13:00,441 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 16:13:00,448 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 16:13:00,448 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 16:13:00,449 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 16:13:00,449 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 16:13:00,449 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 16:13:00,449 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 16:13:00,449 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 16:13:00,449 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 16:13:00,450 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 16:13:00,450 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 16:13:00,450 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 16:13:00,450 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 16:13:00,450 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 16:13:00,451 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 16:13:00,451 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 16:13:00,452 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 16:13:00,452 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 16:13:00,452 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 16:13:00,452 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 16:13:00,452 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 16:13:00,452 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 16:13:00,452 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:13:00,453 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 16:13:00,453 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 16:13:00,454 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 16:13:00,454 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 75de94c5f78b6878c3cbd09fac99b01e14f23f29 [2018-11-18 16:13:00,478 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 16:13:00,487 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 16:13:00,489 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 16:13:00,491 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 16:13:00,491 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 16:13:00,491 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2018-11-18 16:13:00,537 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/a890c7611/048e617ea2974904a7fd49972f717f40/FLAG6ed522155 [2018-11-18 16:13:00,952 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 16:13:00,953 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2018-11-18 16:13:00,958 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/a890c7611/048e617ea2974904a7fd49972f717f40/FLAG6ed522155 [2018-11-18 16:13:00,966 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/a890c7611/048e617ea2974904a7fd49972f717f40 [2018-11-18 16:13:00,968 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 16:13:00,969 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 16:13:00,969 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 16:13:00,969 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 16:13:00,971 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 16:13:00,972 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:13:00" (1/1) ... [2018-11-18 16:13:00,974 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a1177d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:00, skipping insertion in model container [2018-11-18 16:13:00,974 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:13:00" (1/1) ... [2018-11-18 16:13:00,979 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 16:13:01,008 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 16:13:01,178 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:13:01,184 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 16:13:01,270 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:13:01,282 INFO L195 MainTranslator]: Completed translation [2018-11-18 16:13:01,283 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01 WrapperNode [2018-11-18 16:13:01,283 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 16:13:01,283 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 16:13:01,283 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 16:13:01,283 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 16:13:01,289 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,296 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,301 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 16:13:01,301 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 16:13:01,301 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 16:13:01,301 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 16:13:01,307 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,308 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,311 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,311 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,324 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,330 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,333 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... [2018-11-18 16:13:01,335 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 16:13:01,335 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 16:13:01,335 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 16:13:01,335 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 16:13:01,336 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:13:01,372 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-11-18 16:13:01,372 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-11-18 16:13:01,373 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-11-18 16:13:01,373 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-11-18 16:13:01,373 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-11-18 16:13:01,373 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-11-18 16:13:01,373 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 16:13:01,373 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 16:13:01,373 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-11-18 16:13:01,373 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-11-18 16:13:01,373 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-11-18 16:13:01,374 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-11-18 16:13:01,374 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-11-18 16:13:01,374 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-11-18 16:13:01,374 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-11-18 16:13:01,374 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-11-18 16:13:01,374 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-11-18 16:13:01,374 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-11-18 16:13:01,374 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-11-18 16:13:01,374 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-11-18 16:13:01,375 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-11-18 16:13:01,375 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-11-18 16:13:01,375 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-11-18 16:13:01,375 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-11-18 16:13:01,375 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-11-18 16:13:01,375 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-11-18 16:13:01,375 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-11-18 16:13:01,375 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-11-18 16:13:01,375 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 16:13:01,375 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 16:13:01,376 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-11-18 16:13:01,376 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-11-18 16:13:01,376 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 16:13:01,376 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 16:13:01,376 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-11-18 16:13:01,376 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-11-18 16:13:01,376 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-11-18 16:13:01,376 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-11-18 16:13:01,905 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 16:13:01,905 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:13:01 BoogieIcfgContainer [2018-11-18 16:13:01,905 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 16:13:01,906 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 16:13:01,906 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 16:13:01,909 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 16:13:01,909 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 04:13:00" (1/3) ... [2018-11-18 16:13:01,910 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3080c746 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:13:01, skipping insertion in model container [2018-11-18 16:13:01,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:01" (2/3) ... [2018-11-18 16:13:01,910 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3080c746 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:13:01, skipping insertion in model container [2018-11-18 16:13:01,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:13:01" (3/3) ... [2018-11-18 16:13:01,912 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2018-11-18 16:13:01,920 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 16:13:01,925 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 16:13:01,935 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 16:13:01,964 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 16:13:01,964 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 16:13:01,964 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 16:13:01,964 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 16:13:01,964 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 16:13:01,964 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 16:13:01,964 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 16:13:01,964 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 16:13:01,980 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states. [2018-11-18 16:13:01,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 16:13:01,988 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:01,988 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:01,990 INFO L423 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:01,995 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:01,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1435764648, now seen corresponding path program 1 times [2018-11-18 16:13:01,997 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:02,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:02,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:02,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:02,034 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:02,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:02,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:02,215 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:02,215 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:02,215 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:02,218 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:02,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:02,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:02,228 INFO L87 Difference]: Start difference. First operand 238 states. Second operand 4 states. [2018-11-18 16:13:02,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:02,305 INFO L93 Difference]: Finished difference Result 457 states and 700 transitions. [2018-11-18 16:13:02,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:02,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-11-18 16:13:02,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:02,314 INFO L225 Difference]: With dead ends: 457 [2018-11-18 16:13:02,314 INFO L226 Difference]: Without dead ends: 233 [2018-11-18 16:13:02,317 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:02,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-11-18 16:13:02,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 233. [2018-11-18 16:13:02,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-11-18 16:13:02,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 325 transitions. [2018-11-18 16:13:02,355 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 325 transitions. Word has length 66 [2018-11-18 16:13:02,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:02,356 INFO L480 AbstractCegarLoop]: Abstraction has 233 states and 325 transitions. [2018-11-18 16:13:02,356 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:02,356 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 325 transitions. [2018-11-18 16:13:02,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 16:13:02,358 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:02,358 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:02,359 INFO L423 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:02,359 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:02,359 INFO L82 PathProgramCache]: Analyzing trace with hash -967657536, now seen corresponding path program 1 times [2018-11-18 16:13:02,359 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:02,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:02,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:02,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:02,361 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:02,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:02,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:02,487 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:02,487 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:02,487 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:02,488 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:02,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:02,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:02,489 INFO L87 Difference]: Start difference. First operand 233 states and 325 transitions. Second operand 4 states. [2018-11-18 16:13:02,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:02,563 INFO L93 Difference]: Finished difference Result 448 states and 638 transitions. [2018-11-18 16:13:02,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:02,564 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-18 16:13:02,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:02,566 INFO L225 Difference]: With dead ends: 448 [2018-11-18 16:13:02,566 INFO L226 Difference]: Without dead ends: 237 [2018-11-18 16:13:02,568 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:02,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-11-18 16:13:02,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 237. [2018-11-18 16:13:02,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-11-18 16:13:02,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 328 transitions. [2018-11-18 16:13:02,587 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 328 transitions. Word has length 77 [2018-11-18 16:13:02,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:02,588 INFO L480 AbstractCegarLoop]: Abstraction has 237 states and 328 transitions. [2018-11-18 16:13:02,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:02,588 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 328 transitions. [2018-11-18 16:13:02,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-18 16:13:02,590 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:02,590 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:02,590 INFO L423 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:02,590 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:02,590 INFO L82 PathProgramCache]: Analyzing trace with hash 476890672, now seen corresponding path program 1 times [2018-11-18 16:13:02,591 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:02,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:02,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:02,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:02,592 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:02,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:02,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:02,714 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:02,714 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:02,714 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:02,715 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:02,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:02,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:02,715 INFO L87 Difference]: Start difference. First operand 237 states and 328 transitions. Second operand 7 states. [2018-11-18 16:13:03,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:03,465 INFO L93 Difference]: Finished difference Result 540 states and 749 transitions. [2018-11-18 16:13:03,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:03,465 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-11-18 16:13:03,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:03,469 INFO L225 Difference]: With dead ends: 540 [2018-11-18 16:13:03,469 INFO L226 Difference]: Without dead ends: 325 [2018-11-18 16:13:03,470 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:13:03,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-11-18 16:13:03,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 324. [2018-11-18 16:13:03,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2018-11-18 16:13:03,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 441 transitions. [2018-11-18 16:13:03,491 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 441 transitions. Word has length 95 [2018-11-18 16:13:03,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:03,492 INFO L480 AbstractCegarLoop]: Abstraction has 324 states and 441 transitions. [2018-11-18 16:13:03,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:03,492 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 441 transitions. [2018-11-18 16:13:03,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 16:13:03,493 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:03,493 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:03,494 INFO L423 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:03,494 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:03,494 INFO L82 PathProgramCache]: Analyzing trace with hash -1770381442, now seen corresponding path program 1 times [2018-11-18 16:13:03,494 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:03,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:03,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:03,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:03,496 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:03,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:03,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:03,583 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:03,583 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:03,583 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:03,584 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:03,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:03,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:03,584 INFO L87 Difference]: Start difference. First operand 324 states and 441 transitions. Second operand 7 states. [2018-11-18 16:13:04,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:04,180 INFO L93 Difference]: Finished difference Result 546 states and 757 transitions. [2018-11-18 16:13:04,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:04,183 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-11-18 16:13:04,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:04,185 INFO L225 Difference]: With dead ends: 546 [2018-11-18 16:13:04,185 INFO L226 Difference]: Without dead ends: 328 [2018-11-18 16:13:04,186 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:13:04,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-11-18 16:13:04,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 324. [2018-11-18 16:13:04,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2018-11-18 16:13:04,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 441 transitions. [2018-11-18 16:13:04,202 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 441 transitions. Word has length 96 [2018-11-18 16:13:04,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:04,202 INFO L480 AbstractCegarLoop]: Abstraction has 324 states and 441 transitions. [2018-11-18 16:13:04,202 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:04,202 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 441 transitions. [2018-11-18 16:13:04,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-18 16:13:04,203 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:04,203 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:04,204 INFO L423 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:04,204 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:04,204 INFO L82 PathProgramCache]: Analyzing trace with hash -2104686173, now seen corresponding path program 1 times [2018-11-18 16:13:04,204 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:04,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:04,206 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:04,206 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:04,206 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:04,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:04,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:04,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:04,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:04,272 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:04,272 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:04,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:04,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:04,272 INFO L87 Difference]: Start difference. First operand 324 states and 441 transitions. Second operand 7 states. [2018-11-18 16:13:04,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:04,926 INFO L93 Difference]: Finished difference Result 547 states and 761 transitions. [2018-11-18 16:13:04,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:04,926 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 98 [2018-11-18 16:13:04,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:04,928 INFO L225 Difference]: With dead ends: 547 [2018-11-18 16:13:04,928 INFO L226 Difference]: Without dead ends: 329 [2018-11-18 16:13:04,929 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:13:04,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-11-18 16:13:04,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 325. [2018-11-18 16:13:04,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2018-11-18 16:13:04,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 442 transitions. [2018-11-18 16:13:04,946 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 442 transitions. Word has length 98 [2018-11-18 16:13:04,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:04,946 INFO L480 AbstractCegarLoop]: Abstraction has 325 states and 442 transitions. [2018-11-18 16:13:04,947 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:04,947 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 442 transitions. [2018-11-18 16:13:04,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-18 16:13:04,948 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:04,948 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:04,948 INFO L423 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:04,948 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:04,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1931269076, now seen corresponding path program 1 times [2018-11-18 16:13:04,949 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:04,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:04,950 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:04,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:04,950 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:04,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,027 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:05,028 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:05,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:05,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:05,029 INFO L87 Difference]: Start difference. First operand 325 states and 442 transitions. Second operand 3 states. [2018-11-18 16:13:05,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:05,068 INFO L93 Difference]: Finished difference Result 780 states and 1085 transitions. [2018-11-18 16:13:05,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:05,070 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-11-18 16:13:05,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:05,072 INFO L225 Difference]: With dead ends: 780 [2018-11-18 16:13:05,073 INFO L226 Difference]: Without dead ends: 561 [2018-11-18 16:13:05,074 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:05,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2018-11-18 16:13:05,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 542. [2018-11-18 16:13:05,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 542 states. [2018-11-18 16:13:05,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 542 states to 542 states and 750 transitions. [2018-11-18 16:13:05,104 INFO L78 Accepts]: Start accepts. Automaton has 542 states and 750 transitions. Word has length 98 [2018-11-18 16:13:05,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:05,104 INFO L480 AbstractCegarLoop]: Abstraction has 542 states and 750 transitions. [2018-11-18 16:13:05,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:05,104 INFO L276 IsEmpty]: Start isEmpty. Operand 542 states and 750 transitions. [2018-11-18 16:13:05,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-18 16:13:05,105 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:05,105 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:05,106 INFO L423 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:05,106 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:05,106 INFO L82 PathProgramCache]: Analyzing trace with hash -1015865043, now seen corresponding path program 1 times [2018-11-18 16:13:05,106 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:05,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:05,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,107 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:05,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,158 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,159 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:05,159 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:05,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:05,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:05,159 INFO L87 Difference]: Start difference. First operand 542 states and 750 transitions. Second operand 3 states. [2018-11-18 16:13:05,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:05,208 INFO L93 Difference]: Finished difference Result 1291 states and 1829 transitions. [2018-11-18 16:13:05,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:05,209 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2018-11-18 16:13:05,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:05,213 INFO L225 Difference]: With dead ends: 1291 [2018-11-18 16:13:05,213 INFO L226 Difference]: Without dead ends: 898 [2018-11-18 16:13:05,215 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:05,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 898 states. [2018-11-18 16:13:05,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 898 to 892. [2018-11-18 16:13:05,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 892 states. [2018-11-18 16:13:05,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 892 states to 892 states and 1253 transitions. [2018-11-18 16:13:05,264 INFO L78 Accepts]: Start accepts. Automaton has 892 states and 1253 transitions. Word has length 99 [2018-11-18 16:13:05,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:05,265 INFO L480 AbstractCegarLoop]: Abstraction has 892 states and 1253 transitions. [2018-11-18 16:13:05,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:05,265 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 1253 transitions. [2018-11-18 16:13:05,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-18 16:13:05,266 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:05,266 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:05,267 INFO L423 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:05,267 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:05,267 INFO L82 PathProgramCache]: Analyzing trace with hash -314800465, now seen corresponding path program 1 times [2018-11-18 16:13:05,267 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:05,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:05,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,268 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:05,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,309 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:05,309 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:05,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:05,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:05,309 INFO L87 Difference]: Start difference. First operand 892 states and 1253 transitions. Second operand 3 states. [2018-11-18 16:13:05,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:05,350 INFO L93 Difference]: Finished difference Result 1508 states and 2132 transitions. [2018-11-18 16:13:05,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:05,351 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2018-11-18 16:13:05,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:05,354 INFO L225 Difference]: With dead ends: 1508 [2018-11-18 16:13:05,354 INFO L226 Difference]: Without dead ends: 730 [2018-11-18 16:13:05,357 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:05,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 730 states. [2018-11-18 16:13:05,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 730 to 730. [2018-11-18 16:13:05,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 730 states. [2018-11-18 16:13:05,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 730 states to 730 states and 1016 transitions. [2018-11-18 16:13:05,392 INFO L78 Accepts]: Start accepts. Automaton has 730 states and 1016 transitions. Word has length 99 [2018-11-18 16:13:05,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:05,392 INFO L480 AbstractCegarLoop]: Abstraction has 730 states and 1016 transitions. [2018-11-18 16:13:05,392 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:05,393 INFO L276 IsEmpty]: Start isEmpty. Operand 730 states and 1016 transitions. [2018-11-18 16:13:05,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-18 16:13:05,394 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:05,394 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:05,394 INFO L423 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:05,394 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:05,394 INFO L82 PathProgramCache]: Analyzing trace with hash 896972713, now seen corresponding path program 1 times [2018-11-18 16:13:05,394 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:05,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:05,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,395 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:05,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:05,449 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:05,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:05,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:05,450 INFO L87 Difference]: Start difference. First operand 730 states and 1016 transitions. Second operand 4 states. [2018-11-18 16:13:05,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:05,504 INFO L93 Difference]: Finished difference Result 1323 states and 1868 transitions. [2018-11-18 16:13:05,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:05,505 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 99 [2018-11-18 16:13:05,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:05,508 INFO L225 Difference]: With dead ends: 1323 [2018-11-18 16:13:05,508 INFO L226 Difference]: Without dead ends: 745 [2018-11-18 16:13:05,510 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:05,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 745 states. [2018-11-18 16:13:05,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 745 to 745. [2018-11-18 16:13:05,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 745 states. [2018-11-18 16:13:05,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 745 states to 745 states and 1028 transitions. [2018-11-18 16:13:05,548 INFO L78 Accepts]: Start accepts. Automaton has 745 states and 1028 transitions. Word has length 99 [2018-11-18 16:13:05,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:05,548 INFO L480 AbstractCegarLoop]: Abstraction has 745 states and 1028 transitions. [2018-11-18 16:13:05,548 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:05,548 INFO L276 IsEmpty]: Start isEmpty. Operand 745 states and 1028 transitions. [2018-11-18 16:13:05,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 16:13:05,550 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:05,550 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:05,550 INFO L423 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:05,550 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:05,550 INFO L82 PathProgramCache]: Analyzing trace with hash -1157956439, now seen corresponding path program 1 times [2018-11-18 16:13:05,550 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:05,551 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:05,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,552 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:05,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,609 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,609 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:05,609 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,609 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:05,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:05,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:05,610 INFO L87 Difference]: Start difference. First operand 745 states and 1028 transitions. Second operand 4 states. [2018-11-18 16:13:05,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:05,671 INFO L93 Difference]: Finished difference Result 1353 states and 1901 transitions. [2018-11-18 16:13:05,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:05,671 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2018-11-18 16:13:05,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:05,675 INFO L225 Difference]: With dead ends: 1353 [2018-11-18 16:13:05,675 INFO L226 Difference]: Without dead ends: 760 [2018-11-18 16:13:05,677 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:05,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 760 states. [2018-11-18 16:13:05,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 760 to 760. [2018-11-18 16:13:05,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 760 states. [2018-11-18 16:13:05,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 760 states to 760 states and 1040 transitions. [2018-11-18 16:13:05,712 INFO L78 Accepts]: Start accepts. Automaton has 760 states and 1040 transitions. Word has length 107 [2018-11-18 16:13:05,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:05,713 INFO L480 AbstractCegarLoop]: Abstraction has 760 states and 1040 transitions. [2018-11-18 16:13:05,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:05,713 INFO L276 IsEmpty]: Start isEmpty. Operand 760 states and 1040 transitions. [2018-11-18 16:13:05,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-18 16:13:05,714 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:05,715 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:05,715 INFO L423 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:05,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:05,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1696378797, now seen corresponding path program 1 times [2018-11-18 16:13:05,715 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:05,716 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,716 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:05,716 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,716 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:05,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,776 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,776 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,776 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:05,777 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,777 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:05,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:05,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:05,777 INFO L87 Difference]: Start difference. First operand 760 states and 1040 transitions. Second operand 4 states. [2018-11-18 16:13:05,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:05,835 INFO L93 Difference]: Finished difference Result 1380 states and 1913 transitions. [2018-11-18 16:13:05,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:05,836 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-11-18 16:13:05,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:05,839 INFO L225 Difference]: With dead ends: 1380 [2018-11-18 16:13:05,840 INFO L226 Difference]: Without dead ends: 772 [2018-11-18 16:13:05,842 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:05,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 772 states. [2018-11-18 16:13:05,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 772 to 772. [2018-11-18 16:13:05,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 772 states. [2018-11-18 16:13:05,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 772 states to 772 states and 1049 transitions. [2018-11-18 16:13:05,883 INFO L78 Accepts]: Start accepts. Automaton has 772 states and 1049 transitions. Word has length 115 [2018-11-18 16:13:05,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:05,884 INFO L480 AbstractCegarLoop]: Abstraction has 772 states and 1049 transitions. [2018-11-18 16:13:05,884 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:05,884 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 1049 transitions. [2018-11-18 16:13:05,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-18 16:13:05,886 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:05,886 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:05,886 INFO L423 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:05,886 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:05,886 INFO L82 PathProgramCache]: Analyzing trace with hash 426052673, now seen corresponding path program 1 times [2018-11-18 16:13:05,886 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:05,887 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:05,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:05,888 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:05,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:05,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:05,955 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:05,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:05,955 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:05,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:05,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:05,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:05,956 INFO L87 Difference]: Start difference. First operand 772 states and 1049 transitions. Second operand 4 states. [2018-11-18 16:13:06,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:06,037 INFO L93 Difference]: Finished difference Result 1407 states and 1943 transitions. [2018-11-18 16:13:06,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:06,037 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-11-18 16:13:06,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:06,041 INFO L225 Difference]: With dead ends: 1407 [2018-11-18 16:13:06,041 INFO L226 Difference]: Without dead ends: 787 [2018-11-18 16:13:06,043 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:06,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 787 states. [2018-11-18 16:13:06,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 787 to 787. [2018-11-18 16:13:06,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 787 states. [2018-11-18 16:13:06,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 787 states to 787 states and 1061 transitions. [2018-11-18 16:13:06,083 INFO L78 Accepts]: Start accepts. Automaton has 787 states and 1061 transitions. Word has length 115 [2018-11-18 16:13:06,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:06,083 INFO L480 AbstractCegarLoop]: Abstraction has 787 states and 1061 transitions. [2018-11-18 16:13:06,083 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:06,083 INFO L276 IsEmpty]: Start isEmpty. Operand 787 states and 1061 transitions. [2018-11-18 16:13:06,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-11-18 16:13:06,085 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:06,085 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:06,086 INFO L423 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:06,086 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:06,086 INFO L82 PathProgramCache]: Analyzing trace with hash 1506786835, now seen corresponding path program 1 times [2018-11-18 16:13:06,086 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:06,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:06,087 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:06,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:06,087 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:06,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:06,203 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 16:13:06,204 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:06,204 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:06,204 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:06,204 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:06,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:06,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:06,205 INFO L87 Difference]: Start difference. First operand 787 states and 1061 transitions. Second operand 4 states. [2018-11-18 16:13:06,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:06,255 INFO L93 Difference]: Finished difference Result 1440 states and 1964 transitions. [2018-11-18 16:13:06,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:06,256 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 123 [2018-11-18 16:13:06,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:06,260 INFO L225 Difference]: With dead ends: 1440 [2018-11-18 16:13:06,260 INFO L226 Difference]: Without dead ends: 805 [2018-11-18 16:13:06,261 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:06,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 805 states. [2018-11-18 16:13:06,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 805 to 805. [2018-11-18 16:13:06,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 805 states. [2018-11-18 16:13:06,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 805 states to 805 states and 1076 transitions. [2018-11-18 16:13:06,294 INFO L78 Accepts]: Start accepts. Automaton has 805 states and 1076 transitions. Word has length 123 [2018-11-18 16:13:06,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:06,294 INFO L480 AbstractCegarLoop]: Abstraction has 805 states and 1076 transitions. [2018-11-18 16:13:06,294 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:06,294 INFO L276 IsEmpty]: Start isEmpty. Operand 805 states and 1076 transitions. [2018-11-18 16:13:06,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-11-18 16:13:06,296 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:06,296 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:06,296 INFO L423 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:06,296 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:06,296 INFO L82 PathProgramCache]: Analyzing trace with hash 1876025466, now seen corresponding path program 1 times [2018-11-18 16:13:06,297 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:06,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:06,297 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:06,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:06,297 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:06,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:06,416 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:13:06,417 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:06,417 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 16:13:06,417 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:06,417 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 16:13:06,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 16:13:06,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:13:06,418 INFO L87 Difference]: Start difference. First operand 805 states and 1076 transitions. Second operand 10 states. [2018-11-18 16:13:08,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:08,392 INFO L93 Difference]: Finished difference Result 2109 states and 2800 transitions. [2018-11-18 16:13:08,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 16:13:08,393 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 128 [2018-11-18 16:13:08,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:08,399 INFO L225 Difference]: With dead ends: 2109 [2018-11-18 16:13:08,399 INFO L226 Difference]: Without dead ends: 1441 [2018-11-18 16:13:08,402 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:13:08,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1441 states. [2018-11-18 16:13:08,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1441 to 1340. [2018-11-18 16:13:08,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1340 states. [2018-11-18 16:13:08,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1340 states to 1340 states and 1757 transitions. [2018-11-18 16:13:08,482 INFO L78 Accepts]: Start accepts. Automaton has 1340 states and 1757 transitions. Word has length 128 [2018-11-18 16:13:08,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:08,482 INFO L480 AbstractCegarLoop]: Abstraction has 1340 states and 1757 transitions. [2018-11-18 16:13:08,482 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 16:13:08,482 INFO L276 IsEmpty]: Start isEmpty. Operand 1340 states and 1757 transitions. [2018-11-18 16:13:08,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-11-18 16:13:08,484 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:08,484 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:08,484 INFO L423 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:08,484 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:08,484 INFO L82 PathProgramCache]: Analyzing trace with hash 729234436, now seen corresponding path program 1 times [2018-11-18 16:13:08,485 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:08,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:08,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:08,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:08,486 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:08,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:08,546 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:13:08,546 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:08,546 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:08,546 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:08,546 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:08,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:08,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:08,547 INFO L87 Difference]: Start difference. First operand 1340 states and 1757 transitions. Second operand 4 states. [2018-11-18 16:13:08,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:08,605 INFO L93 Difference]: Finished difference Result 2434 states and 3215 transitions. [2018-11-18 16:13:08,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:08,606 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 130 [2018-11-18 16:13:08,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:08,611 INFO L225 Difference]: With dead ends: 2434 [2018-11-18 16:13:08,611 INFO L226 Difference]: Without dead ends: 1352 [2018-11-18 16:13:08,614 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:08,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1352 states. [2018-11-18 16:13:08,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1352 to 1346. [2018-11-18 16:13:08,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1346 states. [2018-11-18 16:13:08,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1346 states to 1346 states and 1744 transitions. [2018-11-18 16:13:08,670 INFO L78 Accepts]: Start accepts. Automaton has 1346 states and 1744 transitions. Word has length 130 [2018-11-18 16:13:08,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:08,670 INFO L480 AbstractCegarLoop]: Abstraction has 1346 states and 1744 transitions. [2018-11-18 16:13:08,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:08,671 INFO L276 IsEmpty]: Start isEmpty. Operand 1346 states and 1744 transitions. [2018-11-18 16:13:08,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-18 16:13:08,672 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:08,672 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:08,673 INFO L423 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:08,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:08,673 INFO L82 PathProgramCache]: Analyzing trace with hash 1363512046, now seen corresponding path program 1 times [2018-11-18 16:13:08,673 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:08,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:08,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:08,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:08,674 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:08,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:08,744 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:13:08,745 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:08,745 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:13:08,745 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:08,745 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:13:08,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:13:08,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:13:08,746 INFO L87 Difference]: Start difference. First operand 1346 states and 1744 transitions. Second operand 8 states. [2018-11-18 16:13:08,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:08,839 INFO L93 Difference]: Finished difference Result 1431 states and 1872 transitions. [2018-11-18 16:13:08,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:08,839 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 131 [2018-11-18 16:13:08,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:08,845 INFO L225 Difference]: With dead ends: 1431 [2018-11-18 16:13:08,845 INFO L226 Difference]: Without dead ends: 1429 [2018-11-18 16:13:08,846 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:13:08,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1429 states. [2018-11-18 16:13:08,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1429 to 1370. [2018-11-18 16:13:08,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1370 states. [2018-11-18 16:13:08,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1370 states to 1370 states and 1774 transitions. [2018-11-18 16:13:08,912 INFO L78 Accepts]: Start accepts. Automaton has 1370 states and 1774 transitions. Word has length 131 [2018-11-18 16:13:08,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:08,913 INFO L480 AbstractCegarLoop]: Abstraction has 1370 states and 1774 transitions. [2018-11-18 16:13:08,913 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:13:08,913 INFO L276 IsEmpty]: Start isEmpty. Operand 1370 states and 1774 transitions. [2018-11-18 16:13:08,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-11-18 16:13:08,915 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:08,915 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:08,915 INFO L423 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:08,915 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:08,915 INFO L82 PathProgramCache]: Analyzing trace with hash -990208569, now seen corresponding path program 1 times [2018-11-18 16:13:08,915 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:08,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:08,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:08,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:08,916 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:08,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:09,000 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 16:13:09,000 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:09,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:09,000 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:09,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:09,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:09,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:09,001 INFO L87 Difference]: Start difference. First operand 1370 states and 1774 transitions. Second operand 9 states. [2018-11-18 16:13:10,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:10,039 INFO L93 Difference]: Finished difference Result 2840 states and 3648 transitions. [2018-11-18 16:13:10,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 16:13:10,039 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 132 [2018-11-18 16:13:10,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:10,046 INFO L225 Difference]: With dead ends: 2840 [2018-11-18 16:13:10,046 INFO L226 Difference]: Without dead ends: 1779 [2018-11-18 16:13:10,050 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2018-11-18 16:13:10,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1779 states. [2018-11-18 16:13:10,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1779 to 1490. [2018-11-18 16:13:10,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1490 states. [2018-11-18 16:13:10,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1490 states to 1490 states and 1901 transitions. [2018-11-18 16:13:10,135 INFO L78 Accepts]: Start accepts. Automaton has 1490 states and 1901 transitions. Word has length 132 [2018-11-18 16:13:10,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:10,135 INFO L480 AbstractCegarLoop]: Abstraction has 1490 states and 1901 transitions. [2018-11-18 16:13:10,135 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:10,136 INFO L276 IsEmpty]: Start isEmpty. Operand 1490 states and 1901 transitions. [2018-11-18 16:13:10,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-11-18 16:13:10,138 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:10,138 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:10,138 INFO L423 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:10,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:10,154 INFO L82 PathProgramCache]: Analyzing trace with hash 838564926, now seen corresponding path program 1 times [2018-11-18 16:13:10,154 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:10,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:10,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:10,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:10,155 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:10,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:10,256 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:13:10,257 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:10,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 16:13:10,257 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:10,257 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 16:13:10,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 16:13:10,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:13:10,258 INFO L87 Difference]: Start difference. First operand 1490 states and 1901 transitions. Second operand 10 states. [2018-11-18 16:13:11,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:11,928 INFO L93 Difference]: Finished difference Result 3905 states and 4959 transitions. [2018-11-18 16:13:11,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 16:13:11,929 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 136 [2018-11-18 16:13:11,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:11,936 INFO L225 Difference]: With dead ends: 3905 [2018-11-18 16:13:11,936 INFO L226 Difference]: Without dead ends: 2766 [2018-11-18 16:13:11,939 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:13:11,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2766 states. [2018-11-18 16:13:12,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2766 to 1915. [2018-11-18 16:13:12,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1915 states. [2018-11-18 16:13:12,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1915 states to 1915 states and 2431 transitions. [2018-11-18 16:13:12,043 INFO L78 Accepts]: Start accepts. Automaton has 1915 states and 2431 transitions. Word has length 136 [2018-11-18 16:13:12,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:12,043 INFO L480 AbstractCegarLoop]: Abstraction has 1915 states and 2431 transitions. [2018-11-18 16:13:12,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 16:13:12,043 INFO L276 IsEmpty]: Start isEmpty. Operand 1915 states and 2431 transitions. [2018-11-18 16:13:12,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-11-18 16:13:12,045 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:12,045 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:12,045 INFO L423 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:12,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:12,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1728742159, now seen corresponding path program 1 times [2018-11-18 16:13:12,045 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:12,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:12,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:12,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:12,046 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:12,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:12,129 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:12,129 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:12,129 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 16:13:12,129 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:12,130 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 16:13:12,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 16:13:12,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:12,131 INFO L87 Difference]: Start difference. First operand 1915 states and 2431 transitions. Second operand 5 states. [2018-11-18 16:13:12,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:12,506 INFO L93 Difference]: Finished difference Result 6612 states and 8504 transitions. [2018-11-18 16:13:12,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 16:13:12,507 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 137 [2018-11-18 16:13:12,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:12,517 INFO L225 Difference]: With dead ends: 6612 [2018-11-18 16:13:12,517 INFO L226 Difference]: Without dead ends: 4993 [2018-11-18 16:13:12,520 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:12,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4993 states. [2018-11-18 16:13:12,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4993 to 4533. [2018-11-18 16:13:12,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4533 states. [2018-11-18 16:13:12,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4533 states to 4533 states and 5773 transitions. [2018-11-18 16:13:12,661 INFO L78 Accepts]: Start accepts. Automaton has 4533 states and 5773 transitions. Word has length 137 [2018-11-18 16:13:12,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:12,661 INFO L480 AbstractCegarLoop]: Abstraction has 4533 states and 5773 transitions. [2018-11-18 16:13:12,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 16:13:12,662 INFO L276 IsEmpty]: Start isEmpty. Operand 4533 states and 5773 transitions. [2018-11-18 16:13:12,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 16:13:12,664 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:12,664 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:12,664 INFO L423 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:12,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:12,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1465793902, now seen corresponding path program 1 times [2018-11-18 16:13:12,664 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:12,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:12,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:12,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:12,666 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:12,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:12,775 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:13:12,775 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:12,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:12,775 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:12,776 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:12,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:12,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:12,776 INFO L87 Difference]: Start difference. First operand 4533 states and 5773 transitions. Second operand 9 states. [2018-11-18 16:13:13,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:13,553 INFO L93 Difference]: Finished difference Result 8708 states and 11362 transitions. [2018-11-18 16:13:13,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:13:13,554 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 138 [2018-11-18 16:13:13,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:13,571 INFO L225 Difference]: With dead ends: 8708 [2018-11-18 16:13:13,571 INFO L226 Difference]: Without dead ends: 4646 [2018-11-18 16:13:13,581 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2018-11-18 16:13:13,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4646 states. [2018-11-18 16:13:13,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4646 to 3711. [2018-11-18 16:13:13,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3711 states. [2018-11-18 16:13:13,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 4772 transitions. [2018-11-18 16:13:13,861 INFO L78 Accepts]: Start accepts. Automaton has 3711 states and 4772 transitions. Word has length 138 [2018-11-18 16:13:13,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:13,862 INFO L480 AbstractCegarLoop]: Abstraction has 3711 states and 4772 transitions. [2018-11-18 16:13:13,862 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:13,862 INFO L276 IsEmpty]: Start isEmpty. Operand 3711 states and 4772 transitions. [2018-11-18 16:13:13,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-11-18 16:13:13,864 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:13,864 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:13,864 INFO L423 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:13,864 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:13,864 INFO L82 PathProgramCache]: Analyzing trace with hash 27860389, now seen corresponding path program 1 times [2018-11-18 16:13:13,864 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:13,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:13,865 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:13,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:13,866 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:13,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:13,972 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:13:13,972 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:13,972 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:13,972 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:13,973 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:13,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:13,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:13,973 INFO L87 Difference]: Start difference. First operand 3711 states and 4772 transitions. Second operand 9 states. [2018-11-18 16:13:14,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:14,873 INFO L93 Difference]: Finished difference Result 7533 states and 9840 transitions. [2018-11-18 16:13:14,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-18 16:13:14,874 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 139 [2018-11-18 16:13:14,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:14,883 INFO L225 Difference]: With dead ends: 7533 [2018-11-18 16:13:14,883 INFO L226 Difference]: Without dead ends: 4191 [2018-11-18 16:13:14,890 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:13:14,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4191 states. [2018-11-18 16:13:15,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4191 to 3409. [2018-11-18 16:13:15,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3409 states. [2018-11-18 16:13:15,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3409 states to 3409 states and 4326 transitions. [2018-11-18 16:13:15,112 INFO L78 Accepts]: Start accepts. Automaton has 3409 states and 4326 transitions. Word has length 139 [2018-11-18 16:13:15,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:15,112 INFO L480 AbstractCegarLoop]: Abstraction has 3409 states and 4326 transitions. [2018-11-18 16:13:15,112 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:15,112 INFO L276 IsEmpty]: Start isEmpty. Operand 3409 states and 4326 transitions. [2018-11-18 16:13:15,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-11-18 16:13:15,114 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:15,114 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:15,114 INFO L423 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:15,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:15,115 INFO L82 PathProgramCache]: Analyzing trace with hash 1059610412, now seen corresponding path program 1 times [2018-11-18 16:13:15,115 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:15,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:15,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:15,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:15,116 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:15,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:15,187 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:15,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:15,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 16:13:15,188 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:15,188 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 16:13:15,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 16:13:15,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:15,189 INFO L87 Difference]: Start difference. First operand 3409 states and 4326 transitions. Second operand 5 states. [2018-11-18 16:13:15,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:15,729 INFO L93 Difference]: Finished difference Result 10492 states and 13445 transitions. [2018-11-18 16:13:15,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 16:13:15,729 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 140 [2018-11-18 16:13:15,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:15,748 INFO L225 Difference]: With dead ends: 10492 [2018-11-18 16:13:15,748 INFO L226 Difference]: Without dead ends: 7597 [2018-11-18 16:13:15,754 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:15,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7597 states. [2018-11-18 16:13:16,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7597 to 5227. [2018-11-18 16:13:16,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5227 states. [2018-11-18 16:13:16,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5227 states to 5227 states and 6625 transitions. [2018-11-18 16:13:16,092 INFO L78 Accepts]: Start accepts. Automaton has 5227 states and 6625 transitions. Word has length 140 [2018-11-18 16:13:16,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:16,092 INFO L480 AbstractCegarLoop]: Abstraction has 5227 states and 6625 transitions. [2018-11-18 16:13:16,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 16:13:16,092 INFO L276 IsEmpty]: Start isEmpty. Operand 5227 states and 6625 transitions. [2018-11-18 16:13:16,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-11-18 16:13:16,095 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:16,095 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:16,095 INFO L423 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:16,095 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:16,095 INFO L82 PathProgramCache]: Analyzing trace with hash -781837605, now seen corresponding path program 1 times [2018-11-18 16:13:16,095 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:16,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:16,096 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:16,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:16,097 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:16,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:16,150 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:16,150 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:16,150 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 16:13:16,150 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:16,152 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 16:13:16,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 16:13:16,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:16,152 INFO L87 Difference]: Start difference. First operand 5227 states and 6625 transitions. Second operand 5 states. [2018-11-18 16:13:16,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:16,624 INFO L93 Difference]: Finished difference Result 12132 states and 15447 transitions. [2018-11-18 16:13:16,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 16:13:16,624 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 140 [2018-11-18 16:13:16,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:16,641 INFO L225 Difference]: With dead ends: 12132 [2018-11-18 16:13:16,641 INFO L226 Difference]: Without dead ends: 7556 [2018-11-18 16:13:16,650 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:16,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7556 states. [2018-11-18 16:13:17,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7556 to 7003. [2018-11-18 16:13:17,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7003 states. [2018-11-18 16:13:17,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7003 states to 7003 states and 8829 transitions. [2018-11-18 16:13:17,040 INFO L78 Accepts]: Start accepts. Automaton has 7003 states and 8829 transitions. Word has length 140 [2018-11-18 16:13:17,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:17,040 INFO L480 AbstractCegarLoop]: Abstraction has 7003 states and 8829 transitions. [2018-11-18 16:13:17,040 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 16:13:17,041 INFO L276 IsEmpty]: Start isEmpty. Operand 7003 states and 8829 transitions. [2018-11-18 16:13:17,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-18 16:13:17,043 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:17,043 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:17,043 INFO L423 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:17,043 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:17,043 INFO L82 PathProgramCache]: Analyzing trace with hash 1489873698, now seen corresponding path program 1 times [2018-11-18 16:13:17,043 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:17,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:17,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:17,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:17,045 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:17,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:17,094 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:17,095 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:17,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:17,095 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:17,095 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:17,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:17,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:17,097 INFO L87 Difference]: Start difference. First operand 7003 states and 8829 transitions. Second operand 3 states. [2018-11-18 16:13:17,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:17,417 INFO L93 Difference]: Finished difference Result 13489 states and 17087 transitions. [2018-11-18 16:13:17,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:17,418 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 141 [2018-11-18 16:13:17,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:17,432 INFO L225 Difference]: With dead ends: 13489 [2018-11-18 16:13:17,432 INFO L226 Difference]: Without dead ends: 7072 [2018-11-18 16:13:17,440 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:17,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7072 states. [2018-11-18 16:13:17,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7072 to 7009. [2018-11-18 16:13:17,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7009 states. [2018-11-18 16:13:17,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7009 states to 7009 states and 8835 transitions. [2018-11-18 16:13:17,740 INFO L78 Accepts]: Start accepts. Automaton has 7009 states and 8835 transitions. Word has length 141 [2018-11-18 16:13:17,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:17,740 INFO L480 AbstractCegarLoop]: Abstraction has 7009 states and 8835 transitions. [2018-11-18 16:13:17,740 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:17,740 INFO L276 IsEmpty]: Start isEmpty. Operand 7009 states and 8835 transitions. [2018-11-18 16:13:17,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-11-18 16:13:17,741 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:17,742 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:17,742 INFO L423 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:17,742 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:17,742 INFO L82 PathProgramCache]: Analyzing trace with hash 2033737143, now seen corresponding path program 1 times [2018-11-18 16:13:17,742 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:17,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:17,743 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:17,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:17,743 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:17,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:17,945 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:17,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:17,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-18 16:13:17,945 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:17,946 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:13:17,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:13:17,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:13:17,946 INFO L87 Difference]: Start difference. First operand 7009 states and 8835 transitions. Second operand 11 states. [2018-11-18 16:13:19,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:19,167 INFO L93 Difference]: Finished difference Result 13422 states and 16987 transitions. [2018-11-18 16:13:19,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-18 16:13:19,168 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 142 [2018-11-18 16:13:19,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:19,180 INFO L225 Difference]: With dead ends: 13422 [2018-11-18 16:13:19,180 INFO L226 Difference]: Without dead ends: 6569 [2018-11-18 16:13:19,191 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=460, Unknown=0, NotChecked=0, Total=600 [2018-11-18 16:13:19,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6569 states. [2018-11-18 16:13:19,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6569 to 6517. [2018-11-18 16:13:19,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6517 states. [2018-11-18 16:13:19,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6517 states to 6517 states and 8244 transitions. [2018-11-18 16:13:19,521 INFO L78 Accepts]: Start accepts. Automaton has 6517 states and 8244 transitions. Word has length 142 [2018-11-18 16:13:19,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:19,521 INFO L480 AbstractCegarLoop]: Abstraction has 6517 states and 8244 transitions. [2018-11-18 16:13:19,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:13:19,521 INFO L276 IsEmpty]: Start isEmpty. Operand 6517 states and 8244 transitions. [2018-11-18 16:13:19,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-11-18 16:13:19,522 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:19,522 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:19,522 INFO L423 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:19,522 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:19,522 INFO L82 PathProgramCache]: Analyzing trace with hash -1088644977, now seen corresponding path program 1 times [2018-11-18 16:13:19,522 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:19,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:19,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:19,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:19,523 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:19,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:19,706 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:19,706 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:19,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 16:13:19,706 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:19,708 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 16:13:19,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 16:13:19,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:13:19,709 INFO L87 Difference]: Start difference. First operand 6517 states and 8244 transitions. Second operand 10 states. [2018-11-18 16:13:21,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:21,096 INFO L93 Difference]: Finished difference Result 12883 states and 16344 transitions. [2018-11-18 16:13:21,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 16:13:21,096 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 143 [2018-11-18 16:13:21,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:21,106 INFO L225 Difference]: With dead ends: 12883 [2018-11-18 16:13:21,106 INFO L226 Difference]: Without dead ends: 6635 [2018-11-18 16:13:21,114 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=113, Invalid=349, Unknown=0, NotChecked=0, Total=462 [2018-11-18 16:13:21,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6635 states. [2018-11-18 16:13:21,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6635 to 6307. [2018-11-18 16:13:21,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6307 states. [2018-11-18 16:13:21,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6307 states to 6307 states and 7966 transitions. [2018-11-18 16:13:21,404 INFO L78 Accepts]: Start accepts. Automaton has 6307 states and 7966 transitions. Word has length 143 [2018-11-18 16:13:21,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:21,404 INFO L480 AbstractCegarLoop]: Abstraction has 6307 states and 7966 transitions. [2018-11-18 16:13:21,404 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 16:13:21,404 INFO L276 IsEmpty]: Start isEmpty. Operand 6307 states and 7966 transitions. [2018-11-18 16:13:21,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-11-18 16:13:21,405 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:21,405 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:21,406 INFO L423 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:21,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:21,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1254880251, now seen corresponding path program 1 times [2018-11-18 16:13:21,406 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:21,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:21,407 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:21,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:21,407 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:21,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:21,465 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:21,465 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:21,465 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:21,465 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:13:21,465 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:21,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:21,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:21,466 INFO L87 Difference]: Start difference. First operand 6307 states and 7966 transitions. Second operand 4 states. [2018-11-18 16:13:21,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:21,806 INFO L93 Difference]: Finished difference Result 12306 states and 15606 transitions. [2018-11-18 16:13:21,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:21,806 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 144 [2018-11-18 16:13:21,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:21,815 INFO L225 Difference]: With dead ends: 12306 [2018-11-18 16:13:21,815 INFO L226 Difference]: Without dead ends: 6268 [2018-11-18 16:13:21,821 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:21,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6268 states. [2018-11-18 16:13:22,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6268 to 6174. [2018-11-18 16:13:22,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6174 states. [2018-11-18 16:13:22,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6174 states to 6174 states and 7809 transitions. [2018-11-18 16:13:22,083 INFO L78 Accepts]: Start accepts. Automaton has 6174 states and 7809 transitions. Word has length 144 [2018-11-18 16:13:22,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:22,083 INFO L480 AbstractCegarLoop]: Abstraction has 6174 states and 7809 transitions. [2018-11-18 16:13:22,083 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:22,083 INFO L276 IsEmpty]: Start isEmpty. Operand 6174 states and 7809 transitions. [2018-11-18 16:13:22,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-11-18 16:13:22,087 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:22,087 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:22,087 INFO L423 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:22,087 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:22,087 INFO L82 PathProgramCache]: Analyzing trace with hash -2114805970, now seen corresponding path program 1 times [2018-11-18 16:13:22,088 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:13:22,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:22,088 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:22,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:13:22,089 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:13:22,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:22,349 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2018-11-18 16:13:22,349 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:13:22,349 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 16:13:22,350 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 237 with the following transitions: [2018-11-18 16:13:22,351 INFO L202 CegarAbsIntRunner]: [0], [4], [7], [15], [16], [42], [45], [82], [86], [89], [93], [96], [100], [101], [105], [109], [113], [117], [121], [125], [129], [133], [137], [141], [145], [149], [150], [160], [161], [162], [166], [171], [173], [178], [180], [185], [187], [247], [248], [250], [254], [260], [265], [267], [269], [275], [278], [287], [289], [356], [359], [362], [364], [367], [369], [372], [390], [393], [424], [427], [468], [470], [471], [472], [476], [480], [483], [487], [488], [489], [490], [491], [492], [493], [497], [500], [508], [509], [512], [514], [517], [519], [520], [522], [525], [527], [532], [543], [555], [558], [559], [563], [566], [574], [578], [581], [582], [586], [589], [593], [594], [595], [596], [597], [600], [601], [604], [605], [608], [609], [610], [611], [612], [613], [614], [615], [616], [617], [618], [619], [620], [621], [622], [623], [632], [633], [634], [635], [636], [637], [640], [641], [648], [649], [664], [665], [668], [669], [670], [671], [674], [675], [676] [2018-11-18 16:13:22,385 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 16:13:22,385 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 16:13:22,487 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.handleInfeasibleCase(BaseRefinementStrategy.java:296) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:206) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:209) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:165) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.AssumptionBuilder.constructBoogieAssumeStatement(AssumptionBuilder.java:75) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.getCachedCodeBlock(TermConjunctEvaluator.java:273) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.applyPost(TermConjunctEvaluator.java:296) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.lambda$4(TermConjunctEvaluator.java:178) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.computeFixpoint(TermConjunctEvaluator.java:198) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.lambda$1(TermConjunctEvaluator.java:150) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.computePost(TermConjunctEvaluator.java:93) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormanCachedPostOperation.applyPost(PoormanCachedPostOperation.java:308) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.applyPost(PoormansAbstractPostOperator.java:217) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:119) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.lambda$17(DisjunctiveAbstractState.java:340) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.mapCollection(DisjunctiveAbstractState.java:536) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.apply(DisjunctiveAbstractState.java:340) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateAbstractPost(FixpointEngine.java:249) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateFixpoint(FixpointEngine.java:134) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.run(FixpointEngine.java:105) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.tool.AbstractInterpreter.runWithoutTimeoutAndResults(AbstractInterpreter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarAbsIntRunner.generateFixpoints(CegarAbsIntRunner.java:217) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.constructInterpolantGenerator(BaseTaipanRefinementStrategy.java:379) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getInterpolantGenerator(BaseTaipanRefinementStrategy.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:380) ... 20 more [2018-11-18 16:13:22,490 INFO L168 Benchmark]: Toolchain (without parser) took 21521.70 ms. Allocated memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: 1.1 GB). Free memory was 961.3 MB in the beginning and 1.9 GB in the end (delta: -914.1 MB). Peak memory consumption was 218.4 MB. Max. memory is 11.5 GB. [2018-11-18 16:13:22,492 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:13:22,492 INFO L168 Benchmark]: CACSL2BoogieTranslator took 313.70 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 165.2 MB). Free memory was 955.9 MB in the beginning and 1.2 GB in the end (delta: -200.3 MB). Peak memory consumption was 26.4 MB. Max. memory is 11.5 GB. [2018-11-18 16:13:22,492 INFO L168 Benchmark]: Boogie Procedure Inliner took 17.77 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:13:22,493 INFO L168 Benchmark]: Boogie Preprocessor took 33.77 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2018-11-18 16:13:22,493 INFO L168 Benchmark]: RCFGBuilder took 570.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 67.3 MB). Peak memory consumption was 67.3 MB. Max. memory is 11.5 GB. [2018-11-18 16:13:22,493 INFO L168 Benchmark]: TraceAbstraction took 20583.71 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 967.3 MB). Free memory was 1.1 GB in the beginning and 1.9 GB in the end (delta: -793.1 MB). Peak memory consumption was 174.3 MB. Max. memory is 11.5 GB. [2018-11-18 16:13:22,496 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 313.70 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 165.2 MB). Free memory was 955.9 MB in the beginning and 1.2 GB in the end (delta: -200.3 MB). Peak memory consumption was 26.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 17.77 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.77 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 570.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 67.3 MB). Peak memory consumption was 67.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20583.71 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 967.3 MB). Free memory was 1.1 GB in the beginning and 1.9 GB in the end (delta: -793.1 MB). Peak memory consumption was 174.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)) de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)): de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-5842f4b [2018-11-18 16:13:23,939 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 16:13:23,941 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 16:13:23,950 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 16:13:23,950 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 16:13:23,950 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 16:13:23,951 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 16:13:23,953 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 16:13:23,954 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 16:13:23,954 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 16:13:23,955 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 16:13:23,955 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 16:13:23,956 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 16:13:23,957 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 16:13:23,957 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 16:13:23,958 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 16:13:23,958 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 16:13:23,960 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 16:13:23,962 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 16:13:23,963 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 16:13:23,964 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 16:13:23,965 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 16:13:23,966 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 16:13:23,967 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 16:13:23,967 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 16:13:23,967 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 16:13:23,968 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 16:13:23,969 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 16:13:23,969 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 16:13:23,970 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 16:13:23,970 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 16:13:23,970 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 16:13:23,971 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 16:13:23,971 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 16:13:23,973 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 16:13:23,973 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 16:13:23,973 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-11-18 16:13:23,983 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 16:13:23,984 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 16:13:23,984 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 16:13:23,984 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 16:13:23,985 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 16:13:23,985 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 16:13:23,985 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 16:13:23,985 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 16:13:23,985 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 16:13:23,985 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 16:13:23,986 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 16:13:23,986 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 16:13:23,986 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 16:13:23,986 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 16:13:23,986 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 16:13:23,986 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 16:13:23,987 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 16:13:23,987 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 16:13:23,987 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 16:13:23,987 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 16:13:23,988 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 16:13:23,988 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 16:13:23,989 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 16:13:23,989 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 16:13:23,989 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 16:13:23,989 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 16:13:23,989 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 16:13:23,989 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:13:23,989 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 16:13:23,990 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 75de94c5f78b6878c3cbd09fac99b01e14f23f29 [2018-11-18 16:13:24,020 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 16:13:24,029 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 16:13:24,031 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 16:13:24,033 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 16:13:24,033 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 16:13:24,033 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2018-11-18 16:13:24,076 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/3d997db35/7c1e82e3d0bb48b8828b7308c1c5816d/FLAG9a4cc0364 [2018-11-18 16:13:24,492 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 16:13:24,493 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2018-11-18 16:13:24,498 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/3d997db35/7c1e82e3d0bb48b8828b7308c1c5816d/FLAG9a4cc0364 [2018-11-18 16:13:24,506 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/data/3d997db35/7c1e82e3d0bb48b8828b7308c1c5816d [2018-11-18 16:13:24,508 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 16:13:24,509 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 16:13:24,510 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 16:13:24,510 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 16:13:24,512 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 16:13:24,512 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,514 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@159f0eb8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24, skipping insertion in model container [2018-11-18 16:13:24,514 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,520 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 16:13:24,548 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 16:13:24,742 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:13:24,751 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 16:13:24,806 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:13:24,821 INFO L195 MainTranslator]: Completed translation [2018-11-18 16:13:24,822 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24 WrapperNode [2018-11-18 16:13:24,822 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 16:13:24,822 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 16:13:24,823 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 16:13:24,823 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 16:13:24,829 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,840 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,890 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 16:13:24,890 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 16:13:24,890 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 16:13:24,891 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 16:13:24,897 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,898 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,901 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,901 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,913 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,920 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,922 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... [2018-11-18 16:13:24,924 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 16:13:24,924 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 16:13:24,925 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 16:13:24,925 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 16:13:24,925 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:13:24,957 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-11-18 16:13:24,957 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-11-18 16:13:24,957 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-11-18 16:13:24,957 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-11-18 16:13:24,957 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-11-18 16:13:24,958 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-11-18 16:13:24,958 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 16:13:24,958 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 16:13:24,958 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-11-18 16:13:24,958 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-11-18 16:13:24,958 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-11-18 16:13:24,958 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-11-18 16:13:24,959 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-11-18 16:13:24,959 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-11-18 16:13:24,959 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-11-18 16:13:24,959 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-11-18 16:13:24,959 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-11-18 16:13:24,959 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-11-18 16:13:24,959 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-11-18 16:13:24,960 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-11-18 16:13:24,960 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 16:13:24,961 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 16:13:24,961 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-11-18 16:13:24,961 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-11-18 16:13:24,961 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-11-18 16:13:24,961 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-11-18 16:13:25,477 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 16:13:25,478 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:13:25 BoogieIcfgContainer [2018-11-18 16:13:25,478 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 16:13:25,479 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 16:13:25,479 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 16:13:25,482 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 16:13:25,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 04:13:24" (1/3) ... [2018-11-18 16:13:25,483 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21efb96d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:13:25, skipping insertion in model container [2018-11-18 16:13:25,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:13:24" (2/3) ... [2018-11-18 16:13:25,483 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21efb96d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:13:25, skipping insertion in model container [2018-11-18 16:13:25,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:13:25" (3/3) ... [2018-11-18 16:13:25,484 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2018-11-18 16:13:25,491 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 16:13:25,495 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 16:13:25,504 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 16:13:25,527 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 16:13:25,528 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 16:13:25,528 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 16:13:25,528 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 16:13:25,528 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 16:13:25,528 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 16:13:25,528 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 16:13:25,528 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 16:13:25,529 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 16:13:25,547 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states. [2018-11-18 16:13:25,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 16:13:25,554 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:25,555 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:25,556 INFO L423 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:25,559 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:25,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1435764648, now seen corresponding path program 1 times [2018-11-18 16:13:25,563 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:25,563 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:25,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:25,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:25,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:25,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:25,745 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:25,748 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:25,748 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-18 16:13:25,751 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-18 16:13:25,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-18 16:13:25,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 16:13:25,760 INFO L87 Difference]: Start difference. First operand 238 states. Second operand 2 states. [2018-11-18 16:13:25,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:25,803 INFO L93 Difference]: Finished difference Result 454 states and 697 transitions. [2018-11-18 16:13:25,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-18 16:13:25,804 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 66 [2018-11-18 16:13:25,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:25,814 INFO L225 Difference]: With dead ends: 454 [2018-11-18 16:13:25,814 INFO L226 Difference]: Without dead ends: 233 [2018-11-18 16:13:25,819 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 16:13:25,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-11-18 16:13:25,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 233. [2018-11-18 16:13:25,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-11-18 16:13:25,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 337 transitions. [2018-11-18 16:13:25,866 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 337 transitions. Word has length 66 [2018-11-18 16:13:25,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:25,867 INFO L480 AbstractCegarLoop]: Abstraction has 233 states and 337 transitions. [2018-11-18 16:13:25,867 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-18 16:13:25,867 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 337 transitions. [2018-11-18 16:13:25,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 16:13:25,870 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:25,870 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:25,870 INFO L423 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:25,871 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:25,871 INFO L82 PathProgramCache]: Analyzing trace with hash 375663578, now seen corresponding path program 1 times [2018-11-18 16:13:25,871 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:25,871 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:25,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:25,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:25,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:26,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:26,005 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:26,006 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:26,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:26,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:26,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:26,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:26,008 INFO L87 Difference]: Start difference. First operand 233 states and 337 transitions. Second operand 4 states. [2018-11-18 16:13:26,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:26,056 INFO L93 Difference]: Finished difference Result 447 states and 643 transitions. [2018-11-18 16:13:26,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:26,057 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-11-18 16:13:26,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:26,059 INFO L225 Difference]: With dead ends: 447 [2018-11-18 16:13:26,059 INFO L226 Difference]: Without dead ends: 233 [2018-11-18 16:13:26,061 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:26,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-11-18 16:13:26,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 233. [2018-11-18 16:13:26,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-11-18 16:13:26,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 325 transitions. [2018-11-18 16:13:26,078 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 325 transitions. Word has length 66 [2018-11-18 16:13:26,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:26,078 INFO L480 AbstractCegarLoop]: Abstraction has 233 states and 325 transitions. [2018-11-18 16:13:26,079 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:26,079 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 325 transitions. [2018-11-18 16:13:26,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 16:13:26,081 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:26,081 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:26,082 INFO L423 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:26,082 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:26,082 INFO L82 PathProgramCache]: Analyzing trace with hash -967657536, now seen corresponding path program 1 times [2018-11-18 16:13:26,082 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:26,083 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:26,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:26,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:26,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:26,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:26,224 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:26,225 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:26,226 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:26,226 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:26,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:26,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:26,227 INFO L87 Difference]: Start difference. First operand 233 states and 325 transitions. Second operand 4 states. [2018-11-18 16:13:26,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:26,319 INFO L93 Difference]: Finished difference Result 450 states and 641 transitions. [2018-11-18 16:13:26,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:26,320 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-18 16:13:26,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:26,323 INFO L225 Difference]: With dead ends: 450 [2018-11-18 16:13:26,323 INFO L226 Difference]: Without dead ends: 239 [2018-11-18 16:13:26,324 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:26,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-11-18 16:13:26,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 237. [2018-11-18 16:13:26,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-11-18 16:13:26,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 328 transitions. [2018-11-18 16:13:26,340 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 328 transitions. Word has length 77 [2018-11-18 16:13:26,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:26,341 INFO L480 AbstractCegarLoop]: Abstraction has 237 states and 328 transitions. [2018-11-18 16:13:26,341 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:26,341 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 328 transitions. [2018-11-18 16:13:26,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-18 16:13:26,342 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:26,342 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:26,343 INFO L423 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:26,343 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:26,343 INFO L82 PathProgramCache]: Analyzing trace with hash 476890672, now seen corresponding path program 1 times [2018-11-18 16:13:26,345 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:26,345 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:26,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:26,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:26,490 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:26,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:26,512 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:26,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:26,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:26,513 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:26,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:26,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:26,514 INFO L87 Difference]: Start difference. First operand 237 states and 328 transitions. Second operand 3 states. [2018-11-18 16:13:26,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:26,557 INFO L93 Difference]: Finished difference Result 641 states and 906 transitions. [2018-11-18 16:13:26,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:26,557 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 95 [2018-11-18 16:13:26,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:26,561 INFO L225 Difference]: With dead ends: 641 [2018-11-18 16:13:26,561 INFO L226 Difference]: Without dead ends: 426 [2018-11-18 16:13:26,562 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:26,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-11-18 16:13:26,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 407. [2018-11-18 16:13:26,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 407 states. [2018-11-18 16:13:26,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 576 transitions. [2018-11-18 16:13:26,588 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 576 transitions. Word has length 95 [2018-11-18 16:13:26,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:26,588 INFO L480 AbstractCegarLoop]: Abstraction has 407 states and 576 transitions. [2018-11-18 16:13:26,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:26,588 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 576 transitions. [2018-11-18 16:13:26,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 16:13:26,590 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:26,590 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:26,590 INFO L423 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:26,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:26,591 INFO L82 PathProgramCache]: Analyzing trace with hash 622643113, now seen corresponding path program 1 times [2018-11-18 16:13:26,592 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:26,592 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:26,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:26,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:26,761 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:26,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:26,785 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:26,786 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:26,786 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:26,786 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:26,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:26,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:26,787 INFO L87 Difference]: Start difference. First operand 407 states and 576 transitions. Second operand 3 states. [2018-11-18 16:13:26,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:26,838 INFO L93 Difference]: Finished difference Result 1122 states and 1615 transitions. [2018-11-18 16:13:26,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:26,838 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-11-18 16:13:26,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:26,842 INFO L225 Difference]: With dead ends: 1122 [2018-11-18 16:13:26,842 INFO L226 Difference]: Without dead ends: 737 [2018-11-18 16:13:26,843 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:26,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 737 states. [2018-11-18 16:13:26,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 737 to 731. [2018-11-18 16:13:26,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2018-11-18 16:13:26,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1049 transitions. [2018-11-18 16:13:26,882 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1049 transitions. Word has length 96 [2018-11-18 16:13:26,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:26,882 INFO L480 AbstractCegarLoop]: Abstraction has 731 states and 1049 transitions. [2018-11-18 16:13:26,882 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:26,882 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1049 transitions. [2018-11-18 16:13:26,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 16:13:26,883 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:26,884 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:26,884 INFO L423 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:26,884 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:26,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1323707691, now seen corresponding path program 1 times [2018-11-18 16:13:26,884 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:26,884 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:26,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:26,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:26,983 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:26,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:26,992 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:26,994 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:26,994 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:26,994 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:26,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:26,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:26,994 INFO L87 Difference]: Start difference. First operand 731 states and 1049 transitions. Second operand 3 states. [2018-11-18 16:13:27,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:27,019 INFO L93 Difference]: Finished difference Result 1331 states and 1908 transitions. [2018-11-18 16:13:27,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:27,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-11-18 16:13:27,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:27,023 INFO L225 Difference]: With dead ends: 1331 [2018-11-18 16:13:27,023 INFO L226 Difference]: Without dead ends: 588 [2018-11-18 16:13:27,026 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:27,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 588 states. [2018-11-18 16:13:27,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 588 to 588. [2018-11-18 16:13:27,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 588 states. [2018-11-18 16:13:27,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 588 states to 588 states and 834 transitions. [2018-11-18 16:13:27,043 INFO L78 Accepts]: Start accepts. Automaton has 588 states and 834 transitions. Word has length 96 [2018-11-18 16:13:27,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:27,044 INFO L480 AbstractCegarLoop]: Abstraction has 588 states and 834 transitions. [2018-11-18 16:13:27,044 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:27,044 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 834 transitions. [2018-11-18 16:13:27,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 16:13:27,045 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:27,045 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:27,045 INFO L423 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:27,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:27,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1724920787, now seen corresponding path program 1 times [2018-11-18 16:13:27,046 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:27,046 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:27,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:27,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:27,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:27,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:27,184 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:27,186 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:27,186 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:27,186 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:27,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:27,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:27,187 INFO L87 Difference]: Start difference. First operand 588 states and 834 transitions. Second operand 4 states. [2018-11-18 16:13:27,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:27,215 INFO L93 Difference]: Finished difference Result 1175 states and 1677 transitions. [2018-11-18 16:13:27,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:27,216 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2018-11-18 16:13:27,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:27,218 INFO L225 Difference]: With dead ends: 1175 [2018-11-18 16:13:27,218 INFO L226 Difference]: Without dead ends: 609 [2018-11-18 16:13:27,219 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:27,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2018-11-18 16:13:27,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 603. [2018-11-18 16:13:27,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 603 states. [2018-11-18 16:13:27,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 603 states to 603 states and 846 transitions. [2018-11-18 16:13:27,234 INFO L78 Accepts]: Start accepts. Automaton has 603 states and 846 transitions. Word has length 96 [2018-11-18 16:13:27,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:27,234 INFO L480 AbstractCegarLoop]: Abstraction has 603 states and 846 transitions. [2018-11-18 16:13:27,234 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:27,234 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 846 transitions. [2018-11-18 16:13:27,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-18 16:13:27,236 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:27,236 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:27,236 INFO L423 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:27,236 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:27,237 INFO L82 PathProgramCache]: Analyzing trace with hash -61690157, now seen corresponding path program 1 times [2018-11-18 16:13:27,237 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:27,237 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:27,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:27,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:27,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:27,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:27,362 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:27,364 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:27,364 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:27,364 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:27,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:27,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:27,365 INFO L87 Difference]: Start difference. First operand 603 states and 846 transitions. Second operand 4 states. [2018-11-18 16:13:27,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:27,412 INFO L93 Difference]: Finished difference Result 1205 states and 1716 transitions. [2018-11-18 16:13:27,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:27,412 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 104 [2018-11-18 16:13:27,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:27,415 INFO L225 Difference]: With dead ends: 1205 [2018-11-18 16:13:27,415 INFO L226 Difference]: Without dead ends: 624 [2018-11-18 16:13:27,416 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:27,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 624 states. [2018-11-18 16:13:27,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 624 to 618. [2018-11-18 16:13:27,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 618 states. [2018-11-18 16:13:27,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 618 states to 618 states and 858 transitions. [2018-11-18 16:13:27,433 INFO L78 Accepts]: Start accepts. Automaton has 618 states and 858 transitions. Word has length 104 [2018-11-18 16:13:27,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:27,433 INFO L480 AbstractCegarLoop]: Abstraction has 618 states and 858 transitions. [2018-11-18 16:13:27,433 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:27,433 INFO L276 IsEmpty]: Start isEmpty. Operand 618 states and 858 transitions. [2018-11-18 16:13:27,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-18 16:13:27,434 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:27,434 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:27,435 INFO L423 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:27,435 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:27,435 INFO L82 PathProgramCache]: Analyzing trace with hash 2107848829, now seen corresponding path program 1 times [2018-11-18 16:13:27,435 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:27,435 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:27,448 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:27,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:27,539 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:27,552 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:27,552 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:27,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:27,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:27,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:27,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:27,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:27,554 INFO L87 Difference]: Start difference. First operand 618 states and 858 transitions. Second operand 4 states. [2018-11-18 16:13:27,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:27,594 INFO L93 Difference]: Finished difference Result 1232 states and 1722 transitions. [2018-11-18 16:13:27,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:27,594 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-11-18 16:13:27,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:27,596 INFO L225 Difference]: With dead ends: 1232 [2018-11-18 16:13:27,596 INFO L226 Difference]: Without dead ends: 636 [2018-11-18 16:13:27,598 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:27,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 636 states. [2018-11-18 16:13:27,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 636 to 630. [2018-11-18 16:13:27,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 630 states. [2018-11-18 16:13:27,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 630 states to 630 states and 867 transitions. [2018-11-18 16:13:27,615 INFO L78 Accepts]: Start accepts. Automaton has 630 states and 867 transitions. Word has length 112 [2018-11-18 16:13:27,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:27,615 INFO L480 AbstractCegarLoop]: Abstraction has 630 states and 867 transitions. [2018-11-18 16:13:27,615 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:27,615 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 867 transitions. [2018-11-18 16:13:27,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-18 16:13:27,616 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:27,616 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:27,616 INFO L423 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:27,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:27,617 INFO L82 PathProgramCache]: Analyzing trace with hash -64686997, now seen corresponding path program 1 times [2018-11-18 16:13:27,617 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:27,617 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:27,630 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:27,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:27,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:27,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:27,735 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:27,736 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:27,736 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:27,737 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:27,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:27,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:27,737 INFO L87 Difference]: Start difference. First operand 630 states and 867 transitions. Second operand 4 states. [2018-11-18 16:13:27,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:27,779 INFO L93 Difference]: Finished difference Result 1259 states and 1758 transitions. [2018-11-18 16:13:27,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:27,780 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-11-18 16:13:27,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:27,782 INFO L225 Difference]: With dead ends: 1259 [2018-11-18 16:13:27,782 INFO L226 Difference]: Without dead ends: 651 [2018-11-18 16:13:27,783 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:27,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states. [2018-11-18 16:13:27,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 645. [2018-11-18 16:13:27,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 645 states. [2018-11-18 16:13:27,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 645 states to 645 states and 879 transitions. [2018-11-18 16:13:27,802 INFO L78 Accepts]: Start accepts. Automaton has 645 states and 879 transitions. Word has length 112 [2018-11-18 16:13:27,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:27,802 INFO L480 AbstractCegarLoop]: Abstraction has 645 states and 879 transitions. [2018-11-18 16:13:27,802 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:27,803 INFO L276 IsEmpty]: Start isEmpty. Operand 645 states and 879 transitions. [2018-11-18 16:13:27,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-18 16:13:27,804 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:27,804 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:27,805 INFO L423 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:27,805 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:27,805 INFO L82 PathProgramCache]: Analyzing trace with hash 1700912189, now seen corresponding path program 1 times [2018-11-18 16:13:27,805 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:27,806 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:27,830 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:27,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:27,931 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:27,982 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:27,982 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:27,983 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:27,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:27,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:27,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:27,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:27,985 INFO L87 Difference]: Start difference. First operand 645 states and 879 transitions. Second operand 9 states. [2018-11-18 16:13:28,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:28,447 INFO L93 Difference]: Finished difference Result 1677 states and 2296 transitions. [2018-11-18 16:13:28,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 16:13:28,448 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 120 [2018-11-18 16:13:28,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:28,453 INFO L225 Difference]: With dead ends: 1677 [2018-11-18 16:13:28,453 INFO L226 Difference]: Without dead ends: 1054 [2018-11-18 16:13:28,455 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:13:28,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1054 states. [2018-11-18 16:13:28,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1054 to 924. [2018-11-18 16:13:28,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 924 states. [2018-11-18 16:13:28,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 924 states to 924 states and 1249 transitions. [2018-11-18 16:13:28,491 INFO L78 Accepts]: Start accepts. Automaton has 924 states and 1249 transitions. Word has length 120 [2018-11-18 16:13:28,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:28,491 INFO L480 AbstractCegarLoop]: Abstraction has 924 states and 1249 transitions. [2018-11-18 16:13:28,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:28,492 INFO L276 IsEmpty]: Start isEmpty. Operand 924 states and 1249 transitions. [2018-11-18 16:13:28,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-18 16:13:28,494 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:28,494 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:28,494 INFO L423 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:28,494 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:28,495 INFO L82 PathProgramCache]: Analyzing trace with hash 1217268880, now seen corresponding path program 1 times [2018-11-18 16:13:28,495 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:28,495 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:28,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:28,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:28,724 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:28,788 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:28,789 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:28,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:28,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:28,792 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:28,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:28,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:28,792 INFO L87 Difference]: Start difference. First operand 924 states and 1249 transitions. Second operand 7 states. [2018-11-18 16:13:29,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:29,818 INFO L93 Difference]: Finished difference Result 1989 states and 2697 transitions. [2018-11-18 16:13:29,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:13:29,819 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 125 [2018-11-18 16:13:29,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:29,825 INFO L225 Difference]: With dead ends: 1989 [2018-11-18 16:13:29,825 INFO L226 Difference]: Without dead ends: 1087 [2018-11-18 16:13:29,828 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:13:29,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1087 states. [2018-11-18 16:13:29,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1087 to 1078. [2018-11-18 16:13:29,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1078 states. [2018-11-18 16:13:29,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1078 states to 1078 states and 1446 transitions. [2018-11-18 16:13:29,876 INFO L78 Accepts]: Start accepts. Automaton has 1078 states and 1446 transitions. Word has length 125 [2018-11-18 16:13:29,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:29,876 INFO L480 AbstractCegarLoop]: Abstraction has 1078 states and 1446 transitions. [2018-11-18 16:13:29,876 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:29,876 INFO L276 IsEmpty]: Start isEmpty. Operand 1078 states and 1446 transitions. [2018-11-18 16:13:29,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-18 16:13:29,878 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:29,878 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:29,878 INFO L423 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:29,879 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:29,879 INFO L82 PathProgramCache]: Analyzing trace with hash 1661260584, now seen corresponding path program 1 times [2018-11-18 16:13:29,879 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:29,879 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:29,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:30,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:30,091 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:30,158 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:30,158 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:30,161 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:30,161 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:30,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:30,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:30,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:30,162 INFO L87 Difference]: Start difference. First operand 1078 states and 1446 transitions. Second operand 7 states. [2018-11-18 16:13:30,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:30,953 INFO L93 Difference]: Finished difference Result 2019 states and 2727 transitions. [2018-11-18 16:13:30,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:13:30,954 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-11-18 16:13:30,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:30,956 INFO L225 Difference]: With dead ends: 2019 [2018-11-18 16:13:30,957 INFO L226 Difference]: Without dead ends: 1108 [2018-11-18 16:13:30,958 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:13:30,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states. [2018-11-18 16:13:30,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1081. [2018-11-18 16:13:30,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1081 states. [2018-11-18 16:13:30,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1081 states to 1081 states and 1443 transitions. [2018-11-18 16:13:30,988 INFO L78 Accepts]: Start accepts. Automaton has 1081 states and 1443 transitions. Word has length 126 [2018-11-18 16:13:30,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:30,989 INFO L480 AbstractCegarLoop]: Abstraction has 1081 states and 1443 transitions. [2018-11-18 16:13:30,989 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:30,989 INFO L276 IsEmpty]: Start isEmpty. Operand 1081 states and 1443 transitions. [2018-11-18 16:13:30,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 16:13:30,990 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:30,990 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:30,991 INFO L423 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:30,991 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:30,991 INFO L82 PathProgramCache]: Analyzing trace with hash 1163958686, now seen corresponding path program 1 times [2018-11-18 16:13:30,991 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:30,991 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:31,006 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:31,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:31,151 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:31,216 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:31,216 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:31,218 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:31,218 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:31,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:31,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:31,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:31,219 INFO L87 Difference]: Start difference. First operand 1081 states and 1443 transitions. Second operand 9 states. [2018-11-18 16:13:32,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:32,537 INFO L93 Difference]: Finished difference Result 2711 states and 3664 transitions. [2018-11-18 16:13:32,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:13:32,537 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 129 [2018-11-18 16:13:32,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:32,543 INFO L225 Difference]: With dead ends: 2711 [2018-11-18 16:13:32,543 INFO L226 Difference]: Without dead ends: 1809 [2018-11-18 16:13:32,545 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:13:32,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1809 states. [2018-11-18 16:13:32,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1809 to 1781. [2018-11-18 16:13:32,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1781 states. [2018-11-18 16:13:32,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1781 states to 1781 states and 2395 transitions. [2018-11-18 16:13:32,625 INFO L78 Accepts]: Start accepts. Automaton has 1781 states and 2395 transitions. Word has length 129 [2018-11-18 16:13:32,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:32,626 INFO L480 AbstractCegarLoop]: Abstraction has 1781 states and 2395 transitions. [2018-11-18 16:13:32,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:32,626 INFO L276 IsEmpty]: Start isEmpty. Operand 1781 states and 2395 transitions. [2018-11-18 16:13:32,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-18 16:13:32,627 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:32,628 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:32,628 INFO L423 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:32,628 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:32,628 INFO L82 PathProgramCache]: Analyzing trace with hash -667141080, now seen corresponding path program 1 times [2018-11-18 16:13:32,628 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:32,629 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:32,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:32,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:32,764 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:32,786 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:13:32,787 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:32,788 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:32,788 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:32,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:32,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:32,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:32,789 INFO L87 Difference]: Start difference. First operand 1781 states and 2395 transitions. Second operand 4 states. [2018-11-18 16:13:32,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:32,844 INFO L93 Difference]: Finished difference Result 3352 states and 4544 transitions. [2018-11-18 16:13:32,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:32,844 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 131 [2018-11-18 16:13:32,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:32,848 INFO L225 Difference]: With dead ends: 3352 [2018-11-18 16:13:32,849 INFO L226 Difference]: Without dead ends: 1829 [2018-11-18 16:13:32,851 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 129 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:32,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1829 states. [2018-11-18 16:13:32,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1829 to 1805. [2018-11-18 16:13:32,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1805 states. [2018-11-18 16:13:32,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1805 states to 1805 states and 2413 transitions. [2018-11-18 16:13:32,896 INFO L78 Accepts]: Start accepts. Automaton has 1805 states and 2413 transitions. Word has length 131 [2018-11-18 16:13:32,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:32,896 INFO L480 AbstractCegarLoop]: Abstraction has 1805 states and 2413 transitions. [2018-11-18 16:13:32,896 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:32,896 INFO L276 IsEmpty]: Start isEmpty. Operand 1805 states and 2413 transitions. [2018-11-18 16:13:32,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-11-18 16:13:32,898 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:32,898 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:32,898 INFO L423 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:32,898 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:32,899 INFO L82 PathProgramCache]: Analyzing trace with hash -838920466, now seen corresponding path program 1 times [2018-11-18 16:13:32,899 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:32,899 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:32,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:33,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:33,058 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:33,143 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 16:13:33,143 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:33,145 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:33,145 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:33,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:33,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:33,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:33,146 INFO L87 Difference]: Start difference. First operand 1805 states and 2413 transitions. Second operand 9 states. [2018-11-18 16:13:34,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:34,447 INFO L93 Difference]: Finished difference Result 3380 states and 4528 transitions. [2018-11-18 16:13:34,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:13:34,447 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 137 [2018-11-18 16:13:34,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:34,453 INFO L225 Difference]: With dead ends: 3380 [2018-11-18 16:13:34,453 INFO L226 Difference]: Without dead ends: 1857 [2018-11-18 16:13:34,456 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 130 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:13:34,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1857 states. [2018-11-18 16:13:34,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1857 to 1805. [2018-11-18 16:13:34,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1805 states. [2018-11-18 16:13:34,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1805 states to 1805 states and 2410 transitions. [2018-11-18 16:13:34,531 INFO L78 Accepts]: Start accepts. Automaton has 1805 states and 2410 transitions. Word has length 137 [2018-11-18 16:13:34,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:34,531 INFO L480 AbstractCegarLoop]: Abstraction has 1805 states and 2410 transitions. [2018-11-18 16:13:34,532 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:34,532 INFO L276 IsEmpty]: Start isEmpty. Operand 1805 states and 2410 transitions. [2018-11-18 16:13:34,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 16:13:34,533 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:34,534 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:34,534 INFO L423 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:34,534 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:34,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1582289515, now seen corresponding path program 1 times [2018-11-18 16:13:34,534 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:34,534 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:34,553 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:34,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:34,662 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:34,779 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:13:34,779 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:34,781 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:34,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:13:34,782 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:13:34,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:13:34,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:13:34,782 INFO L87 Difference]: Start difference. First operand 1805 states and 2410 transitions. Second operand 8 states. [2018-11-18 16:13:35,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:35,469 INFO L93 Difference]: Finished difference Result 3113 states and 4217 transitions. [2018-11-18 16:13:35,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:35,470 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 138 [2018-11-18 16:13:35,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:35,477 INFO L225 Difference]: With dead ends: 3113 [2018-11-18 16:13:35,478 INFO L226 Difference]: Without dead ends: 1990 [2018-11-18 16:13:35,480 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:13:35,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1990 states. [2018-11-18 16:13:35,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1990 to 1798. [2018-11-18 16:13:35,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1798 states. [2018-11-18 16:13:35,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1798 states to 1798 states and 2389 transitions. [2018-11-18 16:13:35,562 INFO L78 Accepts]: Start accepts. Automaton has 1798 states and 2389 transitions. Word has length 138 [2018-11-18 16:13:35,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:35,562 INFO L480 AbstractCegarLoop]: Abstraction has 1798 states and 2389 transitions. [2018-11-18 16:13:35,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:13:35,562 INFO L276 IsEmpty]: Start isEmpty. Operand 1798 states and 2389 transitions. [2018-11-18 16:13:35,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-11-18 16:13:35,564 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:35,564 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:35,564 INFO L423 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:35,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:35,565 INFO L82 PathProgramCache]: Analyzing trace with hash 1145583905, now seen corresponding path program 1 times [2018-11-18 16:13:35,565 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:35,565 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:35,587 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:35,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:35,698 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:35,723 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:35,723 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:35,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:35,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 16:13:35,725 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 16:13:35,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 16:13:35,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:35,726 INFO L87 Difference]: Start difference. First operand 1798 states and 2389 transitions. Second operand 3 states. [2018-11-18 16:13:35,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:35,773 INFO L93 Difference]: Finished difference Result 2956 states and 3945 transitions. [2018-11-18 16:13:35,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 16:13:35,774 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 140 [2018-11-18 16:13:35,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:35,778 INFO L225 Difference]: With dead ends: 2956 [2018-11-18 16:13:35,778 INFO L226 Difference]: Without dead ends: 1817 [2018-11-18 16:13:35,779 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 16:13:35,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1817 states. [2018-11-18 16:13:35,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1817 to 1798. [2018-11-18 16:13:35,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1798 states. [2018-11-18 16:13:35,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1798 states to 1798 states and 2383 transitions. [2018-11-18 16:13:35,829 INFO L78 Accepts]: Start accepts. Automaton has 1798 states and 2383 transitions. Word has length 140 [2018-11-18 16:13:35,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:35,829 INFO L480 AbstractCegarLoop]: Abstraction has 1798 states and 2383 transitions. [2018-11-18 16:13:35,829 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 16:13:35,829 INFO L276 IsEmpty]: Start isEmpty. Operand 1798 states and 2383 transitions. [2018-11-18 16:13:35,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-11-18 16:13:35,830 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:35,830 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:35,831 INFO L423 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:35,831 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:35,831 INFO L82 PathProgramCache]: Analyzing trace with hash -617057282, now seen corresponding path program 1 times [2018-11-18 16:13:35,831 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:35,831 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:35,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:35,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:35,934 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:35,984 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:13:35,984 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:35,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:35,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:13:35,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:13:35,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:13:35,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:13:35,986 INFO L87 Difference]: Start difference. First operand 1798 states and 2383 transitions. Second operand 8 states. [2018-11-18 16:13:36,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:36,427 INFO L93 Difference]: Finished difference Result 3013 states and 4029 transitions. [2018-11-18 16:13:36,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:36,428 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 139 [2018-11-18 16:13:36,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:36,433 INFO L225 Difference]: With dead ends: 3013 [2018-11-18 16:13:36,433 INFO L226 Difference]: Without dead ends: 1890 [2018-11-18 16:13:36,436 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:13:36,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1890 states. [2018-11-18 16:13:36,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1890 to 1774. [2018-11-18 16:13:36,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1774 states. [2018-11-18 16:13:36,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1774 states to 1774 states and 2337 transitions. [2018-11-18 16:13:36,520 INFO L78 Accepts]: Start accepts. Automaton has 1774 states and 2337 transitions. Word has length 139 [2018-11-18 16:13:36,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:36,520 INFO L480 AbstractCegarLoop]: Abstraction has 1774 states and 2337 transitions. [2018-11-18 16:13:36,520 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:13:36,521 INFO L276 IsEmpty]: Start isEmpty. Operand 1774 states and 2337 transitions. [2018-11-18 16:13:36,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-11-18 16:13:36,522 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:36,522 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:36,522 INFO L423 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:36,523 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:36,523 INFO L82 PathProgramCache]: Analyzing trace with hash -324090876, now seen corresponding path program 1 times [2018-11-18 16:13:36,523 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:36,523 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:36,544 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:36,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:36,738 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:36,773 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:36,773 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:36,775 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:36,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:36,776 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:36,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:36,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:36,776 INFO L87 Difference]: Start difference. First operand 1774 states and 2337 transitions. Second operand 4 states. [2018-11-18 16:13:36,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:36,935 INFO L93 Difference]: Finished difference Result 4385 states and 5827 transitions. [2018-11-18 16:13:36,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:36,936 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 139 [2018-11-18 16:13:36,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:36,942 INFO L225 Difference]: With dead ends: 4385 [2018-11-18 16:13:36,942 INFO L226 Difference]: Without dead ends: 3265 [2018-11-18 16:13:36,944 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 135 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:36,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3265 states. [2018-11-18 16:13:37,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3265 to 3039. [2018-11-18 16:13:37,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3039 states. [2018-11-18 16:13:37,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3039 states to 3039 states and 4012 transitions. [2018-11-18 16:13:37,032 INFO L78 Accepts]: Start accepts. Automaton has 3039 states and 4012 transitions. Word has length 139 [2018-11-18 16:13:37,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:37,033 INFO L480 AbstractCegarLoop]: Abstraction has 3039 states and 4012 transitions. [2018-11-18 16:13:37,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:37,033 INFO L276 IsEmpty]: Start isEmpty. Operand 3039 states and 4012 transitions. [2018-11-18 16:13:37,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-18 16:13:37,034 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:37,034 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:37,035 INFO L423 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:37,035 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:37,035 INFO L82 PathProgramCache]: Analyzing trace with hash -1354697382, now seen corresponding path program 1 times [2018-11-18 16:13:37,035 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:37,035 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:37,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:37,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:37,205 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:37,224 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:37,225 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:37,226 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:37,227 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:37,227 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:37,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:37,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:37,227 INFO L87 Difference]: Start difference. First operand 3039 states and 4012 transitions. Second operand 4 states. [2018-11-18 16:13:37,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:37,456 INFO L93 Difference]: Finished difference Result 7034 states and 9368 transitions. [2018-11-18 16:13:37,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:37,456 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 141 [2018-11-18 16:13:37,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:37,470 INFO L225 Difference]: With dead ends: 7034 [2018-11-18 16:13:37,471 INFO L226 Difference]: Without dead ends: 4913 [2018-11-18 16:13:37,475 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 137 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:37,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4913 states. [2018-11-18 16:13:37,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4913 to 4720. [2018-11-18 16:13:37,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4720 states. [2018-11-18 16:13:37,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4720 states to 4720 states and 6240 transitions. [2018-11-18 16:13:37,695 INFO L78 Accepts]: Start accepts. Automaton has 4720 states and 6240 transitions. Word has length 141 [2018-11-18 16:13:37,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:37,695 INFO L480 AbstractCegarLoop]: Abstraction has 4720 states and 6240 transitions. [2018-11-18 16:13:37,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:37,696 INFO L276 IsEmpty]: Start isEmpty. Operand 4720 states and 6240 transitions. [2018-11-18 16:13:37,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-18 16:13:37,698 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:37,699 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:37,699 INFO L423 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:37,699 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:37,699 INFO L82 PathProgramCache]: Analyzing trace with hash 1063728159, now seen corresponding path program 1 times [2018-11-18 16:13:37,699 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:37,699 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:37,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:37,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:37,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:37,931 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:37,932 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:37,933 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:37,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:37,934 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:37,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:37,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:37,934 INFO L87 Difference]: Start difference. First operand 4720 states and 6240 transitions. Second operand 7 states. [2018-11-18 16:13:38,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:38,729 INFO L93 Difference]: Finished difference Result 7941 states and 10512 transitions. [2018-11-18 16:13:38,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:13:38,730 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 141 [2018-11-18 16:13:38,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:38,740 INFO L225 Difference]: With dead ends: 7941 [2018-11-18 16:13:38,740 INFO L226 Difference]: Without dead ends: 3945 [2018-11-18 16:13:38,745 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:13:38,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3945 states. [2018-11-18 16:13:38,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3945 to 3929. [2018-11-18 16:13:38,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3929 states. [2018-11-18 16:13:38,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3929 states to 3929 states and 5176 transitions. [2018-11-18 16:13:38,893 INFO L78 Accepts]: Start accepts. Automaton has 3929 states and 5176 transitions. Word has length 141 [2018-11-18 16:13:38,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:38,893 INFO L480 AbstractCegarLoop]: Abstraction has 3929 states and 5176 transitions. [2018-11-18 16:13:38,893 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:38,893 INFO L276 IsEmpty]: Start isEmpty. Operand 3929 states and 5176 transitions. [2018-11-18 16:13:38,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-11-18 16:13:38,895 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:38,895 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:38,895 INFO L423 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:38,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:38,895 INFO L82 PathProgramCache]: Analyzing trace with hash 2031650687, now seen corresponding path program 1 times [2018-11-18 16:13:38,896 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:38,896 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:38,919 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:39,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:39,009 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:39,052 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:13:39,052 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:39,053 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:39,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:13:39,054 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:13:39,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:13:39,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:13:39,054 INFO L87 Difference]: Start difference. First operand 3929 states and 5176 transitions. Second operand 8 states. [2018-11-18 16:13:39,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:39,574 INFO L93 Difference]: Finished difference Result 7540 states and 10142 transitions. [2018-11-18 16:13:39,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:39,574 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 144 [2018-11-18 16:13:39,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:39,585 INFO L225 Difference]: With dead ends: 7540 [2018-11-18 16:13:39,585 INFO L226 Difference]: Without dead ends: 4527 [2018-11-18 16:13:39,591 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:13:39,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4527 states. [2018-11-18 16:13:39,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4527 to 4054. [2018-11-18 16:13:39,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4054 states. [2018-11-18 16:13:39,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4054 states to 4054 states and 5368 transitions. [2018-11-18 16:13:39,768 INFO L78 Accepts]: Start accepts. Automaton has 4054 states and 5368 transitions. Word has length 144 [2018-11-18 16:13:39,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:39,768 INFO L480 AbstractCegarLoop]: Abstraction has 4054 states and 5368 transitions. [2018-11-18 16:13:39,768 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:13:39,769 INFO L276 IsEmpty]: Start isEmpty. Operand 4054 states and 5368 transitions. [2018-11-18 16:13:39,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-11-18 16:13:39,770 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:39,770 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:39,770 INFO L423 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:39,771 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:39,771 INFO L82 PathProgramCache]: Analyzing trace with hash -747082030, now seen corresponding path program 1 times [2018-11-18 16:13:39,771 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:39,771 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:39,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:39,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:39,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:39,933 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 16:13:39,933 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:13:40,081 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-18 16:13:40,083 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:13:40,083 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:13:40,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:40,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:40,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:40,244 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:13:40,244 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:40,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:13:40,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [9, 9] total 18 [2018-11-18 16:13:40,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 16:13:40,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 16:13:40,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2018-11-18 16:13:40,260 INFO L87 Difference]: Start difference. First operand 4054 states and 5368 transitions. Second operand 18 states. [2018-11-18 16:13:42,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:42,810 INFO L93 Difference]: Finished difference Result 8765 states and 11751 transitions. [2018-11-18 16:13:42,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-18 16:13:42,810 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 145 [2018-11-18 16:13:42,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:42,819 INFO L225 Difference]: With dead ends: 8765 [2018-11-18 16:13:42,819 INFO L226 Difference]: Without dead ends: 5549 [2018-11-18 16:13:42,823 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 456 GetRequests, 422 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=198, Invalid=992, Unknown=0, NotChecked=0, Total=1190 [2018-11-18 16:13:42,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5549 states. [2018-11-18 16:13:42,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5549 to 3594. [2018-11-18 16:13:42,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3594 states. [2018-11-18 16:13:42,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3594 states to 3594 states and 4614 transitions. [2018-11-18 16:13:42,977 INFO L78 Accepts]: Start accepts. Automaton has 3594 states and 4614 transitions. Word has length 145 [2018-11-18 16:13:42,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:42,977 INFO L480 AbstractCegarLoop]: Abstraction has 3594 states and 4614 transitions. [2018-11-18 16:13:42,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 16:13:42,977 INFO L276 IsEmpty]: Start isEmpty. Operand 3594 states and 4614 transitions. [2018-11-18 16:13:42,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-11-18 16:13:42,979 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:42,979 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:42,979 INFO L423 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:42,979 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:42,979 INFO L82 PathProgramCache]: Analyzing trace with hash 768862295, now seen corresponding path program 1 times [2018-11-18 16:13:42,979 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:42,980 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:42,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:43,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:43,143 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:43,177 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 16:13:43,177 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:43,178 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:43,179 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:13:43,179 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:13:43,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:13:43,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:13:43,179 INFO L87 Difference]: Start difference. First operand 3594 states and 4614 transitions. Second operand 7 states. [2018-11-18 16:13:43,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:43,906 INFO L93 Difference]: Finished difference Result 6792 states and 8750 transitions. [2018-11-18 16:13:43,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:13:43,906 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 144 [2018-11-18 16:13:43,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:43,912 INFO L225 Difference]: With dead ends: 6792 [2018-11-18 16:13:43,912 INFO L226 Difference]: Without dead ends: 3440 [2018-11-18 16:13:43,916 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 140 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:13:43,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3440 states. [2018-11-18 16:13:44,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3440 to 3317. [2018-11-18 16:13:44,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3317 states. [2018-11-18 16:13:44,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3317 states to 3317 states and 4254 transitions. [2018-11-18 16:13:44,038 INFO L78 Accepts]: Start accepts. Automaton has 3317 states and 4254 transitions. Word has length 144 [2018-11-18 16:13:44,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:44,038 INFO L480 AbstractCegarLoop]: Abstraction has 3317 states and 4254 transitions. [2018-11-18 16:13:44,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:13:44,039 INFO L276 IsEmpty]: Start isEmpty. Operand 3317 states and 4254 transitions. [2018-11-18 16:13:44,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-11-18 16:13:44,039 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:44,039 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:44,040 INFO L423 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:44,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:44,040 INFO L82 PathProgramCache]: Analyzing trace with hash -190465877, now seen corresponding path program 1 times [2018-11-18 16:13:44,040 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:44,040 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:44,052 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:44,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:44,130 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:44,144 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:13:44,144 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:44,145 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:44,145 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:44,146 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:44,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:44,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:44,146 INFO L87 Difference]: Start difference. First operand 3317 states and 4254 transitions. Second operand 4 states. [2018-11-18 16:13:44,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:44,318 INFO L93 Difference]: Finished difference Result 6486 states and 8419 transitions. [2018-11-18 16:13:44,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:13:44,318 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 148 [2018-11-18 16:13:44,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:44,325 INFO L225 Difference]: With dead ends: 6486 [2018-11-18 16:13:44,325 INFO L226 Difference]: Without dead ends: 3509 [2018-11-18 16:13:44,331 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:44,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3509 states. [2018-11-18 16:13:44,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3509 to 3461. [2018-11-18 16:13:44,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3461 states. [2018-11-18 16:13:44,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3461 states to 3461 states and 4374 transitions. [2018-11-18 16:13:44,547 INFO L78 Accepts]: Start accepts. Automaton has 3461 states and 4374 transitions. Word has length 148 [2018-11-18 16:13:44,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:44,547 INFO L480 AbstractCegarLoop]: Abstraction has 3461 states and 4374 transitions. [2018-11-18 16:13:44,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:44,547 INFO L276 IsEmpty]: Start isEmpty. Operand 3461 states and 4374 transitions. [2018-11-18 16:13:44,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-11-18 16:13:44,548 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:44,548 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:44,548 INFO L423 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:44,548 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:44,549 INFO L82 PathProgramCache]: Analyzing trace with hash 2092577430, now seen corresponding path program 1 times [2018-11-18 16:13:44,549 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:44,549 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:44,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:44,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:44,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:44,805 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:13:44,805 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:44,807 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:44,807 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:44,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:44,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:44,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:44,807 INFO L87 Difference]: Start difference. First operand 3461 states and 4374 transitions. Second operand 9 states. [2018-11-18 16:13:45,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:45,922 INFO L93 Difference]: Finished difference Result 6583 states and 8375 transitions. [2018-11-18 16:13:45,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:13:45,923 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 153 [2018-11-18 16:13:45,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:45,930 INFO L225 Difference]: With dead ends: 6583 [2018-11-18 16:13:45,930 INFO L226 Difference]: Without dead ends: 3425 [2018-11-18 16:13:45,935 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:13:45,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3425 states. [2018-11-18 16:13:46,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3425 to 3346. [2018-11-18 16:13:46,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3346 states. [2018-11-18 16:13:46,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3346 states to 3346 states and 4224 transitions. [2018-11-18 16:13:46,148 INFO L78 Accepts]: Start accepts. Automaton has 3346 states and 4224 transitions. Word has length 153 [2018-11-18 16:13:46,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:46,149 INFO L480 AbstractCegarLoop]: Abstraction has 3346 states and 4224 transitions. [2018-11-18 16:13:46,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:46,149 INFO L276 IsEmpty]: Start isEmpty. Operand 3346 states and 4224 transitions. [2018-11-18 16:13:46,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-11-18 16:13:46,150 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:46,150 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:46,150 INFO L423 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:46,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:46,150 INFO L82 PathProgramCache]: Analyzing trace with hash 606301574, now seen corresponding path program 1 times [2018-11-18 16:13:46,151 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:46,151 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:46,163 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:46,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:46,324 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:46,355 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:13:46,355 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:46,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:46,357 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:13:46,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:13:46,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:13:46,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:13:46,357 INFO L87 Difference]: Start difference. First operand 3346 states and 4224 transitions. Second operand 8 states. [2018-11-18 16:13:46,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:46,513 INFO L93 Difference]: Finished difference Result 3605 states and 4596 transitions. [2018-11-18 16:13:46,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:13:46,513 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 156 [2018-11-18 16:13:46,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:46,518 INFO L225 Difference]: With dead ends: 3605 [2018-11-18 16:13:46,518 INFO L226 Difference]: Without dead ends: 3603 [2018-11-18 16:13:46,519 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:13:46,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3603 states. [2018-11-18 16:13:46,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3603 to 3365. [2018-11-18 16:13:46,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3365 states. [2018-11-18 16:13:46,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3365 states to 3365 states and 4249 transitions. [2018-11-18 16:13:46,738 INFO L78 Accepts]: Start accepts. Automaton has 3365 states and 4249 transitions. Word has length 156 [2018-11-18 16:13:46,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:46,738 INFO L480 AbstractCegarLoop]: Abstraction has 3365 states and 4249 transitions. [2018-11-18 16:13:46,738 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:13:46,738 INFO L276 IsEmpty]: Start isEmpty. Operand 3365 states and 4249 transitions. [2018-11-18 16:13:46,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-11-18 16:13:46,739 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:46,740 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:46,741 INFO L423 AbstractCegarLoop]: === Iteration 29 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:46,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:46,741 INFO L82 PathProgramCache]: Analyzing trace with hash 1306070575, now seen corresponding path program 1 times [2018-11-18 16:13:46,741 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:46,741 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:46,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:46,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:46,851 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:46,881 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:13:46,881 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:46,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:46,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:46,883 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:46,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:46,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:46,884 INFO L87 Difference]: Start difference. First operand 3365 states and 4249 transitions. Second operand 4 states. [2018-11-18 16:13:47,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:47,023 INFO L93 Difference]: Finished difference Result 6339 states and 8111 transitions. [2018-11-18 16:13:47,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:47,023 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 157 [2018-11-18 16:13:47,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:47,027 INFO L225 Difference]: With dead ends: 6339 [2018-11-18 16:13:47,027 INFO L226 Difference]: Without dead ends: 3319 [2018-11-18 16:13:47,031 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:47,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3319 states. [2018-11-18 16:13:47,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3319 to 3319. [2018-11-18 16:13:47,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3319 states. [2018-11-18 16:13:47,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3319 states to 3319 states and 4111 transitions. [2018-11-18 16:13:47,151 INFO L78 Accepts]: Start accepts. Automaton has 3319 states and 4111 transitions. Word has length 157 [2018-11-18 16:13:47,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:47,152 INFO L480 AbstractCegarLoop]: Abstraction has 3319 states and 4111 transitions. [2018-11-18 16:13:47,152 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:47,152 INFO L276 IsEmpty]: Start isEmpty. Operand 3319 states and 4111 transitions. [2018-11-18 16:13:47,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-11-18 16:13:47,153 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:47,153 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:47,153 INFO L423 AbstractCegarLoop]: === Iteration 30 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:47,153 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:47,153 INFO L82 PathProgramCache]: Analyzing trace with hash 295451023, now seen corresponding path program 1 times [2018-11-18 16:13:47,154 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:47,154 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:47,166 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:47,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:47,245 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:47,260 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-18 16:13:47,261 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:47,262 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:47,262 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:47,262 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:47,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:47,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:47,263 INFO L87 Difference]: Start difference. First operand 3319 states and 4111 transitions. Second operand 4 states. [2018-11-18 16:13:47,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:47,436 INFO L93 Difference]: Finished difference Result 6220 states and 7805 transitions. [2018-11-18 16:13:47,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:47,436 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 166 [2018-11-18 16:13:47,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:47,444 INFO L225 Difference]: With dead ends: 6220 [2018-11-18 16:13:47,444 INFO L226 Difference]: Without dead ends: 3273 [2018-11-18 16:13:47,450 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:47,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3273 states. [2018-11-18 16:13:47,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3273 to 3273. [2018-11-18 16:13:47,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3273 states. [2018-11-18 16:13:47,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3273 states to 3273 states and 3973 transitions. [2018-11-18 16:13:47,651 INFO L78 Accepts]: Start accepts. Automaton has 3273 states and 3973 transitions. Word has length 166 [2018-11-18 16:13:47,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:47,651 INFO L480 AbstractCegarLoop]: Abstraction has 3273 states and 3973 transitions. [2018-11-18 16:13:47,651 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:47,651 INFO L276 IsEmpty]: Start isEmpty. Operand 3273 states and 3973 transitions. [2018-11-18 16:13:47,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-11-18 16:13:47,652 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:47,652 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:47,652 INFO L423 AbstractCegarLoop]: === Iteration 31 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:47,652 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:47,652 INFO L82 PathProgramCache]: Analyzing trace with hash -84182098, now seen corresponding path program 1 times [2018-11-18 16:13:47,652 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:47,652 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:47,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:47,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:47,745 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:47,759 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2018-11-18 16:13:47,759 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:47,760 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:47,760 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:47,760 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:47,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:47,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:47,761 INFO L87 Difference]: Start difference. First operand 3273 states and 3973 transitions. Second operand 4 states. [2018-11-18 16:13:47,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:47,892 INFO L93 Difference]: Finished difference Result 6080 states and 7478 transitions. [2018-11-18 16:13:47,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:47,892 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 182 [2018-11-18 16:13:47,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:47,896 INFO L225 Difference]: With dead ends: 6080 [2018-11-18 16:13:47,896 INFO L226 Difference]: Without dead ends: 3227 [2018-11-18 16:13:47,899 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 180 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:47,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3227 states. [2018-11-18 16:13:48,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3227 to 3227. [2018-11-18 16:13:48,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3227 states. [2018-11-18 16:13:48,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3227 states to 3227 states and 3835 transitions. [2018-11-18 16:13:48,014 INFO L78 Accepts]: Start accepts. Automaton has 3227 states and 3835 transitions. Word has length 182 [2018-11-18 16:13:48,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:48,014 INFO L480 AbstractCegarLoop]: Abstraction has 3227 states and 3835 transitions. [2018-11-18 16:13:48,014 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:48,014 INFO L276 IsEmpty]: Start isEmpty. Operand 3227 states and 3835 transitions. [2018-11-18 16:13:48,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 16:13:48,015 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:48,015 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:48,015 INFO L423 AbstractCegarLoop]: === Iteration 32 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:48,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:48,015 INFO L82 PathProgramCache]: Analyzing trace with hash 779509054, now seen corresponding path program 1 times [2018-11-18 16:13:48,016 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:48,016 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:48,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:48,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:48,131 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:48,157 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2018-11-18 16:13:48,158 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:48,159 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:48,159 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 16:13:48,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 16:13:48,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 16:13:48,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 16:13:48,160 INFO L87 Difference]: Start difference. First operand 3227 states and 3835 transitions. Second operand 4 states. [2018-11-18 16:13:48,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:48,296 INFO L93 Difference]: Finished difference Result 5920 states and 7111 transitions. [2018-11-18 16:13:48,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 16:13:48,296 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 198 [2018-11-18 16:13:48,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:48,301 INFO L225 Difference]: With dead ends: 5920 [2018-11-18 16:13:48,301 INFO L226 Difference]: Without dead ends: 3158 [2018-11-18 16:13:48,303 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 196 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:13:48,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3158 states. [2018-11-18 16:13:48,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3158 to 2968. [2018-11-18 16:13:48,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2968 states. [2018-11-18 16:13:48,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2968 states to 2968 states and 3444 transitions. [2018-11-18 16:13:48,420 INFO L78 Accepts]: Start accepts. Automaton has 2968 states and 3444 transitions. Word has length 198 [2018-11-18 16:13:48,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:48,420 INFO L480 AbstractCegarLoop]: Abstraction has 2968 states and 3444 transitions. [2018-11-18 16:13:48,420 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 16:13:48,420 INFO L276 IsEmpty]: Start isEmpty. Operand 2968 states and 3444 transitions. [2018-11-18 16:13:48,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2018-11-18 16:13:48,421 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:48,422 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:48,422 INFO L423 AbstractCegarLoop]: === Iteration 33 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:48,422 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:48,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1246735711, now seen corresponding path program 1 times [2018-11-18 16:13:48,422 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:48,422 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:48,434 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:48,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:48,582 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:48,657 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-11-18 16:13:48,657 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:13:48,659 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:13:48,659 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:13:48,659 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:13:48,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:13:48,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:13:48,659 INFO L87 Difference]: Start difference. First operand 2968 states and 3444 transitions. Second operand 9 states. [2018-11-18 16:13:49,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:49,764 INFO L93 Difference]: Finished difference Result 5782 states and 6809 transitions. [2018-11-18 16:13:49,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:13:49,764 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 210 [2018-11-18 16:13:49,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:49,769 INFO L225 Difference]: With dead ends: 5782 [2018-11-18 16:13:49,770 INFO L226 Difference]: Without dead ends: 3144 [2018-11-18 16:13:49,772 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 204 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:13:49,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3144 states. [2018-11-18 16:13:49,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3144 to 2827. [2018-11-18 16:13:49,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2827 states. [2018-11-18 16:13:49,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2827 states to 2827 states and 3282 transitions. [2018-11-18 16:13:49,897 INFO L78 Accepts]: Start accepts. Automaton has 2827 states and 3282 transitions. Word has length 210 [2018-11-18 16:13:49,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:49,898 INFO L480 AbstractCegarLoop]: Abstraction has 2827 states and 3282 transitions. [2018-11-18 16:13:49,898 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:13:49,898 INFO L276 IsEmpty]: Start isEmpty. Operand 2827 states and 3282 transitions. [2018-11-18 16:13:49,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-11-18 16:13:49,899 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:49,899 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:49,900 INFO L423 AbstractCegarLoop]: === Iteration 34 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:49,900 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:49,900 INFO L82 PathProgramCache]: Analyzing trace with hash 725305238, now seen corresponding path program 1 times [2018-11-18 16:13:49,900 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:49,900 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:49,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:50,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:50,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:50,245 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:13:50,245 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:13:50,572 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-11-18 16:13:50,574 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:13:50,574 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:13:50,580 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:50,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:50,652 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:50,706 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:13:50,706 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:13:50,897 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-11-18 16:13:50,912 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:13:50,912 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-11-18 16:13:50,913 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 16:13:50,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 16:13:50,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:13:50,914 INFO L87 Difference]: Start difference. First operand 2827 states and 3282 transitions. Second operand 24 states. [2018-11-18 16:13:56,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:13:56,098 INFO L93 Difference]: Finished difference Result 6443 states and 7549 transitions. [2018-11-18 16:13:56,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-11-18 16:13:56,099 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 261 [2018-11-18 16:13:56,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:13:56,106 INFO L225 Difference]: With dead ends: 6443 [2018-11-18 16:13:56,106 INFO L226 Difference]: Without dead ends: 3985 [2018-11-18 16:13:56,110 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1127 GetRequests, 1033 SyntacticMatches, 12 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1674 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1457, Invalid=5515, Unknown=0, NotChecked=0, Total=6972 [2018-11-18 16:13:56,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3985 states. [2018-11-18 16:13:56,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3985 to 3180. [2018-11-18 16:13:56,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3180 states. [2018-11-18 16:13:56,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3180 states to 3180 states and 3691 transitions. [2018-11-18 16:13:56,269 INFO L78 Accepts]: Start accepts. Automaton has 3180 states and 3691 transitions. Word has length 261 [2018-11-18 16:13:56,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:13:56,269 INFO L480 AbstractCegarLoop]: Abstraction has 3180 states and 3691 transitions. [2018-11-18 16:13:56,269 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 16:13:56,269 INFO L276 IsEmpty]: Start isEmpty. Operand 3180 states and 3691 transitions. [2018-11-18 16:13:56,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-11-18 16:13:56,272 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:13:56,272 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:13:56,272 INFO L423 AbstractCegarLoop]: === Iteration 35 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:13:56,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:13:56,272 INFO L82 PathProgramCache]: Analyzing trace with hash -1477945933, now seen corresponding path program 1 times [2018-11-18 16:13:56,273 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:13:56,273 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:13:56,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:56,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:56,504 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:56,655 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:13:56,655 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:13:56,963 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 16:13:56,965 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:13:56,965 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:13:56,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:13:57,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:13:57,044 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:13:57,123 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:13:57,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:13:57,300 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 16:13:57,316 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:13:57,316 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-11-18 16:13:57,317 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 16:13:57,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 16:13:57,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:13:57,318 INFO L87 Difference]: Start difference. First operand 3180 states and 3691 transitions. Second operand 24 states. [2018-11-18 16:14:02,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:02,400 INFO L93 Difference]: Finished difference Result 7115 states and 8337 transitions. [2018-11-18 16:14:02,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-11-18 16:14:02,401 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 262 [2018-11-18 16:14:02,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:02,408 INFO L225 Difference]: With dead ends: 7115 [2018-11-18 16:14:02,408 INFO L226 Difference]: Without dead ends: 4296 [2018-11-18 16:14:02,413 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1107 GetRequests, 1025 SyntacticMatches, 13 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1208 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=870, Invalid=4100, Unknown=0, NotChecked=0, Total=4970 [2018-11-18 16:14:02,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4296 states. [2018-11-18 16:14:02,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4296 to 4066. [2018-11-18 16:14:02,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4066 states. [2018-11-18 16:14:02,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4066 states to 4066 states and 4722 transitions. [2018-11-18 16:14:02,635 INFO L78 Accepts]: Start accepts. Automaton has 4066 states and 4722 transitions. Word has length 262 [2018-11-18 16:14:02,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:02,635 INFO L480 AbstractCegarLoop]: Abstraction has 4066 states and 4722 transitions. [2018-11-18 16:14:02,635 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 16:14:02,635 INFO L276 IsEmpty]: Start isEmpty. Operand 4066 states and 4722 transitions. [2018-11-18 16:14:02,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-11-18 16:14:02,639 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:02,639 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:02,639 INFO L423 AbstractCegarLoop]: === Iteration 36 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:02,640 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:02,640 INFO L82 PathProgramCache]: Analyzing trace with hash -2146858639, now seen corresponding path program 1 times [2018-11-18 16:14:02,640 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:02,640 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:02,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:02,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:02,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:03,035 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:03,035 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:03,252 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 16:14:03,254 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:14:03,254 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:14:03,260 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:03,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:03,344 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:03,377 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:03,576 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 16:14:03,600 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:14:03,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 17 [2018-11-18 16:14:03,601 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 16:14:03,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 16:14:03,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:14:03,602 INFO L87 Difference]: Start difference. First operand 4066 states and 4722 transitions. Second operand 17 states. [2018-11-18 16:14:05,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:05,733 INFO L93 Difference]: Finished difference Result 8121 states and 9572 transitions. [2018-11-18 16:14:05,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-18 16:14:05,734 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 263 [2018-11-18 16:14:05,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:05,741 INFO L225 Difference]: With dead ends: 8121 [2018-11-18 16:14:05,741 INFO L226 Difference]: Without dead ends: 4508 [2018-11-18 16:14:05,746 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1081 GetRequests, 1034 SyntacticMatches, 12 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=334, Invalid=998, Unknown=0, NotChecked=0, Total=1332 [2018-11-18 16:14:05,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4508 states. [2018-11-18 16:14:06,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4508 to 4444. [2018-11-18 16:14:06,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4444 states. [2018-11-18 16:14:06,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4444 states to 4444 states and 5196 transitions. [2018-11-18 16:14:06,072 INFO L78 Accepts]: Start accepts. Automaton has 4444 states and 5196 transitions. Word has length 263 [2018-11-18 16:14:06,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:06,073 INFO L480 AbstractCegarLoop]: Abstraction has 4444 states and 5196 transitions. [2018-11-18 16:14:06,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 16:14:06,073 INFO L276 IsEmpty]: Start isEmpty. Operand 4444 states and 5196 transitions. [2018-11-18 16:14:06,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-11-18 16:14:06,076 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:06,076 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:06,076 INFO L423 AbstractCegarLoop]: === Iteration 37 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:06,076 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:06,077 INFO L82 PathProgramCache]: Analyzing trace with hash 452522599, now seen corresponding path program 1 times [2018-11-18 16:14:06,077 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:06,077 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:06,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:06,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:06,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:06,401 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:06,401 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:06,584 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 16:14:06,585 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:14:06,585 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:14:06,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:06,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:06,664 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:06,700 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:06,700 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:06,814 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 16:14:06,838 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:14:06,838 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 15 [2018-11-18 16:14:06,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 16:14:06,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 16:14:06,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-11-18 16:14:06,840 INFO L87 Difference]: Start difference. First operand 4444 states and 5196 transitions. Second operand 15 states. [2018-11-18 16:14:08,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:08,709 INFO L93 Difference]: Finished difference Result 10957 states and 12909 transitions. [2018-11-18 16:14:08,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 16:14:08,709 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 264 [2018-11-18 16:14:08,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:08,718 INFO L225 Difference]: With dead ends: 10957 [2018-11-18 16:14:08,718 INFO L226 Difference]: Without dead ends: 6917 [2018-11-18 16:14:08,722 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1076 GetRequests, 1041 SyntacticMatches, 9 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=601, Unknown=0, NotChecked=0, Total=756 [2018-11-18 16:14:08,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6917 states. [2018-11-18 16:14:09,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6917 to 6054. [2018-11-18 16:14:09,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6054 states. [2018-11-18 16:14:09,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6054 states to 6054 states and 7145 transitions. [2018-11-18 16:14:09,084 INFO L78 Accepts]: Start accepts. Automaton has 6054 states and 7145 transitions. Word has length 264 [2018-11-18 16:14:09,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:09,085 INFO L480 AbstractCegarLoop]: Abstraction has 6054 states and 7145 transitions. [2018-11-18 16:14:09,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 16:14:09,085 INFO L276 IsEmpty]: Start isEmpty. Operand 6054 states and 7145 transitions. [2018-11-18 16:14:09,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-11-18 16:14:09,089 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:09,089 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:09,089 INFO L423 AbstractCegarLoop]: === Iteration 38 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:09,089 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:09,090 INFO L82 PathProgramCache]: Analyzing trace with hash -1515282327, now seen corresponding path program 1 times [2018-11-18 16:14:09,090 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:09,090 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:09,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:09,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:09,309 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:09,375 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 16:14:09,376 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:14:09,377 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:14:09,377 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 16:14:09,377 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 16:14:09,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 16:14:09,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:14:09,378 INFO L87 Difference]: Start difference. First operand 6054 states and 7145 transitions. Second operand 7 states. [2018-11-18 16:14:10,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:10,062 INFO L93 Difference]: Finished difference Result 10136 states and 12120 transitions. [2018-11-18 16:14:10,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 16:14:10,062 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 264 [2018-11-18 16:14:10,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:10,069 INFO L225 Difference]: With dead ends: 10136 [2018-11-18 16:14:10,069 INFO L226 Difference]: Without dead ends: 4453 [2018-11-18 16:14:10,075 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 258 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:14:10,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4453 states. [2018-11-18 16:14:10,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4453 to 4335. [2018-11-18 16:14:10,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4335 states. [2018-11-18 16:14:10,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4335 states to 4335 states and 5152 transitions. [2018-11-18 16:14:10,347 INFO L78 Accepts]: Start accepts. Automaton has 4335 states and 5152 transitions. Word has length 264 [2018-11-18 16:14:10,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:10,347 INFO L480 AbstractCegarLoop]: Abstraction has 4335 states and 5152 transitions. [2018-11-18 16:14:10,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 16:14:10,348 INFO L276 IsEmpty]: Start isEmpty. Operand 4335 states and 5152 transitions. [2018-11-18 16:14:10,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2018-11-18 16:14:10,350 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:10,350 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:10,350 INFO L423 AbstractCegarLoop]: === Iteration 39 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:10,350 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:10,351 INFO L82 PathProgramCache]: Analyzing trace with hash 1137537473, now seen corresponding path program 1 times [2018-11-18 16:14:10,351 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:10,351 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:10,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:10,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:10,573 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:10,621 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2018-11-18 16:14:10,622 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:14:10,623 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:14:10,623 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:14:10,623 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:14:10,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:14:10,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:14:10,624 INFO L87 Difference]: Start difference. First operand 4335 states and 5152 transitions. Second operand 8 states. [2018-11-18 16:14:11,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:11,447 INFO L93 Difference]: Finished difference Result 12703 states and 15531 transitions. [2018-11-18 16:14:11,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:14:11,448 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 267 [2018-11-18 16:14:11,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:11,463 INFO L225 Difference]: With dead ends: 12703 [2018-11-18 16:14:11,463 INFO L226 Difference]: Without dead ends: 8737 [2018-11-18 16:14:11,468 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 260 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:14:11,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8737 states. [2018-11-18 16:14:12,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8737 to 8239. [2018-11-18 16:14:12,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8239 states. [2018-11-18 16:14:12,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8239 states to 8239 states and 9957 transitions. [2018-11-18 16:14:12,051 INFO L78 Accepts]: Start accepts. Automaton has 8239 states and 9957 transitions. Word has length 267 [2018-11-18 16:14:12,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:12,051 INFO L480 AbstractCegarLoop]: Abstraction has 8239 states and 9957 transitions. [2018-11-18 16:14:12,051 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:14:12,051 INFO L276 IsEmpty]: Start isEmpty. Operand 8239 states and 9957 transitions. [2018-11-18 16:14:12,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2018-11-18 16:14:12,056 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:12,057 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:12,057 INFO L423 AbstractCegarLoop]: === Iteration 40 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:12,057 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:12,057 INFO L82 PathProgramCache]: Analyzing trace with hash 656457215, now seen corresponding path program 1 times [2018-11-18 16:14:12,058 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:12,058 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:12,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:12,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:12,292 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:12,363 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 88 proven. 29 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:12,363 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:12,496 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 22 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 16:14:12,497 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:14:12,497 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:14:12,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:12,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:12,611 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:12,647 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 88 proven. 29 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:12,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:12,779 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 22 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 16:14:12,794 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:14:12,795 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 12 [2018-11-18 16:14:12,795 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 16:14:12,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 16:14:12,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:14:12,796 INFO L87 Difference]: Start difference. First operand 8239 states and 9957 transitions. Second operand 12 states. [2018-11-18 16:14:14,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:14,639 INFO L93 Difference]: Finished difference Result 16391 states and 19809 transitions. [2018-11-18 16:14:14,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 16:14:14,639 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 267 [2018-11-18 16:14:14,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:14,652 INFO L225 Difference]: With dead ends: 16391 [2018-11-18 16:14:14,652 INFO L226 Difference]: Without dead ends: 8521 [2018-11-18 16:14:14,660 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1086 GetRequests, 1055 SyntacticMatches, 8 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=474, Unknown=0, NotChecked=0, Total=600 [2018-11-18 16:14:14,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8521 states. [2018-11-18 16:14:15,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8521 to 8239. [2018-11-18 16:14:15,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8239 states. [2018-11-18 16:14:15,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8239 states to 8239 states and 9917 transitions. [2018-11-18 16:14:15,271 INFO L78 Accepts]: Start accepts. Automaton has 8239 states and 9917 transitions. Word has length 267 [2018-11-18 16:14:15,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:15,271 INFO L480 AbstractCegarLoop]: Abstraction has 8239 states and 9917 transitions. [2018-11-18 16:14:15,271 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 16:14:15,271 INFO L276 IsEmpty]: Start isEmpty. Operand 8239 states and 9917 transitions. [2018-11-18 16:14:15,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2018-11-18 16:14:15,275 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:15,275 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:15,275 INFO L423 AbstractCegarLoop]: === Iteration 41 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:15,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:15,275 INFO L82 PathProgramCache]: Analyzing trace with hash -2126658644, now seen corresponding path program 1 times [2018-11-18 16:14:15,276 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:15,276 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:15,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:15,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:15,408 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:15,456 INFO L134 CoverageAnalysis]: Checked inductivity of 157 backedges. 130 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:14:15,456 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:14:15,457 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:14:15,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:14:15,458 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:14:15,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:14:15,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:14:15,458 INFO L87 Difference]: Start difference. First operand 8239 states and 9917 transitions. Second operand 9 states. [2018-11-18 16:14:16,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:16,304 INFO L93 Difference]: Finished difference Result 18111 states and 22001 transitions. [2018-11-18 16:14:16,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:14:16,305 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 269 [2018-11-18 16:14:16,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:16,320 INFO L225 Difference]: With dead ends: 18111 [2018-11-18 16:14:16,320 INFO L226 Difference]: Without dead ends: 10169 [2018-11-18 16:14:16,328 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 261 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:14:16,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10169 states. [2018-11-18 16:14:16,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10169 to 9283. [2018-11-18 16:14:16,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9283 states. [2018-11-18 16:14:16,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9283 states to 9283 states and 11073 transitions. [2018-11-18 16:14:16,925 INFO L78 Accepts]: Start accepts. Automaton has 9283 states and 11073 transitions. Word has length 269 [2018-11-18 16:14:16,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:16,925 INFO L480 AbstractCegarLoop]: Abstraction has 9283 states and 11073 transitions. [2018-11-18 16:14:16,925 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:14:16,925 INFO L276 IsEmpty]: Start isEmpty. Operand 9283 states and 11073 transitions. [2018-11-18 16:14:16,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-11-18 16:14:16,929 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:16,930 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:16,930 INFO L423 AbstractCegarLoop]: === Iteration 42 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:16,930 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:16,930 INFO L82 PathProgramCache]: Analyzing trace with hash 1341502956, now seen corresponding path program 1 times [2018-11-18 16:14:16,930 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:16,930 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:16,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:17,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:17,109 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:17,176 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 50 proven. 81 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-18 16:14:17,176 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:17,370 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 23 proven. 16 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-11-18 16:14:17,372 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:14:17,372 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:14:17,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:17,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:17,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:17,474 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 50 proven. 81 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-18 16:14:17,474 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:17,608 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 23 proven. 16 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-11-18 16:14:17,623 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:14:17,623 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 11, 12] total 19 [2018-11-18 16:14:17,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-18 16:14:17,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-18 16:14:17,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-18 16:14:17,624 INFO L87 Difference]: Start difference. First operand 9283 states and 11073 transitions. Second operand 19 states. [2018-11-18 16:14:22,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:22,140 INFO L93 Difference]: Finished difference Result 24133 states and 28495 transitions. [2018-11-18 16:14:22,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-11-18 16:14:22,140 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 275 [2018-11-18 16:14:22,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:22,163 INFO L225 Difference]: With dead ends: 24133 [2018-11-18 16:14:22,163 INFO L226 Difference]: Without dead ends: 15219 [2018-11-18 16:14:22,172 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1152 GetRequests, 1099 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 714 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=524, Invalid=2446, Unknown=0, NotChecked=0, Total=2970 [2018-11-18 16:14:22,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15219 states. [2018-11-18 16:14:23,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15219 to 13757. [2018-11-18 16:14:23,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13757 states. [2018-11-18 16:14:23,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13757 states to 13757 states and 16029 transitions. [2018-11-18 16:14:23,077 INFO L78 Accepts]: Start accepts. Automaton has 13757 states and 16029 transitions. Word has length 275 [2018-11-18 16:14:23,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:23,077 INFO L480 AbstractCegarLoop]: Abstraction has 13757 states and 16029 transitions. [2018-11-18 16:14:23,077 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-18 16:14:23,077 INFO L276 IsEmpty]: Start isEmpty. Operand 13757 states and 16029 transitions. [2018-11-18 16:14:23,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-11-18 16:14:23,082 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:23,082 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:23,082 INFO L423 AbstractCegarLoop]: === Iteration 43 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:23,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:23,083 INFO L82 PathProgramCache]: Analyzing trace with hash -1127164283, now seen corresponding path program 1 times [2018-11-18 16:14:23,083 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:23,083 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:23,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:23,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:23,270 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:23,346 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 71 proven. 72 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:14:23,346 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:23,550 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 29 proven. 11 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2018-11-18 16:14:23,551 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:14:23,551 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:14:23,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:23,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:23,625 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:23,660 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 71 proven. 72 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:14:23,661 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:14:23,810 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 29 proven. 11 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2018-11-18 16:14:23,825 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:14:23,825 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 11, 12] total 19 [2018-11-18 16:14:23,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-18 16:14:23,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-18 16:14:23,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-18 16:14:23,826 INFO L87 Difference]: Start difference. First operand 13757 states and 16029 transitions. Second operand 19 states. [2018-11-18 16:14:28,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:28,079 INFO L93 Difference]: Finished difference Result 25129 states and 29504 transitions. [2018-11-18 16:14:28,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-18 16:14:28,080 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 275 [2018-11-18 16:14:28,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:28,103 INFO L225 Difference]: With dead ends: 25129 [2018-11-18 16:14:28,103 INFO L226 Difference]: Without dead ends: 11287 [2018-11-18 16:14:28,113 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1151 GetRequests, 1096 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 723 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=551, Invalid=2641, Unknown=0, NotChecked=0, Total=3192 [2018-11-18 16:14:28,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11287 states. [2018-11-18 16:14:28,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11287 to 10781. [2018-11-18 16:14:28,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10781 states. [2018-11-18 16:14:28,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10781 states to 10781 states and 12669 transitions. [2018-11-18 16:14:28,872 INFO L78 Accepts]: Start accepts. Automaton has 10781 states and 12669 transitions. Word has length 275 [2018-11-18 16:14:28,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:28,872 INFO L480 AbstractCegarLoop]: Abstraction has 10781 states and 12669 transitions. [2018-11-18 16:14:28,872 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-18 16:14:28,872 INFO L276 IsEmpty]: Start isEmpty. Operand 10781 states and 12669 transitions. [2018-11-18 16:14:28,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-11-18 16:14:28,877 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:28,877 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:28,877 INFO L423 AbstractCegarLoop]: === Iteration 44 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:28,877 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:28,877 INFO L82 PathProgramCache]: Analyzing trace with hash -1346866230, now seen corresponding path program 1 times [2018-11-18 16:14:28,878 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:28,878 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:28,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:29,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:14:29,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:14:29,066 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-11-18 16:14:29,066 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:14:29,068 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:14:29,068 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:14:29,068 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:14:29,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:14:29,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:14:29,068 INFO L87 Difference]: Start difference. First operand 10781 states and 12669 transitions. Second operand 8 states. [2018-11-18 16:14:30,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:14:30,265 INFO L93 Difference]: Finished difference Result 21513 states and 25431 transitions. [2018-11-18 16:14:30,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:14:30,266 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 275 [2018-11-18 16:14:30,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:14:30,282 INFO L225 Difference]: With dead ends: 21513 [2018-11-18 16:14:30,282 INFO L226 Difference]: Without dead ends: 11101 [2018-11-18 16:14:30,289 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 281 GetRequests, 271 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:14:30,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11101 states. [2018-11-18 16:14:30,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11101 to 10777. [2018-11-18 16:14:30,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10777 states. [2018-11-18 16:14:30,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10777 states to 10777 states and 12657 transitions. [2018-11-18 16:14:30,999 INFO L78 Accepts]: Start accepts. Automaton has 10777 states and 12657 transitions. Word has length 275 [2018-11-18 16:14:30,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:14:30,999 INFO L480 AbstractCegarLoop]: Abstraction has 10777 states and 12657 transitions. [2018-11-18 16:14:30,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:14:30,999 INFO L276 IsEmpty]: Start isEmpty. Operand 10777 states and 12657 transitions. [2018-11-18 16:14:31,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2018-11-18 16:14:31,004 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:14:31,004 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:14:31,004 INFO L423 AbstractCegarLoop]: === Iteration 45 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:14:31,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:14:31,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1540246343, now seen corresponding path program 1 times [2018-11-18 16:14:31,005 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:14:31,005 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/cvc4nyu Starting monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:14:31,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:14:31,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:14:31,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:14:31,779 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 16:14:31,960 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 04:14:31 BoogieIcfgContainer [2018-11-18 16:14:31,960 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 16:14:31,961 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 16:14:31,961 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 16:14:31,961 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 16:14:31,961 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:13:25" (3/4) ... [2018-11-18 16:14:31,963 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 16:14:32,192 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_3ef715bb-d539-4ca0-bf4d-082cb1b305e5/bin-2019/utaipan/witness.graphml [2018-11-18 16:14:32,192 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 16:14:32,193 INFO L168 Benchmark]: Toolchain (without parser) took 67684.52 ms. Allocated memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: 2.1 GB). Free memory was 950.8 MB in the beginning and 1.8 GB in the end (delta: -834.5 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,194 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:14:32,194 INFO L168 Benchmark]: CACSL2BoogieTranslator took 312.46 ms. Allocated memory is still 1.0 GB. Free memory was 945.4 MB in the beginning and 924.0 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,195 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 924.0 MB in the beginning and 1.1 GB in the end (delta: -204.1 MB). Peak memory consumption was 16.3 MB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,195 INFO L168 Benchmark]: Boogie Preprocessor took 33.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,195 INFO L168 Benchmark]: RCFGBuilder took 553.55 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 79.5 MB). Peak memory consumption was 79.5 MB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,195 INFO L168 Benchmark]: TraceAbstraction took 66481.80 ms. Allocated memory was 1.2 GB in the beginning and 3.2 GB in the end (delta: 2.0 GB). Free memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: -830.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,196 INFO L168 Benchmark]: Witness Printer took 231.86 ms. Allocated memory is still 3.2 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 87.1 MB). Peak memory consumption was 87.1 MB. Max. memory is 11.5 GB. [2018-11-18 16:14:32,197 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 312.46 ms. Allocated memory is still 1.0 GB. Free memory was 945.4 MB in the beginning and 924.0 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 67.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 924.0 MB in the beginning and 1.1 GB in the end (delta: -204.1 MB). Peak memory consumption was 16.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 553.55 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 79.5 MB). Peak memory consumption was 79.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 66481.80 ms. Allocated memory was 1.2 GB in the beginning and 3.2 GB in the end (delta: 2.0 GB). Free memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: -830.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. * Witness Printer took 231.86 ms. Allocated memory is still 3.2 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 87.1 MB). Peak memory consumption was 87.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 662]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L463] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(nomsg)=0, \old(s1p)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L585] int c1 ; [L586] int i2 ; [L589] c1 = 0 [L590] side1Failed = __VERIFIER_nondet_bool() [L591] side2Failed = __VERIFIER_nondet_bool() [L592] side1_written = __VERIFIER_nondet_char() [L593] side2_written = __VERIFIER_nondet_char() [L594] side1Failed_History_0 = __VERIFIER_nondet_bool() [L595] side1Failed_History_1 = __VERIFIER_nondet_bool() [L596] side1Failed_History_2 = __VERIFIER_nondet_bool() [L597] side2Failed_History_0 = __VERIFIER_nondet_bool() [L598] side2Failed_History_1 = __VERIFIER_nondet_bool() [L599] side2Failed_History_2 = __VERIFIER_nondet_bool() [L600] active_side_History_0 = __VERIFIER_nondet_char() [L601] active_side_History_1 = __VERIFIER_nondet_char() [L602] active_side_History_2 = __VERIFIER_nondet_char() [L603] manual_selection_History_0 = __VERIFIER_nondet_char() [L604] manual_selection_History_1 = __VERIFIER_nondet_char() [L605] manual_selection_History_2 = __VERIFIER_nondet_char() [L606] CALL, EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, init()=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 = init() [L608] cs1_old = nomsg [L609] cs1_new = nomsg [L610] cs2_old = nomsg [L611] cs2_new = nomsg [L612] s1s2_old = nomsg [L613] s1s2_new = nomsg [L614] s1s1_old = nomsg [L615] s1s1_new = nomsg [L616] s2s1_old = nomsg [L617] s2s1_new = nomsg [L618] s2s2_old = nomsg [L619] s2s2_new = nomsg [L620] s1p_old = nomsg [L621] s1p_new = nomsg [L622] s2p_old = nomsg [L623] s2p_new = nomsg [L624] i2 = 0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE i2 < 10 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L627] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L627] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] COND FALSE, EXPR !(nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] COND FALSE, EXPR !(nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] COND FALSE, EXPR !(nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] RET side1_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] COND TRUE, EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] COND TRUE, EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] COND TRUE, EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] RET side2_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L630] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L442] COND FALSE !((int )side1 == 0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L450] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L451] COND FALSE !((int )side2 == 0) [L454] active_side = (int8_t )0 VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L459] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L459] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L630] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND TRUE ! tmp___0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L501] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L501] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L501] tmp___1 = read_side1_failed_history((unsigned char)1) [L502] COND TRUE ! tmp___1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L503] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND TRUE (int )index == 0 [L131] RET return (side1Failed_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L503] EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)0)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L503] tmp___2 = read_side1_failed_history((unsigned char)0) [L504] COND FALSE !(! tmp___2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L529] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND FALSE !(\read(tmp___7)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L545] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L545] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L545] tmp___11 = read_side1_failed_history((unsigned char)1) [L546] COND TRUE ! tmp___11 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L547] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L547] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L547] tmp___12 = read_side2_failed_history((unsigned char)1) [L548] COND FALSE !(\read(tmp___12)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L561] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] RET return (active_side_History_2); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L561] EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)2)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L561] tmp___20 = read_active_side_history((unsigned char)2) [L562] COND FALSE !((int )tmp___20 > -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L580] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L647] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, check()=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L648] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L660] COND FALSE, RET !(! arg) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, arg=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L648] assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L649] i2 ++ VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE i2 < 10 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L627] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L627] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] COND FALSE, EXPR !(nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] COND FALSE, EXPR !(nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] COND FALSE, EXPR !(nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] RET side1_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND FALSE !((int )side1 == (int )side2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L392] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L393] COND TRUE (int )side2 != (int )nomsg [L394] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] COND TRUE, EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] COND TRUE, EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] COND TRUE, EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] RET side2_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L630] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L442] COND FALSE !((int )side1 == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L451] COND TRUE (int )side2 == 0 [L452] active_side = (int8_t )2 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L459] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=2] [L459] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L630] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND FALSE !(! tmp___0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L529] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND TRUE \read(tmp___7) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L531] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L531] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L531] tmp___8 = read_side2_failed_history((unsigned char)1) [L532] COND TRUE ! tmp___8 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L533] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L533] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L533] tmp___5 = read_active_side_history((unsigned char)0) [L534] COND FALSE !(! ((int )tmp___5 == 2)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___7=1, tmp___8=0] [L537] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND TRUE (int )index == 0 [L161] RET return (side2Failed_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] EXPR read_side2_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)0)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___7=1, tmp___8=0] [L537] tmp___6 = read_side2_failed_history((unsigned char)0) [L538] COND TRUE ! tmp___6 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___6=0, tmp___7=1, tmp___8=0] [L539] COND TRUE ! ((int )side2_written == 1) [L540] RET return (0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___6=0, tmp___7=1, tmp___8=0] [L647] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, c1=1, check()=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L648] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L660] COND TRUE ! arg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L662] __VERIFIER_error() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 238 locations, 1 error locations. UNSAFE Result, 66.4s OverallTime, 45 OverallIterations, 6 TraceHistogramMax, 43.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 16686 SDtfs, 27163 SDslu, 30572 SDs, 0 SdLazy, 54464 SolverSat, 9098 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 25.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13588 GetRequests, 12915 SyntacticMatches, 64 SemanticMatches, 609 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5097 ImplicationChecksByTransitivity, 6.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13757occurred in iteration=42, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 8.4s AutomataMinimizationTime, 44 MinimizatonAttempts, 10544 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.7s SsaConstructionTime, 4.3s SatisfiabilityAnalysisTime, 6.1s InterpolantComputationTime, 9559 NumberOfCodeBlocks, 9559 NumberOfCodeBlocksAsserted, 53 NumberOfCheckSat, 13095 ConstructedInterpolants, 0 QuantifiedInterpolants, 7521220 SizeOfPredicates, 129 NumberOfNonLiveVariables, 33199 ConjunctsInSsa, 405 ConjunctsInUnsatCore, 67 InterpolantComputations, 37 PerfectInterpolantSequences, 4673/5497 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...