./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bd3b02b89b8fe5eebc8d5c8d901354afb3132de1 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bd3b02b89b8fe5eebc8d5c8d901354afb3132de1 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 09:40:23,049 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 09:40:23,051 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 09:40:23,058 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 09:40:23,058 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 09:40:23,059 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 09:40:23,060 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 09:40:23,061 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 09:40:23,062 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 09:40:23,062 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 09:40:23,063 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 09:40:23,063 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 09:40:23,064 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 09:40:23,064 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 09:40:23,065 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 09:40:23,065 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 09:40:23,067 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 09:40:23,068 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 09:40:23,069 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 09:40:23,070 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 09:40:23,071 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 09:40:23,072 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 09:40:23,073 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 09:40:23,073 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 09:40:23,073 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 09:40:23,074 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 09:40:23,075 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 09:40:23,075 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 09:40:23,076 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 09:40:23,076 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 09:40:23,077 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 09:40:23,077 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 09:40:23,077 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 09:40:23,077 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 09:40:23,078 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 09:40:23,078 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 09:40:23,079 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 09:40:23,088 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 09:40:23,088 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 09:40:23,089 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 09:40:23,089 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 09:40:23,089 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 09:40:23,089 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 09:40:23,089 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 09:40:23,090 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 09:40:23,090 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 09:40:23,090 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 09:40:23,090 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 09:40:23,090 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 09:40:23,090 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 09:40:23,091 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 09:40:23,091 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 09:40:23,091 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 09:40:23,091 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 09:40:23,091 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 09:40:23,091 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 09:40:23,092 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 09:40:23,092 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 09:40:23,092 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 09:40:23,092 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 09:40:23,092 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 09:40:23,092 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 09:40:23,093 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 09:40:23,093 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 09:40:23,093 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 09:40:23,093 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 09:40:23,093 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 09:40:23,093 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 09:40:23,093 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 09:40:23,093 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 09:40:23,094 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 09:40:23,094 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 09:40:23,094 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 09:40:23,094 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 09:40:23,094 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bd3b02b89b8fe5eebc8d5c8d901354afb3132de1 [2018-11-18 09:40:23,115 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 09:40:23,123 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 09:40:23,125 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 09:40:23,126 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 09:40:23,127 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 09:40:23,127 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c [2018-11-18 09:40:23,162 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/33d9fce81/3248ec67c3004db79bd54cfd59e6b416/FLAG826fadd7c [2018-11-18 09:40:23,583 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 09:40:23,583 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c [2018-11-18 09:40:23,589 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/33d9fce81/3248ec67c3004db79bd54cfd59e6b416/FLAG826fadd7c [2018-11-18 09:40:23,598 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/33d9fce81/3248ec67c3004db79bd54cfd59e6b416 [2018-11-18 09:40:23,600 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 09:40:23,600 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 09:40:23,601 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 09:40:23,601 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 09:40:23,603 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 09:40:23,604 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,605 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ae989df and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23, skipping insertion in model container [2018-11-18 09:40:23,605 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,611 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 09:40:23,640 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 09:40:23,810 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 09:40:23,819 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 09:40:23,904 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 09:40:23,917 INFO L195 MainTranslator]: Completed translation [2018-11-18 09:40:23,917 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23 WrapperNode [2018-11-18 09:40:23,917 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 09:40:23,918 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 09:40:23,918 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 09:40:23,918 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 09:40:23,923 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,932 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,938 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 09:40:23,938 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 09:40:23,938 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 09:40:23,938 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 09:40:23,945 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,945 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,948 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,948 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,958 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,965 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,967 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... [2018-11-18 09:40:23,969 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 09:40:23,970 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 09:40:23,970 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 09:40:23,970 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 09:40:23,971 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 09:40:24,006 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-11-18 09:40:24,006 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-11-18 09:40:24,006 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-11-18 09:40:24,006 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-11-18 09:40:24,006 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-11-18 09:40:24,006 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-11-18 09:40:24,007 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 09:40:24,007 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 09:40:24,007 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-11-18 09:40:24,007 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-11-18 09:40:24,007 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-11-18 09:40:24,007 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-11-18 09:40:24,007 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-11-18 09:40:24,007 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-11-18 09:40:24,008 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-11-18 09:40:24,008 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-11-18 09:40:24,008 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-11-18 09:40:24,008 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-11-18 09:40:24,008 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-11-18 09:40:24,008 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-11-18 09:40:24,008 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-11-18 09:40:24,008 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-11-18 09:40:24,009 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-11-18 09:40:24,009 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-11-18 09:40:24,009 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-11-18 09:40:24,009 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-11-18 09:40:24,009 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-11-18 09:40:24,009 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-11-18 09:40:24,009 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 09:40:24,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 09:40:24,009 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-11-18 09:40:24,010 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-11-18 09:40:24,010 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 09:40:24,010 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 09:40:24,010 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-11-18 09:40:24,010 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-11-18 09:40:24,010 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-11-18 09:40:24,010 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-11-18 09:40:24,549 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 09:40:24,549 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:40:24 BoogieIcfgContainer [2018-11-18 09:40:24,549 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 09:40:24,550 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 09:40:24,550 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 09:40:24,552 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 09:40:24,552 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 09:40:23" (1/3) ... [2018-11-18 09:40:24,553 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a27c664 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 09:40:24, skipping insertion in model container [2018-11-18 09:40:24,553 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:23" (2/3) ... [2018-11-18 09:40:24,553 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a27c664 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 09:40:24, skipping insertion in model container [2018-11-18 09:40:24,554 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:40:24" (3/3) ... [2018-11-18 09:40:24,555 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c [2018-11-18 09:40:24,561 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 09:40:24,566 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 09:40:24,575 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 09:40:24,599 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 09:40:24,599 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 09:40:24,599 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 09:40:24,599 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 09:40:24,599 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 09:40:24,599 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 09:40:24,599 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 09:40:24,599 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 09:40:24,617 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states. [2018-11-18 09:40:24,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 09:40:24,624 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:24,625 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:24,626 INFO L423 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:24,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:24,629 INFO L82 PathProgramCache]: Analyzing trace with hash 116280632, now seen corresponding path program 1 times [2018-11-18 09:40:24,631 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:24,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:24,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:24,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:24,665 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:24,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:24,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:24,852 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:24,852 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:24,852 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:24,857 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:24,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:24,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:24,866 INFO L87 Difference]: Start difference. First operand 237 states. Second operand 4 states. [2018-11-18 09:40:24,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:24,946 INFO L93 Difference]: Finished difference Result 450 states and 694 transitions. [2018-11-18 09:40:24,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:24,948 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-11-18 09:40:24,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:24,957 INFO L225 Difference]: With dead ends: 450 [2018-11-18 09:40:24,957 INFO L226 Difference]: Without dead ends: 232 [2018-11-18 09:40:24,961 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:24,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-11-18 09:40:25,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 232. [2018-11-18 09:40:25,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-11-18 09:40:25,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 324 transitions. [2018-11-18 09:40:25,005 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 324 transitions. Word has length 66 [2018-11-18 09:40:25,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:25,005 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 324 transitions. [2018-11-18 09:40:25,005 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:25,005 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 324 transitions. [2018-11-18 09:40:25,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 09:40:25,008 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:25,008 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:25,008 INFO L423 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:25,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:25,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1413847588, now seen corresponding path program 1 times [2018-11-18 09:40:25,009 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:25,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:25,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:25,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:25,011 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:25,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:25,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:25,116 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:25,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:25,116 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:25,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:25,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:25,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:25,119 INFO L87 Difference]: Start difference. First operand 232 states and 324 transitions. Second operand 4 states. [2018-11-18 09:40:25,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:25,198 INFO L93 Difference]: Finished difference Result 446 states and 636 transitions. [2018-11-18 09:40:25,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:25,199 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-18 09:40:25,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:25,201 INFO L225 Difference]: With dead ends: 446 [2018-11-18 09:40:25,201 INFO L226 Difference]: Without dead ends: 236 [2018-11-18 09:40:25,203 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:25,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-11-18 09:40:25,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 236. [2018-11-18 09:40:25,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-11-18 09:40:25,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 327 transitions. [2018-11-18 09:40:25,221 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 327 transitions. Word has length 77 [2018-11-18 09:40:25,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:25,222 INFO L480 AbstractCegarLoop]: Abstraction has 236 states and 327 transitions. [2018-11-18 09:40:25,223 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:25,223 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 327 transitions. [2018-11-18 09:40:25,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-18 09:40:25,225 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:25,225 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:25,225 INFO L423 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:25,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:25,225 INFO L82 PathProgramCache]: Analyzing trace with hash -1861015061, now seen corresponding path program 1 times [2018-11-18 09:40:25,226 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:25,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:25,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:25,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:25,228 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:25,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:25,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:25,347 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:25,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:25,347 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:25,348 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:25,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:25,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:25,349 INFO L87 Difference]: Start difference. First operand 236 states and 327 transitions. Second operand 7 states. [2018-11-18 09:40:26,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:26,124 INFO L93 Difference]: Finished difference Result 538 states and 747 transitions. [2018-11-18 09:40:26,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:40:26,125 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-11-18 09:40:26,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:26,128 INFO L225 Difference]: With dead ends: 538 [2018-11-18 09:40:26,128 INFO L226 Difference]: Without dead ends: 324 [2018-11-18 09:40:26,129 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:40:26,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-11-18 09:40:26,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 323. [2018-11-18 09:40:26,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-11-18 09:40:26,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 440 transitions. [2018-11-18 09:40:26,148 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 440 transitions. Word has length 95 [2018-11-18 09:40:26,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:26,149 INFO L480 AbstractCegarLoop]: Abstraction has 323 states and 440 transitions. [2018-11-18 09:40:26,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:40:26,149 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 440 transitions. [2018-11-18 09:40:26,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 09:40:26,149 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:26,150 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:26,150 INFO L423 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:26,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:26,150 INFO L82 PathProgramCache]: Analyzing trace with hash -2023995712, now seen corresponding path program 1 times [2018-11-18 09:40:26,151 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:26,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:26,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:26,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:26,152 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:26,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:26,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:26,247 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:26,247 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:26,247 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:26,247 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:26,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:26,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:26,248 INFO L87 Difference]: Start difference. First operand 323 states and 440 transitions. Second operand 7 states. [2018-11-18 09:40:26,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:26,931 INFO L93 Difference]: Finished difference Result 544 states and 755 transitions. [2018-11-18 09:40:26,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:40:26,932 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-11-18 09:40:26,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:26,934 INFO L225 Difference]: With dead ends: 544 [2018-11-18 09:40:26,934 INFO L226 Difference]: Without dead ends: 327 [2018-11-18 09:40:26,935 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:40:26,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-11-18 09:40:26,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 323. [2018-11-18 09:40:26,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-11-18 09:40:26,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 440 transitions. [2018-11-18 09:40:26,953 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 440 transitions. Word has length 96 [2018-11-18 09:40:26,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:26,953 INFO L480 AbstractCegarLoop]: Abstraction has 323 states and 440 transitions. [2018-11-18 09:40:26,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:40:26,953 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 440 transitions. [2018-11-18 09:40:26,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-18 09:40:26,955 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:26,955 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:26,955 INFO L423 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:26,956 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:26,956 INFO L82 PathProgramCache]: Analyzing trace with hash -620438523, now seen corresponding path program 1 times [2018-11-18 09:40:26,956 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:26,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:26,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:26,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:26,957 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:26,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:27,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:27,048 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:27,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:27,049 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:27,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:27,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:27,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:27,050 INFO L87 Difference]: Start difference. First operand 323 states and 440 transitions. Second operand 7 states. [2018-11-18 09:40:27,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:27,870 INFO L93 Difference]: Finished difference Result 545 states and 759 transitions. [2018-11-18 09:40:27,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:40:27,870 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 98 [2018-11-18 09:40:27,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:27,871 INFO L225 Difference]: With dead ends: 545 [2018-11-18 09:40:27,871 INFO L226 Difference]: Without dead ends: 328 [2018-11-18 09:40:27,872 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:40:27,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-11-18 09:40:27,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 324. [2018-11-18 09:40:27,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2018-11-18 09:40:27,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 441 transitions. [2018-11-18 09:40:27,890 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 441 transitions. Word has length 98 [2018-11-18 09:40:27,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:27,891 INFO L480 AbstractCegarLoop]: Abstraction has 324 states and 441 transitions. [2018-11-18 09:40:27,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:40:27,891 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 441 transitions. [2018-11-18 09:40:27,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-18 09:40:27,892 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:27,892 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:27,892 INFO L423 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:27,893 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:27,893 INFO L82 PathProgramCache]: Analyzing trace with hash -447021426, now seen corresponding path program 1 times [2018-11-18 09:40:27,893 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:27,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:27,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:27,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:27,895 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:27,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:27,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:27,970 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:27,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:27,970 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:27,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:27,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:27,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:27,971 INFO L87 Difference]: Start difference. First operand 324 states and 441 transitions. Second operand 3 states. [2018-11-18 09:40:28,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:28,008 INFO L93 Difference]: Finished difference Result 777 states and 1082 transitions. [2018-11-18 09:40:28,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:28,009 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-11-18 09:40:28,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:28,012 INFO L225 Difference]: With dead ends: 777 [2018-11-18 09:40:28,012 INFO L226 Difference]: Without dead ends: 559 [2018-11-18 09:40:28,014 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:28,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 559 states. [2018-11-18 09:40:28,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 559 to 541. [2018-11-18 09:40:28,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 541 states. [2018-11-18 09:40:28,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 541 states to 541 states and 749 transitions. [2018-11-18 09:40:28,044 INFO L78 Accepts]: Start accepts. Automaton has 541 states and 749 transitions. Word has length 98 [2018-11-18 09:40:28,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:28,045 INFO L480 AbstractCegarLoop]: Abstraction has 541 states and 749 transitions. [2018-11-18 09:40:28,045 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:28,045 INFO L276 IsEmpty]: Start isEmpty. Operand 541 states and 749 transitions. [2018-11-18 09:40:28,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-18 09:40:28,046 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:28,046 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:28,046 INFO L423 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:28,047 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:28,047 INFO L82 PathProgramCache]: Analyzing trace with hash -440450166, now seen corresponding path program 1 times [2018-11-18 09:40:28,047 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:28,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:28,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,048 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:28,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:28,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:28,105 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:28,105 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:28,105 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:28,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:28,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:28,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:28,106 INFO L87 Difference]: Start difference. First operand 541 states and 749 transitions. Second operand 3 states. [2018-11-18 09:40:28,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:28,185 INFO L93 Difference]: Finished difference Result 1288 states and 1826 transitions. [2018-11-18 09:40:28,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:28,185 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2018-11-18 09:40:28,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:28,189 INFO L225 Difference]: With dead ends: 1288 [2018-11-18 09:40:28,189 INFO L226 Difference]: Without dead ends: 896 [2018-11-18 09:40:28,192 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:28,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 896 states. [2018-11-18 09:40:28,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 896 to 890. [2018-11-18 09:40:28,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 890 states. [2018-11-18 09:40:28,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 890 states to 890 states and 1251 transitions. [2018-11-18 09:40:28,244 INFO L78 Accepts]: Start accepts. Automaton has 890 states and 1251 transitions. Word has length 99 [2018-11-18 09:40:28,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:28,245 INFO L480 AbstractCegarLoop]: Abstraction has 890 states and 1251 transitions. [2018-11-18 09:40:28,245 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:28,245 INFO L276 IsEmpty]: Start isEmpty. Operand 890 states and 1251 transitions. [2018-11-18 09:40:28,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-18 09:40:28,246 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:28,246 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:28,247 INFO L423 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:28,247 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:28,247 INFO L82 PathProgramCache]: Analyzing trace with hash 260614412, now seen corresponding path program 1 times [2018-11-18 09:40:28,247 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:28,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,248 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:28,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,248 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:28,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:28,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:28,290 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:28,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:28,291 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:28,291 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:28,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:28,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:28,292 INFO L87 Difference]: Start difference. First operand 890 states and 1251 transitions. Second operand 3 states. [2018-11-18 09:40:28,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:28,342 INFO L93 Difference]: Finished difference Result 1504 states and 2128 transitions. [2018-11-18 09:40:28,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:28,343 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2018-11-18 09:40:28,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:28,346 INFO L225 Difference]: With dead ends: 1504 [2018-11-18 09:40:28,346 INFO L226 Difference]: Without dead ends: 728 [2018-11-18 09:40:28,349 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:28,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states. [2018-11-18 09:40:28,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 728. [2018-11-18 09:40:28,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 728 states. [2018-11-18 09:40:28,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 1014 transitions. [2018-11-18 09:40:28,383 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 1014 transitions. Word has length 99 [2018-11-18 09:40:28,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:28,383 INFO L480 AbstractCegarLoop]: Abstraction has 728 states and 1014 transitions. [2018-11-18 09:40:28,383 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:28,383 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 1014 transitions. [2018-11-18 09:40:28,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-18 09:40:28,384 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:28,384 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:28,385 INFO L423 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:28,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:28,385 INFO L82 PathProgramCache]: Analyzing trace with hash 905368963, now seen corresponding path program 1 times [2018-11-18 09:40:28,385 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:28,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,386 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:28,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,386 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:28,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:28,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:28,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:28,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:28,453 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:28,453 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:28,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:28,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:28,455 INFO L87 Difference]: Start difference. First operand 728 states and 1014 transitions. Second operand 4 states. [2018-11-18 09:40:28,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:28,513 INFO L93 Difference]: Finished difference Result 1319 states and 1864 transitions. [2018-11-18 09:40:28,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:28,514 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 99 [2018-11-18 09:40:28,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:28,517 INFO L225 Difference]: With dead ends: 1319 [2018-11-18 09:40:28,517 INFO L226 Difference]: Without dead ends: 743 [2018-11-18 09:40:28,521 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:28,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 743 states. [2018-11-18 09:40:28,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 743 to 743. [2018-11-18 09:40:28,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 743 states. [2018-11-18 09:40:28,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 743 states to 743 states and 1026 transitions. [2018-11-18 09:40:28,559 INFO L78 Accepts]: Start accepts. Automaton has 743 states and 1026 transitions. Word has length 99 [2018-11-18 09:40:28,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:28,561 INFO L480 AbstractCegarLoop]: Abstraction has 743 states and 1026 transitions. [2018-11-18 09:40:28,561 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:28,561 INFO L276 IsEmpty]: Start isEmpty. Operand 743 states and 1026 transitions. [2018-11-18 09:40:28,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 09:40:28,562 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:28,562 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:28,563 INFO L423 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:28,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:28,563 INFO L82 PathProgramCache]: Analyzing trace with hash -1614163965, now seen corresponding path program 1 times [2018-11-18 09:40:28,563 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:28,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:28,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,567 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:28,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:28,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:28,674 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:28,674 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:28,674 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:28,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:28,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:28,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:28,675 INFO L87 Difference]: Start difference. First operand 743 states and 1026 transitions. Second operand 4 states. [2018-11-18 09:40:28,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:28,733 INFO L93 Difference]: Finished difference Result 1349 states and 1897 transitions. [2018-11-18 09:40:28,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:28,733 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2018-11-18 09:40:28,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:28,736 INFO L225 Difference]: With dead ends: 1349 [2018-11-18 09:40:28,736 INFO L226 Difference]: Without dead ends: 758 [2018-11-18 09:40:28,739 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:28,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 758 states. [2018-11-18 09:40:28,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 758 to 758. [2018-11-18 09:40:28,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 758 states. [2018-11-18 09:40:28,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 758 states to 758 states and 1038 transitions. [2018-11-18 09:40:28,772 INFO L78 Accepts]: Start accepts. Automaton has 758 states and 1038 transitions. Word has length 107 [2018-11-18 09:40:28,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:28,772 INFO L480 AbstractCegarLoop]: Abstraction has 758 states and 1038 transitions. [2018-11-18 09:40:28,772 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:28,772 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states and 1038 transitions. [2018-11-18 09:40:28,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-18 09:40:28,775 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:28,775 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:28,775 INFO L423 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:28,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:28,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1162651347, now seen corresponding path program 1 times [2018-11-18 09:40:28,775 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:28,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:28,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,777 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:28,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:28,827 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:28,827 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:28,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:28,828 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:28,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:28,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:28,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:28,828 INFO L87 Difference]: Start difference. First operand 758 states and 1038 transitions. Second operand 4 states. [2018-11-18 09:40:28,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:28,881 INFO L93 Difference]: Finished difference Result 1376 states and 1909 transitions. [2018-11-18 09:40:28,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:28,882 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-11-18 09:40:28,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:28,885 INFO L225 Difference]: With dead ends: 1376 [2018-11-18 09:40:28,885 INFO L226 Difference]: Without dead ends: 770 [2018-11-18 09:40:28,887 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:28,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 770 states. [2018-11-18 09:40:28,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 770 to 770. [2018-11-18 09:40:28,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 770 states. [2018-11-18 09:40:28,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 770 states to 770 states and 1047 transitions. [2018-11-18 09:40:28,921 INFO L78 Accepts]: Start accepts. Automaton has 770 states and 1047 transitions. Word has length 115 [2018-11-18 09:40:28,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:28,921 INFO L480 AbstractCegarLoop]: Abstraction has 770 states and 1047 transitions. [2018-11-18 09:40:28,921 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:28,921 INFO L276 IsEmpty]: Start isEmpty. Operand 770 states and 1047 transitions. [2018-11-18 09:40:28,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-11-18 09:40:28,924 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:28,925 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:28,925 INFO L423 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:28,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:28,925 INFO L82 PathProgramCache]: Analyzing trace with hash 959780123, now seen corresponding path program 1 times [2018-11-18 09:40:28,925 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:28,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:28,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:28,926 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:28,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:28,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:28,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:28,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:28,978 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:28,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:28,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:28,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:28,978 INFO L87 Difference]: Start difference. First operand 770 states and 1047 transitions. Second operand 4 states. [2018-11-18 09:40:29,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:29,068 INFO L93 Difference]: Finished difference Result 1403 states and 1939 transitions. [2018-11-18 09:40:29,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:29,069 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-11-18 09:40:29,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:29,072 INFO L225 Difference]: With dead ends: 1403 [2018-11-18 09:40:29,072 INFO L226 Difference]: Without dead ends: 785 [2018-11-18 09:40:29,073 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:29,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 785 states. [2018-11-18 09:40:29,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 785 to 785. [2018-11-18 09:40:29,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 785 states. [2018-11-18 09:40:29,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 785 states to 785 states and 1059 transitions. [2018-11-18 09:40:29,105 INFO L78 Accepts]: Start accepts. Automaton has 785 states and 1059 transitions. Word has length 115 [2018-11-18 09:40:29,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:29,105 INFO L480 AbstractCegarLoop]: Abstraction has 785 states and 1059 transitions. [2018-11-18 09:40:29,105 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:29,105 INFO L276 IsEmpty]: Start isEmpty. Operand 785 states and 1059 transitions. [2018-11-18 09:40:29,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-11-18 09:40:29,108 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:29,108 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:29,108 INFO L423 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:29,108 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:29,108 INFO L82 PathProgramCache]: Analyzing trace with hash 1892908141, now seen corresponding path program 1 times [2018-11-18 09:40:29,109 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:29,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:29,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:29,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:29,110 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:29,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:29,175 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 09:40:29,175 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:29,176 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:29,176 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:29,176 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:29,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:29,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:29,176 INFO L87 Difference]: Start difference. First operand 785 states and 1059 transitions. Second operand 4 states. [2018-11-18 09:40:29,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:29,228 INFO L93 Difference]: Finished difference Result 1436 states and 1960 transitions. [2018-11-18 09:40:29,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:29,228 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 123 [2018-11-18 09:40:29,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:29,232 INFO L225 Difference]: With dead ends: 1436 [2018-11-18 09:40:29,232 INFO L226 Difference]: Without dead ends: 803 [2018-11-18 09:40:29,234 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:29,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 803 states. [2018-11-18 09:40:29,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 803 to 803. [2018-11-18 09:40:29,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 803 states. [2018-11-18 09:40:29,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 803 states to 803 states and 1074 transitions. [2018-11-18 09:40:29,266 INFO L78 Accepts]: Start accepts. Automaton has 803 states and 1074 transitions. Word has length 123 [2018-11-18 09:40:29,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:29,267 INFO L480 AbstractCegarLoop]: Abstraction has 803 states and 1074 transitions. [2018-11-18 09:40:29,267 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:29,267 INFO L276 IsEmpty]: Start isEmpty. Operand 803 states and 1074 transitions. [2018-11-18 09:40:29,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-11-18 09:40:29,269 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:29,269 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:29,269 INFO L423 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:29,269 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:29,270 INFO L82 PathProgramCache]: Analyzing trace with hash 352883232, now seen corresponding path program 1 times [2018-11-18 09:40:29,270 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:29,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:29,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:29,271 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:29,271 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:29,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:29,400 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 09:40:29,400 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:29,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 09:40:29,400 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:29,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 09:40:29,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 09:40:29,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-18 09:40:29,401 INFO L87 Difference]: Start difference. First operand 803 states and 1074 transitions. Second operand 10 states. [2018-11-18 09:40:31,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:31,315 INFO L93 Difference]: Finished difference Result 2101 states and 2792 transitions. [2018-11-18 09:40:31,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 09:40:31,316 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 128 [2018-11-18 09:40:31,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:31,321 INFO L225 Difference]: With dead ends: 2101 [2018-11-18 09:40:31,321 INFO L226 Difference]: Without dead ends: 1435 [2018-11-18 09:40:31,323 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-11-18 09:40:31,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1435 states. [2018-11-18 09:40:31,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1435 to 1338. [2018-11-18 09:40:31,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1338 states. [2018-11-18 09:40:31,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1338 states to 1338 states and 1755 transitions. [2018-11-18 09:40:31,381 INFO L78 Accepts]: Start accepts. Automaton has 1338 states and 1755 transitions. Word has length 128 [2018-11-18 09:40:31,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:31,382 INFO L480 AbstractCegarLoop]: Abstraction has 1338 states and 1755 transitions. [2018-11-18 09:40:31,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 09:40:31,382 INFO L276 IsEmpty]: Start isEmpty. Operand 1338 states and 1755 transitions. [2018-11-18 09:40:31,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-11-18 09:40:31,384 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:31,384 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:31,384 INFO L423 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:31,384 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:31,384 INFO L82 PathProgramCache]: Analyzing trace with hash 685891785, now seen corresponding path program 1 times [2018-11-18 09:40:31,384 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:31,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:31,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:31,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:31,385 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:31,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:31,436 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 09:40:31,437 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:31,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:31,437 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:31,437 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:31,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:31,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:31,438 INFO L87 Difference]: Start difference. First operand 1338 states and 1755 transitions. Second operand 4 states. [2018-11-18 09:40:31,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:31,500 INFO L93 Difference]: Finished difference Result 2430 states and 3211 transitions. [2018-11-18 09:40:31,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:31,501 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 130 [2018-11-18 09:40:31,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:31,506 INFO L225 Difference]: With dead ends: 2430 [2018-11-18 09:40:31,506 INFO L226 Difference]: Without dead ends: 1350 [2018-11-18 09:40:31,509 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:31,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1350 states. [2018-11-18 09:40:31,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1350 to 1344. [2018-11-18 09:40:31,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1344 states. [2018-11-18 09:40:31,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1344 states to 1344 states and 1742 transitions. [2018-11-18 09:40:31,564 INFO L78 Accepts]: Start accepts. Automaton has 1344 states and 1742 transitions. Word has length 130 [2018-11-18 09:40:31,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:31,565 INFO L480 AbstractCegarLoop]: Abstraction has 1344 states and 1742 transitions. [2018-11-18 09:40:31,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:31,565 INFO L276 IsEmpty]: Start isEmpty. Operand 1344 states and 1742 transitions. [2018-11-18 09:40:31,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-18 09:40:31,567 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:31,567 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:31,567 INFO L423 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:31,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:31,567 INFO L82 PathProgramCache]: Analyzing trace with hash 20813385, now seen corresponding path program 1 times [2018-11-18 09:40:31,567 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:31,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:31,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:31,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:31,568 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:31,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:31,628 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 09:40:31,628 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:31,628 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:31,628 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:31,628 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:31,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:31,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:31,629 INFO L87 Difference]: Start difference. First operand 1344 states and 1742 transitions. Second operand 7 states. [2018-11-18 09:40:31,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:31,720 INFO L93 Difference]: Finished difference Result 1427 states and 1868 transitions. [2018-11-18 09:40:31,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 09:40:31,721 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 131 [2018-11-18 09:40:31,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:31,726 INFO L225 Difference]: With dead ends: 1427 [2018-11-18 09:40:31,726 INFO L226 Difference]: Without dead ends: 1425 [2018-11-18 09:40:31,727 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:31,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1425 states. [2018-11-18 09:40:31,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1425 to 1368. [2018-11-18 09:40:31,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1368 states. [2018-11-18 09:40:31,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1368 states to 1368 states and 1772 transitions. [2018-11-18 09:40:31,786 INFO L78 Accepts]: Start accepts. Automaton has 1368 states and 1772 transitions. Word has length 131 [2018-11-18 09:40:31,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:31,787 INFO L480 AbstractCegarLoop]: Abstraction has 1368 states and 1772 transitions. [2018-11-18 09:40:31,787 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:40:31,787 INFO L276 IsEmpty]: Start isEmpty. Operand 1368 states and 1772 transitions. [2018-11-18 09:40:31,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-11-18 09:40:31,789 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:31,789 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:31,789 INFO L423 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:31,789 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:31,789 INFO L82 PathProgramCache]: Analyzing trace with hash -1327923860, now seen corresponding path program 1 times [2018-11-18 09:40:31,789 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:31,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:31,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:31,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:31,790 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:31,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:31,882 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 09:40:31,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:31,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:40:31,883 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:31,883 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:40:31,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:40:31,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:31,883 INFO L87 Difference]: Start difference. First operand 1368 states and 1772 transitions. Second operand 9 states. [2018-11-18 09:40:33,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:33,132 INFO L93 Difference]: Finished difference Result 2834 states and 3642 transitions. [2018-11-18 09:40:33,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 09:40:33,132 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 132 [2018-11-18 09:40:33,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:33,137 INFO L225 Difference]: With dead ends: 2834 [2018-11-18 09:40:33,137 INFO L226 Difference]: Without dead ends: 1775 [2018-11-18 09:40:33,139 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2018-11-18 09:40:33,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1775 states. [2018-11-18 09:40:33,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1775 to 1488. [2018-11-18 09:40:33,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1488 states. [2018-11-18 09:40:33,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1488 states to 1488 states and 1899 transitions. [2018-11-18 09:40:33,180 INFO L78 Accepts]: Start accepts. Automaton has 1488 states and 1899 transitions. Word has length 132 [2018-11-18 09:40:33,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:33,181 INFO L480 AbstractCegarLoop]: Abstraction has 1488 states and 1899 transitions. [2018-11-18 09:40:33,181 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:40:33,181 INFO L276 IsEmpty]: Start isEmpty. Operand 1488 states and 1899 transitions. [2018-11-18 09:40:33,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-11-18 09:40:33,182 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:33,182 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:33,183 INFO L423 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:33,183 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:33,183 INFO L82 PathProgramCache]: Analyzing trace with hash 693200996, now seen corresponding path program 1 times [2018-11-18 09:40:33,183 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:33,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:33,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:33,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:33,184 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:33,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:33,287 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 09:40:33,287 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:33,287 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 09:40:33,287 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:33,287 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 09:40:33,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 09:40:33,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-18 09:40:33,288 INFO L87 Difference]: Start difference. First operand 1488 states and 1899 transitions. Second operand 10 states. [2018-11-18 09:40:34,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:34,928 INFO L93 Difference]: Finished difference Result 3897 states and 4951 transitions. [2018-11-18 09:40:34,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 09:40:34,929 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 136 [2018-11-18 09:40:34,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:34,935 INFO L225 Difference]: With dead ends: 3897 [2018-11-18 09:40:34,935 INFO L226 Difference]: Without dead ends: 2760 [2018-11-18 09:40:34,937 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-11-18 09:40:34,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2760 states. [2018-11-18 09:40:34,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2760 to 1913. [2018-11-18 09:40:34,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1913 states. [2018-11-18 09:40:35,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1913 states to 1913 states and 2429 transitions. [2018-11-18 09:40:35,000 INFO L78 Accepts]: Start accepts. Automaton has 1913 states and 2429 transitions. Word has length 136 [2018-11-18 09:40:35,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:35,001 INFO L480 AbstractCegarLoop]: Abstraction has 1913 states and 2429 transitions. [2018-11-18 09:40:35,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 09:40:35,001 INFO L276 IsEmpty]: Start isEmpty. Operand 1913 states and 2429 transitions. [2018-11-18 09:40:35,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-11-18 09:40:35,002 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:35,002 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:35,003 INFO L423 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:35,003 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:35,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1489721994, now seen corresponding path program 1 times [2018-11-18 09:40:35,003 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:35,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:35,004 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:35,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:35,004 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:35,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:35,047 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:35,047 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:35,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 09:40:35,047 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:35,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 09:40:35,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 09:40:35,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:35,048 INFO L87 Difference]: Start difference. First operand 1913 states and 2429 transitions. Second operand 5 states. [2018-11-18 09:40:35,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:35,391 INFO L93 Difference]: Finished difference Result 6604 states and 8496 transitions. [2018-11-18 09:40:35,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 09:40:35,392 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 137 [2018-11-18 09:40:35,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:35,406 INFO L225 Difference]: With dead ends: 6604 [2018-11-18 09:40:35,407 INFO L226 Difference]: Without dead ends: 4987 [2018-11-18 09:40:35,411 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:35,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4987 states. [2018-11-18 09:40:35,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4987 to 4529. [2018-11-18 09:40:35,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4529 states. [2018-11-18 09:40:35,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4529 states to 4529 states and 5769 transitions. [2018-11-18 09:40:35,625 INFO L78 Accepts]: Start accepts. Automaton has 4529 states and 5769 transitions. Word has length 137 [2018-11-18 09:40:35,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:35,626 INFO L480 AbstractCegarLoop]: Abstraction has 4529 states and 5769 transitions. [2018-11-18 09:40:35,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 09:40:35,627 INFO L276 IsEmpty]: Start isEmpty. Operand 4529 states and 5769 transitions. [2018-11-18 09:40:35,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 09:40:35,629 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:35,629 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:35,629 INFO L423 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:35,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:35,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1760523800, now seen corresponding path program 1 times [2018-11-18 09:40:35,630 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:35,630 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:35,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:35,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:35,631 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:35,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:35,774 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 09:40:35,774 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:35,774 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:40:35,774 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:35,775 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:40:35,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:40:35,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:35,775 INFO L87 Difference]: Start difference. First operand 4529 states and 5769 transitions. Second operand 9 states. [2018-11-18 09:40:36,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:36,468 INFO L93 Difference]: Finished difference Result 8004 states and 10292 transitions. [2018-11-18 09:40:36,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 09:40:36,469 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 138 [2018-11-18 09:40:36,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:36,480 INFO L225 Difference]: With dead ends: 8004 [2018-11-18 09:40:36,480 INFO L226 Difference]: Without dead ends: 4070 [2018-11-18 09:40:36,486 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-11-18 09:40:36,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4070 states. [2018-11-18 09:40:36,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4070 to 3505. [2018-11-18 09:40:36,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3505 states. [2018-11-18 09:40:36,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3505 states to 3505 states and 4457 transitions. [2018-11-18 09:40:36,649 INFO L78 Accepts]: Start accepts. Automaton has 3505 states and 4457 transitions. Word has length 138 [2018-11-18 09:40:36,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:36,649 INFO L480 AbstractCegarLoop]: Abstraction has 3505 states and 4457 transitions. [2018-11-18 09:40:36,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:40:36,649 INFO L276 IsEmpty]: Start isEmpty. Operand 3505 states and 4457 transitions. [2018-11-18 09:40:36,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-11-18 09:40:36,651 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:36,651 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:36,651 INFO L423 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:36,651 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:36,651 INFO L82 PathProgramCache]: Analyzing trace with hash 1371135616, now seen corresponding path program 1 times [2018-11-18 09:40:36,651 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:36,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:36,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:36,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:36,653 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:36,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:36,731 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 09:40:36,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:36,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:40:36,731 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:36,732 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:40:36,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:40:36,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:36,732 INFO L87 Difference]: Start difference. First operand 3505 states and 4457 transitions. Second operand 9 states. [2018-11-18 09:40:37,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:37,594 INFO L93 Difference]: Finished difference Result 7120 states and 9203 transitions. [2018-11-18 09:40:37,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-18 09:40:37,594 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 139 [2018-11-18 09:40:37,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:37,604 INFO L225 Difference]: With dead ends: 7120 [2018-11-18 09:40:37,605 INFO L226 Difference]: Without dead ends: 3969 [2018-11-18 09:40:37,610 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2018-11-18 09:40:37,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3969 states. [2018-11-18 09:40:37,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3969 to 3405. [2018-11-18 09:40:37,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3405 states. [2018-11-18 09:40:37,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3405 states to 3405 states and 4329 transitions. [2018-11-18 09:40:37,731 INFO L78 Accepts]: Start accepts. Automaton has 3405 states and 4329 transitions. Word has length 139 [2018-11-18 09:40:37,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:37,731 INFO L480 AbstractCegarLoop]: Abstraction has 3405 states and 4329 transitions. [2018-11-18 09:40:37,731 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:40:37,732 INFO L276 IsEmpty]: Start isEmpty. Operand 3405 states and 4329 transitions. [2018-11-18 09:40:37,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-11-18 09:40:37,733 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:37,733 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:37,733 INFO L423 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:37,733 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:37,734 INFO L82 PathProgramCache]: Analyzing trace with hash 482447183, now seen corresponding path program 1 times [2018-11-18 09:40:37,734 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:37,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:37,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:37,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:37,735 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:37,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:37,787 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:37,787 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:37,787 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 09:40:37,787 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:37,788 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 09:40:37,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 09:40:37,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:37,788 INFO L87 Difference]: Start difference. First operand 3405 states and 4329 transitions. Second operand 5 states. [2018-11-18 09:40:38,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:38,209 INFO L93 Difference]: Finished difference Result 10476 states and 13444 transitions. [2018-11-18 09:40:38,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 09:40:38,210 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 140 [2018-11-18 09:40:38,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:38,227 INFO L225 Difference]: With dead ends: 10476 [2018-11-18 09:40:38,227 INFO L226 Difference]: Without dead ends: 7585 [2018-11-18 09:40:38,232 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:38,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7585 states. [2018-11-18 09:40:38,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7585 to 5223. [2018-11-18 09:40:38,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5223 states. [2018-11-18 09:40:38,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5223 states to 5223 states and 6632 transitions. [2018-11-18 09:40:38,431 INFO L78 Accepts]: Start accepts. Automaton has 5223 states and 6632 transitions. Word has length 140 [2018-11-18 09:40:38,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:38,431 INFO L480 AbstractCegarLoop]: Abstraction has 5223 states and 6632 transitions. [2018-11-18 09:40:38,432 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 09:40:38,432 INFO L276 IsEmpty]: Start isEmpty. Operand 5223 states and 6632 transitions. [2018-11-18 09:40:38,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-11-18 09:40:38,434 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:38,434 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:38,434 INFO L423 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:38,434 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:38,435 INFO L82 PathProgramCache]: Analyzing trace with hash 331416222, now seen corresponding path program 1 times [2018-11-18 09:40:38,435 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:38,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:38,436 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:38,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:38,436 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:38,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:38,507 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:38,508 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:38,508 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 09:40:38,508 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:38,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 09:40:38,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 09:40:38,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:38,510 INFO L87 Difference]: Start difference. First operand 5223 states and 6632 transitions. Second operand 5 states. [2018-11-18 09:40:39,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:39,133 INFO L93 Difference]: Finished difference Result 12119 states and 15457 transitions. [2018-11-18 09:40:39,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 09:40:39,133 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 140 [2018-11-18 09:40:39,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:39,154 INFO L225 Difference]: With dead ends: 12119 [2018-11-18 09:40:39,154 INFO L226 Difference]: Without dead ends: 7547 [2018-11-18 09:40:39,163 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:39,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7547 states. [2018-11-18 09:40:39,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7547 to 6998. [2018-11-18 09:40:39,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6998 states. [2018-11-18 09:40:39,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6998 states to 6998 states and 8840 transitions. [2018-11-18 09:40:39,487 INFO L78 Accepts]: Start accepts. Automaton has 6998 states and 8840 transitions. Word has length 140 [2018-11-18 09:40:39,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:39,488 INFO L480 AbstractCegarLoop]: Abstraction has 6998 states and 8840 transitions. [2018-11-18 09:40:39,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 09:40:39,488 INFO L276 IsEmpty]: Start isEmpty. Operand 6998 states and 8840 transitions. [2018-11-18 09:40:39,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-18 09:40:39,490 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:39,491 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:39,491 INFO L423 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:39,491 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:39,491 INFO L82 PathProgramCache]: Analyzing trace with hash 1531906141, now seen corresponding path program 1 times [2018-11-18 09:40:39,491 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:39,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:39,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:39,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:39,492 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:39,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:39,527 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:39,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:39,527 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:39,527 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:39,528 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:39,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:39,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:39,528 INFO L87 Difference]: Start difference. First operand 6998 states and 8840 transitions. Second operand 3 states. [2018-11-18 09:40:39,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:39,985 INFO L93 Difference]: Finished difference Result 13479 states and 17105 transitions. [2018-11-18 09:40:39,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:39,986 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 141 [2018-11-18 09:40:39,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:39,999 INFO L225 Difference]: With dead ends: 13479 [2018-11-18 09:40:39,999 INFO L226 Difference]: Without dead ends: 7067 [2018-11-18 09:40:40,007 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:40,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7067 states. [2018-11-18 09:40:40,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7067 to 7004. [2018-11-18 09:40:40,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7004 states. [2018-11-18 09:40:40,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7004 states to 7004 states and 8846 transitions. [2018-11-18 09:40:40,347 INFO L78 Accepts]: Start accepts. Automaton has 7004 states and 8846 transitions. Word has length 141 [2018-11-18 09:40:40,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:40,348 INFO L480 AbstractCegarLoop]: Abstraction has 7004 states and 8846 transitions. [2018-11-18 09:40:40,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:40,348 INFO L276 IsEmpty]: Start isEmpty. Operand 7004 states and 8846 transitions. [2018-11-18 09:40:40,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-11-18 09:40:40,350 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:40,350 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:40,350 INFO L423 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:40,350 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:40,351 INFO L82 PathProgramCache]: Analyzing trace with hash 1537227994, now seen corresponding path program 1 times [2018-11-18 09:40:40,351 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:40,351 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:40,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:40,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:40,352 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:40,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:40,538 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:40,538 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:40,538 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-18 09:40:40,538 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:40,538 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 09:40:40,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 09:40:40,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-11-18 09:40:40,539 INFO L87 Difference]: Start difference. First operand 7004 states and 8846 transitions. Second operand 11 states. [2018-11-18 09:40:41,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:41,710 INFO L93 Difference]: Finished difference Result 13412 states and 17005 transitions. [2018-11-18 09:40:41,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-18 09:40:41,711 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 142 [2018-11-18 09:40:41,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:41,729 INFO L225 Difference]: With dead ends: 13412 [2018-11-18 09:40:41,729 INFO L226 Difference]: Without dead ends: 6564 [2018-11-18 09:40:41,742 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=460, Unknown=0, NotChecked=0, Total=600 [2018-11-18 09:40:41,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6564 states. [2018-11-18 09:40:42,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6564 to 6512. [2018-11-18 09:40:42,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6512 states. [2018-11-18 09:40:42,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6512 states to 6512 states and 8251 transitions. [2018-11-18 09:40:42,191 INFO L78 Accepts]: Start accepts. Automaton has 6512 states and 8251 transitions. Word has length 142 [2018-11-18 09:40:42,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:42,191 INFO L480 AbstractCegarLoop]: Abstraction has 6512 states and 8251 transitions. [2018-11-18 09:40:42,191 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 09:40:42,191 INFO L276 IsEmpty]: Start isEmpty. Operand 6512 states and 8251 transitions. [2018-11-18 09:40:42,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-11-18 09:40:42,192 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:42,193 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:42,193 INFO L423 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:42,193 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:42,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1702030186, now seen corresponding path program 1 times [2018-11-18 09:40:42,193 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:42,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:42,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:42,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:42,194 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:42,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:42,343 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:42,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:42,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 09:40:42,343 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:42,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 09:40:42,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 09:40:42,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-11-18 09:40:42,344 INFO L87 Difference]: Start difference. First operand 6512 states and 8251 transitions. Second operand 10 states. [2018-11-18 09:40:43,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:43,624 INFO L93 Difference]: Finished difference Result 12873 states and 16356 transitions. [2018-11-18 09:40:43,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 09:40:43,625 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 143 [2018-11-18 09:40:43,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:43,642 INFO L225 Difference]: With dead ends: 12873 [2018-11-18 09:40:43,642 INFO L226 Difference]: Without dead ends: 6630 [2018-11-18 09:40:43,652 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=113, Invalid=349, Unknown=0, NotChecked=0, Total=462 [2018-11-18 09:40:43,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6630 states. [2018-11-18 09:40:44,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6630 to 6306. [2018-11-18 09:40:44,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6306 states. [2018-11-18 09:40:44,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6306 states to 6306 states and 7977 transitions. [2018-11-18 09:40:44,070 INFO L78 Accepts]: Start accepts. Automaton has 6306 states and 7977 transitions. Word has length 143 [2018-11-18 09:40:44,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:44,070 INFO L480 AbstractCegarLoop]: Abstraction has 6306 states and 7977 transitions. [2018-11-18 09:40:44,070 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 09:40:44,071 INFO L276 IsEmpty]: Start isEmpty. Operand 6306 states and 7977 transitions. [2018-11-18 09:40:44,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-11-18 09:40:44,072 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:44,072 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:44,072 INFO L423 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:44,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:44,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1697525218, now seen corresponding path program 1 times [2018-11-18 09:40:44,073 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:44,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:44,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:44,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:44,074 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:44,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:44,140 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:44,140 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:44,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:44,140 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 09:40:44,140 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:44,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:44,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:44,141 INFO L87 Difference]: Start difference. First operand 6306 states and 7977 transitions. Second operand 4 states. [2018-11-18 09:40:44,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:44,526 INFO L93 Difference]: Finished difference Result 12304 states and 15625 transitions. [2018-11-18 09:40:44,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:44,526 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 144 [2018-11-18 09:40:44,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:44,535 INFO L225 Difference]: With dead ends: 12304 [2018-11-18 09:40:44,535 INFO L226 Difference]: Without dead ends: 6267 [2018-11-18 09:40:44,541 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:44,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6267 states. [2018-11-18 09:40:44,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6267 to 6173. [2018-11-18 09:40:44,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6173 states. [2018-11-18 09:40:44,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6173 states to 6173 states and 7819 transitions. [2018-11-18 09:40:44,797 INFO L78 Accepts]: Start accepts. Automaton has 6173 states and 7819 transitions. Word has length 144 [2018-11-18 09:40:44,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:44,797 INFO L480 AbstractCegarLoop]: Abstraction has 6173 states and 7819 transitions. [2018-11-18 09:40:44,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:44,797 INFO L276 IsEmpty]: Start isEmpty. Operand 6173 states and 7819 transitions. [2018-11-18 09:40:44,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2018-11-18 09:40:44,801 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:44,801 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:44,801 INFO L423 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:44,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:44,801 INFO L82 PathProgramCache]: Analyzing trace with hash 570634009, now seen corresponding path program 1 times [2018-11-18 09:40:44,801 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 09:40:44,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:44,802 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:44,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 09:40:44,802 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 09:40:44,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:45,061 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2018-11-18 09:40:45,061 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:40:45,061 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 09:40:45,062 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 236 with the following transitions: [2018-11-18 09:40:45,064 INFO L202 CegarAbsIntRunner]: [0], [4], [7], [15], [16], [42], [45], [82], [86], [89], [93], [96], [100], [101], [105], [109], [113], [117], [121], [125], [129], [133], [137], [141], [145], [149], [150], [160], [161], [162], [166], [171], [173], [178], [180], [185], [187], [247], [248], [250], [254], [260], [265], [267], [274], [277], [286], [288], [355], [358], [361], [363], [366], [368], [371], [389], [392], [423], [426], [467], [469], [470], [471], [475], [479], [482], [486], [487], [488], [489], [490], [491], [492], [496], [499], [507], [508], [511], [513], [516], [518], [519], [521], [524], [526], [531], [542], [554], [557], [558], [562], [565], [573], [577], [580], [581], [585], [588], [592], [593], [594], [595], [596], [599], [600], [603], [604], [607], [608], [609], [610], [611], [612], [613], [614], [615], [616], [617], [618], [619], [620], [621], [622], [631], [632], [633], [634], [635], [636], [639], [640], [647], [648], [663], [664], [667], [668], [669], [670], [673], [674], [675] [2018-11-18 09:40:45,094 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 09:40:45,094 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 09:40:45,190 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.handleInfeasibleCase(BaseRefinementStrategy.java:296) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:206) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:209) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translateStore(MappedTerm2Expression.java:288) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:157) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:165) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.MappedTerm2Expression.translate(MappedTerm2Expression.java:129) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.AssumptionBuilder.constructBoogieAssumeStatement(AssumptionBuilder.java:75) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.getCachedCodeBlock(TermConjunctEvaluator.java:273) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.applyPost(TermConjunctEvaluator.java:296) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.lambda$4(TermConjunctEvaluator.java:178) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.computeFixpoint(TermConjunctEvaluator.java:198) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.lambda$1(TermConjunctEvaluator.java:150) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.util.TermConjunctEvaluator.computePost(TermConjunctEvaluator.java:93) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormanCachedPostOperation.applyPost(PoormanCachedPostOperation.java:308) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.applyPost(PoormansAbstractPostOperator.java:217) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:119) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.lambda$17(DisjunctiveAbstractState.java:340) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.mapCollection(DisjunctiveAbstractState.java:536) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.apply(DisjunctiveAbstractState.java:340) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateAbstractPost(FixpointEngine.java:249) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateFixpoint(FixpointEngine.java:134) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.run(FixpointEngine.java:105) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.tool.AbstractInterpreter.runWithoutTimeoutAndResults(AbstractInterpreter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarAbsIntRunner.generateFixpoints(CegarAbsIntRunner.java:217) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.constructInterpolantGenerator(BaseTaipanRefinementStrategy.java:379) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getInterpolantGenerator(BaseTaipanRefinementStrategy.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:380) ... 20 more [2018-11-18 09:40:45,194 INFO L168 Benchmark]: Toolchain (without parser) took 21593.89 ms. Allocated memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: 995.1 MB). Free memory was 960.3 MB in the beginning and 1.1 GB in the end (delta: -90.4 MB). Peak memory consumption was 904.7 MB. Max. memory is 11.5 GB. [2018-11-18 09:40:45,195 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 09:40:45,195 INFO L168 Benchmark]: CACSL2BoogieTranslator took 316.33 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 957.6 MB in the beginning and 1.1 GB in the end (delta: -178.1 MB). Peak memory consumption was 30.3 MB. Max. memory is 11.5 GB. [2018-11-18 09:40:45,196 INFO L168 Benchmark]: Boogie Procedure Inliner took 20.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-18 09:40:45,196 INFO L168 Benchmark]: Boogie Preprocessor took 31.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-18 09:40:45,197 INFO L168 Benchmark]: RCFGBuilder took 579.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 62.7 MB). Peak memory consumption was 62.7 MB. Max. memory is 11.5 GB. [2018-11-18 09:40:45,197 INFO L168 Benchmark]: TraceAbstraction took 20643.35 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 853.5 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 16.8 MB). Peak memory consumption was 870.4 MB. Max. memory is 11.5 GB. [2018-11-18 09:40:45,200 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 316.33 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 957.6 MB in the beginning and 1.1 GB in the end (delta: -178.1 MB). Peak memory consumption was 30.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 20.35 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 31.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 579.62 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 62.7 MB). Peak memory consumption was 62.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20643.35 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 853.5 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 16.8 MB). Peak memory consumption was 870.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)) de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: java.lang.IllegalArgumentException: unknown symbol (const Int (Array Int Int)): de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-5842f4b [2018-11-18 09:40:46,639 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 09:40:46,640 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 09:40:46,648 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 09:40:46,648 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 09:40:46,648 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 09:40:46,649 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 09:40:46,651 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 09:40:46,652 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 09:40:46,652 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 09:40:46,653 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 09:40:46,653 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 09:40:46,654 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 09:40:46,655 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 09:40:46,655 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 09:40:46,656 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 09:40:46,656 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 09:40:46,658 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 09:40:46,660 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 09:40:46,661 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 09:40:46,661 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 09:40:46,663 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 09:40:46,664 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 09:40:46,664 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 09:40:46,664 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 09:40:46,665 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 09:40:46,666 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 09:40:46,666 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 09:40:46,667 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 09:40:46,667 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 09:40:46,667 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 09:40:46,668 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 09:40:46,668 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 09:40:46,668 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 09:40:46,669 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 09:40:46,669 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 09:40:46,670 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-11-18 09:40:46,680 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 09:40:46,680 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 09:40:46,681 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 09:40:46,681 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 09:40:46,681 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 09:40:46,682 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 09:40:46,682 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 09:40:46,682 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 09:40:46,682 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 09:40:46,682 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 09:40:46,682 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 09:40:46,683 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 09:40:46,684 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 09:40:46,684 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 09:40:46,684 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 09:40:46,685 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bd3b02b89b8fe5eebc8d5c8d901354afb3132de1 [2018-11-18 09:40:46,716 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 09:40:46,724 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 09:40:46,726 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 09:40:46,727 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 09:40:46,727 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 09:40:46,728 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c [2018-11-18 09:40:46,762 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/20a6cf50d/5561895fa8a5441fa13c49275908a0cd/FLAG90a96b51f [2018-11-18 09:40:47,186 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 09:40:47,187 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c [2018-11-18 09:40:47,195 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/20a6cf50d/5561895fa8a5441fa13c49275908a0cd/FLAG90a96b51f [2018-11-18 09:40:47,203 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/data/20a6cf50d/5561895fa8a5441fa13c49275908a0cd [2018-11-18 09:40:47,205 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 09:40:47,205 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 09:40:47,206 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 09:40:47,206 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 09:40:47,209 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 09:40:47,210 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,212 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@159f0eb8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47, skipping insertion in model container [2018-11-18 09:40:47,212 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,219 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 09:40:47,249 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 09:40:47,444 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 09:40:47,453 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 09:40:47,505 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 09:40:47,521 INFO L195 MainTranslator]: Completed translation [2018-11-18 09:40:47,521 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47 WrapperNode [2018-11-18 09:40:47,522 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 09:40:47,522 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 09:40:47,522 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 09:40:47,522 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 09:40:47,573 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,582 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,587 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 09:40:47,587 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 09:40:47,587 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 09:40:47,588 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 09:40:47,594 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,594 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,597 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,597 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,607 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,616 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,618 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... [2018-11-18 09:40:47,620 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 09:40:47,620 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 09:40:47,621 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 09:40:47,621 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 09:40:47,621 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 09:40:47,653 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-11-18 09:40:47,653 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-11-18 09:40:47,654 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-11-18 09:40:47,654 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-11-18 09:40:47,654 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-11-18 09:40:47,654 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-11-18 09:40:47,654 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 09:40:47,654 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 09:40:47,654 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-11-18 09:40:47,654 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-11-18 09:40:47,655 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-11-18 09:40:47,655 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-11-18 09:40:47,655 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-11-18 09:40:47,655 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-11-18 09:40:47,655 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-11-18 09:40:47,655 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-11-18 09:40:47,655 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-11-18 09:40:47,656 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-11-18 09:40:47,656 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-11-18 09:40:47,656 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-11-18 09:40:47,656 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-11-18 09:40:47,656 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-11-18 09:40:47,656 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-11-18 09:40:47,656 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-11-18 09:40:47,656 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-11-18 09:40:47,656 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-11-18 09:40:47,657 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-11-18 09:40:47,657 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-11-18 09:40:47,657 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 09:40:47,657 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 09:40:47,657 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-11-18 09:40:47,657 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-11-18 09:40:47,657 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 09:40:47,657 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 09:40:47,657 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-11-18 09:40:47,658 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-11-18 09:40:47,658 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-11-18 09:40:47,658 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-11-18 09:40:48,205 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 09:40:48,206 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:40:48 BoogieIcfgContainer [2018-11-18 09:40:48,206 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 09:40:48,207 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 09:40:48,207 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 09:40:48,209 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 09:40:48,209 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 09:40:47" (1/3) ... [2018-11-18 09:40:48,210 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@673b4e5c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 09:40:48, skipping insertion in model container [2018-11-18 09:40:48,210 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:40:47" (2/3) ... [2018-11-18 09:40:48,210 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@673b4e5c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 09:40:48, skipping insertion in model container [2018-11-18 09:40:48,210 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:40:48" (3/3) ... [2018-11-18 09:40:48,211 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.UNBOUNDED.pals.c [2018-11-18 09:40:48,217 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 09:40:48,222 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 09:40:48,230 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 09:40:48,249 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 09:40:48,250 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 09:40:48,250 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 09:40:48,250 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 09:40:48,250 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 09:40:48,250 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 09:40:48,250 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 09:40:48,251 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 09:40:48,251 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 09:40:48,267 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states. [2018-11-18 09:40:48,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 09:40:48,274 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:48,274 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:48,276 INFO L423 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:48,279 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:48,279 INFO L82 PathProgramCache]: Analyzing trace with hash 116280632, now seen corresponding path program 1 times [2018-11-18 09:40:48,282 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:48,282 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:48,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:48,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:48,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:48,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:48,493 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:48,496 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:48,496 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-18 09:40:48,500 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-18 09:40:48,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-18 09:40:48,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 09:40:48,513 INFO L87 Difference]: Start difference. First operand 237 states. Second operand 2 states. [2018-11-18 09:40:48,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:48,558 INFO L93 Difference]: Finished difference Result 447 states and 691 transitions. [2018-11-18 09:40:48,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-18 09:40:48,559 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 66 [2018-11-18 09:40:48,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:48,570 INFO L225 Difference]: With dead ends: 447 [2018-11-18 09:40:48,570 INFO L226 Difference]: Without dead ends: 232 [2018-11-18 09:40:48,575 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 09:40:48,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-11-18 09:40:48,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 232. [2018-11-18 09:40:48,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-11-18 09:40:48,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 336 transitions. [2018-11-18 09:40:48,625 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 336 transitions. Word has length 66 [2018-11-18 09:40:48,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:48,626 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 336 transitions. [2018-11-18 09:40:48,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-18 09:40:48,626 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 336 transitions. [2018-11-18 09:40:48,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 09:40:48,628 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:48,628 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:48,628 INFO L423 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:48,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:48,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1927708858, now seen corresponding path program 1 times [2018-11-18 09:40:48,629 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:48,629 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:48,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:48,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:48,757 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:48,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:48,781 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:48,782 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:48,783 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:48,784 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:48,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:48,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:48,784 INFO L87 Difference]: Start difference. First operand 232 states and 336 transitions. Second operand 4 states. [2018-11-18 09:40:48,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:48,830 INFO L93 Difference]: Finished difference Result 445 states and 641 transitions. [2018-11-18 09:40:48,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:40:48,830 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-11-18 09:40:48,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:48,832 INFO L225 Difference]: With dead ends: 445 [2018-11-18 09:40:48,832 INFO L226 Difference]: Without dead ends: 232 [2018-11-18 09:40:48,834 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:48,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-11-18 09:40:48,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 232. [2018-11-18 09:40:48,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-11-18 09:40:48,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 324 transitions. [2018-11-18 09:40:48,852 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 324 transitions. Word has length 66 [2018-11-18 09:40:48,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:48,852 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 324 transitions. [2018-11-18 09:40:48,852 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:48,852 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 324 transitions. [2018-11-18 09:40:48,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 09:40:48,855 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:48,855 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:48,855 INFO L423 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:48,855 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:48,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1413847588, now seen corresponding path program 1 times [2018-11-18 09:40:48,856 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:48,856 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:48,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:48,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:48,972 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:49,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:49,004 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:49,005 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:49,005 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:49,006 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:49,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:49,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:49,006 INFO L87 Difference]: Start difference. First operand 232 states and 324 transitions. Second operand 4 states. [2018-11-18 09:40:49,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:49,057 INFO L93 Difference]: Finished difference Result 448 states and 639 transitions. [2018-11-18 09:40:49,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:49,058 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-18 09:40:49,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:49,061 INFO L225 Difference]: With dead ends: 448 [2018-11-18 09:40:49,062 INFO L226 Difference]: Without dead ends: 238 [2018-11-18 09:40:49,063 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:49,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-11-18 09:40:49,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 236. [2018-11-18 09:40:49,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-11-18 09:40:49,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 327 transitions. [2018-11-18 09:40:49,080 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 327 transitions. Word has length 77 [2018-11-18 09:40:49,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:49,080 INFO L480 AbstractCegarLoop]: Abstraction has 236 states and 327 transitions. [2018-11-18 09:40:49,080 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:49,081 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 327 transitions. [2018-11-18 09:40:49,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-18 09:40:49,083 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:49,083 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:49,084 INFO L423 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:49,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:49,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1861015061, now seen corresponding path program 1 times [2018-11-18 09:40:49,084 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:49,084 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:49,106 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:49,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:49,205 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:49,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:49,234 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:49,236 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:49,236 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:49,236 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:49,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:49,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:49,237 INFO L87 Difference]: Start difference. First operand 236 states and 327 transitions. Second operand 3 states. [2018-11-18 09:40:49,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:49,267 INFO L93 Difference]: Finished difference Result 638 states and 903 transitions. [2018-11-18 09:40:49,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:49,268 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 95 [2018-11-18 09:40:49,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:49,271 INFO L225 Difference]: With dead ends: 638 [2018-11-18 09:40:49,271 INFO L226 Difference]: Without dead ends: 424 [2018-11-18 09:40:49,272 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:49,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2018-11-18 09:40:49,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 406. [2018-11-18 09:40:49,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2018-11-18 09:40:49,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 575 transitions. [2018-11-18 09:40:49,298 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 575 transitions. Word has length 95 [2018-11-18 09:40:49,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:49,299 INFO L480 AbstractCegarLoop]: Abstraction has 406 states and 575 transitions. [2018-11-18 09:40:49,299 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:49,299 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 575 transitions. [2018-11-18 09:40:49,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 09:40:49,300 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:49,300 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:49,301 INFO L423 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:49,301 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:49,301 INFO L82 PathProgramCache]: Analyzing trace with hash -1324579891, now seen corresponding path program 1 times [2018-11-18 09:40:49,301 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:49,301 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:49,326 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:49,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:49,436 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:49,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:49,464 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:49,466 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:49,466 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:49,466 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:49,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:49,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:49,467 INFO L87 Difference]: Start difference. First operand 406 states and 575 transitions. Second operand 3 states. [2018-11-18 09:40:49,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:49,535 INFO L93 Difference]: Finished difference Result 1119 states and 1612 transitions. [2018-11-18 09:40:49,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:49,535 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-11-18 09:40:49,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:49,539 INFO L225 Difference]: With dead ends: 1119 [2018-11-18 09:40:49,539 INFO L226 Difference]: Without dead ends: 735 [2018-11-18 09:40:49,541 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:49,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 735 states. [2018-11-18 09:40:49,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 735 to 729. [2018-11-18 09:40:49,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 729 states. [2018-11-18 09:40:49,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 729 states to 729 states and 1047 transitions. [2018-11-18 09:40:49,581 INFO L78 Accepts]: Start accepts. Automaton has 729 states and 1047 transitions. Word has length 96 [2018-11-18 09:40:49,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:49,581 INFO L480 AbstractCegarLoop]: Abstraction has 729 states and 1047 transitions. [2018-11-18 09:40:49,581 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:49,582 INFO L276 IsEmpty]: Start isEmpty. Operand 729 states and 1047 transitions. [2018-11-18 09:40:49,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 09:40:49,584 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:49,584 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:49,584 INFO L423 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:49,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:49,585 INFO L82 PathProgramCache]: Analyzing trace with hash -623515313, now seen corresponding path program 1 times [2018-11-18 09:40:49,585 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:49,585 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:49,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:49,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:49,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:49,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:49,742 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:49,746 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:49,746 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:49,746 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:49,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:49,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:49,747 INFO L87 Difference]: Start difference. First operand 729 states and 1047 transitions. Second operand 3 states. [2018-11-18 09:40:49,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:49,779 INFO L93 Difference]: Finished difference Result 1327 states and 1904 transitions. [2018-11-18 09:40:49,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:49,780 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-11-18 09:40:49,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:49,783 INFO L225 Difference]: With dead ends: 1327 [2018-11-18 09:40:49,783 INFO L226 Difference]: Without dead ends: 586 [2018-11-18 09:40:49,785 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:49,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2018-11-18 09:40:49,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 586. [2018-11-18 09:40:49,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 586 states. [2018-11-18 09:40:49,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 586 states to 586 states and 832 transitions. [2018-11-18 09:40:49,810 INFO L78 Accepts]: Start accepts. Automaton has 586 states and 832 transitions. Word has length 96 [2018-11-18 09:40:49,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:49,810 INFO L480 AbstractCegarLoop]: Abstraction has 586 states and 832 transitions. [2018-11-18 09:40:49,810 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:49,810 INFO L276 IsEmpty]: Start isEmpty. Operand 586 states and 832 transitions. [2018-11-18 09:40:49,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-11-18 09:40:49,812 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:49,812 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:49,812 INFO L423 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:49,812 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:49,812 INFO L82 PathProgramCache]: Analyzing trace with hash 2137440022, now seen corresponding path program 1 times [2018-11-18 09:40:49,812 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:49,813 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:49,834 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:49,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:49,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:49,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:49,965 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:49,967 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:49,967 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:49,967 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:49,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:49,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:49,968 INFO L87 Difference]: Start difference. First operand 586 states and 832 transitions. Second operand 4 states. [2018-11-18 09:40:50,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:50,008 INFO L93 Difference]: Finished difference Result 1171 states and 1673 transitions. [2018-11-18 09:40:50,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:50,009 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2018-11-18 09:40:50,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:50,011 INFO L225 Difference]: With dead ends: 1171 [2018-11-18 09:40:50,011 INFO L226 Difference]: Without dead ends: 607 [2018-11-18 09:40:50,013 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:50,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 607 states. [2018-11-18 09:40:50,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 607 to 601. [2018-11-18 09:40:50,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 601 states. [2018-11-18 09:40:50,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 844 transitions. [2018-11-18 09:40:50,028 INFO L78 Accepts]: Start accepts. Automaton has 601 states and 844 transitions. Word has length 96 [2018-11-18 09:40:50,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:50,029 INFO L480 AbstractCegarLoop]: Abstraction has 601 states and 844 transitions. [2018-11-18 09:40:50,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:50,029 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 844 transitions. [2018-11-18 09:40:50,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-11-18 09:40:50,030 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:50,030 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:50,030 INFO L423 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:50,030 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:50,031 INFO L82 PathProgramCache]: Analyzing trace with hash 1988916886, now seen corresponding path program 1 times [2018-11-18 09:40:50,031 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:50,031 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:50,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:50,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:50,134 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:50,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:50,164 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:50,165 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:50,165 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:50,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:50,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:50,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:50,166 INFO L87 Difference]: Start difference. First operand 601 states and 844 transitions. Second operand 4 states. [2018-11-18 09:40:50,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:50,208 INFO L93 Difference]: Finished difference Result 1201 states and 1712 transitions. [2018-11-18 09:40:50,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:50,208 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 104 [2018-11-18 09:40:50,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:50,211 INFO L225 Difference]: With dead ends: 1201 [2018-11-18 09:40:50,211 INFO L226 Difference]: Without dead ends: 622 [2018-11-18 09:40:50,212 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:50,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 622 states. [2018-11-18 09:40:50,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 622 to 616. [2018-11-18 09:40:50,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 616 states. [2018-11-18 09:40:50,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 616 states to 616 states and 856 transitions. [2018-11-18 09:40:50,229 INFO L78 Accepts]: Start accepts. Automaton has 616 states and 856 transitions. Word has length 104 [2018-11-18 09:40:50,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:50,230 INFO L480 AbstractCegarLoop]: Abstraction has 616 states and 856 transitions. [2018-11-18 09:40:50,230 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:50,230 INFO L276 IsEmpty]: Start isEmpty. Operand 616 states and 856 transitions. [2018-11-18 09:40:50,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-18 09:40:50,231 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:50,231 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:50,231 INFO L423 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:50,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:50,231 INFO L82 PathProgramCache]: Analyzing trace with hash 851164352, now seen corresponding path program 1 times [2018-11-18 09:40:50,232 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:50,232 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:50,248 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:50,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:50,337 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:50,355 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:50,355 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:50,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:50,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:50,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:50,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:50,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:50,357 INFO L87 Difference]: Start difference. First operand 616 states and 856 transitions. Second operand 4 states. [2018-11-18 09:40:50,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:50,391 INFO L93 Difference]: Finished difference Result 1228 states and 1718 transitions. [2018-11-18 09:40:50,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:50,392 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-11-18 09:40:50,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:50,394 INFO L225 Difference]: With dead ends: 1228 [2018-11-18 09:40:50,394 INFO L226 Difference]: Without dead ends: 634 [2018-11-18 09:40:50,395 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:50,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634 states. [2018-11-18 09:40:50,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634 to 628. [2018-11-18 09:40:50,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 628 states. [2018-11-18 09:40:50,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 865 transitions. [2018-11-18 09:40:50,408 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 865 transitions. Word has length 112 [2018-11-18 09:40:50,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:50,408 INFO L480 AbstractCegarLoop]: Abstraction has 628 states and 865 transitions. [2018-11-18 09:40:50,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:50,409 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 865 transitions. [2018-11-18 09:40:50,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-11-18 09:40:50,410 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:50,410 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:50,410 INFO L423 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:50,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:50,410 INFO L82 PathProgramCache]: Analyzing trace with hash -1321371474, now seen corresponding path program 1 times [2018-11-18 09:40:50,411 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:50,411 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:50,424 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:50,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:50,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:50,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:50,534 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:50,536 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:50,536 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:50,536 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:50,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:50,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:50,537 INFO L87 Difference]: Start difference. First operand 628 states and 865 transitions. Second operand 4 states. [2018-11-18 09:40:50,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:50,574 INFO L93 Difference]: Finished difference Result 1255 states and 1754 transitions. [2018-11-18 09:40:50,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:50,575 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-11-18 09:40:50,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:50,577 INFO L225 Difference]: With dead ends: 1255 [2018-11-18 09:40:50,577 INFO L226 Difference]: Without dead ends: 649 [2018-11-18 09:40:50,578 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:50,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2018-11-18 09:40:50,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 643. [2018-11-18 09:40:50,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 643 states. [2018-11-18 09:40:50,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 643 states to 643 states and 877 transitions. [2018-11-18 09:40:50,594 INFO L78 Accepts]: Start accepts. Automaton has 643 states and 877 transitions. Word has length 112 [2018-11-18 09:40:50,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:50,595 INFO L480 AbstractCegarLoop]: Abstraction has 643 states and 877 transitions. [2018-11-18 09:40:50,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:50,595 INFO L276 IsEmpty]: Start isEmpty. Operand 643 states and 877 transitions. [2018-11-18 09:40:50,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-18 09:40:50,597 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:50,597 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:50,597 INFO L423 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:50,597 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:50,597 INFO L82 PathProgramCache]: Analyzing trace with hash -82535168, now seen corresponding path program 1 times [2018-11-18 09:40:50,598 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:50,598 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:50,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:50,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:50,708 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:50,761 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:50,761 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:50,763 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:50,763 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:40:50,763 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:40:50,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:40:50,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:50,764 INFO L87 Difference]: Start difference. First operand 643 states and 877 transitions. Second operand 9 states. [2018-11-18 09:40:51,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:51,112 INFO L93 Difference]: Finished difference Result 1671 states and 2290 transitions. [2018-11-18 09:40:51,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 09:40:51,113 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 120 [2018-11-18 09:40:51,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:51,115 INFO L225 Difference]: With dead ends: 1671 [2018-11-18 09:40:51,116 INFO L226 Difference]: Without dead ends: 1050 [2018-11-18 09:40:51,117 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-11-18 09:40:51,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1050 states. [2018-11-18 09:40:51,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1050 to 922. [2018-11-18 09:40:51,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 922 states. [2018-11-18 09:40:51,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 922 states to 922 states and 1247 transitions. [2018-11-18 09:40:51,140 INFO L78 Accepts]: Start accepts. Automaton has 922 states and 1247 transitions. Word has length 120 [2018-11-18 09:40:51,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:51,140 INFO L480 AbstractCegarLoop]: Abstraction has 922 states and 1247 transitions. [2018-11-18 09:40:51,141 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:40:51,141 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 1247 transitions. [2018-11-18 09:40:51,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-18 09:40:51,142 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:51,142 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:51,142 INFO L423 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:51,142 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:51,143 INFO L82 PathProgramCache]: Analyzing trace with hash 1632884077, now seen corresponding path program 1 times [2018-11-18 09:40:51,143 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:51,143 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:51,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:51,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:51,297 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:51,341 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:51,341 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:51,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:51,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:51,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:51,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:51,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:51,344 INFO L87 Difference]: Start difference. First operand 922 states and 1247 transitions. Second operand 7 states. [2018-11-18 09:40:52,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:52,123 INFO L93 Difference]: Finished difference Result 1985 states and 2693 transitions. [2018-11-18 09:40:52,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 09:40:52,124 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 125 [2018-11-18 09:40:52,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:52,127 INFO L225 Difference]: With dead ends: 1985 [2018-11-18 09:40:52,127 INFO L226 Difference]: Without dead ends: 1085 [2018-11-18 09:40:52,129 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 09:40:52,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1085 states. [2018-11-18 09:40:52,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1085 to 1076. [2018-11-18 09:40:52,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1076 states. [2018-11-18 09:40:52,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1076 states to 1076 states and 1444 transitions. [2018-11-18 09:40:52,160 INFO L78 Accepts]: Start accepts. Automaton has 1076 states and 1444 transitions. Word has length 125 [2018-11-18 09:40:52,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:52,161 INFO L480 AbstractCegarLoop]: Abstraction has 1076 states and 1444 transitions. [2018-11-18 09:40:52,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:40:52,161 INFO L276 IsEmpty]: Start isEmpty. Operand 1076 states and 1444 transitions. [2018-11-18 09:40:52,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-18 09:40:52,162 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:52,162 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:52,162 INFO L423 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:52,162 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:52,163 INFO L82 PathProgramCache]: Analyzing trace with hash -714859026, now seen corresponding path program 1 times [2018-11-18 09:40:52,163 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:52,163 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:52,176 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:52,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:52,328 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:52,393 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:52,393 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:52,395 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:52,395 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:52,396 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:52,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:52,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:52,396 INFO L87 Difference]: Start difference. First operand 1076 states and 1444 transitions. Second operand 7 states. [2018-11-18 09:40:53,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:53,207 INFO L93 Difference]: Finished difference Result 2015 states and 2723 transitions. [2018-11-18 09:40:53,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 09:40:53,209 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-11-18 09:40:53,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:53,212 INFO L225 Difference]: With dead ends: 2015 [2018-11-18 09:40:53,212 INFO L226 Difference]: Without dead ends: 1106 [2018-11-18 09:40:53,214 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 09:40:53,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2018-11-18 09:40:53,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1079. [2018-11-18 09:40:53,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1079 states. [2018-11-18 09:40:53,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1079 states to 1079 states and 1441 transitions. [2018-11-18 09:40:53,246 INFO L78 Accepts]: Start accepts. Automaton has 1079 states and 1441 transitions. Word has length 126 [2018-11-18 09:40:53,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:53,246 INFO L480 AbstractCegarLoop]: Abstraction has 1079 states and 1441 transitions. [2018-11-18 09:40:53,246 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:40:53,246 INFO L276 IsEmpty]: Start isEmpty. Operand 1079 states and 1441 transitions. [2018-11-18 09:40:53,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 09:40:53,248 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:53,248 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:53,248 INFO L423 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:53,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:53,249 INFO L82 PathProgramCache]: Analyzing trace with hash -1184099141, now seen corresponding path program 1 times [2018-11-18 09:40:53,249 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:53,249 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:53,272 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:53,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:53,415 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:53,480 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:53,480 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:53,482 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:53,482 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:40:53,482 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:40:53,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:40:53,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:53,483 INFO L87 Difference]: Start difference. First operand 1079 states and 1441 transitions. Second operand 9 states. [2018-11-18 09:40:54,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:54,947 INFO L93 Difference]: Finished difference Result 2705 states and 3658 transitions. [2018-11-18 09:40:54,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 09:40:54,947 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 129 [2018-11-18 09:40:54,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:54,951 INFO L225 Difference]: With dead ends: 2705 [2018-11-18 09:40:54,951 INFO L226 Difference]: Without dead ends: 1805 [2018-11-18 09:40:54,953 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 09:40:54,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1805 states. [2018-11-18 09:40:54,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1805 to 1779. [2018-11-18 09:40:54,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1779 states. [2018-11-18 09:40:55,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1779 states to 1779 states and 2393 transitions. [2018-11-18 09:40:55,001 INFO L78 Accepts]: Start accepts. Automaton has 1779 states and 2393 transitions. Word has length 129 [2018-11-18 09:40:55,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:55,002 INFO L480 AbstractCegarLoop]: Abstraction has 1779 states and 2393 transitions. [2018-11-18 09:40:55,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:40:55,002 INFO L276 IsEmpty]: Start isEmpty. Operand 1779 states and 2393 transitions. [2018-11-18 09:40:55,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-18 09:40:55,003 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:55,003 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:55,003 INFO L423 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:55,003 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:55,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1114581156, now seen corresponding path program 1 times [2018-11-18 09:40:55,004 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:55,004 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:55,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:55,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:55,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:55,130 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 09:40:55,130 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:55,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:55,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:55,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:55,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:55,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:55,133 INFO L87 Difference]: Start difference. First operand 1779 states and 2393 transitions. Second operand 4 states. [2018-11-18 09:40:55,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:55,196 INFO L93 Difference]: Finished difference Result 3348 states and 4540 transitions. [2018-11-18 09:40:55,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:55,196 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 131 [2018-11-18 09:40:55,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:55,201 INFO L225 Difference]: With dead ends: 3348 [2018-11-18 09:40:55,201 INFO L226 Difference]: Without dead ends: 1827 [2018-11-18 09:40:55,204 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 129 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:55,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1827 states. [2018-11-18 09:40:55,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1827 to 1803. [2018-11-18 09:40:55,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1803 states. [2018-11-18 09:40:55,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1803 states to 1803 states and 2411 transitions. [2018-11-18 09:40:55,253 INFO L78 Accepts]: Start accepts. Automaton has 1803 states and 2411 transitions. Word has length 131 [2018-11-18 09:40:55,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:55,254 INFO L480 AbstractCegarLoop]: Abstraction has 1803 states and 2411 transitions. [2018-11-18 09:40:55,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:55,254 INFO L276 IsEmpty]: Start isEmpty. Operand 1803 states and 2411 transitions. [2018-11-18 09:40:55,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-11-18 09:40:55,256 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:55,256 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:55,256 INFO L423 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:55,256 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:55,257 INFO L82 PathProgramCache]: Analyzing trace with hash 656434571, now seen corresponding path program 1 times [2018-11-18 09:40:55,257 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:55,257 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:55,269 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:55,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:55,412 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:55,478 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 09:40:55,479 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:55,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:55,481 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:40:55,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:40:55,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:40:55,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:40:55,481 INFO L87 Difference]: Start difference. First operand 1803 states and 2411 transitions. Second operand 9 states. [2018-11-18 09:40:56,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:56,641 INFO L93 Difference]: Finished difference Result 3374 states and 4522 transitions. [2018-11-18 09:40:56,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 09:40:56,641 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 137 [2018-11-18 09:40:56,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:56,648 INFO L225 Difference]: With dead ends: 3374 [2018-11-18 09:40:56,648 INFO L226 Difference]: Without dead ends: 1853 [2018-11-18 09:40:56,651 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 130 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 09:40:56,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1853 states. [2018-11-18 09:40:56,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1853 to 1803. [2018-11-18 09:40:56,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1803 states. [2018-11-18 09:40:56,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1803 states to 1803 states and 2408 transitions. [2018-11-18 09:40:56,736 INFO L78 Accepts]: Start accepts. Automaton has 1803 states and 2408 transitions. Word has length 137 [2018-11-18 09:40:56,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:56,737 INFO L480 AbstractCegarLoop]: Abstraction has 1803 states and 2408 transitions. [2018-11-18 09:40:56,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:40:56,737 INFO L276 IsEmpty]: Start isEmpty. Operand 1803 states and 2408 transitions. [2018-11-18 09:40:56,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 09:40:56,739 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:56,739 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:56,739 INFO L423 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:56,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:56,740 INFO L82 PathProgramCache]: Analyzing trace with hash 665949775, now seen corresponding path program 1 times [2018-11-18 09:40:56,740 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:56,740 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:56,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:56,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:56,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:56,954 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 09:40:56,955 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:56,957 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:56,957 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 09:40:56,957 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 09:40:56,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 09:40:56,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 09:40:56,958 INFO L87 Difference]: Start difference. First operand 1803 states and 2408 transitions. Second operand 8 states. [2018-11-18 09:40:57,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:57,626 INFO L93 Difference]: Finished difference Result 3109 states and 4213 transitions. [2018-11-18 09:40:57,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:40:57,626 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 138 [2018-11-18 09:40:57,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:57,631 INFO L225 Difference]: With dead ends: 3109 [2018-11-18 09:40:57,631 INFO L226 Difference]: Without dead ends: 1988 [2018-11-18 09:40:57,633 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:40:57,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1988 states. [2018-11-18 09:40:57,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1988 to 1796. [2018-11-18 09:40:57,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1796 states. [2018-11-18 09:40:57,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1796 states to 1796 states and 2387 transitions. [2018-11-18 09:40:57,683 INFO L78 Accepts]: Start accepts. Automaton has 1796 states and 2387 transitions. Word has length 138 [2018-11-18 09:40:57,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:57,683 INFO L480 AbstractCegarLoop]: Abstraction has 1796 states and 2387 transitions. [2018-11-18 09:40:57,683 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 09:40:57,683 INFO L276 IsEmpty]: Start isEmpty. Operand 1796 states and 2387 transitions. [2018-11-18 09:40:57,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-11-18 09:40:57,685 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:57,685 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:57,685 INFO L423 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:57,685 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:57,685 INFO L82 PathProgramCache]: Analyzing trace with hash -1563957146, now seen corresponding path program 1 times [2018-11-18 09:40:57,686 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:57,686 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:57,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:57,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:57,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:57,809 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:57,809 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:57,811 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:57,811 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 09:40:57,811 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 09:40:57,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 09:40:57,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:57,812 INFO L87 Difference]: Start difference. First operand 1796 states and 2387 transitions. Second operand 3 states. [2018-11-18 09:40:57,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:57,864 INFO L93 Difference]: Finished difference Result 2951 states and 3940 transitions. [2018-11-18 09:40:57,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 09:40:57,864 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 140 [2018-11-18 09:40:57,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:57,868 INFO L225 Difference]: With dead ends: 2951 [2018-11-18 09:40:57,869 INFO L226 Difference]: Without dead ends: 1814 [2018-11-18 09:40:57,870 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 09:40:57,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1814 states. [2018-11-18 09:40:57,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1814 to 1796. [2018-11-18 09:40:57,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1796 states. [2018-11-18 09:40:57,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1796 states to 1796 states and 2381 transitions. [2018-11-18 09:40:57,920 INFO L78 Accepts]: Start accepts. Automaton has 1796 states and 2381 transitions. Word has length 140 [2018-11-18 09:40:57,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:57,920 INFO L480 AbstractCegarLoop]: Abstraction has 1796 states and 2381 transitions. [2018-11-18 09:40:57,920 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 09:40:57,920 INFO L276 IsEmpty]: Start isEmpty. Operand 1796 states and 2381 transitions. [2018-11-18 09:40:57,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-11-18 09:40:57,921 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:57,922 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:57,922 INFO L423 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:57,922 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:57,922 INFO L82 PathProgramCache]: Analyzing trace with hash 448735163, now seen corresponding path program 1 times [2018-11-18 09:40:57,922 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:57,922 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:57,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:58,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:58,022 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:58,096 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 09:40:58,096 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:58,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:58,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 09:40:58,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 09:40:58,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 09:40:58,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 09:40:58,099 INFO L87 Difference]: Start difference. First operand 1796 states and 2381 transitions. Second operand 8 states. [2018-11-18 09:40:58,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:58,568 INFO L93 Difference]: Finished difference Result 3008 states and 4024 transitions. [2018-11-18 09:40:58,569 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:40:58,569 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 139 [2018-11-18 09:40:58,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:58,574 INFO L225 Difference]: With dead ends: 3008 [2018-11-18 09:40:58,575 INFO L226 Difference]: Without dead ends: 1887 [2018-11-18 09:40:58,577 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:40:58,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1887 states. [2018-11-18 09:40:58,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1887 to 1772. [2018-11-18 09:40:58,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1772 states. [2018-11-18 09:40:58,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1772 states to 1772 states and 2335 transitions. [2018-11-18 09:40:58,661 INFO L78 Accepts]: Start accepts. Automaton has 1772 states and 2335 transitions. Word has length 139 [2018-11-18 09:40:58,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:58,661 INFO L480 AbstractCegarLoop]: Abstraction has 1772 states and 2335 transitions. [2018-11-18 09:40:58,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 09:40:58,662 INFO L276 IsEmpty]: Start isEmpty. Operand 1772 states and 2335 transitions. [2018-11-18 09:40:58,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-11-18 09:40:58,663 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:58,663 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:58,664 INFO L423 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:58,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:58,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1718022240, now seen corresponding path program 1 times [2018-11-18 09:40:58,664 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:58,664 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:58,686 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:58,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:58,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:58,885 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:58,885 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:58,888 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:58,888 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:58,889 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:58,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:58,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:58,889 INFO L87 Difference]: Start difference. First operand 1772 states and 2335 transitions. Second operand 4 states. [2018-11-18 09:40:59,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:59,034 INFO L93 Difference]: Finished difference Result 4379 states and 5821 transitions. [2018-11-18 09:40:59,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:59,035 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 139 [2018-11-18 09:40:59,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:59,045 INFO L225 Difference]: With dead ends: 4379 [2018-11-18 09:40:59,045 INFO L226 Difference]: Without dead ends: 3261 [2018-11-18 09:40:59,048 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 135 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:59,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3261 states. [2018-11-18 09:40:59,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3261 to 3036. [2018-11-18 09:40:59,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3036 states. [2018-11-18 09:40:59,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3036 states to 3036 states and 4009 transitions. [2018-11-18 09:40:59,160 INFO L78 Accepts]: Start accepts. Automaton has 3036 states and 4009 transitions. Word has length 139 [2018-11-18 09:40:59,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:59,160 INFO L480 AbstractCegarLoop]: Abstraction has 3036 states and 4009 transitions. [2018-11-18 09:40:59,160 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:59,160 INFO L276 IsEmpty]: Start isEmpty. Operand 3036 states and 4009 transitions. [2018-11-18 09:40:59,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-18 09:40:59,162 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:59,162 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:59,162 INFO L423 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:59,162 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:59,163 INFO L82 PathProgramCache]: Analyzing trace with hash -1779522026, now seen corresponding path program 1 times [2018-11-18 09:40:59,163 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:59,163 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:59,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:59,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:59,356 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:59,424 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:59,425 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:59,427 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:59,427 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:40:59,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:40:59,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:40:59,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:40:59,428 INFO L87 Difference]: Start difference. First operand 3036 states and 4009 transitions. Second operand 4 states. [2018-11-18 09:40:59,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:40:59,628 INFO L93 Difference]: Finished difference Result 7026 states and 9360 transitions. [2018-11-18 09:40:59,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:40:59,628 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 141 [2018-11-18 09:40:59,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:40:59,638 INFO L225 Difference]: With dead ends: 7026 [2018-11-18 09:40:59,638 INFO L226 Difference]: Without dead ends: 4908 [2018-11-18 09:40:59,641 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 137 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:40:59,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4908 states. [2018-11-18 09:40:59,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4908 to 4717. [2018-11-18 09:40:59,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4717 states. [2018-11-18 09:40:59,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4717 states to 4717 states and 6237 transitions. [2018-11-18 09:40:59,774 INFO L78 Accepts]: Start accepts. Automaton has 4717 states and 6237 transitions. Word has length 141 [2018-11-18 09:40:59,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:40:59,775 INFO L480 AbstractCegarLoop]: Abstraction has 4717 states and 6237 transitions. [2018-11-18 09:40:59,775 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:40:59,775 INFO L276 IsEmpty]: Start isEmpty. Operand 4717 states and 6237 transitions. [2018-11-18 09:40:59,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-18 09:40:59,776 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:40:59,777 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:40:59,777 INFO L423 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:40:59,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:40:59,777 INFO L82 PathProgramCache]: Analyzing trace with hash -881790789, now seen corresponding path program 1 times [2018-11-18 09:40:59,777 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:40:59,778 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:40:59,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:40:59,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:40:59,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:40:59,990 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:40:59,990 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:40:59,992 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:40:59,992 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:40:59,992 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:40:59,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:40:59,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:40:59,993 INFO L87 Difference]: Start difference. First operand 4717 states and 6237 transitions. Second operand 7 states. [2018-11-18 09:41:00,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:00,811 INFO L93 Difference]: Finished difference Result 7935 states and 10506 transitions. [2018-11-18 09:41:00,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 09:41:00,813 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 141 [2018-11-18 09:41:00,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:00,823 INFO L225 Difference]: With dead ends: 7935 [2018-11-18 09:41:00,823 INFO L226 Difference]: Without dead ends: 3942 [2018-11-18 09:41:00,830 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 09:41:00,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3942 states. [2018-11-18 09:41:01,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3942 to 3926. [2018-11-18 09:41:01,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3926 states. [2018-11-18 09:41:01,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3926 states to 3926 states and 5173 transitions. [2018-11-18 09:41:01,006 INFO L78 Accepts]: Start accepts. Automaton has 3926 states and 5173 transitions. Word has length 141 [2018-11-18 09:41:01,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:01,006 INFO L480 AbstractCegarLoop]: Abstraction has 3926 states and 5173 transitions. [2018-11-18 09:41:01,006 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:41:01,007 INFO L276 IsEmpty]: Start isEmpty. Operand 3926 states and 5173 transitions. [2018-11-18 09:41:01,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-11-18 09:41:01,008 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:01,008 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:01,008 INFO L423 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:01,008 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:01,009 INFO L82 PathProgramCache]: Analyzing trace with hash -615592765, now seen corresponding path program 1 times [2018-11-18 09:41:01,009 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:01,009 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:01,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:01,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:01,125 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:01,160 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 09:41:01,160 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:01,162 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:01,162 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 09:41:01,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 09:41:01,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 09:41:01,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 09:41:01,163 INFO L87 Difference]: Start difference. First operand 3926 states and 5173 transitions. Second operand 8 states. [2018-11-18 09:41:01,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:01,666 INFO L93 Difference]: Finished difference Result 7532 states and 10134 transitions. [2018-11-18 09:41:01,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:41:01,667 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 144 [2018-11-18 09:41:01,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:01,681 INFO L225 Difference]: With dead ends: 7532 [2018-11-18 09:41:01,681 INFO L226 Difference]: Without dead ends: 4522 [2018-11-18 09:41:01,685 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:41:01,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4522 states. [2018-11-18 09:41:01,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4522 to 4051. [2018-11-18 09:41:01,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4051 states. [2018-11-18 09:41:01,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4051 states to 4051 states and 5365 transitions. [2018-11-18 09:41:01,815 INFO L78 Accepts]: Start accepts. Automaton has 4051 states and 5365 transitions. Word has length 144 [2018-11-18 09:41:01,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:01,816 INFO L480 AbstractCegarLoop]: Abstraction has 4051 states and 5365 transitions. [2018-11-18 09:41:01,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 09:41:01,816 INFO L276 IsEmpty]: Start isEmpty. Operand 4051 states and 5365 transitions. [2018-11-18 09:41:01,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-11-18 09:41:01,817 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:01,817 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:01,817 INFO L423 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:01,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:01,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1229757743, now seen corresponding path program 1 times [2018-11-18 09:41:01,818 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:01,818 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:01,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:01,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:01,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:01,973 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 09:41:01,973 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:02,113 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-18 09:41:02,115 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:02,115 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:02,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:02,174 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:02,248 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 09:41:02,248 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:02,263 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 09:41:02,263 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [9, 9] total 18 [2018-11-18 09:41:02,264 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 09:41:02,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 09:41:02,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2018-11-18 09:41:02,264 INFO L87 Difference]: Start difference. First operand 4051 states and 5365 transitions. Second operand 18 states. [2018-11-18 09:41:04,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:04,928 INFO L93 Difference]: Finished difference Result 8756 states and 11742 transitions. [2018-11-18 09:41:04,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-18 09:41:04,928 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 145 [2018-11-18 09:41:04,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:04,941 INFO L225 Difference]: With dead ends: 8756 [2018-11-18 09:41:04,941 INFO L226 Difference]: Without dead ends: 5543 [2018-11-18 09:41:04,945 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 456 GetRequests, 422 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=198, Invalid=992, Unknown=0, NotChecked=0, Total=1190 [2018-11-18 09:41:04,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5543 states. [2018-11-18 09:41:05,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5543 to 3591. [2018-11-18 09:41:05,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3591 states. [2018-11-18 09:41:05,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3591 states to 3591 states and 4611 transitions. [2018-11-18 09:41:05,077 INFO L78 Accepts]: Start accepts. Automaton has 3591 states and 4611 transitions. Word has length 145 [2018-11-18 09:41:05,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:05,077 INFO L480 AbstractCegarLoop]: Abstraction has 3591 states and 4611 transitions. [2018-11-18 09:41:05,077 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 09:41:05,077 INFO L276 IsEmpty]: Start isEmpty. Operand 3591 states and 4611 transitions. [2018-11-18 09:41:05,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-11-18 09:41:05,078 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:05,078 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:05,078 INFO L423 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:05,078 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:05,079 INFO L82 PathProgramCache]: Analyzing trace with hash 1667812699, now seen corresponding path program 1 times [2018-11-18 09:41:05,079 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:05,079 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:05,096 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:05,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:05,229 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:05,261 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-18 09:41:05,262 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:05,263 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:05,263 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:41:05,263 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:41:05,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:41:05,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:41:05,264 INFO L87 Difference]: Start difference. First operand 3591 states and 4611 transitions. Second operand 7 states. [2018-11-18 09:41:06,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:06,028 INFO L93 Difference]: Finished difference Result 6786 states and 8744 transitions. [2018-11-18 09:41:06,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 09:41:06,028 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 144 [2018-11-18 09:41:06,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:06,035 INFO L225 Difference]: With dead ends: 6786 [2018-11-18 09:41:06,035 INFO L226 Difference]: Without dead ends: 3437 [2018-11-18 09:41:06,039 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 140 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-11-18 09:41:06,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3437 states. [2018-11-18 09:41:06,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3437 to 3316. [2018-11-18 09:41:06,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3316 states. [2018-11-18 09:41:06,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3316 states to 3316 states and 4253 transitions. [2018-11-18 09:41:06,163 INFO L78 Accepts]: Start accepts. Automaton has 3316 states and 4253 transitions. Word has length 144 [2018-11-18 09:41:06,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:06,163 INFO L480 AbstractCegarLoop]: Abstraction has 3316 states and 4253 transitions. [2018-11-18 09:41:06,163 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:41:06,163 INFO L276 IsEmpty]: Start isEmpty. Operand 3316 states and 4253 transitions. [2018-11-18 09:41:06,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-11-18 09:41:06,164 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:06,164 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:06,164 INFO L423 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:06,164 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:06,164 INFO L82 PathProgramCache]: Analyzing trace with hash 1803804782, now seen corresponding path program 1 times [2018-11-18 09:41:06,165 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:06,165 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:06,176 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:06,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:06,254 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:06,266 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:06,266 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:06,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:06,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:41:06,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:41:06,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:41:06,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:41:06,268 INFO L87 Difference]: Start difference. First operand 3316 states and 4253 transitions. Second operand 4 states. [2018-11-18 09:41:06,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:06,443 INFO L93 Difference]: Finished difference Result 6484 states and 8417 transitions. [2018-11-18 09:41:06,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 09:41:06,443 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 148 [2018-11-18 09:41:06,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:06,451 INFO L225 Difference]: With dead ends: 6484 [2018-11-18 09:41:06,451 INFO L226 Difference]: Without dead ends: 3508 [2018-11-18 09:41:06,456 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:41:06,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3508 states. [2018-11-18 09:41:06,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3508 to 3460. [2018-11-18 09:41:06,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3460 states. [2018-11-18 09:41:06,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3460 states to 3460 states and 4373 transitions. [2018-11-18 09:41:06,621 INFO L78 Accepts]: Start accepts. Automaton has 3460 states and 4373 transitions. Word has length 148 [2018-11-18 09:41:06,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:06,621 INFO L480 AbstractCegarLoop]: Abstraction has 3460 states and 4373 transitions. [2018-11-18 09:41:06,621 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:41:06,621 INFO L276 IsEmpty]: Start isEmpty. Operand 3460 states and 4373 transitions. [2018-11-18 09:41:06,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-11-18 09:41:06,622 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:06,622 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:06,622 INFO L423 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:06,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:06,623 INFO L82 PathProgramCache]: Analyzing trace with hash 2052912243, now seen corresponding path program 1 times [2018-11-18 09:41:06,623 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:06,623 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:06,642 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:06,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:06,814 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:06,876 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:06,876 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:06,878 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:06,878 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:41:06,878 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:41:06,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:41:06,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:41:06,879 INFO L87 Difference]: Start difference. First operand 3460 states and 4373 transitions. Second operand 9 states. [2018-11-18 09:41:08,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:08,005 INFO L93 Difference]: Finished difference Result 6580 states and 8372 transitions. [2018-11-18 09:41:08,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 09:41:08,006 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 153 [2018-11-18 09:41:08,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:08,013 INFO L225 Difference]: With dead ends: 6580 [2018-11-18 09:41:08,013 INFO L226 Difference]: Without dead ends: 3423 [2018-11-18 09:41:08,018 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 09:41:08,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3423 states. [2018-11-18 09:41:08,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3423 to 3345. [2018-11-18 09:41:08,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3345 states. [2018-11-18 09:41:08,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3345 states to 3345 states and 4223 transitions. [2018-11-18 09:41:08,205 INFO L78 Accepts]: Start accepts. Automaton has 3345 states and 4223 transitions. Word has length 153 [2018-11-18 09:41:08,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:08,206 INFO L480 AbstractCegarLoop]: Abstraction has 3345 states and 4223 transitions. [2018-11-18 09:41:08,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:41:08,206 INFO L276 IsEmpty]: Start isEmpty. Operand 3345 states and 4223 transitions. [2018-11-18 09:41:08,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-11-18 09:41:08,206 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:08,206 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:08,207 INFO L423 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:08,207 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:08,207 INFO L82 PathProgramCache]: Analyzing trace with hash -1685165750, now seen corresponding path program 1 times [2018-11-18 09:41:08,207 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:08,207 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:08,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:08,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:08,377 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:08,426 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 09:41:08,426 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:08,428 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:08,428 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 09:41:08,428 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 09:41:08,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 09:41:08,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-18 09:41:08,428 INFO L87 Difference]: Start difference. First operand 3345 states and 4223 transitions. Second operand 8 states. [2018-11-18 09:41:08,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:08,582 INFO L93 Difference]: Finished difference Result 3603 states and 4594 transitions. [2018-11-18 09:41:08,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:41:08,583 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 156 [2018-11-18 09:41:08,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:08,588 INFO L225 Difference]: With dead ends: 3603 [2018-11-18 09:41:08,588 INFO L226 Difference]: Without dead ends: 3601 [2018-11-18 09:41:08,589 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-18 09:41:08,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3601 states. [2018-11-18 09:41:08,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3601 to 3364. [2018-11-18 09:41:08,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3364 states. [2018-11-18 09:41:08,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3364 states to 3364 states and 4248 transitions. [2018-11-18 09:41:08,765 INFO L78 Accepts]: Start accepts. Automaton has 3364 states and 4248 transitions. Word has length 156 [2018-11-18 09:41:08,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:08,765 INFO L480 AbstractCegarLoop]: Abstraction has 3364 states and 4248 transitions. [2018-11-18 09:41:08,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 09:41:08,765 INFO L276 IsEmpty]: Start isEmpty. Operand 3364 states and 4248 transitions. [2018-11-18 09:41:08,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-11-18 09:41:08,766 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:08,766 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:08,767 INFO L423 AbstractCegarLoop]: === Iteration 29 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:08,767 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:08,767 INFO L82 PathProgramCache]: Analyzing trace with hash 1621297803, now seen corresponding path program 1 times [2018-11-18 09:41:08,767 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:08,767 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:08,781 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:08,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:08,858 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:08,869 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 09:41:08,869 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:08,871 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:08,871 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:41:08,871 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:41:08,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:41:08,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:41:08,871 INFO L87 Difference]: Start difference. First operand 3364 states and 4248 transitions. Second operand 4 states. [2018-11-18 09:41:08,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:08,994 INFO L93 Difference]: Finished difference Result 6337 states and 8109 transitions. [2018-11-18 09:41:08,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:41:08,994 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 157 [2018-11-18 09:41:08,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:08,999 INFO L225 Difference]: With dead ends: 6337 [2018-11-18 09:41:08,999 INFO L226 Difference]: Without dead ends: 3318 [2018-11-18 09:41:09,004 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:41:09,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3318 states. [2018-11-18 09:41:09,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3318 to 3318. [2018-11-18 09:41:09,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3318 states. [2018-11-18 09:41:09,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3318 states to 3318 states and 4110 transitions. [2018-11-18 09:41:09,130 INFO L78 Accepts]: Start accepts. Automaton has 3318 states and 4110 transitions. Word has length 157 [2018-11-18 09:41:09,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:09,130 INFO L480 AbstractCegarLoop]: Abstraction has 3318 states and 4110 transitions. [2018-11-18 09:41:09,130 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:41:09,130 INFO L276 IsEmpty]: Start isEmpty. Operand 3318 states and 4110 transitions. [2018-11-18 09:41:09,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-11-18 09:41:09,131 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:09,131 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:09,131 INFO L423 AbstractCegarLoop]: === Iteration 30 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:09,131 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:09,131 INFO L82 PathProgramCache]: Analyzing trace with hash -496620621, now seen corresponding path program 1 times [2018-11-18 09:41:09,132 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:09,132 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:09,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:09,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:09,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:09,251 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-18 09:41:09,251 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:09,252 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:09,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:41:09,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:41:09,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:41:09,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:41:09,253 INFO L87 Difference]: Start difference. First operand 3318 states and 4110 transitions. Second operand 4 states. [2018-11-18 09:41:09,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:09,410 INFO L93 Difference]: Finished difference Result 6218 states and 7803 transitions. [2018-11-18 09:41:09,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:41:09,410 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 166 [2018-11-18 09:41:09,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:09,415 INFO L225 Difference]: With dead ends: 6218 [2018-11-18 09:41:09,415 INFO L226 Difference]: Without dead ends: 3272 [2018-11-18 09:41:09,419 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:41:09,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3272 states. [2018-11-18 09:41:09,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3272 to 3272. [2018-11-18 09:41:09,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3272 states. [2018-11-18 09:41:09,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3272 states to 3272 states and 3972 transitions. [2018-11-18 09:41:09,604 INFO L78 Accepts]: Start accepts. Automaton has 3272 states and 3972 transitions. Word has length 166 [2018-11-18 09:41:09,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:09,604 INFO L480 AbstractCegarLoop]: Abstraction has 3272 states and 3972 transitions. [2018-11-18 09:41:09,604 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:41:09,605 INFO L276 IsEmpty]: Start isEmpty. Operand 3272 states and 3972 transitions. [2018-11-18 09:41:09,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-11-18 09:41:09,606 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:09,606 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:09,606 INFO L423 AbstractCegarLoop]: === Iteration 31 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:09,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:09,606 INFO L82 PathProgramCache]: Analyzing trace with hash 906462418, now seen corresponding path program 1 times [2018-11-18 09:41:09,606 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:09,607 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:09,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:09,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:09,713 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:09,726 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2018-11-18 09:41:09,726 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:09,728 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:09,728 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:41:09,728 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:41:09,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:41:09,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:41:09,728 INFO L87 Difference]: Start difference. First operand 3272 states and 3972 transitions. Second operand 4 states. [2018-11-18 09:41:09,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:09,857 INFO L93 Difference]: Finished difference Result 6078 states and 7476 transitions. [2018-11-18 09:41:09,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:41:09,858 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 182 [2018-11-18 09:41:09,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:09,862 INFO L225 Difference]: With dead ends: 6078 [2018-11-18 09:41:09,862 INFO L226 Difference]: Without dead ends: 3226 [2018-11-18 09:41:09,865 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 180 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:41:09,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3226 states. [2018-11-18 09:41:09,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3226 to 3226. [2018-11-18 09:41:09,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3226 states. [2018-11-18 09:41:09,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3226 states to 3226 states and 3834 transitions. [2018-11-18 09:41:09,990 INFO L78 Accepts]: Start accepts. Automaton has 3226 states and 3834 transitions. Word has length 182 [2018-11-18 09:41:09,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:09,990 INFO L480 AbstractCegarLoop]: Abstraction has 3226 states and 3834 transitions. [2018-11-18 09:41:09,990 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:41:09,991 INFO L276 IsEmpty]: Start isEmpty. Operand 3226 states and 3834 transitions. [2018-11-18 09:41:09,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 09:41:09,992 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:09,992 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:09,992 INFO L423 AbstractCegarLoop]: === Iteration 32 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:09,992 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:09,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1387691362, now seen corresponding path program 1 times [2018-11-18 09:41:09,993 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:09,993 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:10,011 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:10,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:10,100 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:10,116 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2018-11-18 09:41:10,116 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:10,118 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:10,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 09:41:10,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 09:41:10,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 09:41:10,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 09:41:10,118 INFO L87 Difference]: Start difference. First operand 3226 states and 3834 transitions. Second operand 4 states. [2018-11-18 09:41:10,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:10,241 INFO L93 Difference]: Finished difference Result 5918 states and 7109 transitions. [2018-11-18 09:41:10,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 09:41:10,241 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 198 [2018-11-18 09:41:10,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:10,246 INFO L225 Difference]: With dead ends: 5918 [2018-11-18 09:41:10,246 INFO L226 Difference]: Without dead ends: 3157 [2018-11-18 09:41:10,249 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 196 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 09:41:10,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3157 states. [2018-11-18 09:41:10,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3157 to 2967. [2018-11-18 09:41:10,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2967 states. [2018-11-18 09:41:10,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2967 states to 2967 states and 3443 transitions. [2018-11-18 09:41:10,357 INFO L78 Accepts]: Start accepts. Automaton has 2967 states and 3443 transitions. Word has length 198 [2018-11-18 09:41:10,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:10,357 INFO L480 AbstractCegarLoop]: Abstraction has 2967 states and 3443 transitions. [2018-11-18 09:41:10,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 09:41:10,357 INFO L276 IsEmpty]: Start isEmpty. Operand 2967 states and 3443 transitions. [2018-11-18 09:41:10,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2018-11-18 09:41:10,358 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:10,358 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:10,358 INFO L423 AbstractCegarLoop]: === Iteration 33 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:10,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:10,358 INFO L82 PathProgramCache]: Analyzing trace with hash 908838468, now seen corresponding path program 1 times [2018-11-18 09:41:10,358 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:10,359 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:10,371 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:10,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:10,518 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:10,622 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-11-18 09:41:10,622 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:10,623 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:10,623 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:41:10,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:41:10,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:41:10,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:41:10,624 INFO L87 Difference]: Start difference. First operand 2967 states and 3443 transitions. Second operand 9 states. [2018-11-18 09:41:11,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:11,739 INFO L93 Difference]: Finished difference Result 5779 states and 6806 transitions. [2018-11-18 09:41:11,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 09:41:11,739 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 210 [2018-11-18 09:41:11,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:11,743 INFO L225 Difference]: With dead ends: 5779 [2018-11-18 09:41:11,744 INFO L226 Difference]: Without dead ends: 3142 [2018-11-18 09:41:11,746 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 204 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-11-18 09:41:11,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3142 states. [2018-11-18 09:41:11,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3142 to 2826. [2018-11-18 09:41:11,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2826 states. [2018-11-18 09:41:11,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2826 states to 2826 states and 3281 transitions. [2018-11-18 09:41:11,860 INFO L78 Accepts]: Start accepts. Automaton has 2826 states and 3281 transitions. Word has length 210 [2018-11-18 09:41:11,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:11,860 INFO L480 AbstractCegarLoop]: Abstraction has 2826 states and 3281 transitions. [2018-11-18 09:41:11,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:41:11,860 INFO L276 IsEmpty]: Start isEmpty. Operand 2826 states and 3281 transitions. [2018-11-18 09:41:11,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-11-18 09:41:11,862 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:11,862 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:11,862 INFO L423 AbstractCegarLoop]: === Iteration 34 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:11,862 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:11,863 INFO L82 PathProgramCache]: Analyzing trace with hash 2067047706, now seen corresponding path program 1 times [2018-11-18 09:41:11,863 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:11,863 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:11,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:12,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:12,079 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:12,226 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 09:41:12,226 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:12,582 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-11-18 09:41:12,584 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:12,584 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:12,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:12,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:12,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:12,738 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 09:41:12,738 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:12,918 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-11-18 09:41:12,933 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:12,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-11-18 09:41:12,934 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 09:41:12,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 09:41:12,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-11-18 09:41:12,935 INFO L87 Difference]: Start difference. First operand 2826 states and 3281 transitions. Second operand 24 states. [2018-11-18 09:41:17,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:17,708 INFO L93 Difference]: Finished difference Result 6439 states and 7545 transitions. [2018-11-18 09:41:17,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-11-18 09:41:17,709 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 260 [2018-11-18 09:41:17,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:17,715 INFO L225 Difference]: With dead ends: 6439 [2018-11-18 09:41:17,715 INFO L226 Difference]: Without dead ends: 3982 [2018-11-18 09:41:17,719 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1123 GetRequests, 1029 SyntacticMatches, 12 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1674 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1457, Invalid=5515, Unknown=0, NotChecked=0, Total=6972 [2018-11-18 09:41:17,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3982 states. [2018-11-18 09:41:17,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3982 to 3178. [2018-11-18 09:41:17,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3178 states. [2018-11-18 09:41:17,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3178 states to 3178 states and 3689 transitions. [2018-11-18 09:41:17,951 INFO L78 Accepts]: Start accepts. Automaton has 3178 states and 3689 transitions. Word has length 260 [2018-11-18 09:41:17,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:17,951 INFO L480 AbstractCegarLoop]: Abstraction has 3178 states and 3689 transitions. [2018-11-18 09:41:17,951 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 09:41:17,951 INFO L276 IsEmpty]: Start isEmpty. Operand 3178 states and 3689 transitions. [2018-11-18 09:41:17,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-11-18 09:41:17,953 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:17,953 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:17,953 INFO L423 AbstractCegarLoop]: === Iteration 35 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:17,954 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:17,954 INFO L82 PathProgramCache]: Analyzing trace with hash 870351696, now seen corresponding path program 1 times [2018-11-18 09:41:17,954 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:17,954 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:17,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:18,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:18,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:18,311 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 09:41:18,311 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:18,622 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 09:41:18,625 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:18,625 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:18,634 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:18,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:18,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:18,779 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 09:41:18,779 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:19,003 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 09:41:19,027 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:19,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-11-18 09:41:19,029 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 09:41:19,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 09:41:19,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-11-18 09:41:19,029 INFO L87 Difference]: Start difference. First operand 3178 states and 3689 transitions. Second operand 24 states. [2018-11-18 09:41:24,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:24,092 INFO L93 Difference]: Finished difference Result 7109 states and 8331 transitions. [2018-11-18 09:41:24,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-11-18 09:41:24,092 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 261 [2018-11-18 09:41:24,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:24,100 INFO L225 Difference]: With dead ends: 7109 [2018-11-18 09:41:24,100 INFO L226 Difference]: Without dead ends: 4292 [2018-11-18 09:41:24,104 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1103 GetRequests, 1021 SyntacticMatches, 13 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1208 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=870, Invalid=4100, Unknown=0, NotChecked=0, Total=4970 [2018-11-18 09:41:24,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4292 states. [2018-11-18 09:41:24,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4292 to 4062. [2018-11-18 09:41:24,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4062 states. [2018-11-18 09:41:24,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4062 states to 4062 states and 4718 transitions. [2018-11-18 09:41:24,326 INFO L78 Accepts]: Start accepts. Automaton has 4062 states and 4718 transitions. Word has length 261 [2018-11-18 09:41:24,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:24,327 INFO L480 AbstractCegarLoop]: Abstraction has 4062 states and 4718 transitions. [2018-11-18 09:41:24,327 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 09:41:24,327 INFO L276 IsEmpty]: Start isEmpty. Operand 4062 states and 4718 transitions. [2018-11-18 09:41:24,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-11-18 09:41:24,330 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:24,331 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:24,331 INFO L423 AbstractCegarLoop]: === Iteration 36 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:24,331 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:24,331 INFO L82 PathProgramCache]: Analyzing trace with hash 351898165, now seen corresponding path program 1 times [2018-11-18 09:41:24,332 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:24,332 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:24,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:24,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:24,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:24,676 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:24,676 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:24,905 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 09:41:24,906 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:24,906 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:24,918 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:24,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:24,996 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:25,076 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:25,077 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:25,234 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 09:41:25,258 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:25,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 17 [2018-11-18 09:41:25,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 09:41:25,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 09:41:25,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-11-18 09:41:25,260 INFO L87 Difference]: Start difference. First operand 4062 states and 4718 transitions. Second operand 17 states. [2018-11-18 09:41:27,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:27,322 INFO L93 Difference]: Finished difference Result 8112 states and 9563 transitions. [2018-11-18 09:41:27,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-18 09:41:27,322 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 262 [2018-11-18 09:41:27,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:27,332 INFO L225 Difference]: With dead ends: 8112 [2018-11-18 09:41:27,332 INFO L226 Difference]: Without dead ends: 4503 [2018-11-18 09:41:27,337 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1077 GetRequests, 1030 SyntacticMatches, 12 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=334, Invalid=998, Unknown=0, NotChecked=0, Total=1332 [2018-11-18 09:41:27,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4503 states. [2018-11-18 09:41:27,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4503 to 4439. [2018-11-18 09:41:27,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4439 states. [2018-11-18 09:41:27,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4439 states to 4439 states and 5191 transitions. [2018-11-18 09:41:27,761 INFO L78 Accepts]: Start accepts. Automaton has 4439 states and 5191 transitions. Word has length 262 [2018-11-18 09:41:27,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:27,761 INFO L480 AbstractCegarLoop]: Abstraction has 4439 states and 5191 transitions. [2018-11-18 09:41:27,761 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 09:41:27,761 INFO L276 IsEmpty]: Start isEmpty. Operand 4439 states and 5191 transitions. [2018-11-18 09:41:27,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-11-18 09:41:27,766 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:27,766 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:27,766 INFO L423 AbstractCegarLoop]: === Iteration 37 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:27,766 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:27,766 INFO L82 PathProgramCache]: Analyzing trace with hash -1770716634, now seen corresponding path program 1 times [2018-11-18 09:41:27,767 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:27,767 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:27,785 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:27,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:28,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:28,179 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:28,179 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:28,417 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 09:41:28,419 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:28,419 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:28,430 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:28,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:28,520 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:28,637 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:28,637 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:28,826 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 09:41:28,851 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:28,851 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 15 [2018-11-18 09:41:28,853 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 09:41:28,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 09:41:28,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-11-18 09:41:28,853 INFO L87 Difference]: Start difference. First operand 4439 states and 5191 transitions. Second operand 15 states. [2018-11-18 09:41:31,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:31,155 INFO L93 Difference]: Finished difference Result 10944 states and 12896 transitions. [2018-11-18 09:41:31,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 09:41:31,156 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 263 [2018-11-18 09:41:31,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:31,165 INFO L225 Difference]: With dead ends: 10944 [2018-11-18 09:41:31,165 INFO L226 Difference]: Without dead ends: 6909 [2018-11-18 09:41:31,170 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1072 GetRequests, 1037 SyntacticMatches, 9 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=601, Unknown=0, NotChecked=0, Total=756 [2018-11-18 09:41:31,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6909 states. [2018-11-18 09:41:31,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6909 to 6047. [2018-11-18 09:41:31,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6047 states. [2018-11-18 09:41:31,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6047 states to 6047 states and 7138 transitions. [2018-11-18 09:41:31,530 INFO L78 Accepts]: Start accepts. Automaton has 6047 states and 7138 transitions. Word has length 263 [2018-11-18 09:41:31,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:31,530 INFO L480 AbstractCegarLoop]: Abstraction has 6047 states and 7138 transitions. [2018-11-18 09:41:31,530 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 09:41:31,530 INFO L276 IsEmpty]: Start isEmpty. Operand 6047 states and 7138 transitions. [2018-11-18 09:41:31,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-11-18 09:41:31,535 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:31,536 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:31,536 INFO L423 AbstractCegarLoop]: === Iteration 38 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:31,536 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:31,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1557099548, now seen corresponding path program 1 times [2018-11-18 09:41:31,536 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:31,536 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:31,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:31,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:31,749 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:31,846 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 09:41:31,846 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:31,848 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:31,848 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 09:41:31,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 09:41:31,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 09:41:31,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-18 09:41:31,848 INFO L87 Difference]: Start difference. First operand 6047 states and 7138 transitions. Second operand 7 states. [2018-11-18 09:41:32,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:32,531 INFO L93 Difference]: Finished difference Result 10123 states and 12107 transitions. [2018-11-18 09:41:32,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 09:41:32,532 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 263 [2018-11-18 09:41:32,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:32,541 INFO L225 Difference]: With dead ends: 10123 [2018-11-18 09:41:32,541 INFO L226 Difference]: Without dead ends: 4447 [2018-11-18 09:41:32,548 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 264 GetRequests, 257 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:41:32,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4447 states. [2018-11-18 09:41:32,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4447 to 4329. [2018-11-18 09:41:32,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4329 states. [2018-11-18 09:41:32,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4329 states to 4329 states and 5146 transitions. [2018-11-18 09:41:32,824 INFO L78 Accepts]: Start accepts. Automaton has 4329 states and 5146 transitions. Word has length 263 [2018-11-18 09:41:32,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:32,825 INFO L480 AbstractCegarLoop]: Abstraction has 4329 states and 5146 transitions. [2018-11-18 09:41:32,825 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 09:41:32,825 INFO L276 IsEmpty]: Start isEmpty. Operand 4329 states and 5146 transitions. [2018-11-18 09:41:32,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2018-11-18 09:41:32,828 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:32,828 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:32,828 INFO L423 AbstractCegarLoop]: === Iteration 39 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:32,828 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:32,829 INFO L82 PathProgramCache]: Analyzing trace with hash 583457093, now seen corresponding path program 1 times [2018-11-18 09:41:32,829 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:32,829 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:32,842 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:32,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:33,041 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:33,084 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 81 trivial. 0 not checked. [2018-11-18 09:41:33,085 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:33,086 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:33,086 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 09:41:33,086 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 09:41:33,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 09:41:33,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 09:41:33,087 INFO L87 Difference]: Start difference. First operand 4329 states and 5146 transitions. Second operand 8 states. [2018-11-18 09:41:33,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:33,871 INFO L93 Difference]: Finished difference Result 12685 states and 15513 transitions. [2018-11-18 09:41:33,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 09:41:33,871 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 266 [2018-11-18 09:41:33,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:33,887 INFO L225 Difference]: With dead ends: 12685 [2018-11-18 09:41:33,887 INFO L226 Difference]: Without dead ends: 8725 [2018-11-18 09:41:33,894 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 268 GetRequests, 259 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-18 09:41:33,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8725 states. [2018-11-18 09:41:34,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8725 to 8227. [2018-11-18 09:41:34,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8227 states. [2018-11-18 09:41:34,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8227 states to 8227 states and 9945 transitions. [2018-11-18 09:41:34,500 INFO L78 Accepts]: Start accepts. Automaton has 8227 states and 9945 transitions. Word has length 266 [2018-11-18 09:41:34,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:34,500 INFO L480 AbstractCegarLoop]: Abstraction has 8227 states and 9945 transitions. [2018-11-18 09:41:34,500 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 09:41:34,500 INFO L276 IsEmpty]: Start isEmpty. Operand 8227 states and 9945 transitions. [2018-11-18 09:41:34,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2018-11-18 09:41:34,504 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:34,504 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:34,504 INFO L423 AbstractCegarLoop]: === Iteration 40 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:34,504 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:34,504 INFO L82 PathProgramCache]: Analyzing trace with hash 102376835, now seen corresponding path program 1 times [2018-11-18 09:41:34,505 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:34,505 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:34,524 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:34,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:34,740 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:34,802 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 88 proven. 29 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:34,803 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:34,934 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 22 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 09:41:34,936 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:34,936 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:34,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:35,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:35,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:35,055 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 88 proven. 29 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:35,055 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:35,170 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 22 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-11-18 09:41:35,185 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:35,185 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 12 [2018-11-18 09:41:35,185 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 09:41:35,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 09:41:35,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:41:35,186 INFO L87 Difference]: Start difference. First operand 8227 states and 9945 transitions. Second operand 12 states. [2018-11-18 09:41:37,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:37,079 INFO L93 Difference]: Finished difference Result 16367 states and 19785 transitions. [2018-11-18 09:41:37,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 09:41:37,080 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 266 [2018-11-18 09:41:37,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:37,092 INFO L225 Difference]: With dead ends: 16367 [2018-11-18 09:41:37,092 INFO L226 Difference]: Without dead ends: 8509 [2018-11-18 09:41:37,099 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1082 GetRequests, 1051 SyntacticMatches, 8 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=474, Unknown=0, NotChecked=0, Total=600 [2018-11-18 09:41:37,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8509 states. [2018-11-18 09:41:37,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8509 to 8227. [2018-11-18 09:41:37,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8227 states. [2018-11-18 09:41:37,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8227 states to 8227 states and 9905 transitions. [2018-11-18 09:41:37,615 INFO L78 Accepts]: Start accepts. Automaton has 8227 states and 9905 transitions. Word has length 266 [2018-11-18 09:41:37,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:37,616 INFO L480 AbstractCegarLoop]: Abstraction has 8227 states and 9905 transitions. [2018-11-18 09:41:37,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 09:41:37,616 INFO L276 IsEmpty]: Start isEmpty. Operand 8227 states and 9905 transitions. [2018-11-18 09:41:37,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2018-11-18 09:41:37,620 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:37,620 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:37,620 INFO L423 AbstractCegarLoop]: === Iteration 41 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:37,620 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:37,621 INFO L82 PathProgramCache]: Analyzing trace with hash 854171126, now seen corresponding path program 1 times [2018-11-18 09:41:37,621 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:37,621 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:37,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:37,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:37,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:37,810 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 136 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 09:41:37,810 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:37,811 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:37,811 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 09:41:37,811 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 09:41:37,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 09:41:37,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 09:41:37,812 INFO L87 Difference]: Start difference. First operand 8227 states and 9905 transitions. Second operand 9 states. [2018-11-18 09:41:38,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:38,674 INFO L93 Difference]: Finished difference Result 18083 states and 21973 transitions. [2018-11-18 09:41:38,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 09:41:38,674 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 267 [2018-11-18 09:41:38,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:38,693 INFO L225 Difference]: With dead ends: 18083 [2018-11-18 09:41:38,693 INFO L226 Difference]: Without dead ends: 10153 [2018-11-18 09:41:38,702 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 259 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:41:38,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10153 states. [2018-11-18 09:41:39,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10153 to 9271. [2018-11-18 09:41:39,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9271 states. [2018-11-18 09:41:39,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9271 states to 9271 states and 11061 transitions. [2018-11-18 09:41:39,342 INFO L78 Accepts]: Start accepts. Automaton has 9271 states and 11061 transitions. Word has length 267 [2018-11-18 09:41:39,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:39,343 INFO L480 AbstractCegarLoop]: Abstraction has 9271 states and 11061 transitions. [2018-11-18 09:41:39,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 09:41:39,343 INFO L276 IsEmpty]: Start isEmpty. Operand 9271 states and 11061 transitions. [2018-11-18 09:41:39,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2018-11-18 09:41:39,348 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:39,348 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:39,348 INFO L423 AbstractCegarLoop]: === Iteration 42 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:39,348 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:39,348 INFO L82 PathProgramCache]: Analyzing trace with hash -2065256924, now seen corresponding path program 1 times [2018-11-18 09:41:39,348 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:39,349 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:39,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:39,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:39,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:39,547 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 50 proven. 81 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-18 09:41:39,547 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:39,745 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 23 proven. 16 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-11-18 09:41:39,746 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:39,746 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:39,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:39,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:39,817 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:39,848 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 50 proven. 81 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-18 09:41:39,848 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:40,012 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 23 proven. 16 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-11-18 09:41:40,027 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:40,027 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 11, 12] total 19 [2018-11-18 09:41:40,027 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-18 09:41:40,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-18 09:41:40,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-18 09:41:40,028 INFO L87 Difference]: Start difference. First operand 9271 states and 11061 transitions. Second operand 19 states. [2018-11-18 09:41:44,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:44,217 INFO L93 Difference]: Finished difference Result 24085 states and 28447 transitions. [2018-11-18 09:41:44,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-11-18 09:41:44,217 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 274 [2018-11-18 09:41:44,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:44,241 INFO L225 Difference]: With dead ends: 24085 [2018-11-18 09:41:44,241 INFO L226 Difference]: Without dead ends: 15183 [2018-11-18 09:41:44,252 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1148 GetRequests, 1095 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 714 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=524, Invalid=2446, Unknown=0, NotChecked=0, Total=2970 [2018-11-18 09:41:44,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15183 states. [2018-11-18 09:41:45,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15183 to 13745. [2018-11-18 09:41:45,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13745 states. [2018-11-18 09:41:45,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13745 states to 13745 states and 16017 transitions. [2018-11-18 09:41:45,206 INFO L78 Accepts]: Start accepts. Automaton has 13745 states and 16017 transitions. Word has length 274 [2018-11-18 09:41:45,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:45,207 INFO L480 AbstractCegarLoop]: Abstraction has 13745 states and 16017 transitions. [2018-11-18 09:41:45,207 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-18 09:41:45,207 INFO L276 IsEmpty]: Start isEmpty. Operand 13745 states and 16017 transitions. [2018-11-18 09:41:45,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2018-11-18 09:41:45,211 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:45,211 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:45,211 INFO L423 AbstractCegarLoop]: === Iteration 43 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:45,211 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:45,211 INFO L82 PathProgramCache]: Analyzing trace with hash 29145737, now seen corresponding path program 1 times [2018-11-18 09:41:45,212 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:45,212 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:45,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:45,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:45,336 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:45,414 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 71 proven. 72 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 09:41:45,414 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:45,614 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 29 proven. 11 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2018-11-18 09:41:45,615 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 09:41:45,615 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 09:41:45,622 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:45,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:45,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:45,723 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 71 proven. 72 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 09:41:45,724 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 09:41:45,868 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 29 proven. 11 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2018-11-18 09:41:45,883 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 09:41:45,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 11, 12] total 19 [2018-11-18 09:41:45,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-18 09:41:45,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-18 09:41:45,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-18 09:41:45,884 INFO L87 Difference]: Start difference. First operand 13745 states and 16017 transitions. Second operand 19 states. [2018-11-18 09:41:49,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:49,355 INFO L93 Difference]: Finished difference Result 25089 states and 29464 transitions. [2018-11-18 09:41:49,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-18 09:41:49,356 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 274 [2018-11-18 09:41:49,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:49,374 INFO L225 Difference]: With dead ends: 25089 [2018-11-18 09:41:49,374 INFO L226 Difference]: Without dead ends: 11259 [2018-11-18 09:41:49,385 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1147 GetRequests, 1092 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 723 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=551, Invalid=2641, Unknown=0, NotChecked=0, Total=3192 [2018-11-18 09:41:49,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11259 states. [2018-11-18 09:41:50,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11259 to 10769. [2018-11-18 09:41:50,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10769 states. [2018-11-18 09:41:50,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10769 states to 10769 states and 12657 transitions. [2018-11-18 09:41:50,119 INFO L78 Accepts]: Start accepts. Automaton has 10769 states and 12657 transitions. Word has length 274 [2018-11-18 09:41:50,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:50,120 INFO L480 AbstractCegarLoop]: Abstraction has 10769 states and 12657 transitions. [2018-11-18 09:41:50,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-18 09:41:50,120 INFO L276 IsEmpty]: Start isEmpty. Operand 10769 states and 12657 transitions. [2018-11-18 09:41:50,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2018-11-18 09:41:50,124 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:50,124 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:50,124 INFO L423 AbstractCegarLoop]: === Iteration 44 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:50,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:50,125 INFO L82 PathProgramCache]: Analyzing trace with hash -190556210, now seen corresponding path program 1 times [2018-11-18 09:41:50,125 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:50,125 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:50,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:50,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 09:41:50,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 09:41:50,300 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-11-18 09:41:50,300 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 09:41:50,301 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 09:41:50,301 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 09:41:50,301 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 09:41:50,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 09:41:50,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-18 09:41:50,302 INFO L87 Difference]: Start difference. First operand 10769 states and 12657 transitions. Second operand 8 states. [2018-11-18 09:41:51,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 09:41:51,470 INFO L93 Difference]: Finished difference Result 21487 states and 25405 transitions. [2018-11-18 09:41:51,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 09:41:51,470 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 274 [2018-11-18 09:41:51,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 09:41:51,486 INFO L225 Difference]: With dead ends: 21487 [2018-11-18 09:41:51,486 INFO L226 Difference]: Without dead ends: 11087 [2018-11-18 09:41:51,493 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 270 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-18 09:41:51,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11087 states. [2018-11-18 09:41:52,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11087 to 10765. [2018-11-18 09:41:52,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10765 states. [2018-11-18 09:41:52,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10765 states to 10765 states and 12645 transitions. [2018-11-18 09:41:52,186 INFO L78 Accepts]: Start accepts. Automaton has 10765 states and 12645 transitions. Word has length 274 [2018-11-18 09:41:52,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 09:41:52,187 INFO L480 AbstractCegarLoop]: Abstraction has 10765 states and 12645 transitions. [2018-11-18 09:41:52,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 09:41:52,187 INFO L276 IsEmpty]: Start isEmpty. Operand 10765 states and 12645 transitions. [2018-11-18 09:41:52,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-11-18 09:41:52,191 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 09:41:52,191 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 09:41:52,191 INFO L423 AbstractCegarLoop]: === Iteration 45 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 09:41:52,191 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 09:41:52,191 INFO L82 PathProgramCache]: Analyzing trace with hash -563651996, now seen corresponding path program 1 times [2018-11-18 09:41:52,191 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 09:41:52,191 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/cvc4nyu Starting monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 09:41:52,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 09:41:52,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 09:41:52,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 09:41:52,936 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 09:41:53,121 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 09:41:53 BoogieIcfgContainer [2018-11-18 09:41:53,121 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 09:41:53,122 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 09:41:53,122 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 09:41:53,123 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 09:41:53,123 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:40:48" (3/4) ... [2018-11-18 09:41:53,125 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 09:41:53,352 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_930ccb32-9a22-4e1b-8120-9e8d8a495c05/bin-2019/utaipan/witness.graphml [2018-11-18 09:41:53,352 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 09:41:53,353 INFO L168 Benchmark]: Toolchain (without parser) took 66148.19 ms. Allocated memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: 2.2 GB). Free memory was 947.6 MB in the beginning and 1.7 GB in the end (delta: -790.2 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2018-11-18 09:41:53,354 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 09:41:53,354 INFO L168 Benchmark]: CACSL2BoogieTranslator took 315.80 ms. Allocated memory is still 1.0 GB. Free memory was 942.2 MB in the beginning and 920.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-18 09:41:53,355 INFO L168 Benchmark]: Boogie Procedure Inliner took 64.98 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 920.8 MB in the beginning and 1.1 GB in the end (delta: -190.1 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. [2018-11-18 09:41:53,355 INFO L168 Benchmark]: Boogie Preprocessor took 32.94 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 09:41:53,355 INFO L168 Benchmark]: RCFGBuilder took 585.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 80.1 MB). Peak memory consumption was 80.1 MB. Max. memory is 11.5 GB. [2018-11-18 09:41:53,355 INFO L168 Benchmark]: TraceAbstraction took 64914.34 ms. Allocated memory was 1.2 GB in the beginning and 3.2 GB in the end (delta: 2.0 GB). Free memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: -750.9 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2018-11-18 09:41:53,356 INFO L168 Benchmark]: Witness Printer took 230.24 ms. Allocated memory is still 3.2 GB. Free memory was 1.8 GB in the beginning and 1.7 GB in the end (delta: 43.9 MB). Peak memory consumption was 43.9 MB. Max. memory is 11.5 GB. [2018-11-18 09:41:53,357 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 315.80 ms. Allocated memory is still 1.0 GB. Free memory was 942.2 MB in the beginning and 920.8 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 64.98 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 920.8 MB in the beginning and 1.1 GB in the end (delta: -190.1 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 32.94 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 585.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 80.1 MB). Peak memory consumption was 80.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 64914.34 ms. Allocated memory was 1.2 GB in the beginning and 3.2 GB in the end (delta: 2.0 GB). Free memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: -750.9 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 230.24 ms. Allocated memory is still 3.2 GB. Free memory was 1.8 GB in the beginning and 1.7 GB in the end (delta: 43.9 MB). Peak memory consumption was 43.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 661]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L463] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(nomsg)=0, \old(s1p)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L585] int c1 ; [L586] int i2 ; [L589] c1 = 0 [L590] side1Failed = __VERIFIER_nondet_bool() [L591] side2Failed = __VERIFIER_nondet_bool() [L592] side1_written = __VERIFIER_nondet_char() [L593] side2_written = __VERIFIER_nondet_char() [L594] side1Failed_History_0 = __VERIFIER_nondet_bool() [L595] side1Failed_History_1 = __VERIFIER_nondet_bool() [L596] side1Failed_History_2 = __VERIFIER_nondet_bool() [L597] side2Failed_History_0 = __VERIFIER_nondet_bool() [L598] side2Failed_History_1 = __VERIFIER_nondet_bool() [L599] side2Failed_History_2 = __VERIFIER_nondet_bool() [L600] active_side_History_0 = __VERIFIER_nondet_char() [L601] active_side_History_1 = __VERIFIER_nondet_char() [L602] active_side_History_2 = __VERIFIER_nondet_char() [L603] manual_selection_History_0 = __VERIFIER_nondet_char() [L604] manual_selection_History_1 = __VERIFIER_nondet_char() [L605] manual_selection_History_2 = __VERIFIER_nondet_char() [L606] CALL, EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, init()=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 = init() [L608] cs1_old = nomsg [L609] cs1_new = nomsg [L610] cs2_old = nomsg [L611] cs2_new = nomsg [L612] s1s2_old = nomsg [L613] s1s2_new = nomsg [L614] s1s1_old = nomsg [L615] s1s1_new = nomsg [L616] s2s1_old = nomsg [L617] s2s1_new = nomsg [L618] s2s2_old = nomsg [L619] s2s2_new = nomsg [L620] s1p_old = nomsg [L621] s1p_new = nomsg [L622] s2p_old = nomsg [L623] s2p_new = nomsg [L624] i2 = 0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L627] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L627] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] COND FALSE, EXPR !(nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] COND FALSE, EXPR !(nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] COND FALSE, EXPR !(nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] RET side1_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] COND TRUE, EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] COND TRUE, EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] COND TRUE, EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] RET side2_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L630] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L442] COND FALSE !((int )side1 == 0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L450] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L451] COND FALSE !((int )side2 == 0) [L454] active_side = (int8_t )0 VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L459] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L459] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L630] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND TRUE ! tmp___0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L501] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L501] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L501] tmp___1 = read_side1_failed_history((unsigned char)1) [L502] COND TRUE ! tmp___1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L503] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND TRUE (int )index == 0 [L131] RET return (side1Failed_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L503] EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)0)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L503] tmp___2 = read_side1_failed_history((unsigned char)0) [L504] COND FALSE !(! tmp___2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L529] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND FALSE !(\read(tmp___7)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L545] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L545] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L545] tmp___11 = read_side1_failed_history((unsigned char)1) [L546] COND TRUE ! tmp___11 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L547] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L547] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L547] tmp___12 = read_side2_failed_history((unsigned char)1) [L548] COND FALSE !(\read(tmp___12)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L561] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] RET return (active_side_History_2); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L561] EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)2)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L561] tmp___20 = read_active_side_history((unsigned char)2) [L562] COND FALSE !((int )tmp___20 > -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L580] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L647] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, check()=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L648] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L659] COND FALSE, RET !(! arg) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, arg=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L648] assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L627] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L627] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] COND FALSE, EXPR !(nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] COND FALSE, EXPR !(nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] COND FALSE, EXPR !(nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] RET side1_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L628] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND FALSE !((int )side1 == (int )side2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L392] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L393] COND TRUE (int )side2 != (int )nomsg [L394] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] COND TRUE, EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] COND TRUE, EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] COND TRUE, EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] RET side2_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L629] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L630] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L442] COND FALSE !((int )side1 == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L451] COND TRUE (int )side2 == 0 [L452] active_side = (int8_t )2 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L459] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=2] [L459] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L630] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND FALSE !(! tmp___0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L529] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND TRUE \read(tmp___7) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L531] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L531] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L531] tmp___8 = read_side2_failed_history((unsigned char)1) [L532] COND TRUE ! tmp___8 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L533] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=2, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L533] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L533] tmp___5 = read_active_side_history((unsigned char)0) [L534] COND FALSE !(! ((int )tmp___5 == 2)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___7=1, tmp___8=0] [L537] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND TRUE (int )index == 0 [L161] RET return (side2Failed_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] EXPR read_side2_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)0)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___7=1, tmp___8=0] [L537] tmp___6 = read_side2_failed_history((unsigned char)0) [L538] COND TRUE ! tmp___6 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___6=0, tmp___7=1, tmp___8=0] [L539] COND TRUE ! ((int )side2_written == 1) [L540] RET return (0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=2, tmp___6=0, tmp___7=1, tmp___8=0] [L647] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, c1=1, check()=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L648] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L659] COND TRUE ! arg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L661] __VERIFIER_error() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=2, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 237 locations, 1 error locations. UNSAFE Result, 64.8s OverallTime, 45 OverallIterations, 6 TraceHistogramMax, 42.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 16633 SDtfs, 28398 SDslu, 30109 SDs, 0 SdLazy, 51024 SolverSat, 9643 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 24.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13555 GetRequests, 12882 SyntacticMatches, 64 SemanticMatches, 609 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5097 ImplicationChecksByTransitivity, 6.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=13745occurred in iteration=42, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 8.2s AutomataMinimizationTime, 44 MinimizatonAttempts, 10474 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.6s SsaConstructionTime, 4.1s SatisfiabilityAnalysisTime, 6.5s InterpolantComputationTime, 9539 NumberOfCodeBlocks, 9539 NumberOfCodeBlocksAsserted, 53 NumberOfCheckSat, 13062 ConstructedInterpolants, 0 QuantifiedInterpolants, 7456952 SizeOfPredicates, 129 NumberOfNonLiveVariables, 33167 ConjunctsInSsa, 405 ConjunctsInUnsatCore, 67 InterpolantComputations, 37 PerfectInterpolantSequences, 4679/5503 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...