./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c -s /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 747981090a474d9d2269aea1ffd03eef2ddc8848 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 14:36:29,613 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 14:36:29,614 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 14:36:29,623 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 14:36:29,623 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 14:36:29,624 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 14:36:29,625 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 14:36:29,626 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 14:36:29,628 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 14:36:29,628 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 14:36:29,629 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 14:36:29,629 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 14:36:29,630 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 14:36:29,630 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 14:36:29,631 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 14:36:29,632 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 14:36:29,632 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 14:36:29,634 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 14:36:29,635 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 14:36:29,636 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 14:36:29,637 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 14:36:29,638 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 14:36:29,639 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 14:36:29,640 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 14:36:29,640 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 14:36:29,640 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 14:36:29,641 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 14:36:29,642 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 14:36:29,642 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 14:36:29,643 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 14:36:29,643 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 14:36:29,644 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 14:36:29,644 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 14:36:29,644 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 14:36:29,645 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 14:36:29,645 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 14:36:29,645 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 14:36:29,655 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 14:36:29,655 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 14:36:29,656 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 14:36:29,656 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 14:36:29,656 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 14:36:29,657 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 14:36:29,657 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 14:36:29,657 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 14:36:29,657 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 14:36:29,657 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 14:36:29,657 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 14:36:29,657 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 14:36:29,658 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 14:36:29,658 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 14:36:29,658 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 14:36:29,658 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 14:36:29,659 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 14:36:29,660 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 14:36:29,660 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 14:36:29,660 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 14:36:29,660 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 14:36:29,660 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 14:36:29,660 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 14:36:29,660 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 14:36:29,661 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 14:36:29,661 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 14:36:29,661 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 14:36:29,661 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 14:36:29,661 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 14:36:29,661 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 14:36:29,661 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 14:36:29,662 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 747981090a474d9d2269aea1ffd03eef2ddc8848 [2018-11-18 14:36:29,685 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 14:36:29,694 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 14:36:29,697 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 14:36:29,698 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 14:36:29,698 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 14:36:29,699 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/../../sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-18 14:36:29,741 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/data/eb8f9f236/d39df8e2d7894a749d4d939677778415/FLAGeb3b0cbf8 [2018-11-18 14:36:30,106 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 14:36:30,107 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/sv-benchmarks/c/psyco/psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-18 14:36:30,115 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/data/eb8f9f236/d39df8e2d7894a749d4d939677778415/FLAGeb3b0cbf8 [2018-11-18 14:36:30,501 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/data/eb8f9f236/d39df8e2d7894a749d4d939677778415 [2018-11-18 14:36:30,503 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 14:36:30,504 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 14:36:30,504 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 14:36:30,504 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 14:36:30,506 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 14:36:30,507 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,508 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@69ec145 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30, skipping insertion in model container [2018-11-18 14:36:30,508 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,516 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 14:36:30,548 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 14:36:30,708 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 14:36:30,710 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 14:36:30,759 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 14:36:30,770 INFO L195 MainTranslator]: Completed translation [2018-11-18 14:36:30,770 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30 WrapperNode [2018-11-18 14:36:30,770 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 14:36:30,771 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 14:36:30,771 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 14:36:30,771 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 14:36:30,776 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,782 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,786 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 14:36:30,786 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 14:36:30,786 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 14:36:30,786 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 14:36:30,832 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,832 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,834 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,834 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,848 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,857 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,860 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... [2018-11-18 14:36:30,864 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 14:36:30,865 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 14:36:30,865 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 14:36:30,865 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 14:36:30,866 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 14:36:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 14:36:30,902 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 14:36:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 14:36:30,902 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 14:36:30,902 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 14:36:30,903 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 14:36:31,480 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 14:36:31,481 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:36:31 BoogieIcfgContainer [2018-11-18 14:36:31,481 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 14:36:31,481 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 14:36:31,481 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 14:36:31,488 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 14:36:31,488 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 02:36:30" (1/3) ... [2018-11-18 14:36:31,488 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c83e540 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 02:36:31, skipping insertion in model container [2018-11-18 14:36:31,488 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:30" (2/3) ... [2018-11-18 14:36:31,489 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c83e540 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 02:36:31, skipping insertion in model container [2018-11-18 14:36:31,489 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:36:31" (3/3) ... [2018-11-18 14:36:31,490 INFO L112 eAbstractionObserver]: Analyzing ICFG psyco_abp_1_false-unreach-call_false-termination_true-no-overflow.c [2018-11-18 14:36:31,496 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 14:36:31,501 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 14:36:31,510 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 14:36:31,531 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 14:36:31,531 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 14:36:31,531 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 14:36:31,531 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 14:36:31,532 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 14:36:31,532 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 14:36:31,532 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 14:36:31,532 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 14:36:31,547 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states. [2018-11-18 14:36:31,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-18 14:36:31,551 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:31,551 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:31,553 INFO L423 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:31,556 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:31,556 INFO L82 PathProgramCache]: Analyzing trace with hash -662778961, now seen corresponding path program 1 times [2018-11-18 14:36:31,557 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:31,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:31,594 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:31,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:31,594 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:31,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:31,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:31,678 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:31,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:36:31,678 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:31,682 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:31,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:31,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:31,691 INFO L87 Difference]: Start difference. First operand 115 states. Second operand 3 states. [2018-11-18 14:36:31,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:31,909 INFO L93 Difference]: Finished difference Result 331 states and 635 transitions. [2018-11-18 14:36:31,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:31,910 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-11-18 14:36:31,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:31,918 INFO L225 Difference]: With dead ends: 331 [2018-11-18 14:36:31,918 INFO L226 Difference]: Without dead ends: 206 [2018-11-18 14:36:31,920 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:31,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-11-18 14:36:31,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 182. [2018-11-18 14:36:31,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-11-18 14:36:31,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 314 transitions. [2018-11-18 14:36:31,956 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 314 transitions. Word has length 14 [2018-11-18 14:36:31,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:31,957 INFO L480 AbstractCegarLoop]: Abstraction has 182 states and 314 transitions. [2018-11-18 14:36:31,957 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:31,957 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 314 transitions. [2018-11-18 14:36:31,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-18 14:36:31,958 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:31,958 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:31,958 INFO L423 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:31,958 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:31,958 INFO L82 PathProgramCache]: Analyzing trace with hash -1058783719, now seen corresponding path program 1 times [2018-11-18 14:36:31,958 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:31,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:31,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:31,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:31,960 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:31,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:31,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:31,995 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:31,995 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:36:31,995 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:31,996 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:31,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:31,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:31,996 INFO L87 Difference]: Start difference. First operand 182 states and 314 transitions. Second operand 3 states. [2018-11-18 14:36:32,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:32,018 INFO L93 Difference]: Finished difference Result 365 states and 632 transitions. [2018-11-18 14:36:32,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:32,019 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-11-18 14:36:32,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:32,020 INFO L225 Difference]: With dead ends: 365 [2018-11-18 14:36:32,020 INFO L226 Difference]: Without dead ends: 189 [2018-11-18 14:36:32,021 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:32,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-18 14:36:32,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2018-11-18 14:36:32,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-11-18 14:36:32,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 322 transitions. [2018-11-18 14:36:32,027 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 322 transitions. Word has length 15 [2018-11-18 14:36:32,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:32,027 INFO L480 AbstractCegarLoop]: Abstraction has 189 states and 322 transitions. [2018-11-18 14:36:32,028 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:32,028 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 322 transitions. [2018-11-18 14:36:32,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-18 14:36:32,028 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:32,028 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:32,028 INFO L423 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:32,029 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:32,029 INFO L82 PathProgramCache]: Analyzing trace with hash -426524154, now seen corresponding path program 1 times [2018-11-18 14:36:32,029 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:32,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:32,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,030 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:32,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:32,230 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:32,230 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:32,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 14:36:32,230 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:32,231 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 14:36:32,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 14:36:32,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-18 14:36:32,231 INFO L87 Difference]: Start difference. First operand 189 states and 322 transitions. Second operand 4 states. [2018-11-18 14:36:32,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:32,417 INFO L93 Difference]: Finished difference Result 290 states and 484 transitions. [2018-11-18 14:36:32,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:32,418 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2018-11-18 14:36:32,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:32,420 INFO L225 Difference]: With dead ends: 290 [2018-11-18 14:36:32,420 INFO L226 Difference]: Without dead ends: 274 [2018-11-18 14:36:32,421 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-18 14:36:32,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-11-18 14:36:32,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 259. [2018-11-18 14:36:32,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-11-18 14:36:32,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 436 transitions. [2018-11-18 14:36:32,433 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 436 transitions. Word has length 21 [2018-11-18 14:36:32,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:32,433 INFO L480 AbstractCegarLoop]: Abstraction has 259 states and 436 transitions. [2018-11-18 14:36:32,433 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 14:36:32,433 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 436 transitions. [2018-11-18 14:36:32,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-18 14:36:32,434 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:32,434 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:32,434 INFO L423 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:32,435 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:32,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1881066880, now seen corresponding path program 1 times [2018-11-18 14:36:32,435 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:32,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,436 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:32,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,436 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:32,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:32,470 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:32,470 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:32,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:36:32,471 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:32,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:32,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:32,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:32,471 INFO L87 Difference]: Start difference. First operand 259 states and 436 transitions. Second operand 3 states. [2018-11-18 14:36:32,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:32,501 INFO L93 Difference]: Finished difference Result 468 states and 791 transitions. [2018-11-18 14:36:32,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:32,501 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-11-18 14:36:32,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:32,502 INFO L225 Difference]: With dead ends: 468 [2018-11-18 14:36:32,503 INFO L226 Difference]: Without dead ends: 216 [2018-11-18 14:36:32,504 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:32,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-11-18 14:36:32,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 214. [2018-11-18 14:36:32,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-11-18 14:36:32,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 355 transitions. [2018-11-18 14:36:32,512 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 355 transitions. Word has length 22 [2018-11-18 14:36:32,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:32,512 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 355 transitions. [2018-11-18 14:36:32,513 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:32,513 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 355 transitions. [2018-11-18 14:36:32,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-18 14:36:32,514 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:32,514 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:32,514 INFO L423 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:32,514 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:32,514 INFO L82 PathProgramCache]: Analyzing trace with hash 30525515, now seen corresponding path program 1 times [2018-11-18 14:36:32,514 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:32,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,515 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:32,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,516 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:32,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:32,555 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 11 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:32,555 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:32,555 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:32,556 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 29 with the following transitions: [2018-11-18 14:36:32,557 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [54], [56], [526], [529], [530], [531] [2018-11-18 14:36:32,588 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:32,588 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:32,805 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:32,806 INFO L272 AbstractInterpreter]: Visited 21 different actions 41 times. Merged at 9 different actions 15 times. Never widened. Performed 491 root evaluator evaluations with a maximum evaluation depth of 9. Performed 491 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 5 fixpoints after 3 different actions. Largest state had 38 variables. [2018-11-18 14:36:32,822 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:32,823 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:32,823 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:32,824 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:32,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:32,836 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:32,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:32,867 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:32,886 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 14:36:32,886 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:32,911 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 14:36:32,927 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:36:32,928 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [4] total 6 [2018-11-18 14:36:32,928 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:32,928 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:32,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:32,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 14:36:32,929 INFO L87 Difference]: Start difference. First operand 214 states and 355 transitions. Second operand 3 states. [2018-11-18 14:36:32,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:32,952 INFO L93 Difference]: Finished difference Result 389 states and 646 transitions. [2018-11-18 14:36:32,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:32,953 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2018-11-18 14:36:32,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:32,954 INFO L225 Difference]: With dead ends: 389 [2018-11-18 14:36:32,954 INFO L226 Difference]: Without dead ends: 182 [2018-11-18 14:36:32,955 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 14:36:32,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-11-18 14:36:32,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 180. [2018-11-18 14:36:32,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-11-18 14:36:32,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 291 transitions. [2018-11-18 14:36:32,963 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 291 transitions. Word has length 28 [2018-11-18 14:36:32,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:32,963 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 291 transitions. [2018-11-18 14:36:32,963 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:32,964 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 291 transitions. [2018-11-18 14:36:32,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-18 14:36:32,965 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:32,965 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:32,965 INFO L423 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:32,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:32,965 INFO L82 PathProgramCache]: Analyzing trace with hash 1381236108, now seen corresponding path program 1 times [2018-11-18 14:36:32,965 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:32,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:32,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:32,966 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:32,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:33,056 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:33,057 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:33,057 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:33,057 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 31 with the following transitions: [2018-11-18 14:36:33,057 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [239], [242], [245], [526], [529], [530], [531] [2018-11-18 14:36:33,059 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:33,059 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:33,194 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:33,194 INFO L272 AbstractInterpreter]: Visited 26 different actions 54 times. Merged at 16 different actions 22 times. Never widened. Performed 579 root evaluator evaluations with a maximum evaluation depth of 9. Performed 579 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 5 fixpoints after 2 different actions. Largest state had 39 variables. [2018-11-18 14:36:33,198 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:33,198 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:33,198 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:33,198 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:33,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:33,209 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:33,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:33,237 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:33,240 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:33,240 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:33,263 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:33,289 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:33,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2018-11-18 14:36:33,289 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:33,290 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 14:36:33,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 14:36:33,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-18 14:36:33,290 INFO L87 Difference]: Start difference. First operand 180 states and 291 transitions. Second operand 4 states. [2018-11-18 14:36:33,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:33,467 INFO L93 Difference]: Finished difference Result 435 states and 706 transitions. [2018-11-18 14:36:33,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 14:36:33,468 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-11-18 14:36:33,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:33,469 INFO L225 Difference]: With dead ends: 435 [2018-11-18 14:36:33,469 INFO L226 Difference]: Without dead ends: 282 [2018-11-18 14:36:33,469 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-18 14:36:33,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-11-18 14:36:33,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 245. [2018-11-18 14:36:33,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 245 states. [2018-11-18 14:36:33,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 245 states and 408 transitions. [2018-11-18 14:36:33,477 INFO L78 Accepts]: Start accepts. Automaton has 245 states and 408 transitions. Word has length 30 [2018-11-18 14:36:33,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:33,477 INFO L480 AbstractCegarLoop]: Abstraction has 245 states and 408 transitions. [2018-11-18 14:36:33,477 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 14:36:33,477 INFO L276 IsEmpty]: Start isEmpty. Operand 245 states and 408 transitions. [2018-11-18 14:36:33,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-18 14:36:33,478 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:33,478 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:33,478 INFO L423 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:33,478 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:33,478 INFO L82 PathProgramCache]: Analyzing trace with hash 2061294478, now seen corresponding path program 1 times [2018-11-18 14:36:33,478 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:33,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:33,479 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:33,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:33,479 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:33,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:33,511 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:33,512 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:33,512 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:33,512 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 31 with the following transitions: [2018-11-18 14:36:33,512 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [239], [242], [245], [526], [529], [530], [531] [2018-11-18 14:36:33,513 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:33,514 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:33,560 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 14:36:33,561 INFO L272 AbstractInterpreter]: Visited 24 different actions 37 times. Merged at 8 different actions 10 times. Never widened. Performed 451 root evaluator evaluations with a maximum evaluation depth of 9. Performed 451 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 3 fixpoints after 3 different actions. Largest state had 39 variables. [2018-11-18 14:36:33,562 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:33,562 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 14:36:33,640 INFO L227 lantSequenceWeakener]: Weakened 27 states. On average, predicates are now at 90.76% of their original sizes. [2018-11-18 14:36:33,640 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 14:36:33,714 INFO L415 sIntCurrentIteration]: We unified 29 AI predicates to 29 [2018-11-18 14:36:33,714 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 14:36:33,715 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 14:36:33,715 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [4] total 12 [2018-11-18 14:36:33,715 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:33,715 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 14:36:33,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 14:36:33,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 14:36:33,716 INFO L87 Difference]: Start difference. First operand 245 states and 408 transitions. Second operand 10 states. [2018-11-18 14:36:34,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:34,750 INFO L93 Difference]: Finished difference Result 519 states and 859 transitions. [2018-11-18 14:36:34,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 14:36:34,750 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 30 [2018-11-18 14:36:34,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:34,752 INFO L225 Difference]: With dead ends: 519 [2018-11-18 14:36:34,752 INFO L226 Difference]: Without dead ends: 301 [2018-11-18 14:36:34,752 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:36:34,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-11-18 14:36:34,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 293. [2018-11-18 14:36:34,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-11-18 14:36:34,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 469 transitions. [2018-11-18 14:36:34,760 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 469 transitions. Word has length 30 [2018-11-18 14:36:34,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:34,760 INFO L480 AbstractCegarLoop]: Abstraction has 293 states and 469 transitions. [2018-11-18 14:36:34,760 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 14:36:34,761 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 469 transitions. [2018-11-18 14:36:34,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-18 14:36:34,761 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:34,761 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:34,762 INFO L423 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:34,762 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:34,762 INFO L82 PathProgramCache]: Analyzing trace with hash -512937066, now seen corresponding path program 1 times [2018-11-18 14:36:34,762 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:34,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:34,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:34,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:34,763 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:34,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:34,867 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:34,867 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:34,867 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:34,868 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 32 with the following transitions: [2018-11-18 14:36:34,868 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [260], [526], [529], [530], [531] [2018-11-18 14:36:34,869 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:34,869 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:34,948 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:34,948 INFO L272 AbstractInterpreter]: Visited 26 different actions 55 times. Merged at 19 different actions 25 times. Never widened. Performed 739 root evaluator evaluations with a maximum evaluation depth of 9. Performed 739 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 4 fixpoints after 3 different actions. Largest state had 40 variables. [2018-11-18 14:36:34,950 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:34,950 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:34,950 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:34,950 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:34,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:34,959 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:34,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:34,988 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:35,045 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:35,045 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:35,093 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:35,118 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:35,119 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2018-11-18 14:36:35,119 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:35,119 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 14:36:35,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 14:36:35,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:36:35,119 INFO L87 Difference]: Start difference. First operand 293 states and 469 transitions. Second operand 6 states. [2018-11-18 14:36:35,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:35,245 INFO L93 Difference]: Finished difference Result 297 states and 473 transitions. [2018-11-18 14:36:35,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 14:36:35,246 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2018-11-18 14:36:35,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:35,247 INFO L225 Difference]: With dead ends: 297 [2018-11-18 14:36:35,247 INFO L226 Difference]: Without dead ends: 294 [2018-11-18 14:36:35,248 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:36:35,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-11-18 14:36:35,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 294. [2018-11-18 14:36:35,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-11-18 14:36:35,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 469 transitions. [2018-11-18 14:36:35,256 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 469 transitions. Word has length 31 [2018-11-18 14:36:35,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:35,256 INFO L480 AbstractCegarLoop]: Abstraction has 294 states and 469 transitions. [2018-11-18 14:36:35,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 14:36:35,256 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 469 transitions. [2018-11-18 14:36:35,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 14:36:35,257 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:35,257 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:35,257 INFO L423 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:35,257 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:35,258 INFO L82 PathProgramCache]: Analyzing trace with hash 2019699710, now seen corresponding path program 1 times [2018-11-18 14:36:35,258 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:35,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:35,258 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:35,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:35,258 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:35,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:35,295 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:35,295 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:35,295 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:36:35,296 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:35,296 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:35,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:35,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:35,296 INFO L87 Difference]: Start difference. First operand 294 states and 469 transitions. Second operand 3 states. [2018-11-18 14:36:35,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:35,333 INFO L93 Difference]: Finished difference Result 538 states and 871 transitions. [2018-11-18 14:36:35,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:35,333 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2018-11-18 14:36:35,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:35,335 INFO L225 Difference]: With dead ends: 538 [2018-11-18 14:36:35,335 INFO L226 Difference]: Without dead ends: 296 [2018-11-18 14:36:35,335 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:35,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-11-18 14:36:35,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 294. [2018-11-18 14:36:35,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-11-18 14:36:35,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 466 transitions. [2018-11-18 14:36:35,343 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 466 transitions. Word has length 40 [2018-11-18 14:36:35,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:35,343 INFO L480 AbstractCegarLoop]: Abstraction has 294 states and 466 transitions. [2018-11-18 14:36:35,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:35,343 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 466 transitions. [2018-11-18 14:36:35,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-18 14:36:35,344 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:35,344 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:35,344 INFO L423 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:35,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:35,345 INFO L82 PathProgramCache]: Analyzing trace with hash 937434793, now seen corresponding path program 1 times [2018-11-18 14:36:35,345 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:35,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:35,345 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:35,345 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:35,346 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:35,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:35,464 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:35,465 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:35,465 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:35,465 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-11-18 14:36:35,465 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [335], [338], [341], [526], [529], [530], [531] [2018-11-18 14:36:35,467 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:35,467 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:35,533 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:35,533 INFO L272 AbstractInterpreter]: Visited 31 different actions 64 times. Merged at 19 different actions 27 times. Never widened. Performed 755 root evaluator evaluations with a maximum evaluation depth of 9. Performed 755 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 41 variables. [2018-11-18 14:36:35,535 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:35,536 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:35,536 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:35,536 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:35,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:35,549 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:35,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:35,581 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:35,627 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:35,627 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:35,807 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:35,832 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:35,832 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 11 [2018-11-18 14:36:35,832 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:35,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 14:36:35,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 14:36:35,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2018-11-18 14:36:35,833 INFO L87 Difference]: Start difference. First operand 294 states and 466 transitions. Second operand 8 states. [2018-11-18 14:36:36,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:36,210 INFO L93 Difference]: Finished difference Result 623 states and 986 transitions. [2018-11-18 14:36:36,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 14:36:36,210 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2018-11-18 14:36:36,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:36,212 INFO L225 Difference]: With dead ends: 623 [2018-11-18 14:36:36,212 INFO L226 Difference]: Without dead ends: 373 [2018-11-18 14:36:36,213 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 79 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2018-11-18 14:36:36,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2018-11-18 14:36:36,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 345. [2018-11-18 14:36:36,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2018-11-18 14:36:36,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 546 transitions. [2018-11-18 14:36:36,223 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 546 transitions. Word has length 41 [2018-11-18 14:36:36,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:36,224 INFO L480 AbstractCegarLoop]: Abstraction has 345 states and 546 transitions. [2018-11-18 14:36:36,224 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 14:36:36,224 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 546 transitions. [2018-11-18 14:36:36,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 14:36:36,224 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:36,224 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:36,225 INFO L423 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:36,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:36,225 INFO L82 PathProgramCache]: Analyzing trace with hash -992845957, now seen corresponding path program 1 times [2018-11-18 14:36:36,225 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:36,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:36,226 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:36,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:36,226 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:36,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:36,295 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 14:36:36,295 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:36,295 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:36,295 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-11-18 14:36:36,295 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [350], [353], [356], [526], [529], [530], [531] [2018-11-18 14:36:36,296 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:36,297 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:36,391 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:36,392 INFO L272 AbstractInterpreter]: Visited 32 different actions 85 times. Merged at 23 different actions 44 times. Never widened. Performed 1052 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1052 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 9 fixpoints after 6 different actions. Largest state had 42 variables. [2018-11-18 14:36:36,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:36,402 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:36,402 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:36,402 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:36,411 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:36,412 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:36,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:36,446 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:36,460 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 14:36:36,461 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:36,474 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 14:36:36,502 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:36,502 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 4 [2018-11-18 14:36:36,503 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:36,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 14:36:36,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 14:36:36,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 14:36:36,503 INFO L87 Difference]: Start difference. First operand 345 states and 546 transitions. Second operand 4 states. [2018-11-18 14:36:36,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:36,596 INFO L93 Difference]: Finished difference Result 589 states and 945 transitions. [2018-11-18 14:36:36,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 14:36:36,597 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-11-18 14:36:36,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:36,599 INFO L225 Difference]: With dead ends: 589 [2018-11-18 14:36:36,599 INFO L226 Difference]: Without dead ends: 567 [2018-11-18 14:36:36,600 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 14:36:36,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2018-11-18 14:36:36,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 565. [2018-11-18 14:36:36,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 565 states. [2018-11-18 14:36:36,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 565 states to 565 states and 869 transitions. [2018-11-18 14:36:36,616 INFO L78 Accepts]: Start accepts. Automaton has 565 states and 869 transitions. Word has length 42 [2018-11-18 14:36:36,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:36,616 INFO L480 AbstractCegarLoop]: Abstraction has 565 states and 869 transitions. [2018-11-18 14:36:36,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 14:36:36,616 INFO L276 IsEmpty]: Start isEmpty. Operand 565 states and 869 transitions. [2018-11-18 14:36:36,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 14:36:36,617 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:36,617 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:36,617 INFO L423 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:36,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:36,617 INFO L82 PathProgramCache]: Analyzing trace with hash -275920596, now seen corresponding path program 1 times [2018-11-18 14:36:36,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:36,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:36,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:36,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:36,618 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:36,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:36,789 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:36,789 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:36,789 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:36,789 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-18 14:36:36,790 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [386], [526], [529], [530], [531] [2018-11-18 14:36:36,791 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:36,791 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:36,867 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:36,867 INFO L272 AbstractInterpreter]: Visited 34 different actions 67 times. Merged at 19 different actions 27 times. Never widened. Performed 789 root evaluator evaluations with a maximum evaluation depth of 9. Performed 789 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 44 variables. [2018-11-18 14:36:36,869 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:36,869 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:36,869 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:36,869 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:36,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:36,880 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:36,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:36,911 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:36,930 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:36,930 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:37,043 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:37,059 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:37,059 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 9 [2018-11-18 14:36:37,059 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:37,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 14:36:37,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 14:36:37,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 14:36:37,060 INFO L87 Difference]: Start difference. First operand 565 states and 869 transitions. Second operand 6 states. [2018-11-18 14:36:37,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:37,214 INFO L93 Difference]: Finished difference Result 574 states and 876 transitions. [2018-11-18 14:36:37,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 14:36:37,215 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-11-18 14:36:37,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:37,216 INFO L225 Difference]: With dead ends: 574 [2018-11-18 14:36:37,216 INFO L226 Difference]: Without dead ends: 572 [2018-11-18 14:36:37,216 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 84 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-18 14:36:37,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-11-18 14:36:37,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 566. [2018-11-18 14:36:37,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 566 states. [2018-11-18 14:36:37,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 566 states to 566 states and 870 transitions. [2018-11-18 14:36:37,226 INFO L78 Accepts]: Start accepts. Automaton has 566 states and 870 transitions. Word has length 44 [2018-11-18 14:36:37,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:37,226 INFO L480 AbstractCegarLoop]: Abstraction has 566 states and 870 transitions. [2018-11-18 14:36:37,226 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 14:36:37,227 INFO L276 IsEmpty]: Start isEmpty. Operand 566 states and 870 transitions. [2018-11-18 14:36:37,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-18 14:36:37,227 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:37,227 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:37,227 INFO L423 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:37,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:37,228 INFO L82 PathProgramCache]: Analyzing trace with hash 161633879, now seen corresponding path program 1 times [2018-11-18 14:36:37,228 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:37,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:37,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,229 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:37,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:37,246 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:37,246 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:37,246 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:36:37,246 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:37,246 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:37,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:37,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:37,247 INFO L87 Difference]: Start difference. First operand 566 states and 870 transitions. Second operand 3 states. [2018-11-18 14:36:37,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:37,276 INFO L93 Difference]: Finished difference Result 1092 states and 1673 transitions. [2018-11-18 14:36:37,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:37,276 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2018-11-18 14:36:37,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:37,278 INFO L225 Difference]: With dead ends: 1092 [2018-11-18 14:36:37,278 INFO L226 Difference]: Without dead ends: 578 [2018-11-18 14:36:37,279 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:37,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states. [2018-11-18 14:36:37,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 576. [2018-11-18 14:36:37,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 576 states. [2018-11-18 14:36:37,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 576 states to 576 states and 863 transitions. [2018-11-18 14:36:37,289 INFO L78 Accepts]: Start accepts. Automaton has 576 states and 863 transitions. Word has length 45 [2018-11-18 14:36:37,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:37,289 INFO L480 AbstractCegarLoop]: Abstraction has 576 states and 863 transitions. [2018-11-18 14:36:37,289 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:37,290 INFO L276 IsEmpty]: Start isEmpty. Operand 576 states and 863 transitions. [2018-11-18 14:36:37,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-18 14:36:37,290 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:37,290 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:37,290 INFO L423 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:37,290 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:37,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1614817955, now seen corresponding path program 1 times [2018-11-18 14:36:37,291 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:37,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,291 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:37,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,291 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:37,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:37,318 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-18 14:36:37,319 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 14:36:37,319 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 14:36:37,319 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:37,319 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 14:36:37,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 14:36:37,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:37,320 INFO L87 Difference]: Start difference. First operand 576 states and 863 transitions. Second operand 3 states. [2018-11-18 14:36:37,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:37,339 INFO L93 Difference]: Finished difference Result 829 states and 1242 transitions. [2018-11-18 14:36:37,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 14:36:37,340 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2018-11-18 14:36:37,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:37,341 INFO L225 Difference]: With dead ends: 829 [2018-11-18 14:36:37,341 INFO L226 Difference]: Without dead ends: 325 [2018-11-18 14:36:37,341 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 14:36:37,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-11-18 14:36:37,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 323. [2018-11-18 14:36:37,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-11-18 14:36:37,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 470 transitions. [2018-11-18 14:36:37,348 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 470 transitions. Word has length 55 [2018-11-18 14:36:37,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:37,348 INFO L480 AbstractCegarLoop]: Abstraction has 323 states and 470 transitions. [2018-11-18 14:36:37,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 14:36:37,348 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 470 transitions. [2018-11-18 14:36:37,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 14:36:37,348 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:37,349 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:37,349 INFO L423 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:37,349 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:37,349 INFO L82 PathProgramCache]: Analyzing trace with hash 1860919614, now seen corresponding path program 1 times [2018-11-18 14:36:37,349 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:37,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:37,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,350 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:37,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:37,389 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:37,389 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:37,389 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:37,389 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-11-18 14:36:37,390 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [526], [529], [530], [531] [2018-11-18 14:36:37,391 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:37,391 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:37,479 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:37,479 INFO L272 AbstractInterpreter]: Visited 41 different actions 86 times. Merged at 30 different actions 36 times. Never widened. Performed 1003 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1003 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 9 fixpoints after 5 different actions. Largest state had 46 variables. [2018-11-18 14:36:37,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:37,490 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:37,490 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:37,490 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:37,497 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:37,497 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:37,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:37,538 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:37,546 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:37,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:37,603 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 23 proven. 14 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:37,619 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:37,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 8 [2018-11-18 14:36:37,619 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:37,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 14:36:37,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 14:36:37,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:36:37,619 INFO L87 Difference]: Start difference. First operand 323 states and 470 transitions. Second operand 5 states. [2018-11-18 14:36:37,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:37,701 INFO L93 Difference]: Finished difference Result 684 states and 1000 transitions. [2018-11-18 14:36:37,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 14:36:37,701 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-11-18 14:36:37,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:37,703 INFO L225 Difference]: With dead ends: 684 [2018-11-18 14:36:37,703 INFO L226 Difference]: Without dead ends: 433 [2018-11-18 14:36:37,704 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-11-18 14:36:37,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 433 states. [2018-11-18 14:36:37,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 433 to 404. [2018-11-18 14:36:37,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 404 states. [2018-11-18 14:36:37,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 404 states to 404 states and 593 transitions. [2018-11-18 14:36:37,713 INFO L78 Accepts]: Start accepts. Automaton has 404 states and 593 transitions. Word has length 56 [2018-11-18 14:36:37,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:37,713 INFO L480 AbstractCegarLoop]: Abstraction has 404 states and 593 transitions. [2018-11-18 14:36:37,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 14:36:37,714 INFO L276 IsEmpty]: Start isEmpty. Operand 404 states and 593 transitions. [2018-11-18 14:36:37,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 14:36:37,714 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:37,714 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:37,714 INFO L423 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:37,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:37,715 INFO L82 PathProgramCache]: Analyzing trace with hash 2119085052, now seen corresponding path program 1 times [2018-11-18 14:36:37,715 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:37,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:37,716 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:37,716 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:37,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:37,776 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:37,776 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:37,776 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:37,776 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-11-18 14:36:37,776 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [526], [529], [530], [531] [2018-11-18 14:36:37,778 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:37,778 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:37,851 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:37,851 INFO L272 AbstractInterpreter]: Visited 40 different actions 75 times. Merged at 20 different actions 28 times. Never widened. Performed 835 root evaluator evaluations with a maximum evaluation depth of 9. Performed 835 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 7 fixpoints after 6 different actions. Largest state had 46 variables. [2018-11-18 14:36:37,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:37,853 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:37,853 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:37,853 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:37,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:37,860 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:37,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:37,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:37,908 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:37,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:37,930 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:37,948 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:37,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 4] total 7 [2018-11-18 14:36:37,948 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:37,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 14:36:37,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 14:36:37,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-18 14:36:37,949 INFO L87 Difference]: Start difference. First operand 404 states and 593 transitions. Second operand 5 states. [2018-11-18 14:36:38,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:38,000 INFO L93 Difference]: Finished difference Result 451 states and 659 transitions. [2018-11-18 14:36:38,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 14:36:38,000 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2018-11-18 14:36:38,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:38,001 INFO L225 Difference]: With dead ends: 451 [2018-11-18 14:36:38,001 INFO L226 Difference]: Without dead ends: 445 [2018-11-18 14:36:38,002 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-18 14:36:38,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states. [2018-11-18 14:36:38,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 442. [2018-11-18 14:36:38,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 442 states. [2018-11-18 14:36:38,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 647 transitions. [2018-11-18 14:36:38,011 INFO L78 Accepts]: Start accepts. Automaton has 442 states and 647 transitions. Word has length 56 [2018-11-18 14:36:38,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:38,012 INFO L480 AbstractCegarLoop]: Abstraction has 442 states and 647 transitions. [2018-11-18 14:36:38,012 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 14:36:38,012 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 647 transitions. [2018-11-18 14:36:38,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 14:36:38,012 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:38,012 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:38,012 INFO L423 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:38,013 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:38,013 INFO L82 PathProgramCache]: Analyzing trace with hash 807144158, now seen corresponding path program 1 times [2018-11-18 14:36:38,013 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:38,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:38,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:38,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:38,014 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:38,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:38,137 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:38,138 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:38,138 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:38,138 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 61 with the following transitions: [2018-11-18 14:36:38,138 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [512], [526], [529], [530], [531] [2018-11-18 14:36:38,139 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:38,139 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:38,194 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:38,194 INFO L272 AbstractInterpreter]: Visited 44 different actions 79 times. Merged at 20 different actions 28 times. Never widened. Performed 872 root evaluator evaluations with a maximum evaluation depth of 9. Performed 872 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 7 fixpoints after 6 different actions. Largest state had 50 variables. [2018-11-18 14:36:38,198 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:38,198 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:38,198 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:38,198 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:38,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:38,207 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:38,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:38,235 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:38,269 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:38,270 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:38,335 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:38,351 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:38,351 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2018-11-18 14:36:38,351 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:38,351 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 14:36:38,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 14:36:38,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=168, Unknown=0, NotChecked=0, Total=210 [2018-11-18 14:36:38,352 INFO L87 Difference]: Start difference. First operand 442 states and 647 transitions. Second operand 11 states. [2018-11-18 14:36:38,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:38,605 INFO L93 Difference]: Finished difference Result 445 states and 649 transitions. [2018-11-18 14:36:38,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 14:36:38,605 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 60 [2018-11-18 14:36:38,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:38,607 INFO L225 Difference]: With dead ends: 445 [2018-11-18 14:36:38,607 INFO L226 Difference]: Without dead ends: 443 [2018-11-18 14:36:38,607 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 113 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-11-18 14:36:38,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 443 states. [2018-11-18 14:36:38,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 443 to 442. [2018-11-18 14:36:38,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 442 states. [2018-11-18 14:36:38,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 646 transitions. [2018-11-18 14:36:38,622 INFO L78 Accepts]: Start accepts. Automaton has 442 states and 646 transitions. Word has length 60 [2018-11-18 14:36:38,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:38,622 INFO L480 AbstractCegarLoop]: Abstraction has 442 states and 646 transitions. [2018-11-18 14:36:38,622 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 14:36:38,622 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 646 transitions. [2018-11-18 14:36:38,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-11-18 14:36:38,623 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:38,623 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:38,623 INFO L423 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:38,623 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:38,623 INFO L82 PathProgramCache]: Analyzing trace with hash -743255307, now seen corresponding path program 1 times [2018-11-18 14:36:38,623 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:38,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:38,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:38,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:38,624 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:38,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:38,805 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:38,805 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:38,806 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:38,806 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 68 with the following transitions: [2018-11-18 14:36:38,806 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [54], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:38,807 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:38,807 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:39,002 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:39,002 INFO L272 AbstractInterpreter]: Visited 45 different actions 148 times. Merged at 36 different actions 89 times. Widened at 1 different actions 1 times. Performed 1733 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1733 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 17 fixpoints after 9 different actions. Largest state had 50 variables. [2018-11-18 14:36:39,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:39,010 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:39,010 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:39,010 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:39,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:39,020 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:39,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:39,053 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:39,127 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:39,127 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:39,317 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 15 proven. 44 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 14:36:39,332 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:39,332 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7] total 15 [2018-11-18 14:36:39,332 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:39,333 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 14:36:39,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 14:36:39,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2018-11-18 14:36:39,333 INFO L87 Difference]: Start difference. First operand 442 states and 646 transitions. Second operand 10 states. [2018-11-18 14:36:39,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:39,584 INFO L93 Difference]: Finished difference Result 446 states and 650 transitions. [2018-11-18 14:36:39,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 14:36:39,585 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2018-11-18 14:36:39,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:39,586 INFO L225 Difference]: With dead ends: 446 [2018-11-18 14:36:39,586 INFO L226 Difference]: Without dead ends: 444 [2018-11-18 14:36:39,587 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 123 SyntacticMatches, 6 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-11-18 14:36:39,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 444 states. [2018-11-18 14:36:39,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 444 to 443. [2018-11-18 14:36:39,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 443 states. [2018-11-18 14:36:39,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 443 states to 443 states and 647 transitions. [2018-11-18 14:36:39,600 INFO L78 Accepts]: Start accepts. Automaton has 443 states and 647 transitions. Word has length 67 [2018-11-18 14:36:39,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:39,600 INFO L480 AbstractCegarLoop]: Abstraction has 443 states and 647 transitions. [2018-11-18 14:36:39,600 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 14:36:39,601 INFO L276 IsEmpty]: Start isEmpty. Operand 443 states and 647 transitions. [2018-11-18 14:36:39,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 14:36:39,601 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:39,601 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:39,601 INFO L423 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:39,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:39,602 INFO L82 PathProgramCache]: Analyzing trace with hash -1746386041, now seen corresponding path program 1 times [2018-11-18 14:36:39,602 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:39,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:39,603 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:39,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:39,603 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:39,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:39,653 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:39,653 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:39,653 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:39,654 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 78 with the following transitions: [2018-11-18 14:36:39,654 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [260], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:39,655 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:39,655 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:39,765 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:39,765 INFO L272 AbstractInterpreter]: Visited 46 different actions 111 times. Merged at 23 different actions 49 times. Widened at 1 different actions 1 times. Performed 1288 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1288 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 14 fixpoints after 8 different actions. Largest state had 50 variables. [2018-11-18 14:36:39,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:39,778 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:39,778 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:39,778 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:39,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:39,788 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:39,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:39,835 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:39,844 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:39,844 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:39,878 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:39,903 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:39,903 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2018-11-18 14:36:39,903 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:39,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 14:36:39,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 14:36:39,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-18 14:36:39,904 INFO L87 Difference]: Start difference. First operand 443 states and 647 transitions. Second operand 6 states. [2018-11-18 14:36:40,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:40,033 INFO L93 Difference]: Finished difference Result 895 states and 1309 transitions. [2018-11-18 14:36:40,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 14:36:40,033 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2018-11-18 14:36:40,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:40,035 INFO L225 Difference]: With dead ends: 895 [2018-11-18 14:36:40,035 INFO L226 Difference]: Without dead ends: 563 [2018-11-18 14:36:40,036 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-11-18 14:36:40,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2018-11-18 14:36:40,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 524. [2018-11-18 14:36:40,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 524 states. [2018-11-18 14:36:40,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 524 states to 524 states and 770 transitions. [2018-11-18 14:36:40,054 INFO L78 Accepts]: Start accepts. Automaton has 524 states and 770 transitions. Word has length 77 [2018-11-18 14:36:40,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:40,055 INFO L480 AbstractCegarLoop]: Abstraction has 524 states and 770 transitions. [2018-11-18 14:36:40,055 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 14:36:40,055 INFO L276 IsEmpty]: Start isEmpty. Operand 524 states and 770 transitions. [2018-11-18 14:36:40,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 14:36:40,056 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:40,056 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:40,056 INFO L423 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:40,056 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:40,056 INFO L82 PathProgramCache]: Analyzing trace with hash -2139413051, now seen corresponding path program 1 times [2018-11-18 14:36:40,057 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:40,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:40,057 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:40,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:40,058 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:40,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:40,232 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:40,232 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:40,232 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:40,232 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 78 with the following transitions: [2018-11-18 14:36:40,232 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [260], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:40,233 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:40,234 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:40,322 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:40,323 INFO L272 AbstractInterpreter]: Visited 45 different actions 82 times. Merged at 22 different actions 30 times. Never widened. Performed 908 root evaluator evaluations with a maximum evaluation depth of 9. Performed 908 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 8 fixpoints after 7 different actions. Largest state had 50 variables. [2018-11-18 14:36:40,325 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:40,325 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:40,325 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:40,325 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:40,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:40,340 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:40,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:40,381 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:40,425 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 18 proven. 70 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:40,425 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:40,492 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 35 proven. 43 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:40,507 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:40,507 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 6] total 17 [2018-11-18 14:36:40,507 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:40,508 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 14:36:40,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 14:36:40,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2018-11-18 14:36:40,508 INFO L87 Difference]: Start difference. First operand 524 states and 770 transitions. Second operand 13 states. [2018-11-18 14:36:40,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:40,657 INFO L93 Difference]: Finished difference Result 550 states and 806 transitions. [2018-11-18 14:36:40,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 14:36:40,659 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 77 [2018-11-18 14:36:40,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:40,661 INFO L225 Difference]: With dead ends: 550 [2018-11-18 14:36:40,662 INFO L226 Difference]: Without dead ends: 546 [2018-11-18 14:36:40,662 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 146 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2018-11-18 14:36:40,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-11-18 14:36:40,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 546. [2018-11-18 14:36:40,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2018-11-18 14:36:40,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 800 transitions. [2018-11-18 14:36:40,677 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 800 transitions. Word has length 77 [2018-11-18 14:36:40,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:40,678 INFO L480 AbstractCegarLoop]: Abstraction has 546 states and 800 transitions. [2018-11-18 14:36:40,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 14:36:40,678 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 800 transitions. [2018-11-18 14:36:40,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-18 14:36:40,679 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:40,679 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:40,679 INFO L423 AbstractCegarLoop]: === Iteration 21 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:40,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:40,679 INFO L82 PathProgramCache]: Analyzing trace with hash -1314627048, now seen corresponding path program 1 times [2018-11-18 14:36:40,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:40,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:40,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:40,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:40,680 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:40,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:40,886 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 26 proven. 99 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-11-18 14:36:40,887 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:40,887 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:40,887 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 88 with the following transitions: [2018-11-18 14:36:40,887 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [335], [338], [341], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:40,888 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:40,888 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:40,969 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:40,969 INFO L272 AbstractInterpreter]: Visited 47 different actions 82 times. Merged at 20 different actions 28 times. Never widened. Performed 892 root evaluator evaluations with a maximum evaluation depth of 9. Performed 892 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 8 fixpoints after 7 different actions. Largest state had 50 variables. [2018-11-18 14:36:40,982 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:40,982 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:40,982 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:40,982 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:40,996 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:40,996 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:41,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:41,050 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:41,080 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 99 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:41,080 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:41,295 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 21 proven. 58 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2018-11-18 14:36:41,318 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:41,318 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 5] total 12 [2018-11-18 14:36:41,318 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:41,318 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 14:36:41,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 14:36:41,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:36:41,318 INFO L87 Difference]: Start difference. First operand 546 states and 800 transitions. Second operand 9 states. [2018-11-18 14:36:41,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:41,437 INFO L93 Difference]: Finished difference Result 576 states and 838 transitions. [2018-11-18 14:36:41,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 14:36:41,437 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-11-18 14:36:41,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:41,439 INFO L225 Difference]: With dead ends: 576 [2018-11-18 14:36:41,439 INFO L226 Difference]: Without dead ends: 572 [2018-11-18 14:36:41,439 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 170 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-11-18 14:36:41,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-11-18 14:36:41,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 565. [2018-11-18 14:36:41,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 565 states. [2018-11-18 14:36:41,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 565 states to 565 states and 826 transitions. [2018-11-18 14:36:41,448 INFO L78 Accepts]: Start accepts. Automaton has 565 states and 826 transitions. Word has length 87 [2018-11-18 14:36:41,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:41,449 INFO L480 AbstractCegarLoop]: Abstraction has 565 states and 826 transitions. [2018-11-18 14:36:41,449 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 14:36:41,449 INFO L276 IsEmpty]: Start isEmpty. Operand 565 states and 826 transitions. [2018-11-18 14:36:41,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-18 14:36:41,449 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:41,450 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 7, 5, 5, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:41,450 INFO L423 AbstractCegarLoop]: === Iteration 22 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:41,450 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:41,450 INFO L82 PathProgramCache]: Analyzing trace with hash 233904989, now seen corresponding path program 1 times [2018-11-18 14:36:41,450 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:41,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:41,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:41,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:41,451 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:41,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:41,638 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:41,638 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:41,638 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:41,638 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 91 with the following transitions: [2018-11-18 14:36:41,638 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [386], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:41,639 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:41,639 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:41,804 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:41,804 INFO L272 AbstractInterpreter]: Visited 45 different actions 146 times. Merged at 36 different actions 87 times. Widened at 1 different actions 1 times. Performed 1751 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1751 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 17 fixpoints after 9 different actions. Largest state had 50 variables. [2018-11-18 14:36:41,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:41,814 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:41,814 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:41,814 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:41,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:41,831 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:41,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:41,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:41,935 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 21 proven. 110 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:41,935 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:42,258 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 67 proven. 64 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:42,274 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:42,274 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 20 [2018-11-18 14:36:42,274 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:42,274 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-18 14:36:42,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-18 14:36:42,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2018-11-18 14:36:42,275 INFO L87 Difference]: Start difference. First operand 565 states and 826 transitions. Second operand 14 states. [2018-11-18 14:36:42,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:42,509 INFO L93 Difference]: Finished difference Result 570 states and 831 transitions. [2018-11-18 14:36:42,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 14:36:42,509 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 90 [2018-11-18 14:36:42,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:42,511 INFO L225 Difference]: With dead ends: 570 [2018-11-18 14:36:42,511 INFO L226 Difference]: Without dead ends: 568 [2018-11-18 14:36:42,511 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 169 SyntacticMatches, 5 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2018-11-18 14:36:42,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2018-11-18 14:36:42,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 566. [2018-11-18 14:36:42,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 566 states. [2018-11-18 14:36:42,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 566 states to 566 states and 827 transitions. [2018-11-18 14:36:42,524 INFO L78 Accepts]: Start accepts. Automaton has 566 states and 827 transitions. Word has length 90 [2018-11-18 14:36:42,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:42,525 INFO L480 AbstractCegarLoop]: Abstraction has 566 states and 827 transitions. [2018-11-18 14:36:42,525 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-18 14:36:42,525 INFO L276 IsEmpty]: Start isEmpty. Operand 566 states and 827 transitions. [2018-11-18 14:36:42,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-18 14:36:42,526 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:42,526 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:42,526 INFO L423 AbstractCegarLoop]: === Iteration 23 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:42,526 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:42,526 INFO L82 PathProgramCache]: Analyzing trace with hash -1342705169, now seen corresponding path program 1 times [2018-11-18 14:36:42,526 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:42,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:42,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:42,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:42,527 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:42,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:42,610 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:42,610 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:42,610 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:42,610 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 103 with the following transitions: [2018-11-18 14:36:42,611 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:42,611 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:42,612 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:42,749 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:42,749 INFO L272 AbstractInterpreter]: Visited 48 different actions 101 times. Merged at 38 different actions 44 times. Never widened. Performed 1092 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1092 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 11 fixpoints after 6 different actions. Largest state had 50 variables. [2018-11-18 14:36:42,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:42,754 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:42,754 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:42,754 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:42,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:42,768 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:42,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:42,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:42,855 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:42,855 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:42,917 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 54 proven. 118 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:42,933 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:42,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2018-11-18 14:36:42,933 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:42,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 14:36:42,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 14:36:42,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:36:42,934 INFO L87 Difference]: Start difference. First operand 566 states and 827 transitions. Second operand 7 states. [2018-11-18 14:36:43,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:43,037 INFO L93 Difference]: Finished difference Result 1109 states and 1621 transitions. [2018-11-18 14:36:43,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 14:36:43,037 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-18 14:36:43,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:43,039 INFO L225 Difference]: With dead ends: 1109 [2018-11-18 14:36:43,039 INFO L226 Difference]: Without dead ends: 696 [2018-11-18 14:36:43,039 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-11-18 14:36:43,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2018-11-18 14:36:43,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 647. [2018-11-18 14:36:43,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 647 states. [2018-11-18 14:36:43,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 950 transitions. [2018-11-18 14:36:43,049 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 950 transitions. Word has length 102 [2018-11-18 14:36:43,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:43,050 INFO L480 AbstractCegarLoop]: Abstraction has 647 states and 950 transitions. [2018-11-18 14:36:43,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 14:36:43,050 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 950 transitions. [2018-11-18 14:36:43,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-11-18 14:36:43,051 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:43,051 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:43,051 INFO L423 AbstractCegarLoop]: === Iteration 24 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:43,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:43,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1084539731, now seen corresponding path program 1 times [2018-11-18 14:36:43,051 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:43,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:43,052 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:43,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:43,052 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:43,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:43,146 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:43,146 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:43,146 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:43,146 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 103 with the following transitions: [2018-11-18 14:36:43,146 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [446], [449], [452], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:43,147 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:43,147 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:43,209 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:43,209 INFO L272 AbstractInterpreter]: Visited 47 different actions 60 times. Merged at 8 different actions 10 times. Never widened. Performed 638 root evaluator evaluations with a maximum evaluation depth of 9. Performed 638 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 6 fixpoints after 5 different actions. Largest state had 50 variables. [2018-11-18 14:36:43,211 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:43,211 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:43,212 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:43,212 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:43,224 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:43,224 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:43,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:43,285 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:43,311 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 148 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:43,311 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:43,340 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 24 proven. 84 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2018-11-18 14:36:43,358 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:43,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 4] total 9 [2018-11-18 14:36:43,358 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:43,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 14:36:43,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 14:36:43,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-18 14:36:43,359 INFO L87 Difference]: Start difference. First operand 647 states and 950 transitions. Second operand 7 states. [2018-11-18 14:36:43,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:43,441 INFO L93 Difference]: Finished difference Result 694 states and 1016 transitions. [2018-11-18 14:36:43,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 14:36:43,441 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 102 [2018-11-18 14:36:43,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:43,443 INFO L225 Difference]: With dead ends: 694 [2018-11-18 14:36:43,443 INFO L226 Difference]: Without dead ends: 688 [2018-11-18 14:36:43,443 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 204 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-18 14:36:43,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 688 states. [2018-11-18 14:36:43,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 688 to 685. [2018-11-18 14:36:43,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 685 states. [2018-11-18 14:36:43,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 685 states to 685 states and 1004 transitions. [2018-11-18 14:36:43,454 INFO L78 Accepts]: Start accepts. Automaton has 685 states and 1004 transitions. Word has length 102 [2018-11-18 14:36:43,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:43,454 INFO L480 AbstractCegarLoop]: Abstraction has 685 states and 1004 transitions. [2018-11-18 14:36:43,454 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 14:36:43,454 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 1004 transitions. [2018-11-18 14:36:43,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-11-18 14:36:43,455 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:43,455 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 6, 6, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:43,455 INFO L423 AbstractCegarLoop]: === Iteration 25 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:43,455 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:43,456 INFO L82 PathProgramCache]: Analyzing trace with hash 35576591, now seen corresponding path program 1 times [2018-11-18 14:36:43,456 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:43,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:43,456 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:43,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:43,456 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:43,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:43,622 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:43,622 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:43,622 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:43,622 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 107 with the following transitions: [2018-11-18 14:36:43,623 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [512], [514], [526], [529], [530], [531] [2018-11-18 14:36:43,623 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:43,623 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:43,670 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:43,671 INFO L272 AbstractInterpreter]: Visited 45 different actions 80 times. Merged at 20 different actions 28 times. Never widened. Performed 896 root evaluator evaluations with a maximum evaluation depth of 9. Performed 896 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 8 fixpoints after 7 different actions. Largest state had 50 variables. [2018-11-18 14:36:43,677 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:43,678 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:43,678 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:43,678 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:43,696 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:43,697 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:43,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:43,745 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:43,810 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 24 proven. 160 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:43,810 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:43,949 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 94 proven. 90 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 14:36:43,965 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:43,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 22 [2018-11-18 14:36:43,965 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:43,965 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 14:36:43,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 14:36:43,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2018-11-18 14:36:43,966 INFO L87 Difference]: Start difference. First operand 685 states and 1004 transitions. Second operand 15 states. [2018-11-18 14:36:44,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:44,145 INFO L93 Difference]: Finished difference Result 688 states and 1006 transitions. [2018-11-18 14:36:44,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 14:36:44,146 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 106 [2018-11-18 14:36:44,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:44,147 INFO L225 Difference]: With dead ends: 688 [2018-11-18 14:36:44,147 INFO L226 Difference]: Without dead ends: 686 [2018-11-18 14:36:44,147 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 200 SyntacticMatches, 3 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=456, Unknown=0, NotChecked=0, Total=552 [2018-11-18 14:36:44,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 686 states. [2018-11-18 14:36:44,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 686 to 685. [2018-11-18 14:36:44,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 685 states. [2018-11-18 14:36:44,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 685 states to 685 states and 1003 transitions. [2018-11-18 14:36:44,157 INFO L78 Accepts]: Start accepts. Automaton has 685 states and 1003 transitions. Word has length 106 [2018-11-18 14:36:44,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:44,158 INFO L480 AbstractCegarLoop]: Abstraction has 685 states and 1003 transitions. [2018-11-18 14:36:44,158 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 14:36:44,158 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 1003 transitions. [2018-11-18 14:36:44,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-11-18 14:36:44,159 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:44,159 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 9, 6, 6, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:44,159 INFO L423 AbstractCegarLoop]: === Iteration 26 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:44,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:44,159 INFO L82 PathProgramCache]: Analyzing trace with hash -234907228, now seen corresponding path program 2 times [2018-11-18 14:36:44,159 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:44,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:44,160 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:44,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:44,160 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:44,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:44,395 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 27 proven. 208 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:44,395 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:44,395 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:44,396 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:44,396 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:44,396 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:44,396 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:44,407 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:36:44,407 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 14:36:44,451 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-11-18 14:36:44,451 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:44,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:44,623 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 140 proven. 31 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-11-18 14:36:44,623 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:44,793 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 139 proven. 32 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-11-18 14:36:44,809 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:44,809 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 19 [2018-11-18 14:36:44,809 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:44,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 14:36:44,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 14:36:44,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:44,810 INFO L87 Difference]: Start difference. First operand 685 states and 1003 transitions. Second operand 18 states. [2018-11-18 14:36:45,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:45,499 INFO L93 Difference]: Finished difference Result 1118 states and 1617 transitions. [2018-11-18 14:36:45,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-11-18 14:36:45,499 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 113 [2018-11-18 14:36:45,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:45,501 INFO L225 Difference]: With dead ends: 1118 [2018-11-18 14:36:45,501 INFO L226 Difference]: Without dead ends: 616 [2018-11-18 14:36:45,502 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 270 GetRequests, 226 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=180, Invalid=1460, Unknown=0, NotChecked=0, Total=1640 [2018-11-18 14:36:45,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 616 states. [2018-11-18 14:36:45,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 616 to 546. [2018-11-18 14:36:45,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2018-11-18 14:36:45,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 767 transitions. [2018-11-18 14:36:45,515 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 767 transitions. Word has length 113 [2018-11-18 14:36:45,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:45,515 INFO L480 AbstractCegarLoop]: Abstraction has 546 states and 767 transitions. [2018-11-18 14:36:45,515 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 14:36:45,515 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 767 transitions. [2018-11-18 14:36:45,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-11-18 14:36:45,516 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:45,517 INFO L375 BasicCegarLoop]: trace histogram [11, 10, 10, 7, 7, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:45,517 INFO L423 AbstractCegarLoop]: === Iteration 27 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:45,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:45,517 INFO L82 PathProgramCache]: Analyzing trace with hash -238306442, now seen corresponding path program 2 times [2018-11-18 14:36:45,517 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:45,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:45,523 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:45,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:45,523 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:45,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:45,625 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:45,625 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:45,625 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:45,625 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:45,625 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:45,625 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:45,626 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:45,637 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:36:45,638 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 14:36:45,736 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-18 14:36:45,736 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:45,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:45,754 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:45,754 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:45,819 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 68 proven. 206 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:45,835 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:45,835 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2018-11-18 14:36:45,835 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:45,836 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 14:36:45,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 14:36:45,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-18 14:36:45,836 INFO L87 Difference]: Start difference. First operand 546 states and 767 transitions. Second operand 8 states. [2018-11-18 14:36:45,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:45,902 INFO L93 Difference]: Finished difference Result 695 states and 966 transitions. [2018-11-18 14:36:45,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 14:36:45,903 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 123 [2018-11-18 14:36:45,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:45,904 INFO L225 Difference]: With dead ends: 695 [2018-11-18 14:36:45,904 INFO L226 Difference]: Without dead ends: 607 [2018-11-18 14:36:45,904 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 245 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-11-18 14:36:45,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 607 states. [2018-11-18 14:36:45,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 607 to 588. [2018-11-18 14:36:45,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 588 states. [2018-11-18 14:36:45,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 588 states to 588 states and 825 transitions. [2018-11-18 14:36:45,915 INFO L78 Accepts]: Start accepts. Automaton has 588 states and 825 transitions. Word has length 123 [2018-11-18 14:36:45,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:45,915 INFO L480 AbstractCegarLoop]: Abstraction has 588 states and 825 transitions. [2018-11-18 14:36:45,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 14:36:45,915 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 825 transitions. [2018-11-18 14:36:45,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-11-18 14:36:45,916 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:45,916 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:45,916 INFO L423 AbstractCegarLoop]: === Iteration 28 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:45,917 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:45,917 INFO L82 PathProgramCache]: Analyzing trace with hash 564488152, now seen corresponding path program 1 times [2018-11-18 14:36:45,917 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:45,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:45,917 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:45,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:45,918 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:46,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:46,239 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 36 proven. 308 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-18 14:36:46,239 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:46,240 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:46,240 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 136 with the following transitions: [2018-11-18 14:36:46,240 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [365], [368], [371], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:46,241 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:46,241 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:46,352 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:46,352 INFO L272 AbstractInterpreter]: Visited 47 different actions 82 times. Merged at 20 different actions 28 times. Never widened. Performed 896 root evaluator evaluations with a maximum evaluation depth of 9. Performed 896 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 8 fixpoints after 7 different actions. Largest state had 50 variables. [2018-11-18 14:36:46,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:46,366 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:46,366 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:46,366 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:46,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:46,377 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:46,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:46,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:46,543 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 335 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 14:36:46,544 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:46,751 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 277 proven. 64 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:46,767 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 14:36:46,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [10, 9] total 22 [2018-11-18 14:36:46,768 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 14:36:46,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 14:36:46,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 14:36:46,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=289, Unknown=0, NotChecked=0, Total=462 [2018-11-18 14:36:46,768 INFO L87 Difference]: Start difference. First operand 588 states and 825 transitions. Second operand 8 states. [2018-11-18 14:36:46,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:46,821 INFO L93 Difference]: Finished difference Result 735 states and 1030 transitions. [2018-11-18 14:36:46,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 14:36:46,821 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 135 [2018-11-18 14:36:46,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:46,823 INFO L225 Difference]: With dead ends: 735 [2018-11-18 14:36:46,823 INFO L226 Difference]: Without dead ends: 731 [2018-11-18 14:36:46,823 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 285 GetRequests, 261 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=173, Invalid=289, Unknown=0, NotChecked=0, Total=462 [2018-11-18 14:36:46,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2018-11-18 14:36:46,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 727. [2018-11-18 14:36:46,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 727 states. [2018-11-18 14:36:46,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 1022 transitions. [2018-11-18 14:36:46,835 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 1022 transitions. Word has length 135 [2018-11-18 14:36:46,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:46,835 INFO L480 AbstractCegarLoop]: Abstraction has 727 states and 1022 transitions. [2018-11-18 14:36:46,835 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 14:36:46,835 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 1022 transitions. [2018-11-18 14:36:46,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-11-18 14:36:46,836 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:46,836 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 11, 8, 8, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:46,836 INFO L423 AbstractCegarLoop]: === Iteration 29 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:46,837 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:46,837 INFO L82 PathProgramCache]: Analyzing trace with hash 330710990, now seen corresponding path program 2 times [2018-11-18 14:36:46,837 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:46,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:46,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:46,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:46,838 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:46,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:47,120 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 33 proven. 334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:47,120 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:47,120 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:47,120 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:47,121 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:47,121 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:47,121 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:47,128 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:36:47,128 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 14:36:47,246 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-18 14:36:47,246 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:47,249 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:47,408 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 341 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:47,408 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:47,903 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 307 proven. 44 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:47,919 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:47,919 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 10, 11] total 31 [2018-11-18 14:36:47,919 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:47,920 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-18 14:36:47,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-18 14:36:47,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=279, Invalid=651, Unknown=0, NotChecked=0, Total=930 [2018-11-18 14:36:47,920 INFO L87 Difference]: Start difference. First operand 727 states and 1022 transitions. Second operand 22 states. [2018-11-18 14:36:48,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:48,760 INFO L93 Difference]: Finished difference Result 774 states and 1066 transitions. [2018-11-18 14:36:48,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-11-18 14:36:48,762 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 136 [2018-11-18 14:36:48,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:48,764 INFO L225 Difference]: With dead ends: 774 [2018-11-18 14:36:48,764 INFO L226 Difference]: Without dead ends: 772 [2018-11-18 14:36:48,766 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 256 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 388 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=583, Invalid=1769, Unknown=0, NotChecked=0, Total=2352 [2018-11-18 14:36:48,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 772 states. [2018-11-18 14:36:48,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 772 to 727. [2018-11-18 14:36:48,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 727 states. [2018-11-18 14:36:48,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 727 states to 727 states and 1021 transitions. [2018-11-18 14:36:48,787 INFO L78 Accepts]: Start accepts. Automaton has 727 states and 1021 transitions. Word has length 136 [2018-11-18 14:36:48,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:48,787 INFO L480 AbstractCegarLoop]: Abstraction has 727 states and 1021 transitions. [2018-11-18 14:36:48,787 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-18 14:36:48,787 INFO L276 IsEmpty]: Start isEmpty. Operand 727 states and 1021 transitions. [2018-11-18 14:36:48,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-11-18 14:36:48,788 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:48,788 INFO L375 BasicCegarLoop]: trace histogram [13, 12, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:48,788 INFO L423 AbstractCegarLoop]: === Iteration 30 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:48,788 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:48,788 INFO L82 PathProgramCache]: Analyzing trace with hash 2022069990, now seen corresponding path program 1 times [2018-11-18 14:36:48,789 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:48,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:48,790 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:48,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:48,790 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:48,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:48,892 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 14:36:48,892 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:48,892 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:48,892 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 152 with the following transitions: [2018-11-18 14:36:48,893 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [15], [18], [20], [24], [27], [30], [35], [42], [45], [48], [51], [56], [138], [233], [236], [251], [254], [257], [262], [329], [332], [347], [362], [377], [380], [383], [388], [425], [428], [443], [458], [473], [488], [491], [494], [497], [503], [506], [509], [514], [526], [529], [530], [531] [2018-11-18 14:36:48,895 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 14:36:48,896 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 14:36:49,042 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 14:36:49,043 INFO L272 AbstractInterpreter]: Visited 48 different actions 137 times. Merged at 39 different actions 70 times. Never widened. Performed 1503 root evaluator evaluations with a maximum evaluation depth of 9. Performed 1503 inverse root evaluator evaluations with a maximum inverse evaluation depth of 9. Found 21 fixpoints after 11 different actions. Largest state had 50 variables. [2018-11-18 14:36:49,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:49,045 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 14:36:49,045 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:49,045 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:49,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:49,056 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:49,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:49,142 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:49,160 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 14:36:49,161 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:49,292 INFO L134 CoverageAnalysis]: Checked inductivity of 447 backedges. 91 proven. 330 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 14:36:49,315 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:49,315 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 16 [2018-11-18 14:36:49,316 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:49,316 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 14:36:49,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 14:36:49,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-18 14:36:49,316 INFO L87 Difference]: Start difference. First operand 727 states and 1021 transitions. Second operand 9 states. [2018-11-18 14:36:49,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:49,390 INFO L93 Difference]: Finished difference Result 1241 states and 1742 transitions. [2018-11-18 14:36:49,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 14:36:49,390 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 151 [2018-11-18 14:36:49,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:49,392 INFO L225 Difference]: With dead ends: 1241 [2018-11-18 14:36:49,392 INFO L226 Difference]: Without dead ends: 828 [2018-11-18 14:36:49,393 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 301 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-11-18 14:36:49,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 828 states. [2018-11-18 14:36:49,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 828 to 805. [2018-11-18 14:36:49,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 805 states. [2018-11-18 14:36:49,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 805 states to 805 states and 1133 transitions. [2018-11-18 14:36:49,405 INFO L78 Accepts]: Start accepts. Automaton has 805 states and 1133 transitions. Word has length 151 [2018-11-18 14:36:49,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:49,405 INFO L480 AbstractCegarLoop]: Abstraction has 805 states and 1133 transitions. [2018-11-18 14:36:49,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 14:36:49,405 INFO L276 IsEmpty]: Start isEmpty. Operand 805 states and 1133 transitions. [2018-11-18 14:36:49,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-11-18 14:36:49,406 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:49,406 INFO L375 BasicCegarLoop]: trace histogram [13, 13, 12, 9, 9, 6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:49,406 INFO L423 AbstractCegarLoop]: === Iteration 31 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:49,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:49,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1545010560, now seen corresponding path program 2 times [2018-11-18 14:36:49,406 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:49,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:49,407 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:49,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:49,407 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:49,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:49,666 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 36 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 14:36:49,666 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:49,666 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:49,667 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:49,667 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:49,667 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:49,667 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:49,675 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:36:49,675 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 14:36:49,773 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-11-18 14:36:49,773 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:49,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:49,952 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 414 proven. 19 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 14:36:49,953 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:50,313 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 380 proven. 57 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 14:36:50,339 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:50,339 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 11, 12] total 34 [2018-11-18 14:36:50,339 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:50,339 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 14:36:50,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 14:36:50,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=318, Invalid=804, Unknown=0, NotChecked=0, Total=1122 [2018-11-18 14:36:50,340 INFO L87 Difference]: Start difference. First operand 805 states and 1133 transitions. Second operand 24 states. [2018-11-18 14:36:50,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:50,936 INFO L93 Difference]: Finished difference Result 853 states and 1178 transitions. [2018-11-18 14:36:50,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-11-18 14:36:50,936 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 152 [2018-11-18 14:36:50,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:50,938 INFO L225 Difference]: With dead ends: 853 [2018-11-18 14:36:50,938 INFO L226 Difference]: Without dead ends: 851 [2018-11-18 14:36:50,939 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 289 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 547 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=712, Invalid=2480, Unknown=0, NotChecked=0, Total=3192 [2018-11-18 14:36:50,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 851 states. [2018-11-18 14:36:50,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 851 to 805. [2018-11-18 14:36:50,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 805 states. [2018-11-18 14:36:50,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 805 states to 805 states and 1131 transitions. [2018-11-18 14:36:50,952 INFO L78 Accepts]: Start accepts. Automaton has 805 states and 1131 transitions. Word has length 152 [2018-11-18 14:36:50,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:50,953 INFO L480 AbstractCegarLoop]: Abstraction has 805 states and 1131 transitions. [2018-11-18 14:36:50,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 14:36:50,953 INFO L276 IsEmpty]: Start isEmpty. Operand 805 states and 1131 transitions. [2018-11-18 14:36:50,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-11-18 14:36:50,953 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:50,953 INFO L375 BasicCegarLoop]: trace histogram [15, 14, 14, 10, 10, 6, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:50,953 INFO L423 AbstractCegarLoop]: === Iteration 32 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:50,954 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:50,954 INFO L82 PathProgramCache]: Analyzing trace with hash -348083931, now seen corresponding path program 3 times [2018-11-18 14:36:50,954 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:50,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:50,954 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:50,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:50,954 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:50,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:51,065 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-18 14:36:51,065 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:51,065 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:51,065 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:51,065 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:51,066 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:51,066 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:51,077 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-18 14:36:51,077 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-18 14:36:51,179 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-18 14:36:51,179 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:51,183 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:51,206 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-18 14:36:51,206 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:51,311 INFO L134 CoverageAnalysis]: Checked inductivity of 598 backedges. 98 proven. 470 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-18 14:36:51,335 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:51,336 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 18 [2018-11-18 14:36:51,336 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:51,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 14:36:51,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 14:36:51,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-18 14:36:51,337 INFO L87 Difference]: Start difference. First operand 805 states and 1131 transitions. Second operand 10 states. [2018-11-18 14:36:51,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:51,436 INFO L93 Difference]: Finished difference Result 1003 states and 1394 transitions. [2018-11-18 14:36:51,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 14:36:51,436 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 169 [2018-11-18 14:36:51,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:51,438 INFO L225 Difference]: With dead ends: 1003 [2018-11-18 14:36:51,438 INFO L226 Difference]: Without dead ends: 915 [2018-11-18 14:36:51,439 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 337 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-11-18 14:36:51,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states. [2018-11-18 14:36:51,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 889. [2018-11-18 14:36:51,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 889 states. [2018-11-18 14:36:51,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 889 states to 889 states and 1246 transitions. [2018-11-18 14:36:51,456 INFO L78 Accepts]: Start accepts. Automaton has 889 states and 1246 transitions. Word has length 169 [2018-11-18 14:36:51,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:51,456 INFO L480 AbstractCegarLoop]: Abstraction has 889 states and 1246 transitions. [2018-11-18 14:36:51,456 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 14:36:51,456 INFO L276 IsEmpty]: Start isEmpty. Operand 889 states and 1246 transitions. [2018-11-18 14:36:51,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-11-18 14:36:51,457 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:51,457 INFO L375 BasicCegarLoop]: trace histogram [17, 16, 16, 12, 12, 8, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:51,457 INFO L423 AbstractCegarLoop]: === Iteration 33 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:51,458 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:51,458 INFO L82 PathProgramCache]: Analyzing trace with hash -1339885547, now seen corresponding path program 2 times [2018-11-18 14:36:51,458 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:51,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:51,458 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:51,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:51,459 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:51,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:51,555 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 125 proven. 650 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-18 14:36:51,555 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:51,555 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:51,555 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:51,555 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:51,555 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:51,555 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:51,566 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:36:51,566 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 14:36:51,606 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-11-18 14:36:51,606 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:51,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:51,733 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 295 proven. 4 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-11-18 14:36:51,733 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:51,821 INFO L134 CoverageAnalysis]: Checked inductivity of 811 backedges. 295 proven. 4 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-11-18 14:36:51,836 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:51,837 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 6, 6] total 18 [2018-11-18 14:36:51,837 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:51,837 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 14:36:51,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 14:36:51,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=190, Unknown=0, NotChecked=0, Total=306 [2018-11-18 14:36:51,837 INFO L87 Difference]: Start difference. First operand 889 states and 1246 transitions. Second operand 15 states. [2018-11-18 14:36:52,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:52,266 INFO L93 Difference]: Finished difference Result 1042 states and 1448 transitions. [2018-11-18 14:36:52,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-18 14:36:52,268 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 197 [2018-11-18 14:36:52,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:52,269 INFO L225 Difference]: With dead ends: 1042 [2018-11-18 14:36:52,269 INFO L226 Difference]: Without dead ends: 548 [2018-11-18 14:36:52,271 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 436 GetRequests, 401 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=407, Invalid=853, Unknown=0, NotChecked=0, Total=1260 [2018-11-18 14:36:52,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 548 states. [2018-11-18 14:36:52,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 548 to 525. [2018-11-18 14:36:52,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 525 states. [2018-11-18 14:36:52,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 721 transitions. [2018-11-18 14:36:52,283 INFO L78 Accepts]: Start accepts. Automaton has 525 states and 721 transitions. Word has length 197 [2018-11-18 14:36:52,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:52,283 INFO L480 AbstractCegarLoop]: Abstraction has 525 states and 721 transitions. [2018-11-18 14:36:52,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 14:36:52,283 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 721 transitions. [2018-11-18 14:36:52,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-11-18 14:36:52,284 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:52,284 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 16, 16, 10, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:52,284 INFO L423 AbstractCegarLoop]: === Iteration 34 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:52,285 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:52,285 INFO L82 PathProgramCache]: Analyzing trace with hash -438655549, now seen corresponding path program 4 times [2018-11-18 14:36:52,285 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:52,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:52,285 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:52,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:52,285 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:52,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:52,477 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-18 14:36:52,478 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:52,478 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:52,478 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:52,478 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:52,478 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:52,478 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:52,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:52,492 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 14:36:52,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:52,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:52,668 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-18 14:36:52,668 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:52,810 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 158 proven. 1322 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-11-18 14:36:52,826 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:52,826 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 19 [2018-11-18 14:36:52,826 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:52,827 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-18 14:36:52,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-18 14:36:52,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:52,827 INFO L87 Difference]: Start difference. First operand 525 states and 721 transitions. Second operand 14 states. [2018-11-18 14:36:52,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:52,924 INFO L93 Difference]: Finished difference Result 740 states and 1018 transitions. [2018-11-18 14:36:52,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-18 14:36:52,924 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 261 [2018-11-18 14:36:52,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:52,926 INFO L225 Difference]: With dead ends: 740 [2018-11-18 14:36:52,926 INFO L226 Difference]: Without dead ends: 652 [2018-11-18 14:36:52,926 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 545 GetRequests, 515 SyntacticMatches, 13 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:52,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 652 states. [2018-11-18 14:36:52,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 652 to 606. [2018-11-18 14:36:52,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2018-11-18 14:36:52,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 832 transitions. [2018-11-18 14:36:52,938 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 832 transitions. Word has length 261 [2018-11-18 14:36:52,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:52,938 INFO L480 AbstractCegarLoop]: Abstraction has 606 states and 832 transitions. [2018-11-18 14:36:52,938 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-18 14:36:52,938 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 832 transitions. [2018-11-18 14:36:52,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2018-11-18 14:36:52,940 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:52,940 INFO L375 BasicCegarLoop]: trace histogram [27, 26, 26, 19, 19, 12, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:52,940 INFO L423 AbstractCegarLoop]: === Iteration 35 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:52,940 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:52,941 INFO L82 PathProgramCache]: Analyzing trace with hash -209480526, now seen corresponding path program 5 times [2018-11-18 14:36:52,941 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:52,941 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:52,941 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 14:36:52,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:52,942 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:52,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:53,201 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 14:36:53,201 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:53,201 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:53,201 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:53,201 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:53,201 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:53,202 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:53,209 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 14:36:53,210 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 14:36:53,512 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-11-18 14:36:53,512 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:53,518 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:53,589 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 14:36:53,590 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:53,788 INFO L134 CoverageAnalysis]: Checked inductivity of 2158 backedges. 188 proven. 1910 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 14:36:53,805 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:53,805 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 19 [2018-11-18 14:36:53,805 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:53,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-18 14:36:53,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-18 14:36:53,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:53,806 INFO L87 Difference]: Start difference. First operand 606 states and 832 transitions. Second operand 16 states. [2018-11-18 14:36:53,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:53,913 INFO L93 Difference]: Finished difference Result 821 states and 1129 transitions. [2018-11-18 14:36:53,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 14:36:53,914 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 307 [2018-11-18 14:36:53,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:53,916 INFO L225 Difference]: With dead ends: 821 [2018-11-18 14:36:53,916 INFO L226 Difference]: Without dead ends: 733 [2018-11-18 14:36:53,917 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 641 GetRequests, 603 SyntacticMatches, 21 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:53,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 733 states. [2018-11-18 14:36:53,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 733 to 687. [2018-11-18 14:36:53,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 687 states. [2018-11-18 14:36:53,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 687 states to 687 states and 943 transitions. [2018-11-18 14:36:53,932 INFO L78 Accepts]: Start accepts. Automaton has 687 states and 943 transitions. Word has length 307 [2018-11-18 14:36:53,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:53,932 INFO L480 AbstractCegarLoop]: Abstraction has 687 states and 943 transitions. [2018-11-18 14:36:53,932 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-18 14:36:53,932 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 943 transitions. [2018-11-18 14:36:53,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2018-11-18 14:36:53,934 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:53,934 INFO L375 BasicCegarLoop]: trace histogram [31, 30, 30, 22, 22, 14, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:53,935 INFO L423 AbstractCegarLoop]: === Iteration 36 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:53,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:53,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1748649631, now seen corresponding path program 6 times [2018-11-18 14:36:53,935 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:53,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:53,936 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:53,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:53,936 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:53,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 14:36:54,219 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-18 14:36:54,219 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:54,219 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 14:36:54,219 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 14:36:54,219 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 14:36:54,219 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 14:36:54,220 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 14:36:54,226 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-18 14:36:54,226 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-11-18 14:36:54,368 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-18 14:36:54,369 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 14:36:54,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 14:36:54,431 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-18 14:36:54,431 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 14:36:54,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2894 backedges. 218 proven. 2606 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-18 14:36:54,672 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 14:36:54,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 19 [2018-11-18 14:36:54,673 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 14:36:54,673 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 14:36:54,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 14:36:54,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:54,674 INFO L87 Difference]: Start difference. First operand 687 states and 943 transitions. Second operand 18 states. [2018-11-18 14:36:54,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 14:36:54,794 INFO L93 Difference]: Finished difference Result 902 states and 1240 transitions. [2018-11-18 14:36:54,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-18 14:36:54,794 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 353 [2018-11-18 14:36:54,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 14:36:54,796 INFO L225 Difference]: With dead ends: 902 [2018-11-18 14:36:54,796 INFO L226 Difference]: Without dead ends: 814 [2018-11-18 14:36:54,796 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 737 GetRequests, 691 SyntacticMatches, 29 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-11-18 14:36:54,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 814 states. [2018-11-18 14:36:54,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 814 to 768. [2018-11-18 14:36:54,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 768 states. [2018-11-18 14:36:54,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 768 states to 768 states and 1054 transitions. [2018-11-18 14:36:54,820 INFO L78 Accepts]: Start accepts. Automaton has 768 states and 1054 transitions. Word has length 353 [2018-11-18 14:36:54,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 14:36:54,820 INFO L480 AbstractCegarLoop]: Abstraction has 768 states and 1054 transitions. [2018-11-18 14:36:54,820 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 14:36:54,820 INFO L276 IsEmpty]: Start isEmpty. Operand 768 states and 1054 transitions. [2018-11-18 14:36:54,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 400 [2018-11-18 14:36:54,822 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 14:36:54,822 INFO L375 BasicCegarLoop]: trace histogram [35, 34, 34, 25, 25, 16, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 14:36:54,822 INFO L423 AbstractCegarLoop]: === Iteration 37 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 14:36:54,823 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 14:36:54,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1805057072, now seen corresponding path program 7 times [2018-11-18 14:36:54,823 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 14:36:54,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:54,823 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 14:36:54,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 14:36:54,824 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 14:36:55,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 14:36:55,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 14:36:55,687 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 14:36:55,777 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 02:36:55 BoogieIcfgContainer [2018-11-18 14:36:55,777 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 14:36:55,777 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 14:36:55,777 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 14:36:55,778 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 14:36:55,778 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:36:31" (3/4) ... [2018-11-18 14:36:55,780 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 14:36:55,901 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_f294ddef-43ad-4f78-888f-698b428466c5/bin-2019/utaipan/witness.graphml [2018-11-18 14:36:55,901 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 14:36:55,902 INFO L168 Benchmark]: Toolchain (without parser) took 25399.33 ms. Allocated memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: 885.0 MB). Free memory was 956.6 MB in the beginning and 1.2 GB in the end (delta: -268.3 MB). Peak memory consumption was 616.7 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,903 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 14:36:55,903 INFO L168 Benchmark]: CACSL2BoogieTranslator took 266.54 ms. Allocated memory is still 1.0 GB. Free memory was 956.6 MB in the beginning and 937.8 MB in the end (delta: 18.8 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,904 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.99 ms. Allocated memory is still 1.0 GB. Free memory was 937.8 MB in the beginning and 935.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,904 INFO L168 Benchmark]: Boogie Preprocessor took 78.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 935.1 MB in the beginning and 1.1 GB in the end (delta: -192.1 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,904 INFO L168 Benchmark]: RCFGBuilder took 615.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,904 INFO L168 Benchmark]: TraceAbstraction took 24295.82 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 751.8 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -192.8 MB). Peak memory consumption was 559.0 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,905 INFO L168 Benchmark]: Witness Printer took 123.54 ms. Allocated memory is still 1.9 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 40.5 MB). Peak memory consumption was 40.5 MB. Max. memory is 11.5 GB. [2018-11-18 14:36:55,906 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 266.54 ms. Allocated memory is still 1.0 GB. Free memory was 956.6 MB in the beginning and 937.8 MB in the end (delta: 18.8 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.99 ms. Allocated memory is still 1.0 GB. Free memory was 937.8 MB in the beginning and 935.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 78.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 935.1 MB in the beginning and 1.1 GB in the end (delta: -192.1 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 615.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 24295.82 ms. Allocated memory was 1.2 GB in the beginning and 1.9 GB in the end (delta: 751.8 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -192.8 MB). Peak memory consumption was 559.0 MB. Max. memory is 11.5 GB. * Witness Printer took 123.54 ms. Allocated memory is still 1.9 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 40.5 MB). Peak memory consumption was 40.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 569]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L5] int m_Protocol = 1; [L6] int m_msg_2 = 2; [L7] int m_recv_ack_2 = 3; [L8] int m_msg_1_1 = 4; [L9] int m_msg_1_2 = 5; [L10] int m_recv_ack_1_1 = 6; [L11] int m_recv_ack_1_2 = 7; VAL [\old(m_msg_1_1)=23, \old(m_msg_1_2)=20, \old(m_msg_2)=21, \old(m_Protocol)=25, \old(m_recv_ack_1_1)=22, \old(m_recv_ack_1_2)=24, \old(m_recv_ack_2)=26, m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3] [L16] int q = 0; [L17] int method_id; [L20] int this_expect = 0; [L21] int this_buffer_empty = 0; VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, q=0, this_buffer_empty=0, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=0, this_buffer_empty=0, this_expect=0] [L43] COND TRUE q == 0 [L44] COND TRUE __VERIFIER_nondet_int() [L46] COND TRUE 1 [L48] method_id = 1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=0, this_buffer_empty=0, this_expect=0] [L50] COND FALSE !(0) [L54] q = 1 [L56] this_expect=0 [L56] this_buffer_empty=1 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=3, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=1, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=1, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=1, this_buffer_empty=1, this_expect=0] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=18, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=3, q=3, this_buffer_empty=0, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=3, this_buffer_empty=0, this_expect=1] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=3, P3=0, P4=3, P5=0, P6=0, P7=0, P8=3, P9=0, q=4, this_buffer_empty=1, this_expect=1] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=1] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=7, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=5, this_buffer_empty=0, this_expect=2] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-3, q=1, this_buffer_empty=1, this_expect=2] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=2] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=3] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=3] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=19, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=5, this_buffer_empty=0, this_expect=4] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=0, q=1, this_buffer_empty=1, this_expect=4] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=4] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-10, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=5] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=5] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=5, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=6] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=6] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=6] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-4, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=7] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=7] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=9, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=8] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=8] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=8] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=2, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=9] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=9] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=11, P2=-1, P3=0, P4=-1, P5=0, P6=-2, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=5, this_buffer_empty=0, this_expect=10] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=4, q=1, this_buffer_empty=1, this_expect=10] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=10] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-12, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=11] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=11] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=13, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=12] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=12] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=12] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-6, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=13] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=13] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=15, P2=-1, P3=0, P4=-1, P5=0, P6=1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=14] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=14] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=14] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-8, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=15] [L286] COND FALSE !((((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2))))) [L290] q = 4 [L292] this_expect=this_expect [L292] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=1, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L363] COND TRUE q == 4 [L364] COND FALSE !(__VERIFIER_nondet_int()) [L380] COND FALSE !(__VERIFIER_nondet_int()) [L396] COND FALSE !(__VERIFIER_nondet_int()) [L412] COND TRUE __VERIFIER_nondet_int() [L414] COND TRUE (((P1 % 2) != (0 % 2)) && !(((P1 % 2) != ((0 + 1) % 2)) && ((P1 % 2) != (0 % 2)))) [L416] method_id = 5 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=4, this_buffer_empty=1, this_expect=15] [L418] COND FALSE !(((((((P6 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))) || (((this_buffer_empty != 1) && ((P6 % 2) != (0 % 2))) && (((P6 % 2) != (0 % 2)) && !(((P6 % 2) != ((0 + 1) % 2)) && ((P6 % 2) != (0 % 2))))))) [L422] q = 5 [L424] this_expect=(this_expect + 1) [L424] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=17, P2=-1, P3=0, P4=-1, P5=0, P6=-1, P7=0, P8=-1, P9=-1, q=5, this_buffer_empty=0, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L263] COND FALSE !(q == 3) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L363] COND FALSE !(q == 4) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=5, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L463] COND TRUE q == 5 [L464] COND FALSE !(__VERIFIER_nondet_int()) [L480] COND FALSE !(__VERIFIER_nondet_int()) [L496] COND FALSE !(__VERIFIER_nondet_int()) [L512] COND FALSE !(__VERIFIER_nondet_int()) [L528] COND FALSE !(__VERIFIER_nondet_int()) [L544] COND TRUE __VERIFIER_nondet_int() [L546] COND TRUE ((P1 != (((0 + 1) - 1) % 2)) && !((P1 != ((((0 + 1) + 1) - 1) % 2)) && (P1 != (((0 + 1) - 1) % 2)))) [L548] method_id = 7 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=5, this_buffer_empty=0, this_expect=16] [L550] COND FALSE !(((((this_buffer_empty == 1) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))) || ((((P9 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && (P9 != (((0 + 1) - 1) % 2))) && ((P9 != (((0 + 1) - 1) % 2)) && !((P9 != ((((0 + 1) + 1) - 1) % 2)) && (P9 != (((0 + 1) - 1) % 2))))))) [L554] q = 1 [L556] this_expect=this_expect [L556] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=1, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=1, q=1, this_buffer_empty=1, this_expect=16] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND FALSE !(this_expect > 16) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=7, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L63] COND TRUE q == 1 [L64] COND TRUE __VERIFIER_nondet_int() [L66] COND TRUE !((P1 % 2) != (0 % 2)) [L68] method_id = 2 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=1, this_buffer_empty=1, this_expect=16] [L70] COND FALSE !((((((P1 % 2) != (this_expect % 2)) && (this_buffer_empty == 1)) && !((P1 % 2) != (0 % 2))) || ((this_buffer_empty != 1) && !((P1 % 2) != (0 % 2))))) [L74] q = 3 [L76] this_expect=(this_expect + 1) [L76] this_buffer_empty=(1 - this_buffer_empty) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=-14, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=17] [L24] COND TRUE 1 [L27] int P1=__VERIFIER_nondet_int(); [L28] int P2=__VERIFIER_nondet_int(); [L29] int P3=__VERIFIER_nondet_int(); [L30] int P4=__VERIFIER_nondet_int(); [L31] int P5=__VERIFIER_nondet_int(); [L32] int P6=__VERIFIER_nondet_int(); [L33] int P7=__VERIFIER_nondet_int(); [L34] int P8=__VERIFIER_nondet_int(); [L35] int P9=__VERIFIER_nondet_int(); [L38] COND TRUE this_expect > 16 [L39] this_expect = -16 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L43] COND FALSE !(q == 0) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L63] COND FALSE !(q == 1) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L163] COND FALSE !(q == 2) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=2, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L263] COND TRUE q == 3 [L264] COND FALSE !(__VERIFIER_nondet_int()) [L280] COND TRUE __VERIFIER_nondet_int() [L282] COND TRUE !(P1 != (((0 + 1) - 1) % 2)) [L284] method_id = 3 VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L286] COND TRUE (((this_buffer_empty == 1) && !(P3 != (((0 + 1) - 1) % 2))) || (((P3 != ((this_expect - 1) % 2)) && (this_buffer_empty != 1)) && !(P3 != (((0 + 1) - 1) % 2)))) VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] [L569] __VERIFIER_error() VAL [m_msg_1_1=4, m_msg_1_2=5, m_msg_2=2, m_Protocol=1, m_recv_ack_1_1=6, m_recv_ack_1_2=7, m_recv_ack_2=3, method_id=3, P1=0, P2=-1, P3=0, P4=-1, P5=0, P6=0, P7=0, P8=-1, P9=-1, q=3, this_buffer_empty=0, this_expect=-16] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 115 locations, 1 error locations. UNSAFE Result, 24.2s OverallTime, 37 OverallIterations, 35 TraceHistogramMax, 7.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7033 SDtfs, 11108 SDslu, 32759 SDs, 0 SdLazy, 6275 SolverSat, 745 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.0s Time, PredicateUnifierStatistics: 2 DeclaredPredicates, 6868 GetRequests, 6281 SyntacticMatches, 112 SemanticMatches, 475 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 2368 ImplicationChecksByTransitivity, 7.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=889occurred in iteration=32, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 2.2s AbstIntTime, 20 AbstIntIterations, 1 AbstIntStrong, 0.924196690170321 AbsIntWeakeningRatio, 1.5517241379310345 AbsIntAvgWeakeningVarsNumRemoved, 7.379310344827586 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 36 MinimizatonAttempts, 659 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 2.5s SatisfiabilityAnalysisTime, 8.8s InterpolantComputationTime, 7027 NumberOfCodeBlocks, 6843 NumberOfCodeBlocksAsserted, 124 NumberOfCheckSat, 9729 ConstructedInterpolants, 467 QuantifiedInterpolants, 7106389 SizeOfPredicates, 83 NumberOfNonLiveVariables, 18339 ConjunctsInSsa, 436 ConjunctsInUnsatCore, 92 InterpolantComputations, 10 PerfectInterpolantSequences, 9336/34569 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...