./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c3873739663157ae1e04c3d1b08afe34dba22bef ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c3873739663157ae1e04c3d1b08afe34dba22bef ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 15:03:15,852 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 15:03:15,853 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 15:03:15,862 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 15:03:15,862 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 15:03:15,862 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 15:03:15,863 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 15:03:15,864 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 15:03:15,866 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 15:03:15,866 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 15:03:15,867 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 15:03:15,867 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 15:03:15,868 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 15:03:15,868 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 15:03:15,869 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 15:03:15,870 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 15:03:15,870 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 15:03:15,871 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 15:03:15,873 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 15:03:15,875 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 15:03:15,876 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 15:03:15,876 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 15:03:15,878 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 15:03:15,878 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 15:03:15,878 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 15:03:15,879 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 15:03:15,880 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 15:03:15,880 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 15:03:15,882 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 15:03:15,882 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 15:03:15,883 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 15:03:15,883 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 15:03:15,883 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 15:03:15,883 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 15:03:15,884 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 15:03:15,885 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 15:03:15,886 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 15:03:15,895 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 15:03:15,896 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 15:03:15,896 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 15:03:15,896 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 15:03:15,896 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 15:03:15,897 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 15:03:15,897 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 15:03:15,898 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 15:03:15,898 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 15:03:15,898 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 15:03:15,898 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 15:03:15,898 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 15:03:15,898 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 15:03:15,899 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 15:03:15,899 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 15:03:15,900 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 15:03:15,900 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 15:03:15,903 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 15:03:15,903 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 15:03:15,904 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c3873739663157ae1e04c3d1b08afe34dba22bef [2018-11-18 15:03:15,927 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 15:03:15,936 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 15:03:15,939 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 15:03:15,940 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 15:03:15,940 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 15:03:15,941 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/../../sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c [2018-11-18 15:03:15,983 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/14152568f/b9ecb1657d7247f38b67ffe5b7e5440d/FLAG14b6459b8 [2018-11-18 15:03:16,445 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 15:03:16,446 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c [2018-11-18 15:03:16,458 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/14152568f/b9ecb1657d7247f38b67ffe5b7e5440d/FLAG14b6459b8 [2018-11-18 15:03:16,964 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/14152568f/b9ecb1657d7247f38b67ffe5b7e5440d [2018-11-18 15:03:16,967 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 15:03:16,968 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 15:03:16,969 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 15:03:16,969 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 15:03:16,972 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 15:03:16,973 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 03:03:16" (1/1) ... [2018-11-18 15:03:16,975 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7028a05c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:16, skipping insertion in model container [2018-11-18 15:03:16,976 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 03:03:16" (1/1) ... [2018-11-18 15:03:16,984 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 15:03:17,045 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 15:03:17,641 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 15:03:17,652 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 15:03:17,916 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 15:03:17,935 INFO L195 MainTranslator]: Completed translation [2018-11-18 15:03:17,935 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17 WrapperNode [2018-11-18 15:03:17,935 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 15:03:17,936 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 15:03:17,936 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 15:03:17,936 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 15:03:17,944 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:17,976 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:17,990 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 15:03:17,991 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 15:03:17,991 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 15:03:17,992 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 15:03:18,002 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,002 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,012 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,016 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,076 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,089 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,091 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... [2018-11-18 15:03:18,100 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 15:03:18,103 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 15:03:18,104 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 15:03:18,104 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 15:03:18,105 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 15:03:18,161 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-18 15:03:18,161 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 15:03:18,161 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 15:03:18,161 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-18 15:03:18,161 INFO L130 BoogieDeclarations]: Found specification of procedure ssl3_accept [2018-11-18 15:03:18,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ssl3_accept [2018-11-18 15:03:18,162 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-18 15:03:18,162 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-18 15:03:18,163 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 15:03:18,163 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 15:03:18,163 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 15:03:18,163 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 15:03:18,163 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 15:03:18,164 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-18 15:03:18,907 WARN L684 $ProcedureCfgBuilder]: Two Gotos in a row! There was dead code [2018-11-18 15:03:18,907 WARN L649 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-18 15:03:19,743 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 15:03:19,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:03:19 BoogieIcfgContainer [2018-11-18 15:03:19,744 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 15:03:19,745 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 15:03:19,745 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 15:03:19,749 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 15:03:19,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 03:03:16" (1/3) ... [2018-11-18 15:03:19,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ea0b67a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 03:03:19, skipping insertion in model container [2018-11-18 15:03:19,752 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:03:17" (2/3) ... [2018-11-18 15:03:19,752 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ea0b67a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 03:03:19, skipping insertion in model container [2018-11-18 15:03:19,752 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:03:19" (3/3) ... [2018-11-18 15:03:19,755 INFO L112 eAbstractionObserver]: Analyzing ICFG s3_srvr.blast.09_false-unreach-call.i.cil.c [2018-11-18 15:03:19,765 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 15:03:19,775 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 15:03:19,791 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 15:03:19,833 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 15:03:19,834 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 15:03:19,834 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 15:03:19,834 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 15:03:19,835 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 15:03:19,835 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 15:03:19,835 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 15:03:19,835 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 15:03:19,854 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states. [2018-11-18 15:03:19,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 15:03:19,861 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:19,862 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:19,864 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:19,869 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:19,869 INFO L82 PathProgramCache]: Analyzing trace with hash -2122663997, now seen corresponding path program 1 times [2018-11-18 15:03:19,871 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:19,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:19,919 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:19,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:19,920 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:20,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:20,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:20,367 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:20,367 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:20,367 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:20,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:20,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:20,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:20,388 INFO L87 Difference]: Start difference. First operand 158 states. Second operand 4 states. [2018-11-18 15:03:21,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:21,379 INFO L93 Difference]: Finished difference Result 336 states and 561 transitions. [2018-11-18 15:03:21,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:21,381 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-11-18 15:03:21,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:21,396 INFO L225 Difference]: With dead ends: 336 [2018-11-18 15:03:21,396 INFO L226 Difference]: Without dead ends: 171 [2018-11-18 15:03:21,400 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:21,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-11-18 15:03:21,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 154. [2018-11-18 15:03:21,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:21,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 234 transitions. [2018-11-18 15:03:21,443 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 234 transitions. Word has length 42 [2018-11-18 15:03:21,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:21,444 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 234 transitions. [2018-11-18 15:03:21,444 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:21,444 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 234 transitions. [2018-11-18 15:03:21,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 15:03:21,446 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:21,446 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:21,446 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:21,446 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:21,447 INFO L82 PathProgramCache]: Analyzing trace with hash 1531821397, now seen corresponding path program 1 times [2018-11-18 15:03:21,447 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:21,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:21,450 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:21,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:21,450 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:21,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:21,633 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:21,633 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:21,634 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:21,634 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:21,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:21,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:21,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:21,636 INFO L87 Difference]: Start difference. First operand 154 states and 234 transitions. Second operand 4 states. [2018-11-18 15:03:21,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:21,925 INFO L93 Difference]: Finished difference Result 299 states and 452 transitions. [2018-11-18 15:03:21,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:21,926 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2018-11-18 15:03:21,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:21,927 INFO L225 Difference]: With dead ends: 299 [2018-11-18 15:03:21,927 INFO L226 Difference]: Without dead ends: 171 [2018-11-18 15:03:21,929 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:21,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-11-18 15:03:21,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 154. [2018-11-18 15:03:21,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:21,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 233 transitions. [2018-11-18 15:03:21,938 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 233 transitions. Word has length 56 [2018-11-18 15:03:21,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:21,939 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 233 transitions. [2018-11-18 15:03:21,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:21,939 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 233 transitions. [2018-11-18 15:03:21,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 15:03:21,940 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:21,941 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:21,941 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:21,941 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:21,941 INFO L82 PathProgramCache]: Analyzing trace with hash 2095729256, now seen corresponding path program 1 times [2018-11-18 15:03:21,941 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:21,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:21,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:21,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:21,943 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:21,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:22,052 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:22,052 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:22,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:22,053 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:22,053 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:22,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:22,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:22,053 INFO L87 Difference]: Start difference. First operand 154 states and 233 transitions. Second operand 4 states. [2018-11-18 15:03:22,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:22,300 INFO L93 Difference]: Finished difference Result 298 states and 450 transitions. [2018-11-18 15:03:22,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:22,300 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 15:03:22,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:22,302 INFO L225 Difference]: With dead ends: 298 [2018-11-18 15:03:22,302 INFO L226 Difference]: Without dead ends: 170 [2018-11-18 15:03:22,303 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:22,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-11-18 15:03:22,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 154. [2018-11-18 15:03:22,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:22,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 232 transitions. [2018-11-18 15:03:22,311 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 232 transitions. Word has length 57 [2018-11-18 15:03:22,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:22,311 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 232 transitions. [2018-11-18 15:03:22,311 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:22,311 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 232 transitions. [2018-11-18 15:03:22,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 15:03:22,313 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:22,313 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:22,313 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:22,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:22,313 INFO L82 PathProgramCache]: Analyzing trace with hash -1136087980, now seen corresponding path program 1 times [2018-11-18 15:03:22,313 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:22,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:22,315 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:22,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:22,315 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:22,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:22,386 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:22,386 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:22,386 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:22,386 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:22,387 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:22,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:22,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:22,387 INFO L87 Difference]: Start difference. First operand 154 states and 232 transitions. Second operand 4 states. [2018-11-18 15:03:22,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:22,876 INFO L93 Difference]: Finished difference Result 298 states and 449 transitions. [2018-11-18 15:03:22,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:22,877 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 15:03:22,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:22,877 INFO L225 Difference]: With dead ends: 298 [2018-11-18 15:03:22,878 INFO L226 Difference]: Without dead ends: 170 [2018-11-18 15:03:22,878 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:22,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-11-18 15:03:22,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 154. [2018-11-18 15:03:22,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:22,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 231 transitions. [2018-11-18 15:03:22,886 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 231 transitions. Word has length 57 [2018-11-18 15:03:22,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:22,887 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 231 transitions. [2018-11-18 15:03:22,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:22,887 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 231 transitions. [2018-11-18 15:03:22,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 15:03:22,888 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:22,888 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:22,888 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:22,888 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:22,888 INFO L82 PathProgramCache]: Analyzing trace with hash 90382748, now seen corresponding path program 1 times [2018-11-18 15:03:22,888 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:22,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:22,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:22,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:22,889 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:22,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:22,977 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:22,977 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:22,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:22,977 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:22,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:22,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:22,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:22,978 INFO L87 Difference]: Start difference. First operand 154 states and 231 transitions. Second operand 4 states. [2018-11-18 15:03:23,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:23,433 INFO L93 Difference]: Finished difference Result 297 states and 447 transitions. [2018-11-18 15:03:23,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:23,433 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 15:03:23,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:23,434 INFO L225 Difference]: With dead ends: 297 [2018-11-18 15:03:23,434 INFO L226 Difference]: Without dead ends: 169 [2018-11-18 15:03:23,434 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:23,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-11-18 15:03:23,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 154. [2018-11-18 15:03:23,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:23,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 230 transitions. [2018-11-18 15:03:23,441 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 230 transitions. Word has length 57 [2018-11-18 15:03:23,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:23,441 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 230 transitions. [2018-11-18 15:03:23,441 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:23,441 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 230 transitions. [2018-11-18 15:03:23,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 15:03:23,442 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:23,442 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:23,442 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:23,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:23,443 INFO L82 PathProgramCache]: Analyzing trace with hash -499749699, now seen corresponding path program 1 times [2018-11-18 15:03:23,443 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:23,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:23,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:23,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:23,444 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:23,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:23,508 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:23,508 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:23,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:23,509 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:23,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:23,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:23,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:23,509 INFO L87 Difference]: Start difference. First operand 154 states and 230 transitions. Second operand 4 states. [2018-11-18 15:03:23,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:23,839 INFO L93 Difference]: Finished difference Result 295 states and 444 transitions. [2018-11-18 15:03:23,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:23,839 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 15:03:23,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:23,840 INFO L225 Difference]: With dead ends: 295 [2018-11-18 15:03:23,840 INFO L226 Difference]: Without dead ends: 167 [2018-11-18 15:03:23,841 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:23,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-18 15:03:23,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-11-18 15:03:23,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:23,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 229 transitions. [2018-11-18 15:03:23,846 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 229 transitions. Word has length 57 [2018-11-18 15:03:23,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:23,847 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 229 transitions. [2018-11-18 15:03:23,847 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:23,847 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 229 transitions. [2018-11-18 15:03:23,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-18 15:03:23,848 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:23,848 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:23,848 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:23,848 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:23,848 INFO L82 PathProgramCache]: Analyzing trace with hash -1756312788, now seen corresponding path program 1 times [2018-11-18 15:03:23,849 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:23,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:23,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:23,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:23,850 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:23,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:23,909 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:23,909 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:23,909 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:23,909 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:23,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:23,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:23,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:23,910 INFO L87 Difference]: Start difference. First operand 154 states and 229 transitions. Second operand 4 states. [2018-11-18 15:03:24,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:24,488 INFO L93 Difference]: Finished difference Result 295 states and 443 transitions. [2018-11-18 15:03:24,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:24,488 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-18 15:03:24,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:24,489 INFO L225 Difference]: With dead ends: 295 [2018-11-18 15:03:24,489 INFO L226 Difference]: Without dead ends: 167 [2018-11-18 15:03:24,489 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:24,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-18 15:03:24,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-11-18 15:03:24,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:24,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 228 transitions. [2018-11-18 15:03:24,493 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 228 transitions. Word has length 58 [2018-11-18 15:03:24,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:24,494 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 228 transitions. [2018-11-18 15:03:24,494 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:24,494 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 228 transitions. [2018-11-18 15:03:24,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-18 15:03:24,494 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:24,494 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:24,495 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:24,495 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:24,495 INFO L82 PathProgramCache]: Analyzing trace with hash -790479953, now seen corresponding path program 1 times [2018-11-18 15:03:24,495 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:24,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:24,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:24,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:24,496 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:24,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:24,550 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:24,550 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:24,550 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:24,551 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:24,551 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:24,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:24,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:24,551 INFO L87 Difference]: Start difference. First operand 154 states and 228 transitions. Second operand 4 states. [2018-11-18 15:03:25,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:25,009 INFO L93 Difference]: Finished difference Result 295 states and 442 transitions. [2018-11-18 15:03:25,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:25,010 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-11-18 15:03:25,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:25,011 INFO L225 Difference]: With dead ends: 295 [2018-11-18 15:03:25,011 INFO L226 Difference]: Without dead ends: 167 [2018-11-18 15:03:25,012 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:25,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-18 15:03:25,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-11-18 15:03:25,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:25,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 227 transitions. [2018-11-18 15:03:25,019 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 227 transitions. Word has length 59 [2018-11-18 15:03:25,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:25,019 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 227 transitions. [2018-11-18 15:03:25,019 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:25,019 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 227 transitions. [2018-11-18 15:03:25,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 15:03:25,020 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:25,020 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:25,020 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:25,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:25,021 INFO L82 PathProgramCache]: Analyzing trace with hash 2098499559, now seen corresponding path program 1 times [2018-11-18 15:03:25,021 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:25,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:25,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:25,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:25,022 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:25,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:25,075 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:25,076 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:25,076 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:25,076 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:25,076 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:25,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:25,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:25,077 INFO L87 Difference]: Start difference. First operand 154 states and 227 transitions. Second operand 4 states. [2018-11-18 15:03:25,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:25,294 INFO L93 Difference]: Finished difference Result 285 states and 428 transitions. [2018-11-18 15:03:25,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:25,295 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-18 15:03:25,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:25,296 INFO L225 Difference]: With dead ends: 285 [2018-11-18 15:03:25,296 INFO L226 Difference]: Without dead ends: 157 [2018-11-18 15:03:25,296 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:25,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-11-18 15:03:25,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 154. [2018-11-18 15:03:25,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 15:03:25,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 226 transitions. [2018-11-18 15:03:25,301 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 226 transitions. Word has length 60 [2018-11-18 15:03:25,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:25,301 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 226 transitions. [2018-11-18 15:03:25,301 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:25,301 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 226 transitions. [2018-11-18 15:03:25,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 15:03:25,302 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:25,302 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:25,303 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:25,303 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:25,303 INFO L82 PathProgramCache]: Analyzing trace with hash 692256734, now seen corresponding path program 1 times [2018-11-18 15:03:25,303 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:25,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:25,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:25,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:25,304 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:25,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:25,356 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:25,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:25,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:25,356 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:25,356 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:25,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:25,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:25,357 INFO L87 Difference]: Start difference. First operand 154 states and 226 transitions. Second operand 4 states. [2018-11-18 15:03:25,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:25,778 INFO L93 Difference]: Finished difference Result 326 states and 490 transitions. [2018-11-18 15:03:25,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:25,778 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-18 15:03:25,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:25,779 INFO L225 Difference]: With dead ends: 326 [2018-11-18 15:03:25,779 INFO L226 Difference]: Without dead ends: 198 [2018-11-18 15:03:25,780 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:25,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-18 15:03:25,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 177. [2018-11-18 15:03:25,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-11-18 15:03:25,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 265 transitions. [2018-11-18 15:03:25,785 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 265 transitions. Word has length 60 [2018-11-18 15:03:25,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:25,786 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 265 transitions. [2018-11-18 15:03:25,786 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:25,786 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 265 transitions. [2018-11-18 15:03:25,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-18 15:03:25,787 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:25,787 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:25,787 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:25,787 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:25,787 INFO L82 PathProgramCache]: Analyzing trace with hash -182699472, now seen corresponding path program 1 times [2018-11-18 15:03:25,787 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:25,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:25,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:25,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:25,788 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:25,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:25,848 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:25,849 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:25,849 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:25,849 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:25,849 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:25,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:25,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:25,850 INFO L87 Difference]: Start difference. First operand 177 states and 265 transitions. Second operand 4 states. [2018-11-18 15:03:26,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:26,372 INFO L93 Difference]: Finished difference Result 349 states and 528 transitions. [2018-11-18 15:03:26,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:26,373 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2018-11-18 15:03:26,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:26,374 INFO L225 Difference]: With dead ends: 349 [2018-11-18 15:03:26,374 INFO L226 Difference]: Without dead ends: 198 [2018-11-18 15:03:26,374 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:26,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-18 15:03:26,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 177. [2018-11-18 15:03:26,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-11-18 15:03:26,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 264 transitions. [2018-11-18 15:03:26,378 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 264 transitions. Word has length 74 [2018-11-18 15:03:26,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:26,378 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 264 transitions. [2018-11-18 15:03:26,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:26,378 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 264 transitions. [2018-11-18 15:03:26,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 15:03:26,379 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:26,379 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:26,379 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:26,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:26,379 INFO L82 PathProgramCache]: Analyzing trace with hash 485189869, now seen corresponding path program 1 times [2018-11-18 15:03:26,379 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:26,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:26,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:26,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:26,381 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:26,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:26,440 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 15:03:26,441 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:26,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:26,441 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:26,441 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:26,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:26,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:26,442 INFO L87 Difference]: Start difference. First operand 177 states and 264 transitions. Second operand 4 states. [2018-11-18 15:03:26,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:26,924 INFO L93 Difference]: Finished difference Result 358 states and 543 transitions. [2018-11-18 15:03:26,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:26,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2018-11-18 15:03:26,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:26,925 INFO L225 Difference]: With dead ends: 358 [2018-11-18 15:03:26,925 INFO L226 Difference]: Without dead ends: 207 [2018-11-18 15:03:26,926 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:26,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-11-18 15:03:26,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 194. [2018-11-18 15:03:26,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-18 15:03:26,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 291 transitions. [2018-11-18 15:03:26,930 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 291 transitions. Word has length 75 [2018-11-18 15:03:26,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:26,930 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 291 transitions. [2018-11-18 15:03:26,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:26,930 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 291 transitions. [2018-11-18 15:03:26,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 15:03:26,931 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:26,931 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:26,931 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:26,931 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:26,931 INFO L82 PathProgramCache]: Analyzing trace with hash -1520156639, now seen corresponding path program 1 times [2018-11-18 15:03:26,931 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:26,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:26,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:26,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:26,932 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:26,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:26,984 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:26,984 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:26,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:26,984 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:26,985 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:26,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:26,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:26,985 INFO L87 Difference]: Start difference. First operand 194 states and 291 transitions. Second operand 4 states. [2018-11-18 15:03:27,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:27,619 INFO L93 Difference]: Finished difference Result 382 states and 579 transitions. [2018-11-18 15:03:27,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:27,619 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2018-11-18 15:03:27,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:27,620 INFO L225 Difference]: With dead ends: 382 [2018-11-18 15:03:27,620 INFO L226 Difference]: Without dead ends: 214 [2018-11-18 15:03:27,621 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:27,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-11-18 15:03:27,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 194. [2018-11-18 15:03:27,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-18 15:03:27,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 290 transitions. [2018-11-18 15:03:27,626 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 290 transitions. Word has length 75 [2018-11-18 15:03:27,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:27,626 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 290 transitions. [2018-11-18 15:03:27,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:27,627 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 290 transitions. [2018-11-18 15:03:27,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 15:03:27,627 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:27,627 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:27,628 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:27,628 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:27,628 INFO L82 PathProgramCache]: Analyzing trace with hash -2110289086, now seen corresponding path program 1 times [2018-11-18 15:03:27,628 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:27,629 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:27,629 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:27,629 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:27,629 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:27,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:27,715 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:27,716 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:27,716 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:27,716 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:27,716 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:27,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:27,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:27,718 INFO L87 Difference]: Start difference. First operand 194 states and 290 transitions. Second operand 4 states. [2018-11-18 15:03:28,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:28,091 INFO L93 Difference]: Finished difference Result 380 states and 575 transitions. [2018-11-18 15:03:28,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:28,092 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2018-11-18 15:03:28,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:28,093 INFO L225 Difference]: With dead ends: 380 [2018-11-18 15:03:28,093 INFO L226 Difference]: Without dead ends: 212 [2018-11-18 15:03:28,093 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:28,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-18 15:03:28,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 194. [2018-11-18 15:03:28,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-18 15:03:28,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 289 transitions. [2018-11-18 15:03:28,100 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 289 transitions. Word has length 75 [2018-11-18 15:03:28,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:28,100 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 289 transitions. [2018-11-18 15:03:28,100 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:28,100 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 289 transitions. [2018-11-18 15:03:28,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-18 15:03:28,103 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:28,103 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:28,103 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:28,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:28,103 INFO L82 PathProgramCache]: Analyzing trace with hash 699577311, now seen corresponding path program 1 times [2018-11-18 15:03:28,103 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:28,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:28,105 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:28,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:28,105 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:28,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:28,164 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 15:03:28,164 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:28,165 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 15:03:28,165 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:28,165 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 15:03:28,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 15:03:28,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:28,165 INFO L87 Difference]: Start difference. First operand 194 states and 289 transitions. Second operand 5 states. [2018-11-18 15:03:29,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:29,189 INFO L93 Difference]: Finished difference Result 371 states and 561 transitions. [2018-11-18 15:03:29,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 15:03:29,189 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2018-11-18 15:03:29,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:29,190 INFO L225 Difference]: With dead ends: 371 [2018-11-18 15:03:29,190 INFO L226 Difference]: Without dead ends: 203 [2018-11-18 15:03:29,191 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 15:03:29,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-11-18 15:03:29,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 203. [2018-11-18 15:03:29,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 15:03:29,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 300 transitions. [2018-11-18 15:03:29,196 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 300 transitions. Word has length 76 [2018-11-18 15:03:29,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:29,196 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 300 transitions. [2018-11-18 15:03:29,196 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 15:03:29,196 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 300 transitions. [2018-11-18 15:03:29,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-18 15:03:29,199 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:29,199 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:29,200 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:29,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:29,200 INFO L82 PathProgramCache]: Analyzing trace with hash -702509197, now seen corresponding path program 1 times [2018-11-18 15:03:29,200 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:29,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:29,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:29,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:29,201 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:29,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:29,269 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:29,269 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:29,269 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:29,269 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:29,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:29,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:29,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:29,270 INFO L87 Difference]: Start difference. First operand 203 states and 300 transitions. Second operand 4 states. [2018-11-18 15:03:29,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:29,613 INFO L93 Difference]: Finished difference Result 407 states and 606 transitions. [2018-11-18 15:03:29,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:29,614 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2018-11-18 15:03:29,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:29,614 INFO L225 Difference]: With dead ends: 407 [2018-11-18 15:03:29,615 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 15:03:29,615 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:29,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 15:03:29,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 203. [2018-11-18 15:03:29,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 15:03:29,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 299 transitions. [2018-11-18 15:03:29,619 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 299 transitions. Word has length 76 [2018-11-18 15:03:29,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:29,619 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 299 transitions. [2018-11-18 15:03:29,619 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:29,619 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 299 transitions. [2018-11-18 15:03:29,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 15:03:29,620 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:29,620 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:29,620 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:29,620 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:29,621 INFO L82 PathProgramCache]: Analyzing trace with hash -1607652667, now seen corresponding path program 1 times [2018-11-18 15:03:29,621 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:29,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:29,622 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:29,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:29,622 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:29,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:29,650 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:29,651 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:29,651 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:29,651 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:29,651 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:29,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:29,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:29,651 INFO L87 Difference]: Start difference. First operand 203 states and 299 transitions. Second operand 4 states. [2018-11-18 15:03:29,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:29,880 INFO L93 Difference]: Finished difference Result 407 states and 604 transitions. [2018-11-18 15:03:29,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:29,880 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-18 15:03:29,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:29,881 INFO L225 Difference]: With dead ends: 407 [2018-11-18 15:03:29,881 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 15:03:29,882 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:29,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 15:03:29,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 203. [2018-11-18 15:03:29,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 15:03:29,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 298 transitions. [2018-11-18 15:03:29,886 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 298 transitions. Word has length 77 [2018-11-18 15:03:29,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:29,886 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 298 transitions. [2018-11-18 15:03:29,886 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:29,886 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 298 transitions. [2018-11-18 15:03:29,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-18 15:03:29,887 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:29,887 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:29,887 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:29,887 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:29,888 INFO L82 PathProgramCache]: Analyzing trace with hash -690696008, now seen corresponding path program 1 times [2018-11-18 15:03:29,888 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:29,888 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:29,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:29,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:29,889 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:29,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:29,931 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:29,931 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:29,931 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:29,931 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:29,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:29,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:29,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:29,932 INFO L87 Difference]: Start difference. First operand 203 states and 298 transitions. Second operand 4 states. [2018-11-18 15:03:30,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:30,335 INFO L93 Difference]: Finished difference Result 407 states and 602 transitions. [2018-11-18 15:03:30,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:30,335 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2018-11-18 15:03:30,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:30,336 INFO L225 Difference]: With dead ends: 407 [2018-11-18 15:03:30,336 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 15:03:30,337 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:30,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 15:03:30,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 203. [2018-11-18 15:03:30,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 15:03:30,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 297 transitions. [2018-11-18 15:03:30,340 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 297 transitions. Word has length 78 [2018-11-18 15:03:30,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:30,340 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 297 transitions. [2018-11-18 15:03:30,341 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:30,341 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 297 transitions. [2018-11-18 15:03:30,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-18 15:03:30,341 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:30,341 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:30,341 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:30,342 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:30,342 INFO L82 PathProgramCache]: Analyzing trace with hash 876789802, now seen corresponding path program 1 times [2018-11-18 15:03:30,342 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:30,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:30,343 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:30,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:30,343 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:30,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:30,378 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:03:30,378 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:30,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:30,379 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:30,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:30,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:30,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:30,379 INFO L87 Difference]: Start difference. First operand 203 states and 297 transitions. Second operand 4 states. [2018-11-18 15:03:31,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:31,031 INFO L93 Difference]: Finished difference Result 397 states and 587 transitions. [2018-11-18 15:03:31,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:31,031 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2018-11-18 15:03:31,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:31,032 INFO L225 Difference]: With dead ends: 397 [2018-11-18 15:03:31,032 INFO L226 Difference]: Without dead ends: 220 [2018-11-18 15:03:31,032 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:31,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-11-18 15:03:31,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 203. [2018-11-18 15:03:31,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 15:03:31,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 296 transitions. [2018-11-18 15:03:31,037 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 296 transitions. Word has length 79 [2018-11-18 15:03:31,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:31,037 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 296 transitions. [2018-11-18 15:03:31,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:31,037 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 296 transitions. [2018-11-18 15:03:31,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 15:03:31,038 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:31,038 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:31,038 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:31,038 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:31,039 INFO L82 PathProgramCache]: Analyzing trace with hash 610798098, now seen corresponding path program 1 times [2018-11-18 15:03:31,039 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:31,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,040 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:31,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,040 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:31,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:31,088 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 15:03:31,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:31,089 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:03:31,089 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:31,089 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:03:31,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:03:31,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:31,089 INFO L87 Difference]: Start difference. First operand 203 states and 296 transitions. Second operand 3 states. [2018-11-18 15:03:31,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:31,142 INFO L93 Difference]: Finished difference Result 555 states and 829 transitions. [2018-11-18 15:03:31,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:03:31,143 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2018-11-18 15:03:31,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:31,144 INFO L225 Difference]: With dead ends: 555 [2018-11-18 15:03:31,145 INFO L226 Difference]: Without dead ends: 378 [2018-11-18 15:03:31,145 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:31,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 378 states. [2018-11-18 15:03:31,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 378 to 378. [2018-11-18 15:03:31,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 378 states. [2018-11-18 15:03:31,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 556 transitions. [2018-11-18 15:03:31,153 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 556 transitions. Word has length 83 [2018-11-18 15:03:31,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:31,154 INFO L480 AbstractCegarLoop]: Abstraction has 378 states and 556 transitions. [2018-11-18 15:03:31,154 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:03:31,154 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 556 transitions. [2018-11-18 15:03:31,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-11-18 15:03:31,155 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:31,155 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:31,155 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:31,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:31,155 INFO L82 PathProgramCache]: Analyzing trace with hash -606699514, now seen corresponding path program 1 times [2018-11-18 15:03:31,155 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:31,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:31,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,156 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:31,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:31,206 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:31,206 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:31,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:03:31,207 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:31,207 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:03:31,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:03:31,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:31,207 INFO L87 Difference]: Start difference. First operand 378 states and 556 transitions. Second operand 3 states. [2018-11-18 15:03:31,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:31,256 INFO L93 Difference]: Finished difference Result 907 states and 1350 transitions. [2018-11-18 15:03:31,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:03:31,257 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 108 [2018-11-18 15:03:31,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:31,259 INFO L225 Difference]: With dead ends: 907 [2018-11-18 15:03:31,259 INFO L226 Difference]: Without dead ends: 555 [2018-11-18 15:03:31,260 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:31,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2018-11-18 15:03:31,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 553. [2018-11-18 15:03:31,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 553 states. [2018-11-18 15:03:31,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions. [2018-11-18 15:03:31,272 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 108 [2018-11-18 15:03:31,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:31,272 INFO L480 AbstractCegarLoop]: Abstraction has 553 states and 820 transitions. [2018-11-18 15:03:31,272 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:03:31,272 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions. [2018-11-18 15:03:31,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-18 15:03:31,273 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:31,273 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:31,274 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:31,274 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:31,274 INFO L82 PathProgramCache]: Analyzing trace with hash 1057268164, now seen corresponding path program 1 times [2018-11-18 15:03:31,274 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:31,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:31,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,275 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:31,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:31,329 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:31,330 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:31,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:03:31,330 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:31,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:03:31,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:03:31,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:31,331 INFO L87 Difference]: Start difference. First operand 553 states and 820 transitions. Second operand 3 states. [2018-11-18 15:03:31,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:31,387 INFO L93 Difference]: Finished difference Result 1257 states and 1876 transitions. [2018-11-18 15:03:31,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:03:31,389 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-11-18 15:03:31,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:31,391 INFO L225 Difference]: With dead ends: 1257 [2018-11-18 15:03:31,391 INFO L226 Difference]: Without dead ends: 730 [2018-11-18 15:03:31,393 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:31,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 730 states. [2018-11-18 15:03:31,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 730 to 728. [2018-11-18 15:03:31,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 728 states. [2018-11-18 15:03:31,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 1070 transitions. [2018-11-18 15:03:31,409 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 1070 transitions. Word has length 114 [2018-11-18 15:03:31,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:31,409 INFO L480 AbstractCegarLoop]: Abstraction has 728 states and 1070 transitions. [2018-11-18 15:03:31,409 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:03:31,409 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 1070 transitions. [2018-11-18 15:03:31,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-18 15:03:31,411 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:31,411 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:31,411 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:31,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:31,411 INFO L82 PathProgramCache]: Analyzing trace with hash -487725894, now seen corresponding path program 1 times [2018-11-18 15:03:31,411 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:31,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,412 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:31,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:31,412 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:31,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:31,486 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 65 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:31,486 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:31,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:31,486 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:31,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:31,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:31,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:31,487 INFO L87 Difference]: Start difference. First operand 728 states and 1070 transitions. Second operand 4 states. [2018-11-18 15:03:32,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:32,328 INFO L93 Difference]: Finished difference Result 1896 states and 2804 transitions. [2018-11-18 15:03:32,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:32,329 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 131 [2018-11-18 15:03:32,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:32,333 INFO L225 Difference]: With dead ends: 1896 [2018-11-18 15:03:32,333 INFO L226 Difference]: Without dead ends: 1194 [2018-11-18 15:03:32,334 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:32,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1194 states. [2018-11-18 15:03:32,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1194 to 888. [2018-11-18 15:03:32,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 888 states. [2018-11-18 15:03:32,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 888 states to 888 states and 1362 transitions. [2018-11-18 15:03:32,359 INFO L78 Accepts]: Start accepts. Automaton has 888 states and 1362 transitions. Word has length 131 [2018-11-18 15:03:32,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:32,359 INFO L480 AbstractCegarLoop]: Abstraction has 888 states and 1362 transitions. [2018-11-18 15:03:32,359 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:32,359 INFO L276 IsEmpty]: Start isEmpty. Operand 888 states and 1362 transitions. [2018-11-18 15:03:32,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-11-18 15:03:32,361 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:32,361 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:32,361 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:32,361 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:32,361 INFO L82 PathProgramCache]: Analyzing trace with hash 2053359115, now seen corresponding path program 1 times [2018-11-18 15:03:32,361 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:32,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:32,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:32,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:32,363 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:32,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:32,446 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 66 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:32,447 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:32,447 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:32,447 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:32,447 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:32,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:32,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:32,448 INFO L87 Difference]: Start difference. First operand 888 states and 1362 transitions. Second operand 4 states. [2018-11-18 15:03:33,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:33,277 INFO L93 Difference]: Finished difference Result 2038 states and 3070 transitions. [2018-11-18 15:03:33,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:33,278 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 132 [2018-11-18 15:03:33,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:33,281 INFO L225 Difference]: With dead ends: 2038 [2018-11-18 15:03:33,281 INFO L226 Difference]: Without dead ends: 1176 [2018-11-18 15:03:33,282 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:33,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1176 states. [2018-11-18 15:03:33,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1176 to 892. [2018-11-18 15:03:33,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 892 states. [2018-11-18 15:03:33,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 892 states to 892 states and 1366 transitions. [2018-11-18 15:03:33,302 INFO L78 Accepts]: Start accepts. Automaton has 892 states and 1366 transitions. Word has length 132 [2018-11-18 15:03:33,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:33,303 INFO L480 AbstractCegarLoop]: Abstraction has 892 states and 1366 transitions. [2018-11-18 15:03:33,303 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:33,303 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 1366 transitions. [2018-11-18 15:03:33,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 15:03:33,304 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:33,305 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:33,305 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:33,305 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:33,305 INFO L82 PathProgramCache]: Analyzing trace with hash -1793540287, now seen corresponding path program 1 times [2018-11-18 15:03:33,305 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:33,306 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:33,306 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:33,306 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:33,306 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:33,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:33,376 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 130 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 15:03:33,376 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:33,376 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:33,377 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:33,377 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:33,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:33,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:33,377 INFO L87 Difference]: Start difference. First operand 892 states and 1366 transitions. Second operand 4 states. [2018-11-18 15:03:33,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:33,618 INFO L93 Difference]: Finished difference Result 2232 states and 3404 transitions. [2018-11-18 15:03:33,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:33,619 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 138 [2018-11-18 15:03:33,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:33,622 INFO L225 Difference]: With dead ends: 2232 [2018-11-18 15:03:33,622 INFO L226 Difference]: Without dead ends: 1366 [2018-11-18 15:03:33,623 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:33,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1366 states. [2018-11-18 15:03:33,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1366 to 1000. [2018-11-18 15:03:33,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1000 states. [2018-11-18 15:03:33,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1546 transitions. [2018-11-18 15:03:33,643 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1546 transitions. Word has length 138 [2018-11-18 15:03:33,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:33,643 INFO L480 AbstractCegarLoop]: Abstraction has 1000 states and 1546 transitions. [2018-11-18 15:03:33,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:33,643 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1546 transitions. [2018-11-18 15:03:33,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 15:03:33,645 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:33,645 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:33,646 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:33,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:33,646 INFO L82 PathProgramCache]: Analyzing trace with hash 1730693443, now seen corresponding path program 1 times [2018-11-18 15:03:33,646 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:33,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:33,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:33,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:33,647 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:33,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:33,690 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 15:03:33,690 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:33,690 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:03:33,690 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:33,690 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:03:33,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:03:33,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:33,691 INFO L87 Difference]: Start difference. First operand 1000 states and 1546 transitions. Second operand 3 states. [2018-11-18 15:03:33,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:33,742 INFO L93 Difference]: Finished difference Result 1247 states and 1926 transitions. [2018-11-18 15:03:33,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:03:33,743 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2018-11-18 15:03:33,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:33,745 INFO L225 Difference]: With dead ends: 1247 [2018-11-18 15:03:33,746 INFO L226 Difference]: Without dead ends: 1245 [2018-11-18 15:03:33,746 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:03:33,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1245 states. [2018-11-18 15:03:33,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1245 to 1243. [2018-11-18 15:03:33,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:33,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1923 transitions. [2018-11-18 15:03:33,769 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1923 transitions. Word has length 138 [2018-11-18 15:03:33,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:33,769 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1923 transitions. [2018-11-18 15:03:33,769 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:03:33,769 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1923 transitions. [2018-11-18 15:03:33,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-11-18 15:03:33,771 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:33,771 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:33,771 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:33,771 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:33,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1518580468, now seen corresponding path program 1 times [2018-11-18 15:03:33,772 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:33,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:33,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:33,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:33,773 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:33,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:33,824 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:33,824 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:33,824 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:33,824 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:33,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:33,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:33,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:33,826 INFO L87 Difference]: Start difference. First operand 1243 states and 1923 transitions. Second operand 4 states. [2018-11-18 15:03:34,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:34,112 INFO L93 Difference]: Finished difference Result 2815 states and 4274 transitions. [2018-11-18 15:03:34,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:34,113 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 145 [2018-11-18 15:03:34,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:34,116 INFO L225 Difference]: With dead ends: 2815 [2018-11-18 15:03:34,116 INFO L226 Difference]: Without dead ends: 1598 [2018-11-18 15:03:34,118 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:34,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1598 states. [2018-11-18 15:03:34,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1598 to 1243. [2018-11-18 15:03:34,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:34,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1918 transitions. [2018-11-18 15:03:34,144 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1918 transitions. Word has length 145 [2018-11-18 15:03:34,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:34,144 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1918 transitions. [2018-11-18 15:03:34,144 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:34,144 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1918 transitions. [2018-11-18 15:03:34,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-11-18 15:03:34,146 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:34,146 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:34,146 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:34,146 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:34,146 INFO L82 PathProgramCache]: Analyzing trace with hash 258079937, now seen corresponding path program 1 times [2018-11-18 15:03:34,146 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:34,147 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:34,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:34,147 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:34,147 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:34,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:34,200 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 118 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:34,200 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:34,200 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:34,200 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:34,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:34,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:34,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:34,201 INFO L87 Difference]: Start difference. First operand 1243 states and 1918 transitions. Second operand 4 states. [2018-11-18 15:03:34,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:34,619 INFO L93 Difference]: Finished difference Result 2810 states and 4259 transitions. [2018-11-18 15:03:34,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:34,620 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2018-11-18 15:03:34,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:34,623 INFO L225 Difference]: With dead ends: 2810 [2018-11-18 15:03:34,623 INFO L226 Difference]: Without dead ends: 1593 [2018-11-18 15:03:34,625 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:34,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1593 states. [2018-11-18 15:03:34,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1593 to 1243. [2018-11-18 15:03:34,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:34,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1913 transitions. [2018-11-18 15:03:34,650 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1913 transitions. Word has length 146 [2018-11-18 15:03:34,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:34,650 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1913 transitions. [2018-11-18 15:03:34,651 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:34,651 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1913 transitions. [2018-11-18 15:03:34,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-11-18 15:03:34,653 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:34,653 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:34,653 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:34,653 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:34,653 INFO L82 PathProgramCache]: Analyzing trace with hash 117353250, now seen corresponding path program 1 times [2018-11-18 15:03:34,653 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:34,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:34,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:34,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:34,655 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:34,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:34,710 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:34,710 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:34,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:34,710 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:34,710 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:34,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:34,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:34,711 INFO L87 Difference]: Start difference. First operand 1243 states and 1913 transitions. Second operand 4 states. [2018-11-18 15:03:35,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:35,331 INFO L93 Difference]: Finished difference Result 2800 states and 4239 transitions. [2018-11-18 15:03:35,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:35,333 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2018-11-18 15:03:35,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:35,336 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 15:03:35,336 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 15:03:35,338 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:35,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 15:03:35,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 15:03:35,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:35,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1908 transitions. [2018-11-18 15:03:35,364 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1908 transitions. Word has length 146 [2018-11-18 15:03:35,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:35,364 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1908 transitions. [2018-11-18 15:03:35,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:35,365 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1908 transitions. [2018-11-18 15:03:35,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-11-18 15:03:35,366 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:35,367 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:35,367 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:35,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:35,367 INFO L82 PathProgramCache]: Analyzing trace with hash 1952625807, now seen corresponding path program 1 times [2018-11-18 15:03:35,367 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:35,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:35,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:35,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:35,368 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:35,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:35,429 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 94 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:35,430 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:35,430 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:35,430 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:35,430 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:35,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:35,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:35,431 INFO L87 Difference]: Start difference. First operand 1243 states and 1908 transitions. Second operand 4 states. [2018-11-18 15:03:36,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:36,154 INFO L93 Difference]: Finished difference Result 2800 states and 4229 transitions. [2018-11-18 15:03:36,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:36,155 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 147 [2018-11-18 15:03:36,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:36,158 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 15:03:36,158 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 15:03:36,160 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:36,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 15:03:36,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 15:03:36,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:36,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1903 transitions. [2018-11-18 15:03:36,187 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1903 transitions. Word has length 147 [2018-11-18 15:03:36,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:36,188 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1903 transitions. [2018-11-18 15:03:36,188 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:36,188 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1903 transitions. [2018-11-18 15:03:36,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-11-18 15:03:36,189 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:36,190 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:36,190 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:36,190 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:36,191 INFO L82 PathProgramCache]: Analyzing trace with hash -1855513627, now seen corresponding path program 1 times [2018-11-18 15:03:36,191 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:36,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:36,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:36,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:36,192 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:36,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:36,244 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 98 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:36,244 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:36,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:36,245 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:36,245 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:36,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:36,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:36,245 INFO L87 Difference]: Start difference. First operand 1243 states and 1903 transitions. Second operand 4 states. [2018-11-18 15:03:36,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:36,564 INFO L93 Difference]: Finished difference Result 2800 states and 4219 transitions. [2018-11-18 15:03:36,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:36,565 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 148 [2018-11-18 15:03:36,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:36,568 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 15:03:36,568 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 15:03:36,570 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:36,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 15:03:36,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 15:03:36,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:36,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1898 transitions. [2018-11-18 15:03:36,596 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1898 transitions. Word has length 148 [2018-11-18 15:03:36,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:36,597 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1898 transitions. [2018-11-18 15:03:36,597 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:36,597 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1898 transitions. [2018-11-18 15:03:36,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-11-18 15:03:36,598 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:36,599 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:36,599 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:36,599 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:36,599 INFO L82 PathProgramCache]: Analyzing trace with hash 1616010900, now seen corresponding path program 1 times [2018-11-18 15:03:36,599 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:36,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:36,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:36,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:36,600 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:36,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:36,660 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 102 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:36,660 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:36,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:36,660 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:36,660 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:36,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:36,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:36,661 INFO L87 Difference]: Start difference. First operand 1243 states and 1898 transitions. Second operand 4 states. [2018-11-18 15:03:37,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:37,125 INFO L93 Difference]: Finished difference Result 2800 states and 4209 transitions. [2018-11-18 15:03:37,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:37,125 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 149 [2018-11-18 15:03:37,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:37,128 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 15:03:37,128 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 15:03:37,129 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:37,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 15:03:37,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 15:03:37,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:37,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1893 transitions. [2018-11-18 15:03:37,170 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1893 transitions. Word has length 149 [2018-11-18 15:03:37,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:37,171 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1893 transitions. [2018-11-18 15:03:37,171 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:37,171 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1893 transitions. [2018-11-18 15:03:37,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-11-18 15:03:37,173 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:37,173 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:37,173 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:37,173 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:37,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1171115766, now seen corresponding path program 1 times [2018-11-18 15:03:37,173 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:37,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:37,174 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:37,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:37,174 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:37,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:37,267 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 106 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:37,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:37,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:37,267 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:37,267 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:37,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:37,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:37,268 INFO L87 Difference]: Start difference. First operand 1243 states and 1893 transitions. Second operand 4 states. [2018-11-18 15:03:37,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:37,520 INFO L93 Difference]: Finished difference Result 2750 states and 4134 transitions. [2018-11-18 15:03:37,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:37,520 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 150 [2018-11-18 15:03:37,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:37,523 INFO L225 Difference]: With dead ends: 2750 [2018-11-18 15:03:37,523 INFO L226 Difference]: Without dead ends: 1533 [2018-11-18 15:03:37,525 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:37,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1533 states. [2018-11-18 15:03:37,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1533 to 1243. [2018-11-18 15:03:37,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:37,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1888 transitions. [2018-11-18 15:03:37,553 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1888 transitions. Word has length 150 [2018-11-18 15:03:37,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:37,553 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1888 transitions. [2018-11-18 15:03:37,553 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:37,554 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1888 transitions. [2018-11-18 15:03:37,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-11-18 15:03:37,555 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:37,555 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:37,556 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:37,556 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:37,556 INFO L82 PathProgramCache]: Analyzing trace with hash -574687696, now seen corresponding path program 1 times [2018-11-18 15:03:37,556 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:37,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:37,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:37,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:37,557 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:37,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:37,632 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 136 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:37,632 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:37,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:37,633 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:37,634 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:37,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:37,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:37,634 INFO L87 Difference]: Start difference. First operand 1243 states and 1888 transitions. Second operand 4 states. [2018-11-18 15:03:37,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:37,906 INFO L93 Difference]: Finished difference Result 2750 states and 4124 transitions. [2018-11-18 15:03:37,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:37,907 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 154 [2018-11-18 15:03:37,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:37,910 INFO L225 Difference]: With dead ends: 2750 [2018-11-18 15:03:37,910 INFO L226 Difference]: Without dead ends: 1533 [2018-11-18 15:03:37,912 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:37,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1533 states. [2018-11-18 15:03:37,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1533 to 1243. [2018-11-18 15:03:37,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:37,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1883 transitions. [2018-11-18 15:03:37,944 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1883 transitions. Word has length 154 [2018-11-18 15:03:37,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:37,944 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1883 transitions. [2018-11-18 15:03:37,944 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:37,944 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1883 transitions. [2018-11-18 15:03:37,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-11-18 15:03:37,946 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:37,946 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:37,946 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:37,946 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:37,947 INFO L82 PathProgramCache]: Analyzing trace with hash -870897308, now seen corresponding path program 1 times [2018-11-18 15:03:37,947 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:37,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:37,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:37,948 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:37,948 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:37,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:38,030 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 135 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:38,030 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:38,030 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:38,030 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:38,031 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:38,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:38,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:38,031 INFO L87 Difference]: Start difference. First operand 1243 states and 1883 transitions. Second operand 4 states. [2018-11-18 15:03:38,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:38,326 INFO L93 Difference]: Finished difference Result 2750 states and 4114 transitions. [2018-11-18 15:03:38,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:38,327 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 154 [2018-11-18 15:03:38,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:38,330 INFO L225 Difference]: With dead ends: 2750 [2018-11-18 15:03:38,330 INFO L226 Difference]: Without dead ends: 1533 [2018-11-18 15:03:38,332 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:38,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1533 states. [2018-11-18 15:03:38,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1533 to 1243. [2018-11-18 15:03:38,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:38,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1878 transitions. [2018-11-18 15:03:38,363 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1878 transitions. Word has length 154 [2018-11-18 15:03:38,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:38,364 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1878 transitions. [2018-11-18 15:03:38,364 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:38,364 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1878 transitions. [2018-11-18 15:03:38,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-11-18 15:03:38,365 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:38,366 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:38,366 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:38,366 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:38,366 INFO L82 PathProgramCache]: Analyzing trace with hash -512386310, now seen corresponding path program 1 times [2018-11-18 15:03:38,366 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:38,367 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:38,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:38,367 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:38,367 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:38,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:38,453 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 138 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:38,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:38,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:38,453 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:38,453 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:38,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:38,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:38,454 INFO L87 Difference]: Start difference. First operand 1243 states and 1878 transitions. Second operand 4 states. [2018-11-18 15:03:38,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:38,884 INFO L93 Difference]: Finished difference Result 2730 states and 4077 transitions. [2018-11-18 15:03:38,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:38,884 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2018-11-18 15:03:38,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:38,887 INFO L225 Difference]: With dead ends: 2730 [2018-11-18 15:03:38,887 INFO L226 Difference]: Without dead ends: 1513 [2018-11-18 15:03:38,889 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:38,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1513 states. [2018-11-18 15:03:38,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1513 to 1243. [2018-11-18 15:03:38,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:38,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1873 transitions. [2018-11-18 15:03:38,921 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1873 transitions. Word has length 155 [2018-11-18 15:03:38,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:38,921 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1873 transitions. [2018-11-18 15:03:38,921 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:38,921 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1873 transitions. [2018-11-18 15:03:38,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-11-18 15:03:38,922 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:38,922 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:38,923 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:38,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:38,923 INFO L82 PathProgramCache]: Analyzing trace with hash 1863254414, now seen corresponding path program 1 times [2018-11-18 15:03:38,923 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:38,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:38,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:38,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:38,924 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:38,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:38,980 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 137 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:38,980 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:38,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:38,981 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:38,981 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:38,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:38,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:38,981 INFO L87 Difference]: Start difference. First operand 1243 states and 1873 transitions. Second operand 4 states. [2018-11-18 15:03:39,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:39,260 INFO L93 Difference]: Finished difference Result 2705 states and 4035 transitions. [2018-11-18 15:03:39,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:39,260 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2018-11-18 15:03:39,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:39,263 INFO L225 Difference]: With dead ends: 2705 [2018-11-18 15:03:39,263 INFO L226 Difference]: Without dead ends: 1488 [2018-11-18 15:03:39,264 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:39,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1488 states. [2018-11-18 15:03:39,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1488 to 1243. [2018-11-18 15:03:39,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:39,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1868 transitions. [2018-11-18 15:03:39,316 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1868 transitions. Word has length 155 [2018-11-18 15:03:39,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:39,316 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1868 transitions. [2018-11-18 15:03:39,316 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:39,316 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1868 transitions. [2018-11-18 15:03:39,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-11-18 15:03:39,318 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:39,318 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:39,318 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:39,318 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:39,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1038157746, now seen corresponding path program 1 times [2018-11-18 15:03:39,318 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:39,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:39,319 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:39,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:39,319 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:39,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:39,399 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 143 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:39,399 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:39,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:39,400 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:39,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:39,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:39,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:39,401 INFO L87 Difference]: Start difference. First operand 1243 states and 1868 transitions. Second operand 4 states. [2018-11-18 15:03:39,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:39,675 INFO L93 Difference]: Finished difference Result 2705 states and 4025 transitions. [2018-11-18 15:03:39,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:39,676 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 157 [2018-11-18 15:03:39,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:39,678 INFO L225 Difference]: With dead ends: 2705 [2018-11-18 15:03:39,678 INFO L226 Difference]: Without dead ends: 1488 [2018-11-18 15:03:39,679 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:39,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1488 states. [2018-11-18 15:03:39,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1488 to 1243. [2018-11-18 15:03:39,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:39,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1863 transitions. [2018-11-18 15:03:39,712 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1863 transitions. Word has length 157 [2018-11-18 15:03:39,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:39,713 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1863 transitions. [2018-11-18 15:03:39,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:39,713 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1863 transitions. [2018-11-18 15:03:39,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-11-18 15:03:39,714 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:39,714 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:39,715 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:39,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:39,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1223995100, now seen corresponding path program 1 times [2018-11-18 15:03:39,715 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:39,716 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:39,716 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:39,716 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:39,716 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:39,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:39,781 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 145 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:39,781 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:39,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:39,781 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:39,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:39,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:39,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:39,782 INFO L87 Difference]: Start difference. First operand 1243 states and 1863 transitions. Second operand 4 states. [2018-11-18 15:03:40,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:40,533 INFO L93 Difference]: Finished difference Result 2665 states and 3950 transitions. [2018-11-18 15:03:40,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:40,533 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 158 [2018-11-18 15:03:40,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:40,535 INFO L225 Difference]: With dead ends: 2665 [2018-11-18 15:03:40,535 INFO L226 Difference]: Without dead ends: 1448 [2018-11-18 15:03:40,537 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:40,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states. [2018-11-18 15:03:40,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1243. [2018-11-18 15:03:40,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:40,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1858 transitions. [2018-11-18 15:03:40,593 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1858 transitions. Word has length 158 [2018-11-18 15:03:40,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:40,593 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1858 transitions. [2018-11-18 15:03:40,593 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:40,594 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1858 transitions. [2018-11-18 15:03:40,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-11-18 15:03:40,594 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:40,595 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:40,595 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:40,595 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:40,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1610091119, now seen corresponding path program 1 times [2018-11-18 15:03:40,595 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:40,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:40,596 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:40,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:40,596 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:40,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:40,661 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 147 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:40,662 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:40,662 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:40,662 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:40,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:40,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:40,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:40,665 INFO L87 Difference]: Start difference. First operand 1243 states and 1858 transitions. Second operand 4 states. [2018-11-18 15:03:41,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:41,089 INFO L93 Difference]: Finished difference Result 2665 states and 3940 transitions. [2018-11-18 15:03:41,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:41,093 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 159 [2018-11-18 15:03:41,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:41,095 INFO L225 Difference]: With dead ends: 2665 [2018-11-18 15:03:41,096 INFO L226 Difference]: Without dead ends: 1448 [2018-11-18 15:03:41,097 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:41,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states. [2018-11-18 15:03:41,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1243. [2018-11-18 15:03:41,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:41,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1853 transitions. [2018-11-18 15:03:41,136 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1853 transitions. Word has length 159 [2018-11-18 15:03:41,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:41,136 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1853 transitions. [2018-11-18 15:03:41,136 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:41,136 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1853 transitions. [2018-11-18 15:03:41,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-11-18 15:03:41,137 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:41,137 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:41,137 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:41,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:41,138 INFO L82 PathProgramCache]: Analyzing trace with hash 1546459039, now seen corresponding path program 1 times [2018-11-18 15:03:41,138 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:41,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:41,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:41,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:41,139 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:41,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:41,227 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 130 proven. 0 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-18 15:03:41,227 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:41,227 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:41,227 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:41,227 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:41,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:41,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:41,227 INFO L87 Difference]: Start difference. First operand 1243 states and 1853 transitions. Second operand 4 states. [2018-11-18 15:03:41,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:41,477 INFO L93 Difference]: Finished difference Result 2615 states and 3870 transitions. [2018-11-18 15:03:41,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:41,478 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2018-11-18 15:03:41,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:41,480 INFO L225 Difference]: With dead ends: 2615 [2018-11-18 15:03:41,480 INFO L226 Difference]: Without dead ends: 1398 [2018-11-18 15:03:41,481 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:41,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1398 states. [2018-11-18 15:03:41,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1398 to 1243. [2018-11-18 15:03:41,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:41,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1848 transitions. [2018-11-18 15:03:41,517 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1848 transitions. Word has length 160 [2018-11-18 15:03:41,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:41,518 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1848 transitions. [2018-11-18 15:03:41,518 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:41,518 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1848 transitions. [2018-11-18 15:03:41,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-11-18 15:03:41,519 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:41,519 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:41,519 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:41,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:41,520 INFO L82 PathProgramCache]: Analyzing trace with hash 205432077, now seen corresponding path program 1 times [2018-11-18 15:03:41,520 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:41,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:41,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:41,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:41,521 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:41,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:41,594 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 139 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:41,594 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:41,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:41,595 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:41,595 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:41,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:41,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:41,595 INFO L87 Difference]: Start difference. First operand 1243 states and 1848 transitions. Second operand 4 states. [2018-11-18 15:03:41,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:41,842 INFO L93 Difference]: Finished difference Result 2615 states and 3860 transitions. [2018-11-18 15:03:41,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:41,843 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2018-11-18 15:03:41,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:41,845 INFO L225 Difference]: With dead ends: 2615 [2018-11-18 15:03:41,845 INFO L226 Difference]: Without dead ends: 1398 [2018-11-18 15:03:41,846 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:41,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1398 states. [2018-11-18 15:03:41,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1398 to 1243. [2018-11-18 15:03:41,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:41,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1843 transitions. [2018-11-18 15:03:41,883 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1843 transitions. Word has length 160 [2018-11-18 15:03:41,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:41,883 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1843 transitions. [2018-11-18 15:03:41,883 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:41,884 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1843 transitions. [2018-11-18 15:03:41,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-11-18 15:03:41,885 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:41,885 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:41,885 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:41,885 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:41,886 INFO L82 PathProgramCache]: Analyzing trace with hash -1353947547, now seen corresponding path program 1 times [2018-11-18 15:03:41,886 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:41,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:41,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:41,887 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:41,887 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:41,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:41,945 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 149 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:41,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:41,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:41,945 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:41,946 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:41,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:41,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:41,946 INFO L87 Difference]: Start difference. First operand 1243 states and 1843 transitions. Second operand 4 states. [2018-11-18 15:03:42,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:42,426 INFO L93 Difference]: Finished difference Result 2605 states and 3840 transitions. [2018-11-18 15:03:42,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:42,426 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2018-11-18 15:03:42,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:42,429 INFO L225 Difference]: With dead ends: 2605 [2018-11-18 15:03:42,429 INFO L226 Difference]: Without dead ends: 1388 [2018-11-18 15:03:42,431 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:42,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1388 states. [2018-11-18 15:03:42,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1388 to 1243. [2018-11-18 15:03:42,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:42,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1838 transitions. [2018-11-18 15:03:42,494 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1838 transitions. Word has length 160 [2018-11-18 15:03:42,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:42,495 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1838 transitions. [2018-11-18 15:03:42,495 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:42,495 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1838 transitions. [2018-11-18 15:03:42,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-11-18 15:03:42,496 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:42,496 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:42,497 INFO L423 AbstractCegarLoop]: === Iteration 44 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:42,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:42,497 INFO L82 PathProgramCache]: Analyzing trace with hash 879933719, now seen corresponding path program 1 times [2018-11-18 15:03:42,497 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:42,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:42,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:42,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:42,498 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:42,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:42,566 INFO L134 CoverageAnalysis]: Checked inductivity of 183 backedges. 141 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:42,566 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:42,566 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:42,567 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:42,567 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:42,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:42,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:42,570 INFO L87 Difference]: Start difference. First operand 1243 states and 1838 transitions. Second operand 4 states. [2018-11-18 15:03:42,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:42,812 INFO L93 Difference]: Finished difference Result 2595 states and 3815 transitions. [2018-11-18 15:03:42,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:42,813 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 161 [2018-11-18 15:03:42,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:42,815 INFO L225 Difference]: With dead ends: 2595 [2018-11-18 15:03:42,815 INFO L226 Difference]: Without dead ends: 1378 [2018-11-18 15:03:42,817 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:42,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1378 states. [2018-11-18 15:03:42,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1378 to 1243. [2018-11-18 15:03:42,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:42,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1833 transitions. [2018-11-18 15:03:42,893 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1833 transitions. Word has length 161 [2018-11-18 15:03:42,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:42,894 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1833 transitions. [2018-11-18 15:03:42,894 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:42,894 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1833 transitions. [2018-11-18 15:03:42,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-11-18 15:03:42,895 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:42,895 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:42,896 INFO L423 AbstractCegarLoop]: === Iteration 45 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:42,896 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:42,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1332741007, now seen corresponding path program 1 times [2018-11-18 15:03:42,896 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:42,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:42,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:42,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:42,897 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:42,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:42,970 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 151 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:42,970 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:42,971 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:42,971 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:42,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:42,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:42,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:42,971 INFO L87 Difference]: Start difference. First operand 1243 states and 1833 transitions. Second operand 4 states. [2018-11-18 15:03:43,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:43,293 INFO L93 Difference]: Finished difference Result 2580 states and 3785 transitions. [2018-11-18 15:03:43,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:43,295 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 161 [2018-11-18 15:03:43,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:43,297 INFO L225 Difference]: With dead ends: 2580 [2018-11-18 15:03:43,297 INFO L226 Difference]: Without dead ends: 1363 [2018-11-18 15:03:43,299 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:43,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1363 states. [2018-11-18 15:03:43,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1363 to 1243. [2018-11-18 15:03:43,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:43,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1828 transitions. [2018-11-18 15:03:43,368 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1828 transitions. Word has length 161 [2018-11-18 15:03:43,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:43,368 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1828 transitions. [2018-11-18 15:03:43,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:43,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1828 transitions. [2018-11-18 15:03:43,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-11-18 15:03:43,370 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:43,370 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:43,370 INFO L423 AbstractCegarLoop]: === Iteration 46 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:43,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:43,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1351744128, now seen corresponding path program 1 times [2018-11-18 15:03:43,370 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:43,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:43,371 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:43,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:43,371 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:43,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:43,445 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 153 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:43,445 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:43,445 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:43,445 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:43,445 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:43,446 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:43,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:43,446 INFO L87 Difference]: Start difference. First operand 1243 states and 1828 transitions. Second operand 4 states. [2018-11-18 15:03:43,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:43,878 INFO L93 Difference]: Finished difference Result 2580 states and 3775 transitions. [2018-11-18 15:03:43,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:43,878 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 163 [2018-11-18 15:03:43,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:43,880 INFO L225 Difference]: With dead ends: 2580 [2018-11-18 15:03:43,880 INFO L226 Difference]: Without dead ends: 1363 [2018-11-18 15:03:43,881 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:43,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1363 states. [2018-11-18 15:03:43,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1363 to 1243. [2018-11-18 15:03:43,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:43,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1823 transitions. [2018-11-18 15:03:43,922 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1823 transitions. Word has length 163 [2018-11-18 15:03:43,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:43,923 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1823 transitions. [2018-11-18 15:03:43,923 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:43,923 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1823 transitions. [2018-11-18 15:03:43,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-11-18 15:03:43,924 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:43,924 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:43,924 INFO L423 AbstractCegarLoop]: === Iteration 47 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:43,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:43,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1403694513, now seen corresponding path program 1 times [2018-11-18 15:03:43,924 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:43,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:43,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:43,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:43,925 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:43,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:43,998 INFO L134 CoverageAnalysis]: Checked inductivity of 197 backedges. 155 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:43,998 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:43,998 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:43,998 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:43,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:43,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:43,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:43,999 INFO L87 Difference]: Start difference. First operand 1243 states and 1823 transitions. Second operand 4 states. [2018-11-18 15:03:44,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:44,427 INFO L93 Difference]: Finished difference Result 2560 states and 3740 transitions. [2018-11-18 15:03:44,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:44,427 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-11-18 15:03:44,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:44,429 INFO L225 Difference]: With dead ends: 2560 [2018-11-18 15:03:44,429 INFO L226 Difference]: Without dead ends: 1343 [2018-11-18 15:03:44,430 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:44,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1343 states. [2018-11-18 15:03:44,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1343 to 1243. [2018-11-18 15:03:44,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:44,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1818 transitions. [2018-11-18 15:03:44,497 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1818 transitions. Word has length 164 [2018-11-18 15:03:44,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:44,497 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1818 transitions. [2018-11-18 15:03:44,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:44,497 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1818 transitions. [2018-11-18 15:03:44,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-11-18 15:03:44,499 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:44,499 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:44,499 INFO L423 AbstractCegarLoop]: === Iteration 48 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:44,499 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:44,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1217927407, now seen corresponding path program 1 times [2018-11-18 15:03:44,499 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:44,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:44,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:44,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:44,500 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:44,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:44,585 INFO L134 CoverageAnalysis]: Checked inductivity of 199 backedges. 157 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:44,585 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:44,585 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:44,585 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:44,586 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:44,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:44,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:44,586 INFO L87 Difference]: Start difference. First operand 1243 states and 1818 transitions. Second operand 4 states. [2018-11-18 15:03:45,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:45,125 INFO L93 Difference]: Finished difference Result 2560 states and 3730 transitions. [2018-11-18 15:03:45,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:45,126 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-11-18 15:03:45,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:45,127 INFO L225 Difference]: With dead ends: 2560 [2018-11-18 15:03:45,127 INFO L226 Difference]: Without dead ends: 1343 [2018-11-18 15:03:45,128 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:45,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1343 states. [2018-11-18 15:03:45,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1343 to 1243. [2018-11-18 15:03:45,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:45,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1813 transitions. [2018-11-18 15:03:45,168 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1813 transitions. Word has length 164 [2018-11-18 15:03:45,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:45,168 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1813 transitions. [2018-11-18 15:03:45,168 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:45,168 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1813 transitions. [2018-11-18 15:03:45,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2018-11-18 15:03:45,169 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:45,169 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:45,169 INFO L423 AbstractCegarLoop]: === Iteration 49 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:45,169 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:45,170 INFO L82 PathProgramCache]: Analyzing trace with hash -1934578562, now seen corresponding path program 1 times [2018-11-18 15:03:45,170 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:45,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:45,171 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:45,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:45,171 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:45,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:45,231 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 159 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:45,232 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:45,232 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:45,232 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:45,232 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:45,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:45,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:45,232 INFO L87 Difference]: Start difference. First operand 1243 states and 1813 transitions. Second operand 4 states. [2018-11-18 15:03:45,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:45,718 INFO L93 Difference]: Finished difference Result 2550 states and 3710 transitions. [2018-11-18 15:03:45,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:45,718 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 165 [2018-11-18 15:03:45,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:45,719 INFO L225 Difference]: With dead ends: 2550 [2018-11-18 15:03:45,719 INFO L226 Difference]: Without dead ends: 1333 [2018-11-18 15:03:45,721 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:45,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1333 states. [2018-11-18 15:03:45,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1333 to 1243. [2018-11-18 15:03:45,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:45,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1808 transitions. [2018-11-18 15:03:45,760 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1808 transitions. Word has length 165 [2018-11-18 15:03:45,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:45,761 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1808 transitions. [2018-11-18 15:03:45,761 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:45,761 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1808 transitions. [2018-11-18 15:03:45,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-11-18 15:03:45,762 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:45,762 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:45,762 INFO L423 AbstractCegarLoop]: === Iteration 50 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:45,762 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:45,762 INFO L82 PathProgramCache]: Analyzing trace with hash 1805892276, now seen corresponding path program 1 times [2018-11-18 15:03:45,762 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:45,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:45,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:45,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:45,763 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:45,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:45,846 INFO L134 CoverageAnalysis]: Checked inductivity of 203 backedges. 161 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:45,846 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:45,846 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:45,846 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:45,846 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:45,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:45,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:45,847 INFO L87 Difference]: Start difference. First operand 1243 states and 1808 transitions. Second operand 4 states. [2018-11-18 15:03:46,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:46,507 INFO L93 Difference]: Finished difference Result 2550 states and 3700 transitions. [2018-11-18 15:03:46,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:46,507 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 166 [2018-11-18 15:03:46,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:46,508 INFO L225 Difference]: With dead ends: 2550 [2018-11-18 15:03:46,508 INFO L226 Difference]: Without dead ends: 1333 [2018-11-18 15:03:46,509 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:46,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1333 states. [2018-11-18 15:03:46,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1333 to 1243. [2018-11-18 15:03:46,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:46,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1803 transitions. [2018-11-18 15:03:46,548 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1803 transitions. Word has length 166 [2018-11-18 15:03:46,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:46,549 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1803 transitions. [2018-11-18 15:03:46,549 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:46,549 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1803 transitions. [2018-11-18 15:03:46,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-11-18 15:03:46,550 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:46,550 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:46,551 INFO L423 AbstractCegarLoop]: === Iteration 51 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:46,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:46,551 INFO L82 PathProgramCache]: Analyzing trace with hash -268400861, now seen corresponding path program 1 times [2018-11-18 15:03:46,551 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:46,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:46,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:46,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:46,552 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:46,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:46,629 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 163 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:46,629 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:46,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:46,629 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:46,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:46,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:46,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:46,629 INFO L87 Difference]: Start difference. First operand 1243 states and 1803 transitions. Second operand 4 states. [2018-11-18 15:03:46,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:46,984 INFO L93 Difference]: Finished difference Result 2540 states and 3680 transitions. [2018-11-18 15:03:46,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:46,984 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 167 [2018-11-18 15:03:46,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:46,986 INFO L225 Difference]: With dead ends: 2540 [2018-11-18 15:03:46,986 INFO L226 Difference]: Without dead ends: 1323 [2018-11-18 15:03:46,987 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:46,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1323 states. [2018-11-18 15:03:47,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1323 to 1243. [2018-11-18 15:03:47,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:47,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1798 transitions. [2018-11-18 15:03:47,027 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1798 transitions. Word has length 167 [2018-11-18 15:03:47,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:47,027 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1798 transitions. [2018-11-18 15:03:47,027 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:47,027 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1798 transitions. [2018-11-18 15:03:47,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-11-18 15:03:47,029 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:47,030 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:47,030 INFO L423 AbstractCegarLoop]: === Iteration 52 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:47,030 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:47,030 INFO L82 PathProgramCache]: Analyzing trace with hash 1265140919, now seen corresponding path program 1 times [2018-11-18 15:03:47,030 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:47,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:47,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:47,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:47,031 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:47,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:47,088 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 193 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 15:03:47,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:47,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:47,088 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:47,088 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:47,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:47,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:47,089 INFO L87 Difference]: Start difference. First operand 1243 states and 1798 transitions. Second operand 4 states. [2018-11-18 15:03:47,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:47,412 INFO L93 Difference]: Finished difference Result 2540 states and 3670 transitions. [2018-11-18 15:03:47,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:47,412 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 172 [2018-11-18 15:03:47,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:47,414 INFO L225 Difference]: With dead ends: 2540 [2018-11-18 15:03:47,414 INFO L226 Difference]: Without dead ends: 1323 [2018-11-18 15:03:47,415 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:47,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1323 states. [2018-11-18 15:03:47,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1323 to 1243. [2018-11-18 15:03:47,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:47,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1793 transitions. [2018-11-18 15:03:47,456 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1793 transitions. Word has length 172 [2018-11-18 15:03:47,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:47,456 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1793 transitions. [2018-11-18 15:03:47,456 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:47,456 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1793 transitions. [2018-11-18 15:03:47,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-11-18 15:03:47,457 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:47,457 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:47,457 INFO L423 AbstractCegarLoop]: === Iteration 53 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:47,457 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:47,458 INFO L82 PathProgramCache]: Analyzing trace with hash 1573155910, now seen corresponding path program 1 times [2018-11-18 15:03:47,458 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:47,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:47,458 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:47,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:47,458 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:47,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:47,502 INFO L134 CoverageAnalysis]: Checked inductivity of 257 backedges. 197 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 15:03:47,502 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:47,502 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:47,502 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:47,502 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:47,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:47,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:47,502 INFO L87 Difference]: Start difference. First operand 1243 states and 1793 transitions. Second operand 4 states. [2018-11-18 15:03:48,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:48,111 INFO L93 Difference]: Finished difference Result 2540 states and 3660 transitions. [2018-11-18 15:03:48,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:48,111 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 173 [2018-11-18 15:03:48,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:48,112 INFO L225 Difference]: With dead ends: 2540 [2018-11-18 15:03:48,112 INFO L226 Difference]: Without dead ends: 1323 [2018-11-18 15:03:48,114 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:48,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1323 states. [2018-11-18 15:03:48,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1323 to 1243. [2018-11-18 15:03:48,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:48,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1788 transitions. [2018-11-18 15:03:48,153 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1788 transitions. Word has length 173 [2018-11-18 15:03:48,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:48,154 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1788 transitions. [2018-11-18 15:03:48,154 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:48,154 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1788 transitions. [2018-11-18 15:03:48,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-11-18 15:03:48,155 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:48,155 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:48,155 INFO L423 AbstractCegarLoop]: === Iteration 54 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:48,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:48,155 INFO L82 PathProgramCache]: Analyzing trace with hash 463720092, now seen corresponding path program 1 times [2018-11-18 15:03:48,155 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:48,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:48,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:48,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:48,156 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:48,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:48,209 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 201 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 15:03:48,209 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:48,209 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:48,209 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:48,210 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:48,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:48,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:48,210 INFO L87 Difference]: Start difference. First operand 1243 states and 1788 transitions. Second operand 4 states. [2018-11-18 15:03:48,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:48,667 INFO L93 Difference]: Finished difference Result 2525 states and 3633 transitions. [2018-11-18 15:03:48,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:48,667 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 174 [2018-11-18 15:03:48,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:48,668 INFO L225 Difference]: With dead ends: 2525 [2018-11-18 15:03:48,668 INFO L226 Difference]: Without dead ends: 1308 [2018-11-18 15:03:48,669 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:48,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1308 states. [2018-11-18 15:03:48,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1308 to 1243. [2018-11-18 15:03:48,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 15:03:48,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1783 transitions. [2018-11-18 15:03:48,713 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1783 transitions. Word has length 174 [2018-11-18 15:03:48,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:48,713 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1783 transitions. [2018-11-18 15:03:48,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:48,713 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1783 transitions. [2018-11-18 15:03:48,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 15:03:48,714 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:48,714 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:48,714 INFO L423 AbstractCegarLoop]: === Iteration 55 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:48,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:48,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1721971004, now seen corresponding path program 1 times [2018-11-18 15:03:48,715 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:48,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:48,716 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:48,716 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:48,716 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:48,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:49,031 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 15 proven. 152 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:49,031 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:03:49,031 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 15:03:49,032 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 176 with the following transitions: [2018-11-18 15:03:49,033 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [188], [190], [195], [198], [200], [205], [208], [279], [282], [290], [292], [295], [303], [306], [310], [490], [493], [509], [514], [517], [525], [530], [532], [535], [553], [556], [560], [581], [615], [617], [629], [632], [633], [634], [636] [2018-11-18 15:03:49,059 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 15:03:49,059 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 15:03:49,666 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 15:03:49,667 INFO L272 AbstractInterpreter]: Visited 77 different actions 240 times. Merged at 55 different actions 151 times. Never widened. Performed 1675 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1675 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 8 fixpoints after 7 different actions. Largest state had 118 variables. [2018-11-18 15:03:49,681 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:49,682 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 15:03:49,682 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:03:49,682 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 15:03:49,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:49,708 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 15:03:49,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:49,809 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:03:49,877 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-11-18 15:03:49,910 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,911 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 44 [2018-11-18 15:03:49,942 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,945 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,946 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,948 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-11-18 15:03:49,949 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:49,959 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:49,967 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:49,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 15:03:49,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 15:03:49,991 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:49,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 15:03:49,997 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,001 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,002 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,003 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 7 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 68 [2018-11-18 15:03:50,005 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,016 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,020 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,025 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,037 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:57, output treesize:79 [2018-11-18 15:03:50,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 125 [2018-11-18 15:03:50,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2018-11-18 15:03:50,129 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-18 15:03:50,157 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-11-18 15:03:50,175 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,180 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,190 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:128, output treesize:106 [2018-11-18 15:03:50,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:03:50,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:03:50,273 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,281 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,303 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,303 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:115 [2018-11-18 15:03:50,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 113 [2018-11-18 15:03:50,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 15:03:50,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 9 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 68 [2018-11-18 15:03:50,361 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,371 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-11-18 15:03:50,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-18 15:03:50,382 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,387 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-11-18 15:03:50,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-18 15:03:50,395 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,397 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,402 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:146, output treesize:23 [2018-11-18 15:03:50,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 15:03:50,427 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,428 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:03:50,429 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,436 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:32 [2018-11-18 15:03:50,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-11-18 15:03:50,501 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,505 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:50,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-18 15:03:50,506 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 15:03:50,513 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,521 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,524 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,524 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:41, output treesize:3 [2018-11-18 15:03:50,717 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 67 proven. 100 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:50,717 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:03:50,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 15:03:50,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 15:03:50,787 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,791 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,797 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 15:03:50,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-18 15:03:50,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-18 15:03:50,847 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-11-18 15:03:50,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-18 15:03:50,856 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,858 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:50,865 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:52, output treesize:10 [2018-11-18 15:03:50,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 15:03:50,905 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:03:50,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 52 [2018-11-18 15:03:50,907 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,921 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:50,926 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:44 [2018-11-18 15:03:51,116 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 0 proven. 167 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:03:51,136 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 15:03:51,136 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 9] total 23 [2018-11-18 15:03:51,136 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 15:03:51,137 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 15:03:51,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 15:03:51,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=433, Unknown=0, NotChecked=0, Total=506 [2018-11-18 15:03:51,138 INFO L87 Difference]: Start difference. First operand 1243 states and 1783 transitions. Second operand 17 states. [2018-11-18 15:03:55,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:55,672 INFO L93 Difference]: Finished difference Result 6407 states and 9483 transitions. [2018-11-18 15:03:55,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-18 15:03:55,672 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 175 [2018-11-18 15:03:55,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:55,680 INFO L225 Difference]: With dead ends: 6407 [2018-11-18 15:03:55,681 INFO L226 Difference]: Without dead ends: 5190 [2018-11-18 15:03:55,684 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 335 SyntacticMatches, 5 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 297 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=384, Invalid=1422, Unknown=0, NotChecked=0, Total=1806 [2018-11-18 15:03:55,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5190 states. [2018-11-18 15:03:55,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5190 to 1408. [2018-11-18 15:03:55,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1408 states. [2018-11-18 15:03:55,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1408 states to 1408 states and 2078 transitions. [2018-11-18 15:03:55,841 INFO L78 Accepts]: Start accepts. Automaton has 1408 states and 2078 transitions. Word has length 175 [2018-11-18 15:03:55,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:55,842 INFO L480 AbstractCegarLoop]: Abstraction has 1408 states and 2078 transitions. [2018-11-18 15:03:55,842 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 15:03:55,842 INFO L276 IsEmpty]: Start isEmpty. Operand 1408 states and 2078 transitions. [2018-11-18 15:03:55,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-11-18 15:03:55,845 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:55,845 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:55,845 INFO L423 AbstractCegarLoop]: === Iteration 56 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:55,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:55,846 INFO L82 PathProgramCache]: Analyzing trace with hash 333800040, now seen corresponding path program 1 times [2018-11-18 15:03:55,846 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:55,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:55,847 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:55,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:55,847 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:55,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:55,915 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 168 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 15:03:55,915 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:55,915 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:55,915 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:55,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:55,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:55,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:55,916 INFO L87 Difference]: Start difference. First operand 1408 states and 2078 transitions. Second operand 4 states. [2018-11-18 15:03:56,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:56,246 INFO L93 Difference]: Finished difference Result 3160 states and 4683 transitions. [2018-11-18 15:03:56,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:56,246 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 184 [2018-11-18 15:03:56,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:56,249 INFO L225 Difference]: With dead ends: 3160 [2018-11-18 15:03:56,249 INFO L226 Difference]: Without dead ends: 1778 [2018-11-18 15:03:56,252 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:56,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1778 states. [2018-11-18 15:03:56,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1778 to 1553. [2018-11-18 15:03:56,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1553 states. [2018-11-18 15:03:56,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1553 states to 1553 states and 2333 transitions. [2018-11-18 15:03:56,405 INFO L78 Accepts]: Start accepts. Automaton has 1553 states and 2333 transitions. Word has length 184 [2018-11-18 15:03:56,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:56,405 INFO L480 AbstractCegarLoop]: Abstraction has 1553 states and 2333 transitions. [2018-11-18 15:03:56,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:56,406 INFO L276 IsEmpty]: Start isEmpty. Operand 1553 states and 2333 transitions. [2018-11-18 15:03:56,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-11-18 15:03:56,408 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:56,408 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:56,408 INFO L423 AbstractCegarLoop]: === Iteration 57 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:56,408 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:56,409 INFO L82 PathProgramCache]: Analyzing trace with hash 330595703, now seen corresponding path program 1 times [2018-11-18 15:03:56,409 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:56,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:56,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:56,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:56,410 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:56,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:56,484 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-11-18 15:03:56,484 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:56,485 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:56,485 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:56,485 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:56,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:56,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:56,485 INFO L87 Difference]: Start difference. First operand 1553 states and 2333 transitions. Second operand 4 states. [2018-11-18 15:03:56,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:56,866 INFO L93 Difference]: Finished difference Result 3662 states and 5501 transitions. [2018-11-18 15:03:56,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:56,866 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 190 [2018-11-18 15:03:56,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:56,869 INFO L225 Difference]: With dead ends: 3662 [2018-11-18 15:03:56,869 INFO L226 Difference]: Without dead ends: 2135 [2018-11-18 15:03:56,871 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:56,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2135 states. [2018-11-18 15:03:56,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2135 to 1753. [2018-11-18 15:03:56,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1753 states. [2018-11-18 15:03:56,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1753 states to 1753 states and 2698 transitions. [2018-11-18 15:03:56,955 INFO L78 Accepts]: Start accepts. Automaton has 1753 states and 2698 transitions. Word has length 190 [2018-11-18 15:03:56,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:56,955 INFO L480 AbstractCegarLoop]: Abstraction has 1753 states and 2698 transitions. [2018-11-18 15:03:56,955 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:56,955 INFO L276 IsEmpty]: Start isEmpty. Operand 1753 states and 2698 transitions. [2018-11-18 15:03:56,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 15:03:56,958 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:56,958 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:56,958 INFO L423 AbstractCegarLoop]: === Iteration 58 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:56,958 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:56,958 INFO L82 PathProgramCache]: Analyzing trace with hash -94352743, now seen corresponding path program 1 times [2018-11-18 15:03:56,958 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:56,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:56,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:56,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:56,959 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:56,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:57,178 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 130 proven. 7 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 15:03:57,178 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:03:57,178 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 15:03:57,178 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 192 with the following transitions: [2018-11-18 15:03:57,178 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [53], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [188], [190], [195], [198], [200], [205], [208], [225], [228], [232], [236], [251], [257], [260], [265], [279], [282], [290], [292], [295], [303], [306], [310], [490], [493], [509], [514], [517], [525], [530], [532], [535], [553], [556], [560], [581], [615], [617], [629], [632], [633], [634], [636] [2018-11-18 15:03:57,182 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 15:03:57,182 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 15:03:57,411 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 15:03:57,411 INFO L272 AbstractInterpreter]: Visited 86 different actions 212 times. Merged at 59 different actions 116 times. Never widened. Performed 1413 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1413 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 8 fixpoints after 6 different actions. Largest state had 125 variables. [2018-11-18 15:03:57,421 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:57,421 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 15:03:57,421 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:03:57,421 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 15:03:57,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:57,438 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 15:03:57,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:57,509 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:03:57,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 66 [2018-11-18 15:03:57,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 24 [2018-11-18 15:03:57,541 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,545 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 74 [2018-11-18 15:03:57,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 58 [2018-11-18 15:03:57,549 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,555 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 78 [2018-11-18 15:03:57,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 53 [2018-11-18 15:03:57,560 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,565 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-11-18 15:03:57,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 48 [2018-11-18 15:03:57,595 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,601 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 15:03:57,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 13 [2018-11-18 15:03:57,605 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,608 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-11-18 15:03:57,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 41 [2018-11-18 15:03:57,614 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,623 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:03:57,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 53 [2018-11-18 15:03:57,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-18 15:03:57,663 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,694 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 48 [2018-11-18 15:03:57,696 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,724 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 47 [2018-11-18 15:03:57,727 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,729 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 35 [2018-11-18 15:03:57,730 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,734 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,776 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 61 [2018-11-18 15:03:57,787 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 37 [2018-11-18 15:03:57,788 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,802 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,804 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 44 [2018-11-18 15:03:57,805 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,813 INFO L267 ElimStorePlain]: Start of recursive call 19: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 15:03:57,824 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 36 [2018-11-18 15:03:57,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:03:57,830 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,837 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-11-18 15:03:57,840 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:57,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 18 [2018-11-18 15:03:57,840 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,843 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,845 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:03:57,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:03:57,855 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,856 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 15:03:57,865 INFO L202 ElimStorePlain]: Needed 27 recursive calls to eliminate 3 variables, input treesize:81, output treesize:19 [2018-11-18 15:03:57,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:03:57,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 15:03:57,910 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,912 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,914 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:57,915 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 15:03:57,950 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 15:03:57,950 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:03:57,983 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 15:03:58,000 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:03:58,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 5] imperfect sequences [9] total 13 [2018-11-18 15:03:58,000 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:58,000 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 15:03:58,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 15:03:58,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-18 15:03:58,000 INFO L87 Difference]: Start difference. First operand 1753 states and 2698 transitions. Second operand 6 states. [2018-11-18 15:03:58,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:58,511 INFO L93 Difference]: Finished difference Result 4077 states and 6248 transitions. [2018-11-18 15:03:58,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 15:03:58,511 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 191 [2018-11-18 15:03:58,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:58,514 INFO L225 Difference]: With dead ends: 4077 [2018-11-18 15:03:58,514 INFO L226 Difference]: Without dead ends: 2350 [2018-11-18 15:03:58,516 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 398 GetRequests, 377 SyntacticMatches, 9 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:03:58,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2350 states. [2018-11-18 15:03:58,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2350 to 1753. [2018-11-18 15:03:58,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1753 states. [2018-11-18 15:03:58,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1753 states to 1753 states and 2698 transitions. [2018-11-18 15:03:58,602 INFO L78 Accepts]: Start accepts. Automaton has 1753 states and 2698 transitions. Word has length 191 [2018-11-18 15:03:58,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:58,603 INFO L480 AbstractCegarLoop]: Abstraction has 1753 states and 2698 transitions. [2018-11-18 15:03:58,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 15:03:58,603 INFO L276 IsEmpty]: Start isEmpty. Operand 1753 states and 2698 transitions. [2018-11-18 15:03:58,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 15:03:58,605 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:58,605 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:58,605 INFO L423 AbstractCegarLoop]: === Iteration 59 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:58,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:58,605 INFO L82 PathProgramCache]: Analyzing trace with hash 1651524846, now seen corresponding path program 1 times [2018-11-18 15:03:58,605 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:58,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:58,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:58,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:58,606 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:58,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:58,678 INFO L134 CoverageAnalysis]: Checked inductivity of 278 backedges. 116 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-11-18 15:03:58,679 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:03:58,679 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:03:58,679 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:03:58,679 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:03:58,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:03:58,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:03:58,679 INFO L87 Difference]: Start difference. First operand 1753 states and 2698 transitions. Second operand 4 states. [2018-11-18 15:03:59,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:03:59,031 INFO L93 Difference]: Finished difference Result 4040 states and 6199 transitions. [2018-11-18 15:03:59,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:03:59,031 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 191 [2018-11-18 15:03:59,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:03:59,034 INFO L225 Difference]: With dead ends: 4040 [2018-11-18 15:03:59,034 INFO L226 Difference]: Without dead ends: 2313 [2018-11-18 15:03:59,036 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:03:59,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2313 states. [2018-11-18 15:03:59,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2313 to 1948. [2018-11-18 15:03:59,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:03:59,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3058 transitions. [2018-11-18 15:03:59,124 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3058 transitions. Word has length 191 [2018-11-18 15:03:59,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:03:59,125 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3058 transitions. [2018-11-18 15:03:59,125 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:03:59,125 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3058 transitions. [2018-11-18 15:03:59,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-11-18 15:03:59,127 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:03:59,127 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:03:59,127 INFO L423 AbstractCegarLoop]: === Iteration 60 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:03:59,127 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:59,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1363024908, now seen corresponding path program 1 times [2018-11-18 15:03:59,128 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:03:59,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:59,128 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:59,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:03:59,129 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:03:59,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:59,372 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 132 proven. 7 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 15:03:59,372 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:03:59,372 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 15:03:59,373 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 193 with the following transitions: [2018-11-18 15:03:59,373 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [53], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [190], [193], [195], [198], [200], [205], [208], [225], [228], [232], [236], [251], [257], [260], [265], [279], [282], [290], [292], [295], [303], [306], [310], [490], [493], [509], [514], [517], [525], [530], [532], [535], [553], [556], [560], [581], [615], [617], [629], [632], [633], [634], [636] [2018-11-18 15:03:59,377 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 15:03:59,377 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 15:03:59,639 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 15:03:59,639 INFO L272 AbstractInterpreter]: Visited 86 different actions 279 times. Merged at 64 different actions 178 times. Never widened. Performed 1686 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1686 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 12 fixpoints after 9 different actions. Largest state had 125 variables. [2018-11-18 15:03:59,653 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:03:59,653 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 15:03:59,653 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:03:59,653 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 15:03:59,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:03:59,675 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 15:03:59,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:03:59,744 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:03:59,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 72 [2018-11-18 15:03:59,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:03:59,794 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,803 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 80 [2018-11-18 15:03:59,809 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 30 [2018-11-18 15:03:59,811 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,813 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,816 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 62 [2018-11-18 15:03:59,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:03:59,820 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,833 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 53 [2018-11-18 15:03:59,835 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:03:59,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 35 [2018-11-18 15:03:59,836 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,839 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,843 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 84 treesize of output 101 [2018-11-18 15:03:59,869 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 90 [2018-11-18 15:03:59,870 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 83 [2018-11-18 15:03:59,902 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,933 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,934 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 82 treesize of output 137 [2018-11-18 15:03:59,947 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,949 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 125 [2018-11-18 15:03:59,951 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,971 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,972 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:03:59,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 80 [2018-11-18 15:03:59,974 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-18 15:03:59,984 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 15:04:00,016 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:00,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 73 treesize of output 109 [2018-11-18 15:04:00,042 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:00,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61 [2018-11-18 15:04:00,043 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,058 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:00,060 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:00,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 80 [2018-11-18 15:04:00,062 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,071 INFO L267 ElimStorePlain]: Start of recursive call 16: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 15:04:00,082 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-11-18 15:04:00,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-11-18 15:04:00,096 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,099 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-11-18 15:04:00,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2018-11-18 15:04:00,102 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,103 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-11-18 15:04:00,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 9 [2018-11-18 15:04:00,112 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,113 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 15:04:00,116 INFO L202 ElimStorePlain]: Needed 24 recursive calls to eliminate 3 variables, input treesize:81, output treesize:19 [2018-11-18 15:04:00,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:04:00,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 15:04:00,155 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,158 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:00,161 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 15:04:00,192 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 15:04:00,192 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:04:00,220 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 15:04:00,236 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:04:00,236 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 5] imperfect sequences [9] total 13 [2018-11-18 15:04:00,236 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:00,236 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 15:04:00,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 15:04:00,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-18 15:04:00,236 INFO L87 Difference]: Start difference. First operand 1948 states and 3058 transitions. Second operand 6 states. [2018-11-18 15:04:00,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:00,753 INFO L93 Difference]: Finished difference Result 4245 states and 6571 transitions. [2018-11-18 15:04:00,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 15:04:00,753 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 192 [2018-11-18 15:04:00,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:00,755 INFO L225 Difference]: With dead ends: 4245 [2018-11-18 15:04:00,755 INFO L226 Difference]: Without dead ends: 2323 [2018-11-18 15:04:00,757 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 379 SyntacticMatches, 9 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:04:00,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2323 states. [2018-11-18 15:04:00,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2323 to 1748. [2018-11-18 15:04:00,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1748 states. [2018-11-18 15:04:00,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 2693 transitions. [2018-11-18 15:04:00,886 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 2693 transitions. Word has length 192 [2018-11-18 15:04:00,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:00,886 INFO L480 AbstractCegarLoop]: Abstraction has 1748 states and 2693 transitions. [2018-11-18 15:04:00,886 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 15:04:00,886 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 2693 transitions. [2018-11-18 15:04:00,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 15:04:00,888 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:00,888 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:00,889 INFO L423 AbstractCegarLoop]: === Iteration 61 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:00,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:00,889 INFO L82 PathProgramCache]: Analyzing trace with hash 272130278, now seen corresponding path program 1 times [2018-11-18 15:04:00,889 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:00,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:00,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:00,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:00,890 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:00,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:01,016 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2018-11-18 15:04:01,016 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:04:01,016 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 15:04:01,017 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 199 with the following transitions: [2018-11-18 15:04:01,017 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [188], [190], [195], [198], [200], [205], [208], [279], [282], [290], [292], [295], [297], [303], [306], [310], [490], [493], [509], [514], [517], [525], [530], [532], [535], [553], [556], [560], [581], [615], [617], [629], [632], [633], [634], [636] [2018-11-18 15:04:01,019 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 15:04:01,019 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 15:04:01,348 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 15:04:01,348 INFO L272 AbstractInterpreter]: Visited 78 different actions 240 times. Merged at 54 different actions 148 times. Never widened. Performed 1672 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1672 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 12 fixpoints after 11 different actions. Largest state had 118 variables. [2018-11-18 15:04:01,352 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:01,352 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 15:04:01,352 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:04:01,352 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 15:04:01,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:01,367 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 15:04:01,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:01,458 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:01,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-11-18 15:04:01,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-11-18 15:04:01,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,522 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:4 [2018-11-18 15:04:01,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:04:01,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:04:01,534 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,537 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,542 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,542 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 15:04:01,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-18 15:04:01,556 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:01,567 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:01,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:04:01,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,591 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,596 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,596 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:19 [2018-11-18 15:04:01,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-11-18 15:04:01,629 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:01,631 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:01,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-18 15:04:01,632 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,638 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,640 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:01,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:3 [2018-11-18 15:04:01,683 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2018-11-18 15:04:01,683 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:04:01,720 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-11-18 15:04:01,745 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 15:04:01,745 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 8] total 9 [2018-11-18 15:04:01,746 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:01,746 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:01,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:01,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:04:01,746 INFO L87 Difference]: Start difference. First operand 1748 states and 2693 transitions. Second operand 4 states. [2018-11-18 15:04:02,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:02,123 INFO L93 Difference]: Finished difference Result 4292 states and 6631 transitions. [2018-11-18 15:04:02,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:02,123 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 198 [2018-11-18 15:04:02,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:02,125 INFO L225 Difference]: With dead ends: 4292 [2018-11-18 15:04:02,125 INFO L226 Difference]: Without dead ends: 2570 [2018-11-18 15:04:02,127 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 390 SyntacticMatches, 7 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-18 15:04:02,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2570 states. [2018-11-18 15:04:02,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2570 to 1948. [2018-11-18 15:04:02,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:02,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3058 transitions. [2018-11-18 15:04:02,213 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3058 transitions. Word has length 198 [2018-11-18 15:04:02,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:02,214 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3058 transitions. [2018-11-18 15:04:02,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:02,214 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3058 transitions. [2018-11-18 15:04:02,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 15:04:02,215 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:02,215 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:02,215 INFO L423 AbstractCegarLoop]: === Iteration 62 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:02,216 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:02,216 INFO L82 PathProgramCache]: Analyzing trace with hash -160903329, now seen corresponding path program 1 times [2018-11-18 15:04:02,216 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:02,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:02,216 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:02,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:02,216 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:02,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:02,315 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 120 proven. 3 refuted. 0 times theorem prover too weak. 177 trivial. 0 not checked. [2018-11-18 15:04:02,315 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:04:02,315 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 15:04:02,315 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 200 with the following transitions: [2018-11-18 15:04:02,316 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [190], [193], [195], [198], [200], [205], [208], [279], [282], [290], [292], [295], [297], [303], [306], [310], [490], [493], [509], [514], [517], [525], [530], [532], [535], [553], [556], [560], [581], [615], [617], [629], [632], [633], [634], [636] [2018-11-18 15:04:02,318 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 15:04:02,318 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 15:04:02,666 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 15:04:02,667 INFO L272 AbstractInterpreter]: Visited 78 different actions 244 times. Merged at 55 different actions 152 times. Never widened. Performed 1501 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1501 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 12 fixpoints after 11 different actions. Largest state had 118 variables. [2018-11-18 15:04:02,673 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:02,674 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 15:04:02,674 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:04:02,674 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 15:04:02,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:02,694 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 15:04:02,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:02,764 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:02,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-11-18 15:04:02,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-11-18 15:04:02,768 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,777 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,778 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,778 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:4 [2018-11-18 15:04:02,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:04:02,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:04:02,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,793 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,794 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 15:04:02,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-18 15:04:02,802 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:02,803 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:02,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:04:02,804 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,808 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,810 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,810 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:19 [2018-11-18 15:04:02,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-11-18 15:04:02,821 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:02,821 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:02,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-18 15:04:02,822 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,826 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:3 [2018-11-18 15:04:02,851 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 120 proven. 3 refuted. 0 times theorem prover too weak. 177 trivial. 0 not checked. [2018-11-18 15:04:02,851 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:04:02,862 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:04:02,862 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:02,862 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:1 [2018-11-18 15:04:02,886 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-11-18 15:04:02,902 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 15:04:02,902 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 7] total 9 [2018-11-18 15:04:02,902 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:02,902 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:02,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:02,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:04:02,903 INFO L87 Difference]: Start difference. First operand 1948 states and 3058 transitions. Second operand 4 states. [2018-11-18 15:04:03,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:03,250 INFO L93 Difference]: Finished difference Result 4522 states and 7061 transitions. [2018-11-18 15:04:03,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:03,250 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 15:04:03,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:03,253 INFO L225 Difference]: With dead ends: 4522 [2018-11-18 15:04:03,253 INFO L226 Difference]: Without dead ends: 2600 [2018-11-18 15:04:03,255 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 393 SyntacticMatches, 5 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-18 15:04:03,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2600 states. [2018-11-18 15:04:03,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2600 to 1948. [2018-11-18 15:04:03,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:03,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3063 transitions. [2018-11-18 15:04:03,344 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3063 transitions. Word has length 199 [2018-11-18 15:04:03,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:03,344 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3063 transitions. [2018-11-18 15:04:03,344 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:03,344 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3063 transitions. [2018-11-18 15:04:03,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 15:04:03,346 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:03,346 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:03,346 INFO L423 AbstractCegarLoop]: === Iteration 63 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:03,346 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:03,346 INFO L82 PathProgramCache]: Analyzing trace with hash -364812927, now seen corresponding path program 1 times [2018-11-18 15:04:03,346 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:03,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:03,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:03,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:03,347 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:03,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:03,429 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 225 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:04:03,429 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:03,429 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:04:03,429 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:03,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:03,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:03,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:04:03,430 INFO L87 Difference]: Start difference. First operand 1948 states and 3063 transitions. Second operand 4 states. [2018-11-18 15:04:03,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:03,727 INFO L93 Difference]: Finished difference Result 4090 states and 6388 transitions. [2018-11-18 15:04:03,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:03,728 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 15:04:03,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:03,730 INFO L225 Difference]: With dead ends: 4090 [2018-11-18 15:04:03,730 INFO L226 Difference]: Without dead ends: 2168 [2018-11-18 15:04:03,732 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:04:03,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2168 states. [2018-11-18 15:04:03,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2168 to 1948. [2018-11-18 15:04:03,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:03,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3058 transitions. [2018-11-18 15:04:03,824 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3058 transitions. Word has length 199 [2018-11-18 15:04:03,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:03,824 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3058 transitions. [2018-11-18 15:04:03,824 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:03,824 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3058 transitions. [2018-11-18 15:04:03,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-11-18 15:04:03,826 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:03,826 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:03,827 INFO L423 AbstractCegarLoop]: === Iteration 64 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:03,827 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:03,827 INFO L82 PathProgramCache]: Analyzing trace with hash 1303710525, now seen corresponding path program 1 times [2018-11-18 15:04:03,827 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:03,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:03,827 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:03,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:03,828 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:03,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:03,909 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 189 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:04:03,909 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:03,909 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:04:03,909 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:03,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:03,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:03,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:04:03,910 INFO L87 Difference]: Start difference. First operand 1948 states and 3058 transitions. Second operand 4 states. [2018-11-18 15:04:04,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:04,293 INFO L93 Difference]: Finished difference Result 4090 states and 6378 transitions. [2018-11-18 15:04:04,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:04,293 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 200 [2018-11-18 15:04:04,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:04,296 INFO L225 Difference]: With dead ends: 4090 [2018-11-18 15:04:04,296 INFO L226 Difference]: Without dead ends: 2168 [2018-11-18 15:04:04,298 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:04:04,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2168 states. [2018-11-18 15:04:04,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2168 to 1948. [2018-11-18 15:04:04,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:04,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3053 transitions. [2018-11-18 15:04:04,412 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3053 transitions. Word has length 200 [2018-11-18 15:04:04,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:04,412 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3053 transitions. [2018-11-18 15:04:04,412 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:04,412 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3053 transitions. [2018-11-18 15:04:04,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-18 15:04:04,413 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:04,414 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:04,414 INFO L423 AbstractCegarLoop]: === Iteration 65 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:04,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:04,414 INFO L82 PathProgramCache]: Analyzing trace with hash 1231818341, now seen corresponding path program 1 times [2018-11-18 15:04:04,414 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:04,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:04,414 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:04,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:04,415 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:04,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:04,494 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 195 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:04:04,495 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:04,495 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:04:04,495 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:04,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:04,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:04,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:04:04,496 INFO L87 Difference]: Start difference. First operand 1948 states and 3053 transitions. Second operand 4 states. [2018-11-18 15:04:04,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:04,986 INFO L93 Difference]: Finished difference Result 4090 states and 6368 transitions. [2018-11-18 15:04:04,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:04,987 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 201 [2018-11-18 15:04:04,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:04,988 INFO L225 Difference]: With dead ends: 4090 [2018-11-18 15:04:04,988 INFO L226 Difference]: Without dead ends: 2168 [2018-11-18 15:04:04,990 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:04:04,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2168 states. [2018-11-18 15:04:05,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2168 to 1948. [2018-11-18 15:04:05,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:05,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3048 transitions. [2018-11-18 15:04:05,081 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3048 transitions. Word has length 201 [2018-11-18 15:04:05,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:05,081 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3048 transitions. [2018-11-18 15:04:05,081 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:05,081 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3048 transitions. [2018-11-18 15:04:05,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-11-18 15:04:05,082 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:05,083 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:05,083 INFO L423 AbstractCegarLoop]: === Iteration 66 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:05,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:05,083 INFO L82 PathProgramCache]: Analyzing trace with hash -315046270, now seen corresponding path program 1 times [2018-11-18 15:04:05,083 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:05,083 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:05,083 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:05,083 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:05,084 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:05,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:05,172 INFO L134 CoverageAnalysis]: Checked inductivity of 317 backedges. 201 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:04:05,173 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:05,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:04:05,173 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:05,173 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:05,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:05,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:04:05,173 INFO L87 Difference]: Start difference. First operand 1948 states and 3048 transitions. Second operand 4 states. [2018-11-18 15:04:05,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:05,453 INFO L93 Difference]: Finished difference Result 4090 states and 6358 transitions. [2018-11-18 15:04:05,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:05,453 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 202 [2018-11-18 15:04:05,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:05,455 INFO L225 Difference]: With dead ends: 4090 [2018-11-18 15:04:05,455 INFO L226 Difference]: Without dead ends: 2168 [2018-11-18 15:04:05,457 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:04:05,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2168 states. [2018-11-18 15:04:05,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2168 to 1948. [2018-11-18 15:04:05,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:05,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3043 transitions. [2018-11-18 15:04:05,554 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3043 transitions. Word has length 202 [2018-11-18 15:04:05,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:05,555 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3043 transitions. [2018-11-18 15:04:05,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:05,555 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3043 transitions. [2018-11-18 15:04:05,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-11-18 15:04:05,556 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:05,556 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:05,556 INFO L423 AbstractCegarLoop]: === Iteration 67 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:05,557 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:05,557 INFO L82 PathProgramCache]: Analyzing trace with hash -341415862, now seen corresponding path program 1 times [2018-11-18 15:04:05,557 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:05,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:05,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:05,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:05,558 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:05,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:05,632 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 207 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:04:05,632 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:05,632 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:04:05,632 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 15:04:05,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:04:05,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:04:05,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:04:05,633 INFO L87 Difference]: Start difference. First operand 1948 states and 3043 transitions. Second operand 4 states. [2018-11-18 15:04:05,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:05,947 INFO L93 Difference]: Finished difference Result 4040 states and 6283 transitions. [2018-11-18 15:04:05,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:04:05,948 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 203 [2018-11-18 15:04:05,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:05,951 INFO L225 Difference]: With dead ends: 4040 [2018-11-18 15:04:05,951 INFO L226 Difference]: Without dead ends: 2118 [2018-11-18 15:04:05,953 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:04:05,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2118 states. [2018-11-18 15:04:06,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2118 to 1948. [2018-11-18 15:04:06,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 15:04:06,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3038 transitions. [2018-11-18 15:04:06,064 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3038 transitions. Word has length 203 [2018-11-18 15:04:06,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:06,064 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3038 transitions. [2018-11-18 15:04:06,064 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:04:06,064 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3038 transitions. [2018-11-18 15:04:06,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-11-18 15:04:06,067 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:06,067 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:06,067 INFO L423 AbstractCegarLoop]: === Iteration 68 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:06,067 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:06,068 INFO L82 PathProgramCache]: Analyzing trace with hash -1969145605, now seen corresponding path program 1 times [2018-11-18 15:04:06,068 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 15:04:06,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:06,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:06,069 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 15:04:06,069 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 15:04:06,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 15:04:06,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 15:04:06,259 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 15:04:06,315 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 24583 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 15:04:06,316 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 24586 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 15:04:06,385 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 03:04:06 BoogieIcfgContainer [2018-11-18 15:04:06,386 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 15:04:06,386 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 15:04:06,386 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 15:04:06,386 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 15:04:06,386 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:03:19" (3/4) ... [2018-11-18 15:04:06,390 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-18 15:04:06,390 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 15:04:06,390 INFO L168 Benchmark]: Toolchain (without parser) took 49423.40 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 805.3 MB). Free memory was 957.6 MB in the beginning and 1.7 GB in the end (delta: -707.8 MB). Peak memory consumption was 97.5 MB. Max. memory is 11.5 GB. [2018-11-18 15:04:06,391 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 15:04:06,392 INFO L168 Benchmark]: CACSL2BoogieTranslator took 966.87 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.3 MB). Free memory was 957.6 MB in the beginning and 1.0 GB in the end (delta: -81.7 MB). Peak memory consumption was 104.3 MB. Max. memory is 11.5 GB. [2018-11-18 15:04:06,392 INFO L168 Benchmark]: Boogie Procedure Inliner took 55.34 ms. Allocated memory is still 1.2 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 15:04:06,392 INFO L168 Benchmark]: Boogie Preprocessor took 111.39 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 9.2 MB). Peak memory consumption was 9.2 MB. Max. memory is 11.5 GB. [2018-11-18 15:04:06,392 INFO L168 Benchmark]: RCFGBuilder took 1641.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 947.2 MB in the end (delta: 82.9 MB). Peak memory consumption was 82.9 MB. Max. memory is 11.5 GB. [2018-11-18 15:04:06,392 INFO L168 Benchmark]: TraceAbstraction took 46640.81 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 681.1 MB). Free memory was 947.2 MB in the beginning and 1.7 GB in the end (delta: -718.2 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 15:04:06,393 INFO L168 Benchmark]: Witness Printer took 3.91 ms. Allocated memory is still 1.8 GB. Free memory is still 1.7 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 15:04:06,394 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 966.87 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.3 MB). Free memory was 957.6 MB in the beginning and 1.0 GB in the end (delta: -81.7 MB). Peak memory consumption was 104.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 55.34 ms. Allocated memory is still 1.2 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 111.39 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 9.2 MB). Peak memory consumption was 9.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1641.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 947.2 MB in the end (delta: 82.9 MB). Peak memory consumption was 82.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 46640.81 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 681.1 MB). Free memory was 947.2 MB in the beginning and 1.7 GB in the end (delta: -718.2 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 3.91 ms. Allocated memory is still 1.8 GB. Free memory is still 1.7 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 24583 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 24586 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1726]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseAnd at line 1121. Possible FailurePath: [L1042] static int init = 1; [L1043] FCALL static SSL_METHOD SSLv3_server_data ; VAL [\old(init)=24577, \old(SSLv3_server_data)=null, \old(SSLv3_server_data)=null, init=1, SSLv3_server_data={1:0}] [L1065] SSL *s ; [L1066] int tmp ; [L1070] EXPR, FCALL malloc(sizeof(SSL)) [L1070] s = malloc(sizeof(SSL)) [L1071] EXPR, FCALL malloc(sizeof(struct ssl3_state_st)) [L1071] FCALL s->s3 = malloc(sizeof(struct ssl3_state_st)) [L1072] EXPR, FCALL malloc(sizeof(SSL_CTX)) [L1072] FCALL s->ctx = malloc(sizeof(SSL_CTX)) [L1073] EXPR, FCALL malloc(sizeof(SSL_SESSION)) [L1073] FCALL s->session = malloc(sizeof(SSL_SESSION)) VAL [init=1, malloc(sizeof(SSL))={24579:0}, malloc(sizeof(SSL_CTX))={24581:0}, malloc(sizeof(SSL_SESSION))={24582:0}, malloc(sizeof(struct ssl3_state_st))={24588:0}, s={24579:0}, SSLv3_server_data={1:0}] [L1074] CALL ssl3_accept(s) VAL [init=1, s={24579:0}, SSLv3_server_data={1:0}] [L1080] BUF_MEM *buf ; [L1081] unsigned long l ; [L1082] unsigned long Time ; [L1083] unsigned long tmp ; [L1084] void (*cb)() ; [L1085] long num1 ; [L1086] int ret ; [L1087] int new_state ; [L1088] int state ; [L1089] int skip ; [L1090] int got_new_session ; [L1091] int tmp___1 = __VERIFIER_nondet_int() ; [L1092] int tmp___2 = __VERIFIER_nondet_int() ; [L1093] int tmp___3 = __VERIFIER_nondet_int() ; [L1094] int tmp___4 = __VERIFIER_nondet_int() ; [L1095] int tmp___5 = __VERIFIER_nondet_int() ; [L1096] int tmp___6 = __VERIFIER_nondet_int() ; [L1097] int tmp___7 ; [L1098] long tmp___8 = __VERIFIER_nondet_long() ; [L1099] int tmp___9 = __VERIFIER_nondet_int() ; [L1100] int tmp___10 = __VERIFIER_nondet_int() ; [L1101] int blastFlag ; [L1105] FCALL s->state = 8464 [L1106] blastFlag = 0 [L1107] FCALL s->hit=__VERIFIER_nondet_int () [L1108] FCALL s->state = 8464 [L1109] tmp = __VERIFIER_nondet_int() [L1110] Time = tmp [L1111] cb = (void (*)())((void *)0) [L1112] ret = -1 [L1113] skip = 0 [L1114] got_new_session = 0 [L1115] EXPR, FCALL s->info_callback VAL [={0:0}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->info_callback={2:-1}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1115] COND TRUE (unsigned long )s->info_callback != (unsigned long )((void *)0) [L1116] EXPR, FCALL s->info_callback [L1116] cb = s->info_callback [L1120] EXPR, FCALL s->in_handshake [L1120] FCALL s->in_handshake += 1 [L1121] COND FALSE !(tmp___1 & 12288) VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] EXPR, FCALL s->cert VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->cert={3:-2}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] COND FALSE !((unsigned long )s->cert == (unsigned long )((void *)0)) [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND TRUE s->state == 8464 [L1323] FCALL s->shutdown = 0 [L1324] ret = __VERIFIER_nondet_int() [L1325] COND TRUE blastFlag == 0 [L1326] blastFlag = 1 VAL [={2:-1}, blastFlag=1, got_new_session=0, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1330] COND FALSE !(ret <= 0) [L1335] got_new_session = 1 [L1336] FCALL s->state = 8496 [L1337] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24580, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND TRUE s->state == 8496 [L1341] ret = __VERIFIER_nondet_int() [L1342] COND TRUE blastFlag == 1 [L1343] blastFlag = 2 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1347] COND FALSE !(ret <= 0) [L1352] FCALL s->hit VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->hit=1, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1352] COND TRUE s->hit [L1353] FCALL s->state = 8656 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1357] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24580, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND TRUE s->state == 8656 [L1570] EXPR, FCALL s->session [L1570] EXPR, FCALL s->s3 [L1570] EXPR, FCALL (s->s3)->tmp.new_cipher [L1570] FCALL (s->session)->cipher = (s->s3)->tmp.new_cipher [L1571] COND FALSE !(! tmp___9) [L1577] ret = __VERIFIER_nondet_int() [L1578] COND TRUE blastFlag == 2 [L1579] blastFlag = 3 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1583] COND FALSE !(ret <= 0) [L1588] FCALL s->state = 8672 [L1589] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1590] COND FALSE !(! tmp___10) VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24580, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND FALSE !(s->state == 8656) [L1232] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1232] COND FALSE !(s->state == 8657) [L1235] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1235] COND TRUE s->state == 8672 [L1599] ret = __VERIFIER_nondet_int() [L1600] COND TRUE blastFlag == 3 [L1601] blastFlag = 4 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1613] COND FALSE !(ret <= 0) [L1618] FCALL s->state = 8448 [L1619] FCALL s->hit VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->hit=1, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1619] COND TRUE s->hit [L1620] EXPR, FCALL s->s3 [L1620] FCALL (s->s3)->tmp.next_state = 8640 [L1624] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24580, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND TRUE s->state == 8448 [L1490] COND FALSE !(num1 > 0L) VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1503] EXPR, FCALL s->s3 [L1503] EXPR, FCALL (s->s3)->tmp.next_state [L1503] FCALL s->state = (s->s3)->tmp.next_state [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24580, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND TRUE s->state == 8640 [L1550] ret = __VERIFIER_nondet_int() [L1551] COND TRUE blastFlag == 4 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1726] __VERIFIER_error() VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 160 locations, 1 error locations. UNSAFE Result, 46.5s OverallTime, 68 OverallIterations, 7 TraceHistogramMax, 32.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 16294 SDtfs, 6794 SDslu, 26270 SDs, 0 SdLazy, 17150 SolverSat, 840 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 24.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2357 GetRequests, 1998 SyntacticMatches, 100 SemanticMatches, 259 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 437 ImplicationChecksByTransitivity, 4.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1948occurred in iteration=59, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 1.8s AbstIntTime, 5 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 2.7s AutomataMinimizationTime, 67 MinimizatonAttempts, 15146 StatesRemovedByMinimization, 65 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 10210 NumberOfCodeBlocks, 10210 NumberOfCodeBlocksAsserted, 73 NumberOfCheckSat, 10883 ConstructedInterpolants, 166 QuantifiedInterpolants, 7642520 SizeOfPredicates, 46 NumberOfNonLiveVariables, 3421 ConjunctsInSsa, 69 ConjunctsInUnsatCore, 77 InterpolantComputations, 68 PerfectInterpolantSequences, 12185/12632 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-5842f4b [2018-11-18 15:04:07,939 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 15:04:07,941 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 15:04:07,949 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 15:04:07,950 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 15:04:07,950 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 15:04:07,951 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 15:04:07,952 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 15:04:07,953 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 15:04:07,954 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 15:04:07,955 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 15:04:07,955 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 15:04:07,955 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 15:04:07,956 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 15:04:07,957 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 15:04:07,957 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 15:04:07,958 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 15:04:07,959 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 15:04:07,961 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 15:04:07,962 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 15:04:07,962 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 15:04:07,963 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 15:04:07,965 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 15:04:07,965 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 15:04:07,965 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 15:04:07,966 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 15:04:07,966 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 15:04:07,967 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 15:04:07,967 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 15:04:07,968 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 15:04:07,968 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 15:04:07,969 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 15:04:07,969 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 15:04:07,969 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 15:04:07,970 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 15:04:07,970 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 15:04:07,971 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-11-18 15:04:07,981 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 15:04:07,981 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 15:04:07,981 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 15:04:07,982 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 15:04:07,982 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 15:04:07,982 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 15:04:07,982 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 15:04:07,982 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 15:04:07,982 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 15:04:07,982 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 15:04:07,983 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 15:04:07,983 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 15:04:07,983 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 15:04:07,983 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 15:04:07,983 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 15:04:07,984 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 15:04:07,985 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 15:04:07,985 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 15:04:07,985 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 15:04:07,985 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 15:04:07,985 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 15:04:07,985 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 15:04:07,986 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c3873739663157ae1e04c3d1b08afe34dba22bef [2018-11-18 15:04:08,016 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 15:04:08,025 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 15:04:08,028 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 15:04:08,029 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 15:04:08,030 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 15:04:08,030 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/../../sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c [2018-11-18 15:04:08,069 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/f8460b770/9df3f4fa4fac4c45bebf86a3794532c5/FLAG36cb3df03 [2018-11-18 15:04:08,474 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 15:04:08,475 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/sv-benchmarks/c/ssh/s3_srvr.blast.09_false-unreach-call.i.cil.c [2018-11-18 15:04:08,486 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/f8460b770/9df3f4fa4fac4c45bebf86a3794532c5/FLAG36cb3df03 [2018-11-18 15:04:08,836 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/data/f8460b770/9df3f4fa4fac4c45bebf86a3794532c5 [2018-11-18 15:04:08,838 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 15:04:08,839 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 15:04:08,840 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 15:04:08,840 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 15:04:08,843 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 15:04:08,844 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 03:04:08" (1/1) ... [2018-11-18 15:04:08,847 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@d0661fb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:08, skipping insertion in model container [2018-11-18 15:04:08,847 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 03:04:08" (1/1) ... [2018-11-18 15:04:08,856 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 15:04:08,905 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 15:04:09,421 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 15:04:09,433 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 15:04:09,649 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 15:04:09,665 INFO L195 MainTranslator]: Completed translation [2018-11-18 15:04:09,666 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09 WrapperNode [2018-11-18 15:04:09,666 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 15:04:09,667 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 15:04:09,667 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 15:04:09,667 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 15:04:09,674 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,695 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,702 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 15:04:09,703 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 15:04:09,703 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 15:04:09,703 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 15:04:09,711 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,711 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,717 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,717 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,748 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,755 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,757 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... [2018-11-18 15:04:09,761 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 15:04:09,762 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 15:04:09,762 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 15:04:09,762 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 15:04:09,763 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 15:04:09,815 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-18 15:04:09,815 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 15:04:09,815 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 15:04:09,815 INFO L130 BoogieDeclarations]: Found specification of procedure ssl3_accept [2018-11-18 15:04:09,815 INFO L138 BoogieDeclarations]: Found implementation of procedure ssl3_accept [2018-11-18 15:04:09,815 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-18 15:04:09,815 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 15:04:09,815 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 15:04:09,816 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 15:04:09,816 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-18 15:04:09,816 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-18 15:04:09,816 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 15:04:09,816 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 15:04:09,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-18 15:04:12,122 WARN L684 $ProcedureCfgBuilder]: Two Gotos in a row! There was dead code [2018-11-18 15:04:12,122 WARN L649 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-18 15:04:12,838 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 15:04:12,838 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:04:12 BoogieIcfgContainer [2018-11-18 15:04:12,839 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 15:04:12,839 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 15:04:12,840 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 15:04:12,842 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 15:04:12,842 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 03:04:08" (1/3) ... [2018-11-18 15:04:12,843 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c17830f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 03:04:12, skipping insertion in model container [2018-11-18 15:04:12,843 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 03:04:09" (2/3) ... [2018-11-18 15:04:12,844 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c17830f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 03:04:12, skipping insertion in model container [2018-11-18 15:04:12,844 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:04:12" (3/3) ... [2018-11-18 15:04:12,845 INFO L112 eAbstractionObserver]: Analyzing ICFG s3_srvr.blast.09_false-unreach-call.i.cil.c [2018-11-18 15:04:12,851 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 15:04:12,856 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 15:04:12,865 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 15:04:12,886 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 15:04:12,886 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 15:04:12,887 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 15:04:12,887 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 15:04:12,887 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 15:04:12,887 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 15:04:12,887 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 15:04:12,887 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 15:04:12,887 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 15:04:12,900 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states. [2018-11-18 15:04:12,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 15:04:12,905 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:12,906 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:12,908 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:12,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:12,911 INFO L82 PathProgramCache]: Analyzing trace with hash -2122663997, now seen corresponding path program 1 times [2018-11-18 15:04:12,914 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:12,915 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:12,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:13,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:13,010 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:13,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:04:13,055 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:13,067 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:13,067 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:13,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:13,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:13,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,082 INFO L87 Difference]: Start difference. First operand 158 states. Second operand 3 states. [2018-11-18 15:04:13,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:13,193 INFO L93 Difference]: Finished difference Result 438 states and 739 transitions. [2018-11-18 15:04:13,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:13,195 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2018-11-18 15:04:13,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:13,206 INFO L225 Difference]: With dead ends: 438 [2018-11-18 15:04:13,206 INFO L226 Difference]: Without dead ends: 267 [2018-11-18 15:04:13,210 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-11-18 15:04:13,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 267. [2018-11-18 15:04:13,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267 states. [2018-11-18 15:04:13,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 399 transitions. [2018-11-18 15:04:13,260 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 399 transitions. Word has length 42 [2018-11-18 15:04:13,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:13,261 INFO L480 AbstractCegarLoop]: Abstraction has 267 states and 399 transitions. [2018-11-18 15:04:13,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:13,261 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 399 transitions. [2018-11-18 15:04:13,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 15:04:13,264 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:13,264 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:13,264 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:13,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:13,265 INFO L82 PathProgramCache]: Analyzing trace with hash 692256734, now seen corresponding path program 1 times [2018-11-18 15:04:13,265 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:13,266 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:13,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:13,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:13,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:13,398 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 15:04:13,398 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:13,400 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:13,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:13,402 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:13,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:13,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,402 INFO L87 Difference]: Start difference. First operand 267 states and 399 transitions. Second operand 3 states. [2018-11-18 15:04:13,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:13,476 INFO L93 Difference]: Finished difference Result 518 states and 788 transitions. [2018-11-18 15:04:13,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:13,477 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2018-11-18 15:04:13,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:13,478 INFO L225 Difference]: With dead ends: 518 [2018-11-18 15:04:13,479 INFO L226 Difference]: Without dead ends: 390 [2018-11-18 15:04:13,480 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2018-11-18 15:04:13,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390. [2018-11-18 15:04:13,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2018-11-18 15:04:13,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 581 transitions. [2018-11-18 15:04:13,500 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 581 transitions. Word has length 60 [2018-11-18 15:04:13,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:13,500 INFO L480 AbstractCegarLoop]: Abstraction has 390 states and 581 transitions. [2018-11-18 15:04:13,500 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:13,501 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 581 transitions. [2018-11-18 15:04:13,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 15:04:13,504 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:13,505 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:13,505 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:13,505 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:13,506 INFO L82 PathProgramCache]: Analyzing trace with hash 610798098, now seen corresponding path program 1 times [2018-11-18 15:04:13,506 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:13,506 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:13,535 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:13,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:13,629 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:13,655 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 15:04:13,655 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:13,657 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:13,657 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:13,658 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:13,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:13,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,658 INFO L87 Difference]: Start difference. First operand 390 states and 581 transitions. Second operand 3 states. [2018-11-18 15:04:13,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:13,768 INFO L93 Difference]: Finished difference Result 764 states and 1153 transitions. [2018-11-18 15:04:13,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:13,769 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2018-11-18 15:04:13,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:13,771 INFO L225 Difference]: With dead ends: 764 [2018-11-18 15:04:13,771 INFO L226 Difference]: Without dead ends: 513 [2018-11-18 15:04:13,773 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states. [2018-11-18 15:04:13,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 513. [2018-11-18 15:04:13,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 513 states. [2018-11-18 15:04:13,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 513 states to 513 states and 764 transitions. [2018-11-18 15:04:13,795 INFO L78 Accepts]: Start accepts. Automaton has 513 states and 764 transitions. Word has length 83 [2018-11-18 15:04:13,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:13,795 INFO L480 AbstractCegarLoop]: Abstraction has 513 states and 764 transitions. [2018-11-18 15:04:13,796 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:13,796 INFO L276 IsEmpty]: Start isEmpty. Operand 513 states and 764 transitions. [2018-11-18 15:04:13,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-11-18 15:04:13,800 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:13,800 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:13,800 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:13,800 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:13,801 INFO L82 PathProgramCache]: Analyzing trace with hash -606699514, now seen corresponding path program 1 times [2018-11-18 15:04:13,802 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:13,802 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:13,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:13,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:13,948 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:13,966 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:04:13,966 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:13,967 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:13,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:13,968 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:13,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:13,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:13,968 INFO L87 Difference]: Start difference. First operand 513 states and 764 transitions. Second operand 3 states. [2018-11-18 15:04:14,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:14,074 INFO L93 Difference]: Finished difference Result 1012 states and 1521 transitions. [2018-11-18 15:04:14,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:14,075 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 108 [2018-11-18 15:04:14,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:14,078 INFO L225 Difference]: With dead ends: 1012 [2018-11-18 15:04:14,078 INFO L226 Difference]: Without dead ends: 638 [2018-11-18 15:04:14,079 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 106 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 638 states. [2018-11-18 15:04:14,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 638 to 638. [2018-11-18 15:04:14,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 638 states. [2018-11-18 15:04:14,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 638 states to 638 states and 949 transitions. [2018-11-18 15:04:14,101 INFO L78 Accepts]: Start accepts. Automaton has 638 states and 949 transitions. Word has length 108 [2018-11-18 15:04:14,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:14,101 INFO L480 AbstractCegarLoop]: Abstraction has 638 states and 949 transitions. [2018-11-18 15:04:14,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:14,102 INFO L276 IsEmpty]: Start isEmpty. Operand 638 states and 949 transitions. [2018-11-18 15:04:14,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-18 15:04:14,104 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:14,104 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:14,104 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:14,105 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:14,105 INFO L82 PathProgramCache]: Analyzing trace with hash -321735812, now seen corresponding path program 1 times [2018-11-18 15:04:14,105 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:14,106 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:14,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:14,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:14,242 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:14,268 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:04:14,269 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:14,271 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:14,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:14,271 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:14,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:14,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,272 INFO L87 Difference]: Start difference. First operand 638 states and 949 transitions. Second operand 3 states. [2018-11-18 15:04:14,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:14,343 INFO L93 Difference]: Finished difference Result 1258 states and 1884 transitions. [2018-11-18 15:04:14,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:14,344 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 125 [2018-11-18 15:04:14,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:14,347 INFO L225 Difference]: With dead ends: 1258 [2018-11-18 15:04:14,347 INFO L226 Difference]: Without dead ends: 759 [2018-11-18 15:04:14,348 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 759 states. [2018-11-18 15:04:14,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 759 to 759. [2018-11-18 15:04:14,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 759 states. [2018-11-18 15:04:14,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 759 states to 759 states and 1129 transitions. [2018-11-18 15:04:14,366 INFO L78 Accepts]: Start accepts. Automaton has 759 states and 1129 transitions. Word has length 125 [2018-11-18 15:04:14,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:14,367 INFO L480 AbstractCegarLoop]: Abstraction has 759 states and 1129 transitions. [2018-11-18 15:04:14,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:14,367 INFO L276 IsEmpty]: Start isEmpty. Operand 759 states and 1129 transitions. [2018-11-18 15:04:14,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 15:04:14,369 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:14,369 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:14,369 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:14,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:14,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1793540287, now seen corresponding path program 1 times [2018-11-18 15:04:14,370 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:14,370 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:14,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:14,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:14,510 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:14,559 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 15:04:14,559 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:14,569 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:14,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:14,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:14,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:14,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,570 INFO L87 Difference]: Start difference. First operand 759 states and 1129 transitions. Second operand 3 states. [2018-11-18 15:04:14,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:14,641 INFO L93 Difference]: Finished difference Result 1502 states and 2248 transitions. [2018-11-18 15:04:14,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:14,642 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2018-11-18 15:04:14,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:14,645 INFO L225 Difference]: With dead ends: 1502 [2018-11-18 15:04:14,645 INFO L226 Difference]: Without dead ends: 882 [2018-11-18 15:04:14,647 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 882 states. [2018-11-18 15:04:14,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 882 to 882. [2018-11-18 15:04:14,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 882 states. [2018-11-18 15:04:14,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 882 states to 882 states and 1311 transitions. [2018-11-18 15:04:14,666 INFO L78 Accepts]: Start accepts. Automaton has 882 states and 1311 transitions. Word has length 138 [2018-11-18 15:04:14,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:14,666 INFO L480 AbstractCegarLoop]: Abstraction has 882 states and 1311 transitions. [2018-11-18 15:04:14,666 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:14,666 INFO L276 IsEmpty]: Start isEmpty. Operand 882 states and 1311 transitions. [2018-11-18 15:04:14,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-11-18 15:04:14,669 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:14,670 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:14,670 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:14,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:14,670 INFO L82 PathProgramCache]: Analyzing trace with hash 856976646, now seen corresponding path program 1 times [2018-11-18 15:04:14,671 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:14,671 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:14,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:14,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:14,826 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:14,852 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 78 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 15:04:14,853 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:04:14,854 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:04:14,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 15:04:14,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 15:04:14,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 15:04:14,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,855 INFO L87 Difference]: Start difference. First operand 882 states and 1311 transitions. Second operand 3 states. [2018-11-18 15:04:14,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:04:14,942 INFO L93 Difference]: Finished difference Result 1749 states and 2611 transitions. [2018-11-18 15:04:14,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 15:04:14,943 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 169 [2018-11-18 15:04:14,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:04:14,946 INFO L225 Difference]: With dead ends: 1749 [2018-11-18 15:04:14,946 INFO L226 Difference]: Without dead ends: 1006 [2018-11-18 15:04:14,948 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 15:04:14,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1006 states. [2018-11-18 15:04:14,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1006 to 1004. [2018-11-18 15:04:14,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1004 states. [2018-11-18 15:04:14,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1004 states to 1004 states and 1492 transitions. [2018-11-18 15:04:14,968 INFO L78 Accepts]: Start accepts. Automaton has 1004 states and 1492 transitions. Word has length 169 [2018-11-18 15:04:14,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:04:14,968 INFO L480 AbstractCegarLoop]: Abstraction has 1004 states and 1492 transitions. [2018-11-18 15:04:14,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 15:04:14,968 INFO L276 IsEmpty]: Start isEmpty. Operand 1004 states and 1492 transitions. [2018-11-18 15:04:14,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 15:04:14,971 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:04:14,971 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:04:14,971 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:04:14,971 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:04:14,972 INFO L82 PathProgramCache]: Analyzing trace with hash -1721971004, now seen corresponding path program 1 times [2018-11-18 15:04:14,972 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:04:14,972 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:04:14,992 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:15,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:15,697 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:15,813 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:15,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-18 15:04:15,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 15:04:15,862 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:15,868 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:15,877 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:15,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-11-18 15:04:15,879 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:15,937 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:15,983 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 15:04:16,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 15:04:16,091 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 15:04:16,099 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,100 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,105 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-18 15:04:16,109 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,123 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,134 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,143 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,173 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:49, output treesize:56 [2018-11-18 15:04:16,296 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,299 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,302 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 123 [2018-11-18 15:04:16,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2018-11-18 15:04:16,353 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,407 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-18 15:04:16,467 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-11-18 15:04:16,473 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:16,492 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:16,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:16,535 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:93, output treesize:77 [2018-11-18 15:04:16,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:04:16,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:04:16,670 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,681 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:16,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:16,738 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-11-18 15:04:16,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 29 [2018-11-18 15:04:16,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-11-18 15:04:16,867 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:16,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:16,972 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:16,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 89 [2018-11-18 15:04:16,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 15:04:16,993 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,021 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:17,039 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:04:17,042 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:17,043 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:04:17,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 15:04:17,050 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,071 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-11-18 15:04:17,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:04:17,101 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,110 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,123 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:117, output treesize:26 [2018-11-18 15:04:17,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 15:04:17,190 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:17,192 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:17,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:04:17,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,213 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,237 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:35 [2018-11-18 15:04:17,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-11-18 15:04:17,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 15:04:17,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,357 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:17,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:04:17,358 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,363 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,369 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,370 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:5 [2018-11-18 15:04:17,618 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 67 proven. 100 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:04:17,619 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:04:17,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 15:04:17,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 15:04:17,720 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,726 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,733 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,733 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 15:04:17,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-18 15:04:17,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-18 15:04:17,864 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-11-18 15:04:17,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-18 15:04:17,884 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,886 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:17,903 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:52, output treesize:10 [2018-11-18 15:04:17,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 15:04:17,937 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:04:17,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 52 [2018-11-18 15:04:17,944 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,960 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:17,966 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:44 [2018-11-18 15:04:18,387 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 0 proven. 167 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:04:18,389 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 15:04:18,390 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 15:04:18,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:04:18,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:04:18,520 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:04:18,568 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-18 15:04:18,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 15:04:18,611 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,615 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,619 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-11-18 15:04:18,620 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,642 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,664 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 15:04:18,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 15:04:18,731 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 15:04:18,739 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,740 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,741 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-18 15:04:18,744 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,755 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,764 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,772 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,794 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:49, output treesize:56 [2018-11-18 15:04:18,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 45 [2018-11-18 15:04:18,824 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-11-18 15:04:18,831 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:18,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:18,916 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,919 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,921 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:18,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 111 [2018-11-18 15:04:18,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-11-18 15:04:18,964 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:18,996 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,024 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:93, output treesize:77 [2018-11-18 15:04:19,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:04:19,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:04:19,097 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,108 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,156 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-11-18 15:04:19,166 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-11-18 15:04:19,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 15:04:19,196 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,219 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-18 15:04:19,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:04:19,289 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,296 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,347 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-11-18 15:04:19,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 15:04:19,361 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,394 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,395 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:04:19,396 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 43 [2018-11-18 15:04:19,399 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,407 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,417 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:117, output treesize:26 [2018-11-18 15:04:19,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 15:04:19,455 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,457 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:04:19,458 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,472 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,488 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:35 [2018-11-18 15:04:19,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-11-18 15:04:19,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 15:04:19,512 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,521 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:04:19,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:04:19,522 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,527 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,532 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:5 [2018-11-18 15:04:19,672 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 67 proven. 100 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:04:19,672 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:04:19,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 15:04:19,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 15:04:19,710 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,716 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,721 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,721 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 15:04:19,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-18 15:04:19,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-18 15:04:19,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-11-18 15:04:19,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-18 15:04:19,832 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,834 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,842 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,849 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:04:19,849 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:52, output treesize:10 [2018-11-18 15:04:19,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 15:04:19,860 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:04:19,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 52 [2018-11-18 15:04:19,865 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,880 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,887 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:04:19,887 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:44 [2018-11-18 15:04:20,432 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 0 proven. 167 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:04:20,448 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 15:04:20,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9] total 17 [2018-11-18 15:04:20,449 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 15:04:20,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 15:04:20,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2018-11-18 15:04:20,450 INFO L87 Difference]: Start difference. First operand 1004 states and 1492 transitions. Second operand 17 states. [2018-11-18 15:06:08,141 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 54 [2018-11-18 15:06:15,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:06:15,235 INFO L93 Difference]: Finished difference Result 6225 states and 9323 transitions. [2018-11-18 15:06:15,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 15:06:15,238 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 175 [2018-11-18 15:06:15,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:06:15,252 INFO L225 Difference]: With dead ends: 6225 [2018-11-18 15:06:15,253 INFO L226 Difference]: Without dead ends: 5235 [2018-11-18 15:06:15,256 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 707 GetRequests, 677 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 145 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=154, Invalid=496, Unknown=0, NotChecked=0, Total=650 [2018-11-18 15:06:15,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5235 states. [2018-11-18 15:06:15,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5235 to 1324. [2018-11-18 15:06:15,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1324 states. [2018-11-18 15:06:15,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1324 states to 1324 states and 2076 transitions. [2018-11-18 15:06:15,368 INFO L78 Accepts]: Start accepts. Automaton has 1324 states and 2076 transitions. Word has length 175 [2018-11-18 15:06:15,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:06:15,369 INFO L480 AbstractCegarLoop]: Abstraction has 1324 states and 2076 transitions. [2018-11-18 15:06:15,369 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 15:06:15,369 INFO L276 IsEmpty]: Start isEmpty. Operand 1324 states and 2076 transitions. [2018-11-18 15:06:15,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-11-18 15:06:15,371 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:06:15,372 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:06:15,372 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:06:15,372 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:06:15,372 INFO L82 PathProgramCache]: Analyzing trace with hash -1848500927, now seen corresponding path program 1 times [2018-11-18 15:06:15,373 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:06:15,373 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:06:15,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:06:15,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:06:15,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:06:16,061 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-18 15:06:16,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 15:06:16,091 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,094 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,098 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-18 15:06:16,099 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,126 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,148 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 15:06:16,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 15:06:16,214 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 15:06:16,223 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,225 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,227 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-18 15:06:16,231 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,246 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,256 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,267 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,291 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,291 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:49, output treesize:56 [2018-11-18 15:06:16,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 45 [2018-11-18 15:06:16,361 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-11-18 15:06:16,367 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:16,382 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:16,441 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,443 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,445 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 111 [2018-11-18 15:06:16,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-11-18 15:06:16,482 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,524 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,568 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:16,568 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:93, output treesize:77 [2018-11-18 15:06:16,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:06:16,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:06:16,673 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,680 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:16,720 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-11-18 15:06:16,796 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-11-18 15:06:16,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 15:06:16,819 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,837 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:16,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-18 15:06:16,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:06:16,905 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:16,913 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:16,974 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:16,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-11-18 15:06:16,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 15:06:16,991 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,037 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:06:17,039 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:17,039 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 15:06:17,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-11-18 15:06:17,046 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,061 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,076 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,076 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:117, output treesize:26 [2018-11-18 15:06:17,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 15:06:17,145 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:17,149 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:17,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:06:17,150 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,165 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,184 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,184 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:35 [2018-11-18 15:06:17,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-11-18 15:06:17,261 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:06:17,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:06:17,263 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 15:06:17,275 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:06:17,283 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:5 [2018-11-18 15:06:17,435 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 67 proven. 102 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 15:06:17,435 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:06:17,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 15:06:17,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 15:06:17,515 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,520 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,525 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 15:06:17,526 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 15:06:17,591 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 102 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 15:06:17,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:06:17,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [10] total 12 [2018-11-18 15:06:17,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 15:06:17,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 15:06:17,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-11-18 15:06:17,594 INFO L87 Difference]: Start difference. First operand 1324 states and 2076 transitions. Second operand 12 states. [2018-11-18 15:08:09,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:09,859 INFO L93 Difference]: Finished difference Result 7091 states and 10921 transitions. [2018-11-18 15:08:09,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 15:08:09,860 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 176 [2018-11-18 15:08:09,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:09,876 INFO L225 Difference]: With dead ends: 7091 [2018-11-18 15:08:09,877 INFO L226 Difference]: Without dead ends: 5781 [2018-11-18 15:08:09,880 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 343 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=103, Invalid=317, Unknown=0, NotChecked=0, Total=420 [2018-11-18 15:08:09,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5781 states. [2018-11-18 15:08:10,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5781 to 1652. [2018-11-18 15:08:10,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1652 states. [2018-11-18 15:08:10,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1652 states to 1652 states and 2676 transitions. [2018-11-18 15:08:10,038 INFO L78 Accepts]: Start accepts. Automaton has 1652 states and 2676 transitions. Word has length 176 [2018-11-18 15:08:10,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:10,039 INFO L480 AbstractCegarLoop]: Abstraction has 1652 states and 2676 transitions. [2018-11-18 15:08:10,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 15:08:10,039 INFO L276 IsEmpty]: Start isEmpty. Operand 1652 states and 2676 transitions. [2018-11-18 15:08:10,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-11-18 15:08:10,042 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:10,042 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:10,042 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:10,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:10,042 INFO L82 PathProgramCache]: Analyzing trace with hash -1065153562, now seen corresponding path program 1 times [2018-11-18 15:08:10,043 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:10,043 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:10,067 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:10,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:10,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:10,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2018-11-18 15:08:10,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 15:08:10,357 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:10,360 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:10,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:10,364 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:21 [2018-11-18 15:08:10,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 27 [2018-11-18 15:08:10,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 3 [2018-11-18 15:08:10,377 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:10,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:10,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:10,380 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:43, output treesize:3 [2018-11-18 15:08:10,393 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 144 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:10,393 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:08:10,395 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:08:10,395 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:08:10,395 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:08:10,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:08:10,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:08:10,396 INFO L87 Difference]: Start difference. First operand 1652 states and 2676 transitions. Second operand 4 states. [2018-11-18 15:08:12,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:12,909 INFO L93 Difference]: Finished difference Result 3385 states and 5487 transitions. [2018-11-18 15:08:12,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:08:12,910 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 184 [2018-11-18 15:08:12,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:12,915 INFO L225 Difference]: With dead ends: 3385 [2018-11-18 15:08:12,915 INFO L226 Difference]: Without dead ends: 1747 [2018-11-18 15:08:12,918 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:08:12,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1747 states. [2018-11-18 15:08:13,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1747 to 1668. [2018-11-18 15:08:13,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1668 states. [2018-11-18 15:08:13,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1668 states to 1668 states and 2692 transitions. [2018-11-18 15:08:13,035 INFO L78 Accepts]: Start accepts. Automaton has 1668 states and 2692 transitions. Word has length 184 [2018-11-18 15:08:13,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:13,036 INFO L480 AbstractCegarLoop]: Abstraction has 1668 states and 2692 transitions. [2018-11-18 15:08:13,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:08:13,036 INFO L276 IsEmpty]: Start isEmpty. Operand 1668 states and 2692 transitions. [2018-11-18 15:08:13,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-11-18 15:08:13,039 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:13,039 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:13,039 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:13,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:13,039 INFO L82 PathProgramCache]: Analyzing trace with hash 1353330916, now seen corresponding path program 1 times [2018-11-18 15:08:13,040 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:13,040 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:13,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:13,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:13,815 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:13,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:13,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:13,844 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:13,845 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:13,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:13,846 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,852 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,862 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:13,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:13,884 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:13,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:13,884 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,887 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,888 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:13,888 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:13,930 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 168 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 15:08:13,930 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:08:13,932 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:08:13,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 15:08:13,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 15:08:13,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 15:08:13,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-18 15:08:13,933 INFO L87 Difference]: Start difference. First operand 1668 states and 2692 transitions. Second operand 7 states. [2018-11-18 15:08:15,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:15,182 INFO L93 Difference]: Finished difference Result 4136 states and 6579 transitions. [2018-11-18 15:08:15,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 15:08:15,183 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 184 [2018-11-18 15:08:15,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:15,189 INFO L225 Difference]: With dead ends: 4136 [2018-11-18 15:08:15,189 INFO L226 Difference]: Without dead ends: 2482 [2018-11-18 15:08:15,191 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 15:08:15,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2482 states. [2018-11-18 15:08:15,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2482 to 2020. [2018-11-18 15:08:15,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2020 states. [2018-11-18 15:08:15,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2020 states to 2020 states and 3324 transitions. [2018-11-18 15:08:15,295 INFO L78 Accepts]: Start accepts. Automaton has 2020 states and 3324 transitions. Word has length 184 [2018-11-18 15:08:15,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:15,295 INFO L480 AbstractCegarLoop]: Abstraction has 2020 states and 3324 transitions. [2018-11-18 15:08:15,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 15:08:15,295 INFO L276 IsEmpty]: Start isEmpty. Operand 2020 states and 3324 transitions. [2018-11-18 15:08:15,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-11-18 15:08:15,298 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:15,299 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:15,299 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:15,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:15,299 INFO L82 PathProgramCache]: Analyzing trace with hash -828789681, now seen corresponding path program 1 times [2018-11-18 15:08:15,300 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:15,300 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:15,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:15,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:15,982 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:16,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:16,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:16,010 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:16,011 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:16,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:16,012 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,019 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,024 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,033 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:16,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:16,056 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:16,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:16,057 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,060 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:16,061 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:16,115 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 168 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 15:08:16,115 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:08:16,118 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:08:16,118 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 15:08:16,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 15:08:16,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 15:08:16,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-18 15:08:16,119 INFO L87 Difference]: Start difference. First operand 2020 states and 3324 transitions. Second operand 7 states. [2018-11-18 15:08:17,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:17,517 INFO L93 Difference]: Finished difference Result 4453 states and 7165 transitions. [2018-11-18 15:08:17,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 15:08:17,518 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 185 [2018-11-18 15:08:17,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:17,524 INFO L225 Difference]: With dead ends: 4453 [2018-11-18 15:08:17,524 INFO L226 Difference]: Without dead ends: 2431 [2018-11-18 15:08:17,526 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 15:08:17,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2431 states. [2018-11-18 15:08:17,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2431 to 2012. [2018-11-18 15:08:17,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2012 states. [2018-11-18 15:08:17,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2012 states to 2012 states and 3308 transitions. [2018-11-18 15:08:17,647 INFO L78 Accepts]: Start accepts. Automaton has 2012 states and 3308 transitions. Word has length 185 [2018-11-18 15:08:17,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:17,647 INFO L480 AbstractCegarLoop]: Abstraction has 2012 states and 3308 transitions. [2018-11-18 15:08:17,648 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 15:08:17,648 INFO L276 IsEmpty]: Start isEmpty. Operand 2012 states and 3308 transitions. [2018-11-18 15:08:17,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 15:08:17,650 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:17,650 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:17,650 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:17,651 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:17,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1918329354, now seen corresponding path program 1 times [2018-11-18 15:08:17,651 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:17,651 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:17,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:18,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:18,363 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:18,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:18,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:18,389 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:18,390 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:18,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:18,391 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,398 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,403 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,411 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:18,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:18,432 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:18,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:18,433 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,436 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,439 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,439 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:18,463 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 209 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:18,463 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:18,488 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:18,488 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:18,488 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 15:08:18,502 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 213 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:18,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:18,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:18,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:18,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:18,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:18,505 INFO L87 Difference]: Start difference. First operand 2012 states and 3308 transitions. Second operand 9 states. [2018-11-18 15:08:22,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:22,343 INFO L93 Difference]: Finished difference Result 5402 states and 8561 transitions. [2018-11-18 15:08:22,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:08:22,344 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 198 [2018-11-18 15:08:22,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:22,349 INFO L225 Difference]: With dead ends: 5402 [2018-11-18 15:08:22,349 INFO L226 Difference]: Without dead ends: 3404 [2018-11-18 15:08:22,351 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 403 GetRequests, 391 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:08:22,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3404 states. [2018-11-18 15:08:22,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3404 to 2148. [2018-11-18 15:08:22,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2148 states. [2018-11-18 15:08:22,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2148 states to 2148 states and 3508 transitions. [2018-11-18 15:08:22,452 INFO L78 Accepts]: Start accepts. Automaton has 2148 states and 3508 transitions. Word has length 198 [2018-11-18 15:08:22,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:22,452 INFO L480 AbstractCegarLoop]: Abstraction has 2148 states and 3508 transitions. [2018-11-18 15:08:22,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:08:22,452 INFO L276 IsEmpty]: Start isEmpty. Operand 2148 states and 3508 transitions. [2018-11-18 15:08:22,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 15:08:22,453 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:22,454 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:22,454 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:22,454 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:22,454 INFO L82 PathProgramCache]: Analyzing trace with hash -960105647, now seen corresponding path program 1 times [2018-11-18 15:08:22,454 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:22,454 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:22,466 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:22,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:22,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:22,733 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:22,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 74 [2018-11-18 15:08:22,740 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:22,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 30 [2018-11-18 15:08:22,742 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:08:22,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:08:22,756 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,761 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,763 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,769 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,769 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:109, output treesize:9 [2018-11-18 15:08:22,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:08:22,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 15:08:22,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:22,780 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 15:08:22,799 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 182 proven. 0 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-11-18 15:08:22,799 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:08:22,801 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:08:22,801 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:08:22,802 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:08:22,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:08:22,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:08:22,802 INFO L87 Difference]: Start difference. First operand 2148 states and 3508 transitions. Second operand 4 states. [2018-11-18 15:08:25,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:25,576 INFO L93 Difference]: Finished difference Result 4960 states and 7987 transitions. [2018-11-18 15:08:25,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:08:25,577 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 15:08:25,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:25,584 INFO L225 Difference]: With dead ends: 4960 [2018-11-18 15:08:25,584 INFO L226 Difference]: Without dead ends: 2826 [2018-11-18 15:08:25,587 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 196 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:08:25,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2826 states. [2018-11-18 15:08:25,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2826 to 2364. [2018-11-18 15:08:25,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2364 states. [2018-11-18 15:08:25,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2364 states to 2364 states and 3916 transitions. [2018-11-18 15:08:25,709 INFO L78 Accepts]: Start accepts. Automaton has 2364 states and 3916 transitions. Word has length 199 [2018-11-18 15:08:25,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:25,710 INFO L480 AbstractCegarLoop]: Abstraction has 2364 states and 3916 transitions. [2018-11-18 15:08:25,710 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:08:25,710 INFO L276 IsEmpty]: Start isEmpty. Operand 2364 states and 3916 transitions. [2018-11-18 15:08:25,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 15:08:25,712 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:25,712 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:25,712 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:25,712 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:25,713 INFO L82 PathProgramCache]: Analyzing trace with hash -1339142267, now seen corresponding path program 1 times [2018-11-18 15:08:25,713 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:25,713 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:25,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:25,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:25,997 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:26,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:08:26,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:08:26,006 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:26,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:26,010 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:26,010 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 15:08:26,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:08:26,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 15:08:26,019 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:26,021 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:26,022 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:26,022 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 15:08:26,041 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 196 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-18 15:08:26,041 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:08:26,043 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:08:26,043 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:08:26,043 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:08:26,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:08:26,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:08:26,044 INFO L87 Difference]: Start difference. First operand 2364 states and 3916 transitions. Second operand 4 states. [2018-11-18 15:08:28,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:28,828 INFO L93 Difference]: Finished difference Result 5535 states and 9026 transitions. [2018-11-18 15:08:28,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:08:28,829 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 15:08:28,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:28,833 INFO L225 Difference]: With dead ends: 5535 [2018-11-18 15:08:28,833 INFO L226 Difference]: Without dead ends: 3185 [2018-11-18 15:08:28,836 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 196 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:08:28,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3185 states. [2018-11-18 15:08:28,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3185 to 2507. [2018-11-18 15:08:28,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2507 states. [2018-11-18 15:08:28,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2507 states to 2507 states and 4139 transitions. [2018-11-18 15:08:28,978 INFO L78 Accepts]: Start accepts. Automaton has 2507 states and 4139 transitions. Word has length 199 [2018-11-18 15:08:28,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:28,978 INFO L480 AbstractCegarLoop]: Abstraction has 2507 states and 4139 transitions. [2018-11-18 15:08:28,978 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:08:28,978 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4139 transitions. [2018-11-18 15:08:28,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 15:08:28,980 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:28,980 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:28,980 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:28,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:28,980 INFO L82 PathProgramCache]: Analyzing trace with hash 28657894, now seen corresponding path program 1 times [2018-11-18 15:08:28,981 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:28,981 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:28,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:29,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:29,669 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:29,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:29,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:29,691 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:29,692 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:29,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:29,693 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,699 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,703 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,711 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:29,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:29,733 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:29,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:29,734 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,737 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,739 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:29,786 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 215 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:29,786 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:29,826 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:29,826 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:29,827 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:08:29,846 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 219 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:29,848 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:29,848 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:29,849 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:29,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:29,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:29,849 INFO L87 Difference]: Start difference. First operand 2507 states and 4139 transitions. Second operand 9 states. [2018-11-18 15:08:33,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:33,660 INFO L93 Difference]: Finished difference Result 6048 states and 9615 transitions. [2018-11-18 15:08:33,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:08:33,661 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 199 [2018-11-18 15:08:33,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:33,665 INFO L225 Difference]: With dead ends: 6048 [2018-11-18 15:08:33,665 INFO L226 Difference]: Without dead ends: 3555 [2018-11-18 15:08:33,668 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 393 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:08:33,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3555 states. [2018-11-18 15:08:33,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3555 to 2507. [2018-11-18 15:08:33,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2507 states. [2018-11-18 15:08:33,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2507 states to 2507 states and 4107 transitions. [2018-11-18 15:08:33,798 INFO L78 Accepts]: Start accepts. Automaton has 2507 states and 4107 transitions. Word has length 199 [2018-11-18 15:08:33,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:33,799 INFO L480 AbstractCegarLoop]: Abstraction has 2507 states and 4107 transitions. [2018-11-18 15:08:33,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:08:33,799 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4107 transitions. [2018-11-18 15:08:33,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-11-18 15:08:33,801 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:33,802 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:33,802 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:33,802 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:33,802 INFO L82 PathProgramCache]: Analyzing trace with hash -429872859, now seen corresponding path program 1 times [2018-11-18 15:08:33,803 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:33,803 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:33,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:34,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:34,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:34,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:34,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:34,478 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:34,481 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:34,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:34,481 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,487 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,490 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,497 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,497 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:34,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:34,515 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:34,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:34,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,518 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,520 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:34,540 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 179 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:34,540 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:34,560 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:34,561 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,561 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:34,561 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:08:34,574 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:34,576 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:34,577 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:34,577 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:34,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:34,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:34,577 INFO L87 Difference]: Start difference. First operand 2507 states and 4107 transitions. Second operand 9 states. [2018-11-18 15:08:38,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:38,358 INFO L93 Difference]: Finished difference Result 6032 states and 9535 transitions. [2018-11-18 15:08:38,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:08:38,359 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 200 [2018-11-18 15:08:38,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:38,363 INFO L225 Difference]: With dead ends: 6032 [2018-11-18 15:08:38,363 INFO L226 Difference]: Without dead ends: 3539 [2018-11-18 15:08:38,366 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 407 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:08:38,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3539 states. [2018-11-18 15:08:38,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3539 to 2507. [2018-11-18 15:08:38,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2507 states. [2018-11-18 15:08:38,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2507 states to 2507 states and 4067 transitions. [2018-11-18 15:08:38,552 INFO L78 Accepts]: Start accepts. Automaton has 2507 states and 4067 transitions. Word has length 200 [2018-11-18 15:08:38,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:38,552 INFO L480 AbstractCegarLoop]: Abstraction has 2507 states and 4067 transitions. [2018-11-18 15:08:38,552 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:08:38,552 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4067 transitions. [2018-11-18 15:08:38,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-11-18 15:08:38,554 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:38,554 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:38,554 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:38,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:38,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1164272057, now seen corresponding path program 1 times [2018-11-18 15:08:38,555 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:38,555 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:38,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:39,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:39,222 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:39,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:39,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:39,256 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:39,258 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:39,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:39,259 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,273 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,279 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,290 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:39,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:39,317 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:39,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:39,318 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,321 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,322 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:39,343 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 185 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:39,344 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:39,364 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:39,364 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:39,364 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:08:39,377 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 189 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:39,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:39,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:39,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:39,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:39,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:39,380 INFO L87 Difference]: Start difference. First operand 2507 states and 4067 transitions. Second operand 9 states. [2018-11-18 15:08:43,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:43,214 INFO L93 Difference]: Finished difference Result 6032 states and 9455 transitions. [2018-11-18 15:08:43,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:08:43,215 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 200 [2018-11-18 15:08:43,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:43,218 INFO L225 Difference]: With dead ends: 6032 [2018-11-18 15:08:43,219 INFO L226 Difference]: Without dead ends: 3539 [2018-11-18 15:08:43,221 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 407 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:08:43,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3539 states. [2018-11-18 15:08:43,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3539 to 2507. [2018-11-18 15:08:43,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2507 states. [2018-11-18 15:08:43,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2507 states to 2507 states and 4027 transitions. [2018-11-18 15:08:43,349 INFO L78 Accepts]: Start accepts. Automaton has 2507 states and 4027 transitions. Word has length 200 [2018-11-18 15:08:43,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:43,349 INFO L480 AbstractCegarLoop]: Abstraction has 2507 states and 4027 transitions. [2018-11-18 15:08:43,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:08:43,349 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4027 transitions. [2018-11-18 15:08:43,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-11-18 15:08:43,351 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:43,351 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:43,352 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:43,352 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:43,352 INFO L82 PathProgramCache]: Analyzing trace with hash 1603887566, now seen corresponding path program 1 times [2018-11-18 15:08:43,352 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:43,352 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:43,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:43,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:43,633 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:43,638 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 15:08:43,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 15:08:43,640 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:43,643 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:43,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:43,645 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 15:08:43,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 15:08:43,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 15:08:43,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:43,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:43,657 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:43,657 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 15:08:43,676 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 196 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-18 15:08:43,676 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 15:08:43,679 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 15:08:43,679 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 15:08:43,679 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 15:08:43,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 15:08:43,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 15:08:43,679 INFO L87 Difference]: Start difference. First operand 2507 states and 4027 transitions. Second operand 4 states. [2018-11-18 15:08:46,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:46,442 INFO L93 Difference]: Finished difference Result 5619 states and 8947 transitions. [2018-11-18 15:08:46,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 15:08:46,443 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 200 [2018-11-18 15:08:46,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:46,446 INFO L225 Difference]: With dead ends: 5619 [2018-11-18 15:08:46,446 INFO L226 Difference]: Without dead ends: 3110 [2018-11-18 15:08:46,448 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 197 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 15:08:46,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3110 states. [2018-11-18 15:08:46,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3110 to 2371. [2018-11-18 15:08:46,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2371 states. [2018-11-18 15:08:46,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2371 states to 2371 states and 3827 transitions. [2018-11-18 15:08:46,569 INFO L78 Accepts]: Start accepts. Automaton has 2371 states and 3827 transitions. Word has length 200 [2018-11-18 15:08:46,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:46,569 INFO L480 AbstractCegarLoop]: Abstraction has 2371 states and 3827 transitions. [2018-11-18 15:08:46,569 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 15:08:46,569 INFO L276 IsEmpty]: Start isEmpty. Operand 2371 states and 3827 transitions. [2018-11-18 15:08:46,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-18 15:08:46,571 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:46,571 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:46,572 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:46,572 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:46,572 INFO L82 PathProgramCache]: Analyzing trace with hash 1204193129, now seen corresponding path program 1 times [2018-11-18 15:08:46,572 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:46,572 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:46,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:47,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:47,228 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:47,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:47,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:47,251 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:47,252 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:47,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:47,253 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,259 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,271 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,271 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:47,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:47,291 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:47,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:47,292 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,296 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,297 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,297 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:47,319 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 191 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:47,320 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:47,342 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:47,342 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,343 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:47,343 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:08:47,357 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 195 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:47,360 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:47,361 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:47,361 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:47,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:47,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:47,361 INFO L87 Difference]: Start difference. First operand 2371 states and 3827 transitions. Second operand 9 states. [2018-11-18 15:08:52,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:52,981 INFO L93 Difference]: Finished difference Result 6104 states and 9559 transitions. [2018-11-18 15:08:52,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:08:52,982 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 201 [2018-11-18 15:08:52,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:52,984 INFO L225 Difference]: With dead ends: 6104 [2018-11-18 15:08:52,984 INFO L226 Difference]: Without dead ends: 3747 [2018-11-18 15:08:52,987 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 397 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:08:52,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3747 states. [2018-11-18 15:08:53,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3747 to 2371. [2018-11-18 15:08:53,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2371 states. [2018-11-18 15:08:53,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2371 states to 2371 states and 3795 transitions. [2018-11-18 15:08:53,118 INFO L78 Accepts]: Start accepts. Automaton has 2371 states and 3795 transitions. Word has length 201 [2018-11-18 15:08:53,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:53,118 INFO L480 AbstractCegarLoop]: Abstraction has 2371 states and 3795 transitions. [2018-11-18 15:08:53,118 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:08:53,118 INFO L276 IsEmpty]: Start isEmpty. Operand 2371 states and 3795 transitions. [2018-11-18 15:08:53,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-11-18 15:08:53,120 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:53,120 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:53,120 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:53,120 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:53,120 INFO L82 PathProgramCache]: Analyzing trace with hash 165922429, now seen corresponding path program 1 times [2018-11-18 15:08:53,121 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:53,121 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:53,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:53,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:53,817 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:53,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:53,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:53,857 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:53,858 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:53,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:53,859 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,865 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,870 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,877 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:53,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:53,898 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:53,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:53,899 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,901 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:53,927 INFO L134 CoverageAnalysis]: Checked inductivity of 350 backedges. 230 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:53,927 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:53,957 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:53,958 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:53,958 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:08:53,973 INFO L134 CoverageAnalysis]: Checked inductivity of 350 backedges. 234 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:53,975 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:53,975 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:53,976 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:53,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:53,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:53,976 INFO L87 Difference]: Start difference. First operand 2371 states and 3795 transitions. Second operand 9 states. [2018-11-18 15:08:58,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:08:58,367 INFO L93 Difference]: Finished difference Result 6138 states and 9568 transitions. [2018-11-18 15:08:58,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:08:58,368 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 202 [2018-11-18 15:08:58,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:08:58,370 INFO L225 Difference]: With dead ends: 6138 [2018-11-18 15:08:58,370 INFO L226 Difference]: Without dead ends: 4075 [2018-11-18 15:08:58,372 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 411 GetRequests, 399 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:08:58,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4075 states. [2018-11-18 15:08:58,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4075 to 2531. [2018-11-18 15:08:58,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2531 states. [2018-11-18 15:08:58,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2531 states to 2531 states and 3995 transitions. [2018-11-18 15:08:58,516 INFO L78 Accepts]: Start accepts. Automaton has 2531 states and 3995 transitions. Word has length 202 [2018-11-18 15:08:58,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:08:58,517 INFO L480 AbstractCegarLoop]: Abstraction has 2531 states and 3995 transitions. [2018-11-18 15:08:58,517 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:08:58,517 INFO L276 IsEmpty]: Start isEmpty. Operand 2531 states and 3995 transitions. [2018-11-18 15:08:58,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-11-18 15:08:58,520 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:08:58,520 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:08:58,520 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:08:58,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:08:58,521 INFO L82 PathProgramCache]: Analyzing trace with hash -1171427842, now seen corresponding path program 1 times [2018-11-18 15:08:58,521 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:08:58,521 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:08:58,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:08:59,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:08:59,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:08:59,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:08:59,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:08:59,197 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:59,198 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:59,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:08:59,199 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,204 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,215 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:08:59,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:08:59,234 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:08:59,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:08:59,234 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,238 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:08:59,261 INFO L134 CoverageAnalysis]: Checked inductivity of 317 backedges. 197 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:59,262 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:08:59,290 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:08:59,290 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,291 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:08:59,291 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 15:08:59,326 INFO L134 CoverageAnalysis]: Checked inductivity of 317 backedges. 201 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:08:59,329 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:08:59,329 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:08:59,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:08:59,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:08:59,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:08:59,330 INFO L87 Difference]: Start difference. First operand 2531 states and 3995 transitions. Second operand 9 states. [2018-11-18 15:09:03,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:09:03,238 INFO L93 Difference]: Finished difference Result 6424 states and 9879 transitions. [2018-11-18 15:09:03,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:09:03,239 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 202 [2018-11-18 15:09:03,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:09:03,242 INFO L225 Difference]: With dead ends: 6424 [2018-11-18 15:09:03,242 INFO L226 Difference]: Without dead ends: 3907 [2018-11-18 15:09:03,245 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 411 GetRequests, 399 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:09:03,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3907 states. [2018-11-18 15:09:03,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3907 to 2531. [2018-11-18 15:09:03,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2531 states. [2018-11-18 15:09:03,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2531 states to 2531 states and 3955 transitions. [2018-11-18 15:09:03,402 INFO L78 Accepts]: Start accepts. Automaton has 2531 states and 3955 transitions. Word has length 202 [2018-11-18 15:09:03,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:09:03,402 INFO L480 AbstractCegarLoop]: Abstraction has 2531 states and 3955 transitions. [2018-11-18 15:09:03,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:09:03,402 INFO L276 IsEmpty]: Start isEmpty. Operand 2531 states and 3955 transitions. [2018-11-18 15:09:03,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-11-18 15:09:03,404 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:09:03,404 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:09:03,404 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:09:03,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:09:03,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1119440818, now seen corresponding path program 1 times [2018-11-18 15:09:03,405 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:09:03,405 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:09:03,417 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:09:03,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:09:04,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:09:04,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:09:04,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:09:04,088 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:04,089 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:04,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:09:04,090 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,097 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,101 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,112 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:09:04,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:09:04,133 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:04,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:09:04,134 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,136 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,137 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,137 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:09:04,159 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 203 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:09:04,160 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:09:04,180 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:09:04,180 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,180 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:04,180 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:09:04,194 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 207 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:09:04,196 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:09:04,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:09:04,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:09:04,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:09:04,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:09:04,198 INFO L87 Difference]: Start difference. First operand 2531 states and 3955 transitions. Second operand 9 states. [2018-11-18 15:09:07,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:09:07,863 INFO L93 Difference]: Finished difference Result 6264 states and 9583 transitions. [2018-11-18 15:09:07,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:09:07,864 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 203 [2018-11-18 15:09:07,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:09:07,866 INFO L225 Difference]: With dead ends: 6264 [2018-11-18 15:09:07,866 INFO L226 Difference]: Without dead ends: 3747 [2018-11-18 15:09:07,869 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 413 GetRequests, 401 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:09:07,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3747 states. [2018-11-18 15:09:08,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3747 to 2531. [2018-11-18 15:09:08,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2531 states. [2018-11-18 15:09:08,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2531 states to 2531 states and 3915 transitions. [2018-11-18 15:09:08,023 INFO L78 Accepts]: Start accepts. Automaton has 2531 states and 3915 transitions. Word has length 203 [2018-11-18 15:09:08,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:09:08,023 INFO L480 AbstractCegarLoop]: Abstraction has 2531 states and 3915 transitions. [2018-11-18 15:09:08,023 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:09:08,023 INFO L276 IsEmpty]: Start isEmpty. Operand 2531 states and 3915 transitions. [2018-11-18 15:09:08,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-11-18 15:09:08,025 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:09:08,025 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:09:08,025 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:09:08,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:09:08,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1751079768, now seen corresponding path program 1 times [2018-11-18 15:09:08,026 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:09:08,026 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:09:08,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:09:08,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:09:08,745 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:09:08,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:09:08,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:09:08,774 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:08,775 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:08,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:09:08,776 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,781 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,784 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,792 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:09:08,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:09:08,815 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:08,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:09:08,816 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,818 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,819 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,819 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:09:08,844 INFO L134 CoverageAnalysis]: Checked inductivity of 355 backedges. 236 proven. 3 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:09:08,844 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:09:08,864 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:09:08,864 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:08,864 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 15:09:08,878 INFO L134 CoverageAnalysis]: Checked inductivity of 355 backedges. 239 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:09:08,881 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:09:08,881 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:09:08,881 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:09:08,881 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:09:08,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:09:08,881 INFO L87 Difference]: Start difference. First operand 2531 states and 3915 transitions. Second operand 9 states. [2018-11-18 15:09:12,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:09:12,488 INFO L93 Difference]: Finished difference Result 6130 states and 9343 transitions. [2018-11-18 15:09:12,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:09:12,489 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 203 [2018-11-18 15:09:12,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:09:12,491 INFO L225 Difference]: With dead ends: 6130 [2018-11-18 15:09:12,491 INFO L226 Difference]: Without dead ends: 3927 [2018-11-18 15:09:12,493 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 413 GetRequests, 401 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:09:12,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3927 states. [2018-11-18 15:09:12,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3927 to 2551. [2018-11-18 15:09:12,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2551 states. [2018-11-18 15:09:12,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2551 states to 2551 states and 3913 transitions. [2018-11-18 15:09:12,655 INFO L78 Accepts]: Start accepts. Automaton has 2551 states and 3913 transitions. Word has length 203 [2018-11-18 15:09:12,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:09:12,655 INFO L480 AbstractCegarLoop]: Abstraction has 2551 states and 3913 transitions. [2018-11-18 15:09:12,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:09:12,656 INFO L276 IsEmpty]: Start isEmpty. Operand 2551 states and 3913 transitions. [2018-11-18 15:09:12,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-11-18 15:09:12,657 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:09:12,657 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:09:12,658 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:09:12,658 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:09:12,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1426678152, now seen corresponding path program 1 times [2018-11-18 15:09:12,658 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:09:12,658 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:09:12,670 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:09:13,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 15:09:13,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 15:09:13,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 15:09:13,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 15:09:13,402 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:13,403 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:13,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 15:09:13,404 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,411 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,415 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,422 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,422 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 15:09:13,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 15:09:13,442 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 15:09:13,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 15:09:13,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,446 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,447 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,448 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 15:09:13,483 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 241 proven. 3 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:09:13,484 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 15:09:13,507 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 15:09:13,507 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,508 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 15:09:13,508 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 15:09:13,523 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 244 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 15:09:13,525 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 15:09:13,525 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 15:09:13,526 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 15:09:13,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 15:09:13,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 15:09:13,526 INFO L87 Difference]: Start difference. First operand 2551 states and 3913 transitions. Second operand 9 states. [2018-11-18 15:09:17,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 15:09:17,339 INFO L93 Difference]: Finished difference Result 6282 states and 9481 transitions. [2018-11-18 15:09:17,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 15:09:17,340 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 204 [2018-11-18 15:09:17,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 15:09:17,342 INFO L225 Difference]: With dead ends: 6282 [2018-11-18 15:09:17,342 INFO L226 Difference]: Without dead ends: 4072 [2018-11-18 15:09:17,344 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 415 GetRequests, 403 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 15:09:17,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4072 states. [2018-11-18 15:09:17,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4072 to 2727. [2018-11-18 15:09:17,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2727 states. [2018-11-18 15:09:17,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2727 states to 2727 states and 4113 transitions. [2018-11-18 15:09:17,513 INFO L78 Accepts]: Start accepts. Automaton has 2727 states and 4113 transitions. Word has length 204 [2018-11-18 15:09:17,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 15:09:17,514 INFO L480 AbstractCegarLoop]: Abstraction has 2727 states and 4113 transitions. [2018-11-18 15:09:17,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 15:09:17,514 INFO L276 IsEmpty]: Start isEmpty. Operand 2727 states and 4113 transitions. [2018-11-18 15:09:17,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-11-18 15:09:17,516 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 15:09:17,516 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 15:09:17,516 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 15:09:17,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 15:09:17,516 INFO L82 PathProgramCache]: Analyzing trace with hash -1969145605, now seen corresponding path program 1 times [2018-11-18 15:09:17,516 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 15:09:17,516 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 15:09:17,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 15:09:17,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 15:09:18,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 15:09:18,795 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 15:09:18,856 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 15:09:18,857 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 15:09:18,925 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 03:09:18 BoogieIcfgContainer [2018-11-18 15:09:18,926 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 15:09:18,926 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 15:09:18,926 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 15:09:18,926 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 15:09:18,926 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 03:04:12" (3/4) ... [2018-11-18 15:09:18,928 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 15:09:18,951 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 15:09:18,951 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 15:09:19,047 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_c9d7f8bb-6134-4dfb-acdc-07554bec942f/bin-2019/utaipan/witness.graphml [2018-11-18 15:09:19,048 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 15:09:19,048 INFO L168 Benchmark]: Toolchain (without parser) took 310209.66 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 192.9 MB). Free memory was 943.3 MB in the beginning and 815.9 MB in the end (delta: 127.4 MB). Peak memory consumption was 320.3 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,049 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 15:09:19,050 INFO L168 Benchmark]: CACSL2BoogieTranslator took 826.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 943.3 MB in the beginning and 1.1 GB in the end (delta: -120.3 MB). Peak memory consumption was 100.9 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,050 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,050 INFO L168 Benchmark]: Boogie Preprocessor took 58.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,050 INFO L168 Benchmark]: RCFGBuilder took 3076.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 966.5 MB in the end (delta: 86.2 MB). Peak memory consumption was 86.2 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,050 INFO L168 Benchmark]: TraceAbstraction took 306086.20 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 37.7 MB). Free memory was 966.5 MB in the beginning and 845.2 MB in the end (delta: 121.3 MB). Peak memory consumption was 159.1 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,051 INFO L168 Benchmark]: Witness Printer took 121.73 ms. Allocated memory is still 1.2 GB. Free memory was 845.2 MB in the beginning and 815.9 MB in the end (delta: 29.3 MB). Peak memory consumption was 29.3 MB. Max. memory is 11.5 GB. [2018-11-18 15:09:19,052 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 826.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 943.3 MB in the beginning and 1.1 GB in the end (delta: -120.3 MB). Peak memory consumption was 100.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 58.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 3076.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 966.5 MB in the end (delta: 86.2 MB). Peak memory consumption was 86.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 306086.20 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 37.7 MB). Free memory was 966.5 MB in the beginning and 845.2 MB in the end (delta: 121.3 MB). Peak memory consumption was 159.1 MB. Max. memory is 11.5 GB. * Witness Printer took 121.73 ms. Allocated memory is still 1.2 GB. Free memory was 845.2 MB in the beginning and 815.9 MB in the end (delta: 29.3 MB). Peak memory consumption was 29.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1726]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L1042] static int init = 1; [L1043] FCALL static SSL_METHOD SSLv3_server_data ; VAL [\old(init)=0, \old(SSLv3_server_data)=null, \old(SSLv3_server_data)=null, init=1, SSLv3_server_data={1777282930:0}] [L1065] SSL *s ; [L1066] int tmp ; [L1070] EXPR, FCALL malloc(sizeof(SSL)) [L1070] s = malloc(sizeof(SSL)) [L1071] EXPR, FCALL malloc(sizeof(struct ssl3_state_st)) [L1071] FCALL s->s3 = malloc(sizeof(struct ssl3_state_st)) [L1072] EXPR, FCALL malloc(sizeof(SSL_CTX)) [L1072] FCALL s->ctx = malloc(sizeof(SSL_CTX)) [L1073] EXPR, FCALL malloc(sizeof(SSL_SESSION)) [L1073] FCALL s->session = malloc(sizeof(SSL_SESSION)) VAL [init=1, malloc(sizeof(SSL))={126461040:0}, malloc(sizeof(SSL_CTX))={1777282931:0}, malloc(sizeof(SSL_SESSION))={1777282866:0}, malloc(sizeof(struct ssl3_state_st))={126465136:0}, s={126461040:0}, SSLv3_server_data={1777282930:0}] [L1074] CALL ssl3_accept(s) VAL [init=1, s={126461040:0}, SSLv3_server_data={1777282930:0}] [L1080] BUF_MEM *buf ; [L1081] unsigned long l ; [L1082] unsigned long Time ; [L1083] unsigned long tmp ; [L1084] void (*cb)() ; [L1085] long num1 ; [L1086] int ret ; [L1087] int new_state ; [L1088] int state ; [L1089] int skip ; [L1090] int got_new_session ; [L1091] int tmp___1 = __VERIFIER_nondet_int() ; [L1092] int tmp___2 = __VERIFIER_nondet_int() ; [L1093] int tmp___3 = __VERIFIER_nondet_int() ; [L1094] int tmp___4 = __VERIFIER_nondet_int() ; [L1095] int tmp___5 = __VERIFIER_nondet_int() ; [L1096] int tmp___6 = __VERIFIER_nondet_int() ; [L1097] int tmp___7 ; [L1098] long tmp___8 = __VERIFIER_nondet_long() ; [L1099] int tmp___9 = __VERIFIER_nondet_int() ; [L1100] int tmp___10 = __VERIFIER_nondet_int() ; [L1101] int blastFlag ; [L1105] FCALL s->state = 8464 [L1106] blastFlag = 0 [L1107] FCALL s->hit=__VERIFIER_nondet_int () [L1108] FCALL s->state = 8464 [L1109] tmp = __VERIFIER_nondet_int() [L1110] Time = tmp [L1111] cb = (void (*)())((void *)0) [L1112] ret = -1 [L1113] skip = 0 [L1114] got_new_session = 0 [L1115] EXPR, FCALL s->info_callback VAL [={0:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->info_callback={2048:0}, skip=0, SSLv3_server_data={1777282930:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1115] COND TRUE (unsigned long )s->info_callback != (unsigned long )((void *)0) [L1116] EXPR, FCALL s->info_callback [L1116] cb = s->info_callback [L1120] EXPR, FCALL s->in_handshake [L1120] FCALL s->in_handshake += 1 [L1121] COND FALSE !(tmp___1 & 12288) VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] EXPR, FCALL s->cert VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->cert={0:1}, skip=0, SSLv3_server_data={1777282930:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] COND FALSE !((unsigned long )s->cert == (unsigned long )((void *)0)) [L1136] COND TRUE 1 VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={126461040:0}, s={126461040:0}, s->state=8464, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND TRUE s->state == 8464 [L1323] FCALL s->shutdown = 0 [L1324] ret = __VERIFIER_nondet_int() [L1325] COND TRUE blastFlag == 0 [L1326] blastFlag = 1 VAL [={2048:0}, blastFlag=1, got_new_session=0, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1330] COND FALSE !(ret <= 0) [L1335] got_new_session = 1 [L1336] FCALL s->state = 8496 [L1337] FCALL s->init_num = 0 VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2048:0}, (s->s3)->tmp.reuse_message=1, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->s3={126465136:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8496, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND TRUE s->state == 8496 [L1341] ret = __VERIFIER_nondet_int() [L1342] COND TRUE blastFlag == 1 [L1343] blastFlag = 2 VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1347] COND FALSE !(ret <= 0) [L1352] FCALL s->hit VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->hit=1, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1352] COND TRUE s->hit [L1353] FCALL s->state = 8656 VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1357] FCALL s->init_num = 0 VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2048:0}, (s->s3)->tmp.reuse_message=1, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->s3={126465136:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8656, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND TRUE s->state == 8656 [L1570] EXPR, FCALL s->session [L1570] EXPR, FCALL s->s3 [L1570] EXPR, FCALL (s->s3)->tmp.new_cipher [L1570] FCALL (s->session)->cipher = (s->s3)->tmp.new_cipher [L1571] COND FALSE !(! tmp___9) [L1577] ret = __VERIFIER_nondet_int() [L1578] COND TRUE blastFlag == 2 [L1579] blastFlag = 3 VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1583] COND FALSE !(ret <= 0) [L1588] FCALL s->state = 8672 [L1589] FCALL s->init_num = 0 VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1590] COND FALSE !(! tmp___10) VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2048:0}, (s->s3)->tmp.reuse_message=1, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->s3={126465136:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND FALSE !(s->state == 8656) [L1232] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1232] COND FALSE !(s->state == 8657) [L1235] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8672, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1235] COND TRUE s->state == 8672 [L1599] ret = __VERIFIER_nondet_int() [L1600] COND TRUE blastFlag == 3 [L1601] blastFlag = 4 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1613] COND FALSE !(ret <= 0) [L1618] FCALL s->state = 8448 [L1619] FCALL s->hit VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->hit=1, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1619] COND TRUE s->hit [L1620] EXPR, FCALL s->s3 [L1620] FCALL (s->s3)->tmp.next_state = 8640 [L1624] FCALL s->init_num = 0 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2048:0}, (s->s3)->tmp.reuse_message=1, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->s3={126465136:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8448, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND TRUE s->state == 8448 [L1490] COND FALSE !(num1 > 0L) VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1503] EXPR, FCALL s->s3 [L1503] EXPR, FCALL (s->s3)->tmp.next_state [L1503] FCALL s->state = (s->s3)->tmp.next_state [L1685] EXPR, FCALL s->s3 [L1685] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2048:0}, (s->s3)->tmp.reuse_message=1, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->s3={126465136:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1685] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1714] skip = 0 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={126461040:0}, s={126461040:0}, s->state=8640, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND TRUE s->state == 8640 [L1550] ret = __VERIFIER_nondet_int() [L1551] COND TRUE blastFlag == 4 VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1726] __VERIFIER_error() VAL [={2048:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={126461040:0}, s={126461040:0}, skip=0, SSLv3_server_data={1777282930:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 160 locations, 1 error locations. UNSAFE Result, 306.0s OverallTime, 26 OverallIterations, 7 TraceHistogramMax, 281.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6723 SDtfs, 14089 SDslu, 16389 SDs, 0 SdLazy, 16139 SolverSat, 2067 SolverUnsat, 113 SolverUnknown, 0 SolverNotchecked, 267.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 7038 GetRequests, 6832 SyntacticMatches, 8 SemanticMatches, 198 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 308 ImplicationChecksByTransitivity, 4.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2727occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 25 MinimizatonAttempts, 23482 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.7s SsaConstructionTime, 8.4s SatisfiabilityAnalysisTime, 10.8s InterpolantComputationTime, 4619 NumberOfCodeBlocks, 4619 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 6913 ConstructedInterpolants, 415 QuantifiedInterpolants, 9041913 SizeOfPredicates, 160 NumberOfNonLiveVariables, 10150 ConjunctsInSsa, 171 ConjunctsInUnsatCore, 39 InterpolantComputations, 24 PerfectInterpolantSequences, 9506/10180 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...