./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c336041bbe834e5f5652b9c9de80bd23d0aa7014 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c336041bbe834e5f5652b9c9de80bd23d0aa7014 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 17:03:57,784 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 17:03:57,786 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 17:03:57,795 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 17:03:57,802 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 17:03:57,803 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 17:03:57,804 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 17:03:57,805 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 17:03:57,807 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 17:03:57,807 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 17:03:57,808 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 17:03:57,809 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 17:03:57,810 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 17:03:57,811 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 17:03:57,811 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 17:03:57,812 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 17:03:57,813 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 17:03:57,815 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 17:03:57,817 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 17:03:57,819 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 17:03:57,820 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 17:03:57,821 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 17:03:57,823 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 17:03:57,823 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 17:03:57,823 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 17:03:57,824 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 17:03:57,825 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 17:03:57,826 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 17:03:57,827 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 17:03:57,828 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 17:03:57,828 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 17:03:57,829 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 17:03:57,829 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 17:03:57,829 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 17:03:57,830 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 17:03:57,831 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 17:03:57,831 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 17:03:57,843 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 17:03:57,843 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 17:03:57,844 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 17:03:57,844 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 17:03:57,844 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 17:03:57,845 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 17:03:57,845 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 17:03:57,845 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 17:03:57,845 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 17:03:57,845 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 17:03:57,846 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 17:03:57,846 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 17:03:57,846 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 17:03:57,847 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 17:03:57,847 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 17:03:57,847 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 17:03:57,847 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 17:03:57,847 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 17:03:57,848 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 17:03:57,848 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 17:03:57,848 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 17:03:57,850 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 17:03:57,850 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 17:03:57,850 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 17:03:57,850 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 17:03:57,850 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 17:03:57,851 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 17:03:57,851 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 17:03:57,851 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 17:03:57,851 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 17:03:57,851 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 17:03:57,852 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 17:03:57,852 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 17:03:57,852 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 17:03:57,852 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 17:03:57,852 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 17:03:57,853 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 17:03:57,853 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c336041bbe834e5f5652b9c9de80bd23d0aa7014 [2018-11-18 17:03:57,879 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 17:03:57,894 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 17:03:57,897 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 17:03:57,898 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 17:03:57,898 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 17:03:57,899 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/../../sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c [2018-11-18 17:03:57,952 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/08939d02a/217b7c0ea6ca40cfbcbe9bfb44d2dc80/FLAG85a53cd00 [2018-11-18 17:03:58,529 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 17:03:58,530 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c [2018-11-18 17:03:58,545 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/08939d02a/217b7c0ea6ca40cfbcbe9bfb44d2dc80/FLAG85a53cd00 [2018-11-18 17:03:58,921 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/08939d02a/217b7c0ea6ca40cfbcbe9bfb44d2dc80 [2018-11-18 17:03:58,925 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 17:03:58,926 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 17:03:58,927 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 17:03:58,927 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 17:03:58,931 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 17:03:58,932 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:03:58" (1/1) ... [2018-11-18 17:03:58,934 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e9d0273 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:03:58, skipping insertion in model container [2018-11-18 17:03:58,934 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:03:58" (1/1) ... [2018-11-18 17:03:58,944 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 17:03:58,996 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 17:03:59,661 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 17:03:59,675 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 17:04:00,217 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 17:04:00,271 INFO L195 MainTranslator]: Completed translation [2018-11-18 17:04:00,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00 WrapperNode [2018-11-18 17:04:00,272 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 17:04:00,281 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 17:04:00,281 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 17:04:00,281 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 17:04:00,289 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,329 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,337 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 17:04:00,348 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 17:04:00,349 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 17:04:00,349 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 17:04:00,359 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,359 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,377 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,378 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,470 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,478 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,480 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... [2018-11-18 17:04:00,504 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 17:04:00,504 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 17:04:00,504 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 17:04:00,504 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 17:04:00,505 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 17:04:00,707 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-18 17:04:00,707 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 17:04:00,710 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 17:04:00,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-18 17:04:00,710 INFO L130 BoogieDeclarations]: Found specification of procedure ssl3_accept [2018-11-18 17:04:00,713 INFO L138 BoogieDeclarations]: Found implementation of procedure ssl3_accept [2018-11-18 17:04:00,713 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-18 17:04:00,713 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-18 17:04:00,713 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 17:04:00,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 17:04:00,714 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 17:04:00,714 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 17:04:00,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 17:04:00,714 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-18 17:04:01,695 WARN L684 $ProcedureCfgBuilder]: Two Gotos in a row! There was dead code [2018-11-18 17:04:01,695 WARN L649 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-18 17:04:02,950 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 17:04:02,951 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:04:02 BoogieIcfgContainer [2018-11-18 17:04:02,951 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 17:04:02,952 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 17:04:02,952 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 17:04:02,955 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 17:04:02,955 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 05:03:58" (1/3) ... [2018-11-18 17:04:02,956 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62c1203 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:04:02, skipping insertion in model container [2018-11-18 17:04:02,956 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:04:00" (2/3) ... [2018-11-18 17:04:02,956 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62c1203 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:04:02, skipping insertion in model container [2018-11-18 17:04:02,956 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:04:02" (3/3) ... [2018-11-18 17:04:02,958 INFO L112 eAbstractionObserver]: Analyzing ICFG s3_srvr.blast.13_false-unreach-call.i.cil.c [2018-11-18 17:04:02,966 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 17:04:02,978 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 17:04:02,993 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 17:04:03,029 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 17:04:03,030 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 17:04:03,030 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 17:04:03,030 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 17:04:03,030 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 17:04:03,030 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 17:04:03,030 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 17:04:03,030 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 17:04:03,056 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states. [2018-11-18 17:04:03,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 17:04:03,065 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:03,066 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:03,069 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:03,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:03,082 INFO L82 PathProgramCache]: Analyzing trace with hash 661829922, now seen corresponding path program 1 times [2018-11-18 17:04:03,084 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:03,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:03,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:03,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:03,138 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:03,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:03,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:03,655 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:03,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:03,656 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:03,660 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:03,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:03,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:03,675 INFO L87 Difference]: Start difference. First operand 158 states. Second operand 4 states. [2018-11-18 17:04:04,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:04,996 INFO L93 Difference]: Finished difference Result 336 states and 561 transitions. [2018-11-18 17:04:04,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:04,998 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-11-18 17:04:04,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:05,011 INFO L225 Difference]: With dead ends: 336 [2018-11-18 17:04:05,011 INFO L226 Difference]: Without dead ends: 171 [2018-11-18 17:04:05,016 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:05,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-11-18 17:04:05,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 154. [2018-11-18 17:04:05,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:05,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 234 transitions. [2018-11-18 17:04:05,061 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 234 transitions. Word has length 42 [2018-11-18 17:04:05,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:05,061 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 234 transitions. [2018-11-18 17:04:05,062 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:05,062 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 234 transitions. [2018-11-18 17:04:05,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 17:04:05,063 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:05,064 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:05,064 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:05,064 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:05,064 INFO L82 PathProgramCache]: Analyzing trace with hash -1492732429, now seen corresponding path program 1 times [2018-11-18 17:04:05,064 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:05,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:05,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:05,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:05,067 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:05,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:05,378 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:05,382 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:05,382 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:05,382 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:05,384 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:05,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:05,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:05,384 INFO L87 Difference]: Start difference. First operand 154 states and 234 transitions. Second operand 4 states. [2018-11-18 17:04:06,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:06,487 INFO L93 Difference]: Finished difference Result 299 states and 452 transitions. [2018-11-18 17:04:06,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:06,487 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2018-11-18 17:04:06,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:06,489 INFO L225 Difference]: With dead ends: 299 [2018-11-18 17:04:06,489 INFO L226 Difference]: Without dead ends: 171 [2018-11-18 17:04:06,490 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:06,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-11-18 17:04:06,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 154. [2018-11-18 17:04:06,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:06,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 233 transitions. [2018-11-18 17:04:06,508 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 233 transitions. Word has length 56 [2018-11-18 17:04:06,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:06,508 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 233 transitions. [2018-11-18 17:04:06,508 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:06,508 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 233 transitions. [2018-11-18 17:04:06,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 17:04:06,509 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:06,509 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:06,510 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:06,510 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:06,510 INFO L82 PathProgramCache]: Analyzing trace with hash 723866890, now seen corresponding path program 1 times [2018-11-18 17:04:06,510 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:06,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:06,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:06,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:06,511 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:06,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:06,763 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:06,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:06,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:06,764 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:06,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:06,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:06,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:06,765 INFO L87 Difference]: Start difference. First operand 154 states and 233 transitions. Second operand 4 states. [2018-11-18 17:04:07,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:07,372 INFO L93 Difference]: Finished difference Result 298 states and 450 transitions. [2018-11-18 17:04:07,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:07,372 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 17:04:07,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:07,373 INFO L225 Difference]: With dead ends: 298 [2018-11-18 17:04:07,374 INFO L226 Difference]: Without dead ends: 170 [2018-11-18 17:04:07,374 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:07,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-11-18 17:04:07,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 154. [2018-11-18 17:04:07,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:07,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 232 transitions. [2018-11-18 17:04:07,399 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 232 transitions. Word has length 57 [2018-11-18 17:04:07,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:07,399 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 232 transitions. [2018-11-18 17:04:07,400 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:07,400 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 232 transitions. [2018-11-18 17:04:07,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 17:04:07,401 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:07,401 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:07,401 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:07,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:07,402 INFO L82 PathProgramCache]: Analyzing trace with hash 1787016950, now seen corresponding path program 1 times [2018-11-18 17:04:07,402 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:07,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:07,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:07,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:07,403 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:07,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:07,852 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:07,852 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:07,852 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:07,852 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:07,852 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:07,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:07,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:07,854 INFO L87 Difference]: Start difference. First operand 154 states and 232 transitions. Second operand 4 states. [2018-11-18 17:04:08,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:08,880 INFO L93 Difference]: Finished difference Result 298 states and 449 transitions. [2018-11-18 17:04:08,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:08,883 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 17:04:08,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:08,884 INFO L225 Difference]: With dead ends: 298 [2018-11-18 17:04:08,884 INFO L226 Difference]: Without dead ends: 170 [2018-11-18 17:04:08,887 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:08,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-11-18 17:04:08,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 154. [2018-11-18 17:04:08,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:08,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 231 transitions. [2018-11-18 17:04:08,895 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 231 transitions. Word has length 57 [2018-11-18 17:04:08,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:08,895 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 231 transitions. [2018-11-18 17:04:08,895 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:08,895 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 231 transitions. [2018-11-18 17:04:08,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 17:04:08,896 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:08,897 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:08,897 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:08,897 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:08,897 INFO L82 PathProgramCache]: Analyzing trace with hash -1281479618, now seen corresponding path program 1 times [2018-11-18 17:04:08,897 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:08,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:08,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:08,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:08,899 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:08,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:09,072 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:09,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:09,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:09,073 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:09,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:09,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:09,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:09,074 INFO L87 Difference]: Start difference. First operand 154 states and 231 transitions. Second operand 4 states. [2018-11-18 17:04:10,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:10,169 INFO L93 Difference]: Finished difference Result 297 states and 447 transitions. [2018-11-18 17:04:10,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:10,170 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 17:04:10,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:10,171 INFO L225 Difference]: With dead ends: 297 [2018-11-18 17:04:10,171 INFO L226 Difference]: Without dead ends: 169 [2018-11-18 17:04:10,171 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:10,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-11-18 17:04:10,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 154. [2018-11-18 17:04:10,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:10,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 230 transitions. [2018-11-18 17:04:10,178 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 230 transitions. Word has length 57 [2018-11-18 17:04:10,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:10,178 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 230 transitions. [2018-11-18 17:04:10,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:10,178 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 230 transitions. [2018-11-18 17:04:10,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-18 17:04:10,179 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:10,179 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:10,179 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:10,180 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:10,180 INFO L82 PathProgramCache]: Analyzing trace with hash -1871612065, now seen corresponding path program 1 times [2018-11-18 17:04:10,180 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:10,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:10,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:10,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:10,181 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:10,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:10,398 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:10,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:10,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:10,398 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:10,398 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:10,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:10,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:10,399 INFO L87 Difference]: Start difference. First operand 154 states and 230 transitions. Second operand 4 states. [2018-11-18 17:04:11,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:11,474 INFO L93 Difference]: Finished difference Result 295 states and 444 transitions. [2018-11-18 17:04:11,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:11,475 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 57 [2018-11-18 17:04:11,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:11,476 INFO L225 Difference]: With dead ends: 295 [2018-11-18 17:04:11,476 INFO L226 Difference]: Without dead ends: 167 [2018-11-18 17:04:11,477 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:11,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-18 17:04:11,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-11-18 17:04:11,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:11,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 229 transitions. [2018-11-18 17:04:11,494 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 229 transitions. Word has length 57 [2018-11-18 17:04:11,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:11,496 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 229 transitions. [2018-11-18 17:04:11,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:11,496 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 229 transitions. [2018-11-18 17:04:11,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-18 17:04:11,497 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:11,497 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:11,497 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:11,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:11,497 INFO L82 PathProgramCache]: Analyzing trace with hash 860619850, now seen corresponding path program 1 times [2018-11-18 17:04:11,497 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:11,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:11,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:11,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:11,499 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:11,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:11,906 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:11,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:11,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:11,906 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:11,906 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:11,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:11,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:11,907 INFO L87 Difference]: Start difference. First operand 154 states and 229 transitions. Second operand 4 states. [2018-11-18 17:04:12,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:12,420 INFO L93 Difference]: Finished difference Result 295 states and 443 transitions. [2018-11-18 17:04:12,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:12,420 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2018-11-18 17:04:12,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:12,421 INFO L225 Difference]: With dead ends: 295 [2018-11-18 17:04:12,421 INFO L226 Difference]: Without dead ends: 167 [2018-11-18 17:04:12,422 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:12,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-18 17:04:12,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-11-18 17:04:12,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:12,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 228 transitions. [2018-11-18 17:04:12,435 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 228 transitions. Word has length 58 [2018-11-18 17:04:12,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:12,435 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 228 transitions. [2018-11-18 17:04:12,435 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:12,435 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 228 transitions. [2018-11-18 17:04:12,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-18 17:04:12,436 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:12,438 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:12,438 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:12,438 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:12,438 INFO L82 PathProgramCache]: Analyzing trace with hash 925046225, now seen corresponding path program 1 times [2018-11-18 17:04:12,438 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:12,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:12,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:12,440 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:12,440 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:12,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:12,808 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:12,808 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:12,808 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:12,809 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:12,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:12,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:12,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:12,809 INFO L87 Difference]: Start difference. First operand 154 states and 228 transitions. Second operand 4 states. [2018-11-18 17:04:14,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:14,057 INFO L93 Difference]: Finished difference Result 295 states and 442 transitions. [2018-11-18 17:04:14,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:14,067 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-11-18 17:04:14,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:14,068 INFO L225 Difference]: With dead ends: 295 [2018-11-18 17:04:14,068 INFO L226 Difference]: Without dead ends: 167 [2018-11-18 17:04:14,068 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:14,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-11-18 17:04:14,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-11-18 17:04:14,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:14,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 227 transitions. [2018-11-18 17:04:14,073 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 227 transitions. Word has length 59 [2018-11-18 17:04:14,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:14,073 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 227 transitions. [2018-11-18 17:04:14,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:14,073 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 227 transitions. [2018-11-18 17:04:14,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 17:04:14,074 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:14,074 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:14,075 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:14,075 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:14,075 INFO L82 PathProgramCache]: Analyzing trace with hash 1640229253, now seen corresponding path program 1 times [2018-11-18 17:04:14,075 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:14,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:14,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:14,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:14,077 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:14,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:14,165 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:14,166 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:14,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:14,166 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:14,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:14,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:14,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:14,167 INFO L87 Difference]: Start difference. First operand 154 states and 227 transitions. Second operand 4 states. [2018-11-18 17:04:14,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:14,775 INFO L93 Difference]: Finished difference Result 285 states and 428 transitions. [2018-11-18 17:04:14,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:14,775 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-18 17:04:14,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:14,776 INFO L225 Difference]: With dead ends: 285 [2018-11-18 17:04:14,776 INFO L226 Difference]: Without dead ends: 157 [2018-11-18 17:04:14,777 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:14,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-11-18 17:04:14,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 154. [2018-11-18 17:04:14,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-11-18 17:04:14,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 226 transitions. [2018-11-18 17:04:14,779 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 226 transitions. Word has length 60 [2018-11-18 17:04:14,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:14,780 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 226 transitions. [2018-11-18 17:04:14,780 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:14,780 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 226 transitions. [2018-11-18 17:04:14,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 17:04:14,784 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:14,784 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:14,784 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:14,784 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:14,785 INFO L82 PathProgramCache]: Analyzing trace with hash 233986428, now seen corresponding path program 1 times [2018-11-18 17:04:14,785 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:14,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:14,786 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:14,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:14,786 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:14,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:14,903 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:14,903 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:14,903 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:14,903 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:14,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:14,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:14,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:14,904 INFO L87 Difference]: Start difference. First operand 154 states and 226 transitions. Second operand 4 states. [2018-11-18 17:04:15,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:15,348 INFO L93 Difference]: Finished difference Result 326 states and 490 transitions. [2018-11-18 17:04:15,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:15,349 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 60 [2018-11-18 17:04:15,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:15,350 INFO L225 Difference]: With dead ends: 326 [2018-11-18 17:04:15,350 INFO L226 Difference]: Without dead ends: 198 [2018-11-18 17:04:15,351 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:15,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-18 17:04:15,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 177. [2018-11-18 17:04:15,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-11-18 17:04:15,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 265 transitions. [2018-11-18 17:04:15,357 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 265 transitions. Word has length 60 [2018-11-18 17:04:15,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:15,358 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 265 transitions. [2018-11-18 17:04:15,358 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:15,358 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 265 transitions. [2018-11-18 17:04:15,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-18 17:04:15,359 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:15,359 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:15,359 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:15,359 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:15,359 INFO L82 PathProgramCache]: Analyzing trace with hash 2094117069, now seen corresponding path program 1 times [2018-11-18 17:04:15,359 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:15,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:15,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:15,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:15,363 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:15,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:15,504 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:15,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:15,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:15,504 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:15,504 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:15,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:15,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:15,505 INFO L87 Difference]: Start difference. First operand 177 states and 265 transitions. Second operand 4 states. [2018-11-18 17:04:16,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:16,293 INFO L93 Difference]: Finished difference Result 349 states and 528 transitions. [2018-11-18 17:04:16,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:16,294 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2018-11-18 17:04:16,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:16,295 INFO L225 Difference]: With dead ends: 349 [2018-11-18 17:04:16,295 INFO L226 Difference]: Without dead ends: 198 [2018-11-18 17:04:16,296 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:16,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-18 17:04:16,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 177. [2018-11-18 17:04:16,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-11-18 17:04:16,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 264 transitions. [2018-11-18 17:04:16,316 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 264 transitions. Word has length 74 [2018-11-18 17:04:16,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:16,317 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 264 transitions. [2018-11-18 17:04:16,317 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:16,317 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 264 transitions. [2018-11-18 17:04:16,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 17:04:16,318 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:16,318 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:16,320 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:16,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:16,321 INFO L82 PathProgramCache]: Analyzing trace with hash 247051632, now seen corresponding path program 1 times [2018-11-18 17:04:16,321 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:16,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:16,323 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:16,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:16,324 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:16,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:16,602 WARN L180 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:16,793 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 6 DAG size of output: 3 [2018-11-18 17:04:16,814 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 17:04:16,815 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:16,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:16,815 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:16,815 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:16,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:16,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:16,816 INFO L87 Difference]: Start difference. First operand 177 states and 264 transitions. Second operand 4 states. [2018-11-18 17:04:18,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:18,506 INFO L93 Difference]: Finished difference Result 358 states and 543 transitions. [2018-11-18 17:04:18,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:18,506 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2018-11-18 17:04:18,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:18,507 INFO L225 Difference]: With dead ends: 358 [2018-11-18 17:04:18,507 INFO L226 Difference]: Without dead ends: 207 [2018-11-18 17:04:18,508 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:18,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-11-18 17:04:18,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 194. [2018-11-18 17:04:18,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-18 17:04:18,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 291 transitions. [2018-11-18 17:04:18,514 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 291 transitions. Word has length 75 [2018-11-18 17:04:18,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:18,515 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 291 transitions. [2018-11-18 17:04:18,515 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:18,515 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 291 transitions. [2018-11-18 17:04:18,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 17:04:18,516 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:18,516 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:18,516 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:18,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:18,516 INFO L82 PathProgramCache]: Analyzing trace with hash -1758294876, now seen corresponding path program 1 times [2018-11-18 17:04:18,516 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:18,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:18,520 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:18,520 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:18,520 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:18,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:18,709 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:18,778 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:18,778 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:18,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:18,779 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:18,779 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:18,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:18,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:18,779 INFO L87 Difference]: Start difference. First operand 194 states and 291 transitions. Second operand 4 states. [2018-11-18 17:04:20,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:20,518 INFO L93 Difference]: Finished difference Result 382 states and 579 transitions. [2018-11-18 17:04:20,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:20,519 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2018-11-18 17:04:20,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:20,519 INFO L225 Difference]: With dead ends: 382 [2018-11-18 17:04:20,520 INFO L226 Difference]: Without dead ends: 214 [2018-11-18 17:04:20,520 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:20,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-11-18 17:04:20,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 194. [2018-11-18 17:04:20,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-18 17:04:20,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 290 transitions. [2018-11-18 17:04:20,535 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 290 transitions. Word has length 75 [2018-11-18 17:04:20,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:20,535 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 290 transitions. [2018-11-18 17:04:20,535 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:20,535 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 290 transitions. [2018-11-18 17:04:20,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 17:04:20,536 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:20,536 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:20,536 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:20,536 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:20,536 INFO L82 PathProgramCache]: Analyzing trace with hash 1946539973, now seen corresponding path program 1 times [2018-11-18 17:04:20,536 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:20,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:20,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:20,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:20,537 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:20,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:20,736 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:20,791 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:20,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:20,791 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:20,791 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:20,791 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:20,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:20,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:20,792 INFO L87 Difference]: Start difference. First operand 194 states and 290 transitions. Second operand 4 states. [2018-11-18 17:04:21,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:21,268 INFO L93 Difference]: Finished difference Result 380 states and 575 transitions. [2018-11-18 17:04:21,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:21,269 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2018-11-18 17:04:21,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:21,270 INFO L225 Difference]: With dead ends: 380 [2018-11-18 17:04:21,270 INFO L226 Difference]: Without dead ends: 212 [2018-11-18 17:04:21,270 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:21,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-18 17:04:21,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 194. [2018-11-18 17:04:21,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-11-18 17:04:21,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 289 transitions. [2018-11-18 17:04:21,286 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 289 transitions. Word has length 75 [2018-11-18 17:04:21,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:21,286 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 289 transitions. [2018-11-18 17:04:21,286 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:21,287 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 289 transitions. [2018-11-18 17:04:21,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-18 17:04:21,287 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:21,287 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:21,288 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:21,288 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:21,288 INFO L82 PathProgramCache]: Analyzing trace with hash -192747716, now seen corresponding path program 1 times [2018-11-18 17:04:21,288 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:21,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:21,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:21,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:21,301 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:21,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:21,483 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-18 17:04:21,484 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:21,484 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 17:04:21,484 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:21,484 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 17:04:21,484 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 17:04:21,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:21,487 INFO L87 Difference]: Start difference. First operand 194 states and 289 transitions. Second operand 5 states. [2018-11-18 17:04:22,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:22,361 INFO L93 Difference]: Finished difference Result 371 states and 561 transitions. [2018-11-18 17:04:22,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 17:04:22,361 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2018-11-18 17:04:22,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:22,362 INFO L225 Difference]: With dead ends: 371 [2018-11-18 17:04:22,363 INFO L226 Difference]: Without dead ends: 203 [2018-11-18 17:04:22,363 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 17:04:22,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-11-18 17:04:22,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 203. [2018-11-18 17:04:22,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 17:04:22,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 300 transitions. [2018-11-18 17:04:22,368 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 300 transitions. Word has length 76 [2018-11-18 17:04:22,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:22,368 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 300 transitions. [2018-11-18 17:04:22,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 17:04:22,378 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 300 transitions. [2018-11-18 17:04:22,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-11-18 17:04:22,384 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:22,385 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:22,385 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:22,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:22,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1594834224, now seen corresponding path program 1 times [2018-11-18 17:04:22,385 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:22,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:22,386 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:22,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:22,386 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:22,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:22,675 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:22,675 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:22,676 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:22,676 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:22,676 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:22,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:22,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:22,676 INFO L87 Difference]: Start difference. First operand 203 states and 300 transitions. Second operand 4 states. [2018-11-18 17:04:23,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:23,074 INFO L93 Difference]: Finished difference Result 407 states and 606 transitions. [2018-11-18 17:04:23,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:23,075 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2018-11-18 17:04:23,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:23,076 INFO L225 Difference]: With dead ends: 407 [2018-11-18 17:04:23,076 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 17:04:23,077 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:23,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 17:04:23,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 203. [2018-11-18 17:04:23,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 17:04:23,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 299 transitions. [2018-11-18 17:04:23,082 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 299 transitions. Word has length 76 [2018-11-18 17:04:23,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:23,082 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 299 transitions. [2018-11-18 17:04:23,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:23,082 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 299 transitions. [2018-11-18 17:04:23,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 17:04:23,083 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:23,083 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:23,083 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:23,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:23,083 INFO L82 PathProgramCache]: Analyzing trace with hash -1304931704, now seen corresponding path program 1 times [2018-11-18 17:04:23,083 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:23,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:23,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:23,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:23,089 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:23,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:23,202 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:23,203 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:23,203 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:23,204 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:23,204 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:23,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:23,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:23,204 INFO L87 Difference]: Start difference. First operand 203 states and 299 transitions. Second operand 4 states. [2018-11-18 17:04:23,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:23,962 INFO L93 Difference]: Finished difference Result 407 states and 604 transitions. [2018-11-18 17:04:23,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:23,962 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-11-18 17:04:23,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:23,963 INFO L225 Difference]: With dead ends: 407 [2018-11-18 17:04:23,964 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 17:04:23,964 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:23,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 17:04:23,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 203. [2018-11-18 17:04:23,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 17:04:23,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 298 transitions. [2018-11-18 17:04:23,975 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 298 transitions. Word has length 77 [2018-11-18 17:04:23,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:23,975 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 298 transitions. [2018-11-18 17:04:23,975 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:23,975 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 298 transitions. [2018-11-18 17:04:23,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-18 17:04:23,976 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:23,976 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:23,976 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:23,976 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:23,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1996255019, now seen corresponding path program 1 times [2018-11-18 17:04:23,977 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:23,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:23,979 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:23,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:23,979 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:23,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:24,181 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:24,308 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:24,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:24,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:24,308 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:24,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:24,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:24,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:24,309 INFO L87 Difference]: Start difference. First operand 203 states and 298 transitions. Second operand 4 states. [2018-11-18 17:04:25,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:25,065 INFO L93 Difference]: Finished difference Result 407 states and 602 transitions. [2018-11-18 17:04:25,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:25,066 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2018-11-18 17:04:25,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:25,067 INFO L225 Difference]: With dead ends: 407 [2018-11-18 17:04:25,067 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 17:04:25,068 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:25,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 17:04:25,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 203. [2018-11-18 17:04:25,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 17:04:25,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 297 transitions. [2018-11-18 17:04:25,074 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 297 transitions. Word has length 78 [2018-11-18 17:04:25,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:25,074 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 297 transitions. [2018-11-18 17:04:25,074 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:25,074 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 297 transitions. [2018-11-18 17:04:25,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-18 17:04:25,074 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:25,075 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:25,075 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:25,075 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:25,075 INFO L82 PathProgramCache]: Analyzing trace with hash 1254159149, now seen corresponding path program 1 times [2018-11-18 17:04:25,075 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:25,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:25,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:25,076 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:25,076 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:25,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:25,323 WARN L180 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:25,501 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 6 DAG size of output: 3 [2018-11-18 17:04:25,532 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:04:25,532 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:25,533 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:25,533 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:25,534 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:25,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:25,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:25,534 INFO L87 Difference]: Start difference. First operand 203 states and 297 transitions. Second operand 4 states. [2018-11-18 17:04:26,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:26,750 INFO L93 Difference]: Finished difference Result 397 states and 587 transitions. [2018-11-18 17:04:26,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:26,751 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2018-11-18 17:04:26,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:26,752 INFO L225 Difference]: With dead ends: 397 [2018-11-18 17:04:26,752 INFO L226 Difference]: Without dead ends: 220 [2018-11-18 17:04:26,752 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:26,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-11-18 17:04:26,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 203. [2018-11-18 17:04:26,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 17:04:26,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 296 transitions. [2018-11-18 17:04:26,764 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 296 transitions. Word has length 79 [2018-11-18 17:04:26,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:26,765 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 296 transitions. [2018-11-18 17:04:26,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:26,765 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 296 transitions. [2018-11-18 17:04:26,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 17:04:26,767 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:26,767 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:26,768 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:26,768 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:26,768 INFO L82 PathProgramCache]: Analyzing trace with hash 540992405, now seen corresponding path program 1 times [2018-11-18 17:04:26,768 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:26,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:26,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:26,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:26,769 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:26,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:26,908 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 17:04:26,908 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:26,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:04:26,909 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:26,909 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:04:26,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:04:26,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:26,909 INFO L87 Difference]: Start difference. First operand 203 states and 296 transitions. Second operand 3 states. [2018-11-18 17:04:27,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:27,490 INFO L93 Difference]: Finished difference Result 555 states and 829 transitions. [2018-11-18 17:04:27,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:04:27,491 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2018-11-18 17:04:27,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:27,492 INFO L225 Difference]: With dead ends: 555 [2018-11-18 17:04:27,492 INFO L226 Difference]: Without dead ends: 378 [2018-11-18 17:04:27,493 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:27,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 378 states. [2018-11-18 17:04:27,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 378 to 378. [2018-11-18 17:04:27,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 378 states. [2018-11-18 17:04:27,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 556 transitions. [2018-11-18 17:04:27,507 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 556 transitions. Word has length 83 [2018-11-18 17:04:27,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:27,507 INFO L480 AbstractCegarLoop]: Abstraction has 378 states and 556 transitions. [2018-11-18 17:04:27,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:04:27,507 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 556 transitions. [2018-11-18 17:04:27,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-11-18 17:04:27,508 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:27,510 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:27,510 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:27,511 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:27,511 INFO L82 PathProgramCache]: Analyzing trace with hash -2108182396, now seen corresponding path program 1 times [2018-11-18 17:04:27,511 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:27,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:27,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:27,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:27,514 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:27,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:27,670 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:27,671 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:27,671 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:04:27,671 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:27,671 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:04:27,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:04:27,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:27,672 INFO L87 Difference]: Start difference. First operand 378 states and 556 transitions. Second operand 3 states. [2018-11-18 17:04:28,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:28,537 INFO L93 Difference]: Finished difference Result 907 states and 1350 transitions. [2018-11-18 17:04:28,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:04:28,539 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 108 [2018-11-18 17:04:28,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:28,540 INFO L225 Difference]: With dead ends: 907 [2018-11-18 17:04:28,541 INFO L226 Difference]: Without dead ends: 555 [2018-11-18 17:04:28,541 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:28,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2018-11-18 17:04:28,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 553. [2018-11-18 17:04:28,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 553 states. [2018-11-18 17:04:28,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions. [2018-11-18 17:04:28,556 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 108 [2018-11-18 17:04:28,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:28,556 INFO L480 AbstractCegarLoop]: Abstraction has 553 states and 820 transitions. [2018-11-18 17:04:28,556 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:04:28,556 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions. [2018-11-18 17:04:28,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-11-18 17:04:28,557 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:28,557 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:28,558 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:28,558 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:28,558 INFO L82 PathProgramCache]: Analyzing trace with hash 1078782754, now seen corresponding path program 1 times [2018-11-18 17:04:28,558 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:28,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:28,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:28,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:28,564 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:28,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:28,665 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:28,665 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:28,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:04:28,665 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:28,666 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:04:28,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:04:28,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:28,668 INFO L87 Difference]: Start difference. First operand 553 states and 820 transitions. Second operand 3 states. [2018-11-18 17:04:29,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:29,179 INFO L93 Difference]: Finished difference Result 1257 states and 1876 transitions. [2018-11-18 17:04:29,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:04:29,182 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-11-18 17:04:29,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:29,184 INFO L225 Difference]: With dead ends: 1257 [2018-11-18 17:04:29,184 INFO L226 Difference]: Without dead ends: 730 [2018-11-18 17:04:29,185 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:29,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 730 states. [2018-11-18 17:04:29,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 730 to 728. [2018-11-18 17:04:29,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 728 states. [2018-11-18 17:04:29,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 1070 transitions. [2018-11-18 17:04:29,205 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 1070 transitions. Word has length 114 [2018-11-18 17:04:29,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:29,205 INFO L480 AbstractCegarLoop]: Abstraction has 728 states and 1070 transitions. [2018-11-18 17:04:29,205 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:04:29,205 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 1070 transitions. [2018-11-18 17:04:29,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-11-18 17:04:29,207 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:29,207 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:29,207 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:29,207 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:29,207 INFO L82 PathProgramCache]: Analyzing trace with hash -2100845977, now seen corresponding path program 1 times [2018-11-18 17:04:29,207 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:29,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:29,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:29,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:29,212 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:29,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:29,458 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 65 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:29,459 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:29,459 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:29,459 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:29,459 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:29,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:29,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:29,461 INFO L87 Difference]: Start difference. First operand 728 states and 1070 transitions. Second operand 4 states. [2018-11-18 17:04:31,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:31,140 INFO L93 Difference]: Finished difference Result 1896 states and 2804 transitions. [2018-11-18 17:04:31,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:31,160 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 131 [2018-11-18 17:04:31,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:31,164 INFO L225 Difference]: With dead ends: 1896 [2018-11-18 17:04:31,164 INFO L226 Difference]: Without dead ends: 1194 [2018-11-18 17:04:31,167 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:31,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1194 states. [2018-11-18 17:04:31,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1194 to 888. [2018-11-18 17:04:31,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 888 states. [2018-11-18 17:04:31,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 888 states to 888 states and 1362 transitions. [2018-11-18 17:04:31,216 INFO L78 Accepts]: Start accepts. Automaton has 888 states and 1362 transitions. Word has length 131 [2018-11-18 17:04:31,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:31,216 INFO L480 AbstractCegarLoop]: Abstraction has 888 states and 1362 transitions. [2018-11-18 17:04:31,216 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:31,216 INFO L276 IsEmpty]: Start isEmpty. Operand 888 states and 1362 transitions. [2018-11-18 17:04:31,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-11-18 17:04:31,218 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:31,218 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:31,218 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:31,218 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:31,218 INFO L82 PathProgramCache]: Analyzing trace with hash -709050592, now seen corresponding path program 1 times [2018-11-18 17:04:31,218 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:31,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:31,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:31,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:31,219 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:31,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:31,465 WARN L180 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:31,580 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 66 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:31,580 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:31,580 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:31,580 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:31,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:31,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:31,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:31,581 INFO L87 Difference]: Start difference. First operand 888 states and 1362 transitions. Second operand 4 states. [2018-11-18 17:04:32,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:32,440 INFO L93 Difference]: Finished difference Result 2038 states and 3070 transitions. [2018-11-18 17:04:32,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:32,445 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 132 [2018-11-18 17:04:32,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:32,448 INFO L225 Difference]: With dead ends: 2038 [2018-11-18 17:04:32,448 INFO L226 Difference]: Without dead ends: 1176 [2018-11-18 17:04:32,451 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:32,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1176 states. [2018-11-18 17:04:32,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1176 to 892. [2018-11-18 17:04:32,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 892 states. [2018-11-18 17:04:32,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 892 states to 892 states and 1366 transitions. [2018-11-18 17:04:32,478 INFO L78 Accepts]: Start accepts. Automaton has 892 states and 1366 transitions. Word has length 132 [2018-11-18 17:04:32,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:32,478 INFO L480 AbstractCegarLoop]: Abstraction has 892 states and 1366 transitions. [2018-11-18 17:04:32,478 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:32,478 INFO L276 IsEmpty]: Start isEmpty. Operand 892 states and 1366 transitions. [2018-11-18 17:04:32,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 17:04:32,480 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:32,480 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:32,480 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:32,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:32,483 INFO L82 PathProgramCache]: Analyzing trace with hash 483748542, now seen corresponding path program 1 times [2018-11-18 17:04:32,483 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:32,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:32,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:32,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:32,484 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:32,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:32,665 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 130 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 17:04:32,665 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:32,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:32,665 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:32,666 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:32,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:32,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:32,666 INFO L87 Difference]: Start difference. First operand 892 states and 1366 transitions. Second operand 4 states. [2018-11-18 17:04:34,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:34,078 INFO L93 Difference]: Finished difference Result 2232 states and 3404 transitions. [2018-11-18 17:04:34,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:34,079 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 138 [2018-11-18 17:04:34,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:34,083 INFO L225 Difference]: With dead ends: 2232 [2018-11-18 17:04:34,083 INFO L226 Difference]: Without dead ends: 1366 [2018-11-18 17:04:34,086 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:34,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1366 states. [2018-11-18 17:04:34,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1366 to 1000. [2018-11-18 17:04:34,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1000 states. [2018-11-18 17:04:34,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1546 transitions. [2018-11-18 17:04:34,116 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1546 transitions. Word has length 138 [2018-11-18 17:04:34,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:34,116 INFO L480 AbstractCegarLoop]: Abstraction has 1000 states and 1546 transitions. [2018-11-18 17:04:34,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:34,116 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1546 transitions. [2018-11-18 17:04:34,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 17:04:34,120 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:34,120 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:34,121 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:34,122 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:34,122 INFO L82 PathProgramCache]: Analyzing trace with hash -286985024, now seen corresponding path program 1 times [2018-11-18 17:04:34,122 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:34,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:34,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:34,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:34,123 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:34,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:34,231 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 17:04:34,231 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:34,232 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:04:34,232 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:34,232 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:04:34,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:04:34,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:34,232 INFO L87 Difference]: Start difference. First operand 1000 states and 1546 transitions. Second operand 3 states. [2018-11-18 17:04:34,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:34,548 INFO L93 Difference]: Finished difference Result 1247 states and 1926 transitions. [2018-11-18 17:04:34,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:04:34,549 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2018-11-18 17:04:34,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:34,552 INFO L225 Difference]: With dead ends: 1247 [2018-11-18 17:04:34,552 INFO L226 Difference]: Without dead ends: 1245 [2018-11-18 17:04:34,553 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:04:34,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1245 states. [2018-11-18 17:04:34,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1245 to 1243. [2018-11-18 17:04:34,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:34,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1923 transitions. [2018-11-18 17:04:34,584 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1923 transitions. Word has length 138 [2018-11-18 17:04:34,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:34,584 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1923 transitions. [2018-11-18 17:04:34,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:04:34,585 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1923 transitions. [2018-11-18 17:04:34,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-11-18 17:04:34,586 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:34,586 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:34,589 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:34,590 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:34,591 INFO L82 PathProgramCache]: Analyzing trace with hash 857435704, now seen corresponding path program 1 times [2018-11-18 17:04:34,591 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:34,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:34,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:34,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:34,592 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:34,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:34,805 WARN L180 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:34,824 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:34,824 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:34,824 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:34,824 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:34,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:34,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:34,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:34,826 INFO L87 Difference]: Start difference. First operand 1243 states and 1923 transitions. Second operand 4 states. [2018-11-18 17:04:36,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:36,272 INFO L93 Difference]: Finished difference Result 2815 states and 4274 transitions. [2018-11-18 17:04:36,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:36,292 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 145 [2018-11-18 17:04:36,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:36,298 INFO L225 Difference]: With dead ends: 2815 [2018-11-18 17:04:36,298 INFO L226 Difference]: Without dead ends: 1598 [2018-11-18 17:04:36,300 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:36,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1598 states. [2018-11-18 17:04:36,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1598 to 1243. [2018-11-18 17:04:36,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:36,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1918 transitions. [2018-11-18 17:04:36,338 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1918 transitions. Word has length 145 [2018-11-18 17:04:36,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:36,339 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1918 transitions. [2018-11-18 17:04:36,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:36,339 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1918 transitions. [2018-11-18 17:04:36,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-11-18 17:04:36,343 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:36,343 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:36,343 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:36,344 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:36,344 INFO L82 PathProgramCache]: Analyzing trace with hash -522173611, now seen corresponding path program 1 times [2018-11-18 17:04:36,344 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:36,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:36,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:36,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:36,347 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:36,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:36,650 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 6 DAG size of output: 3 [2018-11-18 17:04:36,662 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 118 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:36,662 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:36,662 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:36,662 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:36,663 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:36,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:36,663 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:36,663 INFO L87 Difference]: Start difference. First operand 1243 states and 1918 transitions. Second operand 4 states. [2018-11-18 17:04:37,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:37,691 INFO L93 Difference]: Finished difference Result 2810 states and 4259 transitions. [2018-11-18 17:04:37,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:37,692 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2018-11-18 17:04:37,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:37,698 INFO L225 Difference]: With dead ends: 2810 [2018-11-18 17:04:37,698 INFO L226 Difference]: Without dead ends: 1593 [2018-11-18 17:04:37,700 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:37,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1593 states. [2018-11-18 17:04:37,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1593 to 1243. [2018-11-18 17:04:37,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:37,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1913 transitions. [2018-11-18 17:04:37,743 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1913 transitions. Word has length 146 [2018-11-18 17:04:37,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:37,743 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1913 transitions. [2018-11-18 17:04:37,743 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:37,743 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1913 transitions. [2018-11-18 17:04:37,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-11-18 17:04:37,747 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:37,748 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:37,748 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:37,748 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:37,748 INFO L82 PathProgramCache]: Analyzing trace with hash -662900298, now seen corresponding path program 1 times [2018-11-18 17:04:37,748 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:37,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:37,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:37,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:37,751 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:37,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:37,948 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:37,948 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:37,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:37,948 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:37,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:37,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:37,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:37,949 INFO L87 Difference]: Start difference. First operand 1243 states and 1913 transitions. Second operand 4 states. [2018-11-18 17:04:38,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:38,807 INFO L93 Difference]: Finished difference Result 2800 states and 4239 transitions. [2018-11-18 17:04:38,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:38,808 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2018-11-18 17:04:38,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:38,812 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 17:04:38,812 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 17:04:38,815 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:38,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 17:04:38,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 17:04:38,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:38,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1908 transitions. [2018-11-18 17:04:38,855 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1908 transitions. Word has length 146 [2018-11-18 17:04:38,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:38,855 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1908 transitions. [2018-11-18 17:04:38,855 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:38,855 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1908 transitions. [2018-11-18 17:04:38,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-11-18 17:04:38,859 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:38,859 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:38,859 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:38,859 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:38,859 INFO L82 PathProgramCache]: Analyzing trace with hash 2112258747, now seen corresponding path program 1 times [2018-11-18 17:04:38,860 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:38,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:38,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:38,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:38,860 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:38,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:39,168 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 94 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:39,168 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:39,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:39,169 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:39,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:39,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:39,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:39,169 INFO L87 Difference]: Start difference. First operand 1243 states and 1908 transitions. Second operand 4 states. [2018-11-18 17:04:39,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:39,998 INFO L93 Difference]: Finished difference Result 2800 states and 4229 transitions. [2018-11-18 17:04:39,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:39,999 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 147 [2018-11-18 17:04:39,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:40,003 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 17:04:40,003 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 17:04:40,005 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:40,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 17:04:40,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 17:04:40,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:40,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1903 transitions. [2018-11-18 17:04:40,046 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1903 transitions. Word has length 147 [2018-11-18 17:04:40,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:40,047 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1903 transitions. [2018-11-18 17:04:40,047 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:40,047 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1903 transitions. [2018-11-18 17:04:40,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-11-18 17:04:40,049 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:40,049 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:40,049 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:40,049 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:40,049 INFO L82 PathProgramCache]: Analyzing trace with hash 1670796665, now seen corresponding path program 1 times [2018-11-18 17:04:40,050 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:40,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:40,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:40,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:40,050 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:40,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:40,224 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:40,303 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 98 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:40,304 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:40,304 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:40,304 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:40,304 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:40,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:40,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:40,305 INFO L87 Difference]: Start difference. First operand 1243 states and 1903 transitions. Second operand 4 states. [2018-11-18 17:04:41,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:41,024 INFO L93 Difference]: Finished difference Result 2800 states and 4219 transitions. [2018-11-18 17:04:41,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:41,036 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 148 [2018-11-18 17:04:41,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:41,041 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 17:04:41,042 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 17:04:41,043 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:41,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 17:04:41,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 17:04:41,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:41,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1898 transitions. [2018-11-18 17:04:41,087 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1898 transitions. Word has length 148 [2018-11-18 17:04:41,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:41,087 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1898 transitions. [2018-11-18 17:04:41,087 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:41,087 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1898 transitions. [2018-11-18 17:04:41,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-11-18 17:04:41,089 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:41,089 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:41,089 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:41,089 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:41,090 INFO L82 PathProgramCache]: Analyzing trace with hash 2135136704, now seen corresponding path program 1 times [2018-11-18 17:04:41,090 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:41,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:41,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:41,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:41,091 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:41,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:41,204 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 102 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:41,204 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:41,205 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:41,205 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:41,205 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:41,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:41,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:41,205 INFO L87 Difference]: Start difference. First operand 1243 states and 1898 transitions. Second operand 4 states. [2018-11-18 17:04:42,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:42,265 INFO L93 Difference]: Finished difference Result 2800 states and 4209 transitions. [2018-11-18 17:04:42,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:42,268 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 149 [2018-11-18 17:04:42,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:42,271 INFO L225 Difference]: With dead ends: 2800 [2018-11-18 17:04:42,272 INFO L226 Difference]: Without dead ends: 1583 [2018-11-18 17:04:42,273 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:42,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2018-11-18 17:04:42,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1243. [2018-11-18 17:04:42,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:42,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1893 transitions. [2018-11-18 17:04:42,317 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1893 transitions. Word has length 149 [2018-11-18 17:04:42,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:42,317 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1893 transitions. [2018-11-18 17:04:42,318 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:42,318 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1893 transitions. [2018-11-18 17:04:42,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-11-18 17:04:42,319 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:42,319 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:42,319 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:42,320 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:42,320 INFO L82 PathProgramCache]: Analyzing trace with hash 614571422, now seen corresponding path program 1 times [2018-11-18 17:04:42,320 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:42,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:42,321 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:42,321 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:42,321 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:42,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:42,679 WARN L180 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:42,836 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 106 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:42,836 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:42,836 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:42,836 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:42,838 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:42,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:42,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:42,838 INFO L87 Difference]: Start difference. First operand 1243 states and 1893 transitions. Second operand 4 states. [2018-11-18 17:04:43,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:43,544 INFO L93 Difference]: Finished difference Result 2750 states and 4134 transitions. [2018-11-18 17:04:43,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:43,545 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 150 [2018-11-18 17:04:43,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:43,548 INFO L225 Difference]: With dead ends: 2750 [2018-11-18 17:04:43,548 INFO L226 Difference]: Without dead ends: 1533 [2018-11-18 17:04:43,549 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:43,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1533 states. [2018-11-18 17:04:43,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1533 to 1243. [2018-11-18 17:04:43,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:43,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1888 transitions. [2018-11-18 17:04:43,580 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1888 transitions. Word has length 150 [2018-11-18 17:04:43,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:43,580 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1888 transitions. [2018-11-18 17:04:43,580 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:43,580 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1888 transitions. [2018-11-18 17:04:43,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-11-18 17:04:43,582 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:43,582 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:43,582 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:43,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:43,582 INFO L82 PathProgramCache]: Analyzing trace with hash 404523204, now seen corresponding path program 1 times [2018-11-18 17:04:43,582 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:43,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:43,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:43,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:43,583 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:43,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:43,801 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:44,053 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 6 DAG size of output: 3 [2018-11-18 17:04:44,093 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 136 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:44,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:44,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:44,094 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:44,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:44,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:44,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:44,094 INFO L87 Difference]: Start difference. First operand 1243 states and 1888 transitions. Second operand 4 states. [2018-11-18 17:04:44,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:44,896 INFO L93 Difference]: Finished difference Result 2750 states and 4124 transitions. [2018-11-18 17:04:44,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:44,899 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 154 [2018-11-18 17:04:44,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:44,902 INFO L225 Difference]: With dead ends: 2750 [2018-11-18 17:04:44,902 INFO L226 Difference]: Without dead ends: 1533 [2018-11-18 17:04:44,903 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:44,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1533 states. [2018-11-18 17:04:44,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1533 to 1243. [2018-11-18 17:04:44,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:44,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1883 transitions. [2018-11-18 17:04:44,935 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1883 transitions. Word has length 154 [2018-11-18 17:04:44,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:44,935 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1883 transitions. [2018-11-18 17:04:44,935 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:44,935 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1883 transitions. [2018-11-18 17:04:44,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-11-18 17:04:44,937 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:44,937 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:44,937 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:44,937 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:44,937 INFO L82 PathProgramCache]: Analyzing trace with hash 108313592, now seen corresponding path program 1 times [2018-11-18 17:04:44,937 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:44,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:44,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:44,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:44,938 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:44,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:45,109 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 135 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:45,110 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:45,110 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:45,110 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:45,110 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:45,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:45,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:45,111 INFO L87 Difference]: Start difference. First operand 1243 states and 1883 transitions. Second operand 4 states. [2018-11-18 17:04:45,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:45,759 INFO L93 Difference]: Finished difference Result 2750 states and 4114 transitions. [2018-11-18 17:04:45,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:45,760 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 154 [2018-11-18 17:04:45,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:45,763 INFO L225 Difference]: With dead ends: 2750 [2018-11-18 17:04:45,763 INFO L226 Difference]: Without dead ends: 1533 [2018-11-18 17:04:45,765 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:45,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1533 states. [2018-11-18 17:04:45,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1533 to 1243. [2018-11-18 17:04:45,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:45,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1878 transitions. [2018-11-18 17:04:45,816 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1878 transitions. Word has length 154 [2018-11-18 17:04:45,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:45,816 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1878 transitions. [2018-11-18 17:04:45,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:45,816 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1878 transitions. [2018-11-18 17:04:45,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-11-18 17:04:45,820 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:45,821 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:45,821 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:45,821 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:45,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1643930330, now seen corresponding path program 1 times [2018-11-18 17:04:45,821 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:45,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:45,822 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:45,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:45,822 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:45,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:46,012 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 138 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:46,012 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:46,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:46,013 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:46,013 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:46,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:46,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:46,013 INFO L87 Difference]: Start difference. First operand 1243 states and 1878 transitions. Second operand 4 states. [2018-11-18 17:04:46,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:46,354 INFO L93 Difference]: Finished difference Result 2730 states and 4077 transitions. [2018-11-18 17:04:46,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:46,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2018-11-18 17:04:46,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:46,360 INFO L225 Difference]: With dead ends: 2730 [2018-11-18 17:04:46,360 INFO L226 Difference]: Without dead ends: 1513 [2018-11-18 17:04:46,361 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:46,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1513 states. [2018-11-18 17:04:46,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1513 to 1243. [2018-11-18 17:04:46,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:46,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1873 transitions. [2018-11-18 17:04:46,399 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1873 transitions. Word has length 155 [2018-11-18 17:04:46,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:46,399 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1873 transitions. [2018-11-18 17:04:46,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:46,399 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1873 transitions. [2018-11-18 17:04:46,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-11-18 17:04:46,401 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:46,401 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:46,401 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:46,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:46,402 INFO L82 PathProgramCache]: Analyzing trace with hash 731710394, now seen corresponding path program 1 times [2018-11-18 17:04:46,402 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:46,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:46,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:46,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:46,403 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:46,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:46,512 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 137 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:46,513 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:46,513 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:46,513 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:46,513 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:46,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:46,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:46,514 INFO L87 Difference]: Start difference. First operand 1243 states and 1873 transitions. Second operand 4 states. [2018-11-18 17:04:47,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:47,257 INFO L93 Difference]: Finished difference Result 2705 states and 4035 transitions. [2018-11-18 17:04:47,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:47,258 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2018-11-18 17:04:47,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:47,261 INFO L225 Difference]: With dead ends: 2705 [2018-11-18 17:04:47,261 INFO L226 Difference]: Without dead ends: 1488 [2018-11-18 17:04:47,263 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:47,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1488 states. [2018-11-18 17:04:47,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1488 to 1243. [2018-11-18 17:04:47,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:47,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1868 transitions. [2018-11-18 17:04:47,312 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1868 transitions. Word has length 155 [2018-11-18 17:04:47,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:47,313 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1868 transitions. [2018-11-18 17:04:47,313 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:47,313 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1868 transitions. [2018-11-18 17:04:47,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-11-18 17:04:47,314 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:47,314 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:47,314 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:47,314 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:47,315 INFO L82 PathProgramCache]: Analyzing trace with hash -94541958, now seen corresponding path program 1 times [2018-11-18 17:04:47,315 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:47,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:47,315 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:47,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:47,316 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:47,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:47,505 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:47,690 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 143 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:47,690 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:47,690 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:47,691 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:47,692 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:47,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:47,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:47,693 INFO L87 Difference]: Start difference. First operand 1243 states and 1868 transitions. Second operand 4 states. [2018-11-18 17:04:48,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:48,853 INFO L93 Difference]: Finished difference Result 2705 states and 4025 transitions. [2018-11-18 17:04:48,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:48,854 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 157 [2018-11-18 17:04:48,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:48,857 INFO L225 Difference]: With dead ends: 2705 [2018-11-18 17:04:48,857 INFO L226 Difference]: Without dead ends: 1488 [2018-11-18 17:04:48,859 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:48,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1488 states. [2018-11-18 17:04:48,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1488 to 1243. [2018-11-18 17:04:48,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:48,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1863 transitions. [2018-11-18 17:04:48,914 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1863 transitions. Word has length 157 [2018-11-18 17:04:48,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:48,914 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1863 transitions. [2018-11-18 17:04:48,914 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:48,914 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1863 transitions. [2018-11-18 17:04:48,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-11-18 17:04:48,916 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:48,916 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:48,916 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:48,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:48,916 INFO L82 PathProgramCache]: Analyzing trace with hash 835979704, now seen corresponding path program 1 times [2018-11-18 17:04:48,916 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:48,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:48,917 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:48,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:48,917 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:48,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:49,041 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 145 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:49,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:49,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:49,042 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:49,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:49,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:49,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:49,043 INFO L87 Difference]: Start difference. First operand 1243 states and 1863 transitions. Second operand 4 states. [2018-11-18 17:04:50,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:50,372 INFO L93 Difference]: Finished difference Result 2665 states and 3950 transitions. [2018-11-18 17:04:50,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:50,374 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 158 [2018-11-18 17:04:50,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:50,376 INFO L225 Difference]: With dead ends: 2665 [2018-11-18 17:04:50,376 INFO L226 Difference]: Without dead ends: 1448 [2018-11-18 17:04:50,378 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:50,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states. [2018-11-18 17:04:50,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1243. [2018-11-18 17:04:50,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:50,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1858 transitions. [2018-11-18 17:04:50,436 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1858 transitions. Word has length 158 [2018-11-18 17:04:50,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:50,436 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1858 transitions. [2018-11-18 17:04:50,436 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:50,436 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1858 transitions. [2018-11-18 17:04:50,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-11-18 17:04:50,438 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:50,438 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:50,438 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:50,438 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:50,438 INFO L82 PathProgramCache]: Analyzing trace with hash -377510245, now seen corresponding path program 1 times [2018-11-18 17:04:50,438 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:50,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:50,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:50,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:50,439 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:50,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:50,695 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 147 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:50,695 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:50,696 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:50,696 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:50,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:50,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:50,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:50,699 INFO L87 Difference]: Start difference. First operand 1243 states and 1858 transitions. Second operand 4 states. [2018-11-18 17:04:51,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:51,703 INFO L93 Difference]: Finished difference Result 2665 states and 3940 transitions. [2018-11-18 17:04:51,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:51,704 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 159 [2018-11-18 17:04:51,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:51,706 INFO L225 Difference]: With dead ends: 2665 [2018-11-18 17:04:51,706 INFO L226 Difference]: Without dead ends: 1448 [2018-11-18 17:04:51,707 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:51,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states. [2018-11-18 17:04:51,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1243. [2018-11-18 17:04:51,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:51,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1853 transitions. [2018-11-18 17:04:51,743 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1853 transitions. Word has length 159 [2018-11-18 17:04:51,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:51,744 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1853 transitions. [2018-11-18 17:04:51,744 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:51,744 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1853 transitions. [2018-11-18 17:04:51,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-11-18 17:04:51,745 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:51,745 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:51,745 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:51,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:51,746 INFO L82 PathProgramCache]: Analyzing trace with hash 299868530, now seen corresponding path program 1 times [2018-11-18 17:04:51,746 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:51,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:51,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:51,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:51,747 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:51,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:51,945 INFO L134 CoverageAnalysis]: Checked inductivity of 184 backedges. 130 proven. 0 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-18 17:04:51,946 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:51,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:51,946 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:51,946 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:51,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:51,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:51,946 INFO L87 Difference]: Start difference. First operand 1243 states and 1853 transitions. Second operand 4 states. [2018-11-18 17:04:52,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:52,432 INFO L93 Difference]: Finished difference Result 2615 states and 3870 transitions. [2018-11-18 17:04:52,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:52,433 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2018-11-18 17:04:52,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:52,436 INFO L225 Difference]: With dead ends: 2615 [2018-11-18 17:04:52,444 INFO L226 Difference]: Without dead ends: 1398 [2018-11-18 17:04:52,446 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:52,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1398 states. [2018-11-18 17:04:52,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1398 to 1243. [2018-11-18 17:04:52,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:52,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1848 transitions. [2018-11-18 17:04:52,506 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1848 transitions. Word has length 160 [2018-11-18 17:04:52,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:52,506 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1848 transitions. [2018-11-18 17:04:52,506 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:52,506 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1848 transitions. [2018-11-18 17:04:52,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-11-18 17:04:52,508 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:52,508 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:52,508 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:52,508 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:52,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1591988385, now seen corresponding path program 1 times [2018-11-18 17:04:52,513 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:52,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:52,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:52,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:52,514 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:52,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:52,733 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:52,933 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 6 DAG size of output: 3 [2018-11-18 17:04:52,949 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 139 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:52,949 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:52,949 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:52,950 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:52,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:52,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:52,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:52,952 INFO L87 Difference]: Start difference. First operand 1243 states and 1848 transitions. Second operand 4 states. [2018-11-18 17:04:54,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:54,191 INFO L93 Difference]: Finished difference Result 2615 states and 3860 transitions. [2018-11-18 17:04:54,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:54,192 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2018-11-18 17:04:54,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:54,195 INFO L225 Difference]: With dead ends: 2615 [2018-11-18 17:04:54,195 INFO L226 Difference]: Without dead ends: 1398 [2018-11-18 17:04:54,196 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:54,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1398 states. [2018-11-18 17:04:54,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1398 to 1243. [2018-11-18 17:04:54,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:54,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1843 transitions. [2018-11-18 17:04:54,258 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1843 transitions. Word has length 160 [2018-11-18 17:04:54,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:54,259 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1843 transitions. [2018-11-18 17:04:54,259 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:54,259 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1843 transitions. [2018-11-18 17:04:54,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-11-18 17:04:54,260 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:54,263 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:54,263 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:54,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:54,264 INFO L82 PathProgramCache]: Analyzing trace with hash 32608761, now seen corresponding path program 1 times [2018-11-18 17:04:54,264 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:54,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:54,265 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:54,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:54,265 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:54,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:54,449 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:04:54,684 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 149 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:54,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:54,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:54,685 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:54,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:54,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:54,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:54,687 INFO L87 Difference]: Start difference. First operand 1243 states and 1843 transitions. Second operand 4 states. [2018-11-18 17:04:55,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:55,185 INFO L93 Difference]: Finished difference Result 2605 states and 3840 transitions. [2018-11-18 17:04:55,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:55,186 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 160 [2018-11-18 17:04:55,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:55,188 INFO L225 Difference]: With dead ends: 2605 [2018-11-18 17:04:55,189 INFO L226 Difference]: Without dead ends: 1388 [2018-11-18 17:04:55,190 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:55,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1388 states. [2018-11-18 17:04:55,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1388 to 1243. [2018-11-18 17:04:55,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:55,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1838 transitions. [2018-11-18 17:04:55,255 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1838 transitions. Word has length 160 [2018-11-18 17:04:55,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:55,255 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1838 transitions. [2018-11-18 17:04:55,255 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:55,255 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1838 transitions. [2018-11-18 17:04:55,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-11-18 17:04:55,256 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:55,257 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:55,257 INFO L423 AbstractCegarLoop]: === Iteration 44 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:55,257 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:55,257 INFO L82 PathProgramCache]: Analyzing trace with hash -508804541, now seen corresponding path program 1 times [2018-11-18 17:04:55,257 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:55,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:55,258 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:55,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:55,258 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:55,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:55,451 INFO L134 CoverageAnalysis]: Checked inductivity of 183 backedges. 141 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:55,451 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:55,451 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:55,451 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:55,452 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:55,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:55,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:55,452 INFO L87 Difference]: Start difference. First operand 1243 states and 1838 transitions. Second operand 4 states. [2018-11-18 17:04:56,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:56,259 INFO L93 Difference]: Finished difference Result 2595 states and 3815 transitions. [2018-11-18 17:04:56,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:56,260 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 161 [2018-11-18 17:04:56,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:56,262 INFO L225 Difference]: With dead ends: 2595 [2018-11-18 17:04:56,262 INFO L226 Difference]: Without dead ends: 1378 [2018-11-18 17:04:56,264 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:56,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1378 states. [2018-11-18 17:04:56,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1378 to 1243. [2018-11-18 17:04:56,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:56,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1833 transitions. [2018-11-18 17:04:56,328 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1833 transitions. Word has length 161 [2018-11-18 17:04:56,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:56,330 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1833 transitions. [2018-11-18 17:04:56,330 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:56,330 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1833 transitions. [2018-11-18 17:04:56,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-11-18 17:04:56,332 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:56,332 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:56,332 INFO L423 AbstractCegarLoop]: === Iteration 45 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:56,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:56,332 INFO L82 PathProgramCache]: Analyzing trace with hash 1573488029, now seen corresponding path program 1 times [2018-11-18 17:04:56,332 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:56,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:56,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:56,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:56,333 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:56,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:56,396 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 151 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:56,396 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:56,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:56,396 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:56,397 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:56,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:56,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:56,397 INFO L87 Difference]: Start difference. First operand 1243 states and 1833 transitions. Second operand 4 states. [2018-11-18 17:04:57,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:57,961 INFO L93 Difference]: Finished difference Result 2580 states and 3785 transitions. [2018-11-18 17:04:57,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:57,962 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 161 [2018-11-18 17:04:57,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:57,963 INFO L225 Difference]: With dead ends: 2580 [2018-11-18 17:04:57,963 INFO L226 Difference]: Without dead ends: 1363 [2018-11-18 17:04:57,965 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:57,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1363 states. [2018-11-18 17:04:58,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1363 to 1243. [2018-11-18 17:04:58,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:58,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1828 transitions. [2018-11-18 17:04:58,027 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1828 transitions. Word has length 161 [2018-11-18 17:04:58,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:58,028 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1828 transitions. [2018-11-18 17:04:58,028 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:58,028 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1828 transitions. [2018-11-18 17:04:58,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-11-18 17:04:58,029 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:58,029 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:58,029 INFO L423 AbstractCegarLoop]: === Iteration 46 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:58,030 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:58,030 INFO L82 PathProgramCache]: Analyzing trace with hash -55168852, now seen corresponding path program 1 times [2018-11-18 17:04:58,030 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:58,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:58,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:58,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:58,031 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:58,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:58,338 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 6 DAG size of output: 3 [2018-11-18 17:04:58,367 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 153 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:58,367 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:58,368 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:58,368 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:58,368 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:58,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:58,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:58,368 INFO L87 Difference]: Start difference. First operand 1243 states and 1828 transitions. Second operand 4 states. [2018-11-18 17:04:59,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:59,186 INFO L93 Difference]: Finished difference Result 2580 states and 3775 transitions. [2018-11-18 17:04:59,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:59,187 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 163 [2018-11-18 17:04:59,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:59,189 INFO L225 Difference]: With dead ends: 2580 [2018-11-18 17:04:59,189 INFO L226 Difference]: Without dead ends: 1363 [2018-11-18 17:04:59,190 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:59,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1363 states. [2018-11-18 17:04:59,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1363 to 1243. [2018-11-18 17:04:59,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:59,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1823 transitions. [2018-11-18 17:04:59,229 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1823 transitions. Word has length 163 [2018-11-18 17:04:59,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:59,229 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1823 transitions. [2018-11-18 17:04:59,229 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:59,229 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1823 transitions. [2018-11-18 17:04:59,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-11-18 17:04:59,231 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:59,231 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:59,231 INFO L423 AbstractCegarLoop]: === Iteration 47 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:59,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:59,231 INFO L82 PathProgramCache]: Analyzing trace with hash -683245755, now seen corresponding path program 1 times [2018-11-18 17:04:59,231 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:59,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:59,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:59,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:59,232 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:59,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:59,311 INFO L134 CoverageAnalysis]: Checked inductivity of 197 backedges. 155 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:59,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:59,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:59,312 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:59,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:59,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:59,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:59,312 INFO L87 Difference]: Start difference. First operand 1243 states and 1823 transitions. Second operand 4 states. [2018-11-18 17:04:59,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:04:59,786 INFO L93 Difference]: Finished difference Result 2560 states and 3740 transitions. [2018-11-18 17:04:59,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:04:59,787 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-11-18 17:04:59,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:04:59,790 INFO L225 Difference]: With dead ends: 2560 [2018-11-18 17:04:59,790 INFO L226 Difference]: Without dead ends: 1343 [2018-11-18 17:04:59,791 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:04:59,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1343 states. [2018-11-18 17:04:59,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1343 to 1243. [2018-11-18 17:04:59,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:04:59,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1818 transitions. [2018-11-18 17:04:59,856 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1818 transitions. Word has length 164 [2018-11-18 17:04:59,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:04:59,856 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1818 transitions. [2018-11-18 17:04:59,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:04:59,856 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1818 transitions. [2018-11-18 17:04:59,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-11-18 17:04:59,858 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:04:59,858 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:04:59,858 INFO L423 AbstractCegarLoop]: === Iteration 48 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:04:59,858 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:04:59,858 INFO L82 PathProgramCache]: Analyzing trace with hash -869012861, now seen corresponding path program 1 times [2018-11-18 17:04:59,858 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:04:59,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:59,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:04:59,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:04:59,859 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:04:59,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:04:59,970 INFO L134 CoverageAnalysis]: Checked inductivity of 199 backedges. 157 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:04:59,970 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:04:59,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:04:59,970 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:04:59,972 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:04:59,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:04:59,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:04:59,973 INFO L87 Difference]: Start difference. First operand 1243 states and 1818 transitions. Second operand 4 states. [2018-11-18 17:05:00,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:00,590 INFO L93 Difference]: Finished difference Result 2560 states and 3730 transitions. [2018-11-18 17:05:00,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:00,591 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-11-18 17:05:00,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:00,593 INFO L225 Difference]: With dead ends: 2560 [2018-11-18 17:05:00,593 INFO L226 Difference]: Without dead ends: 1343 [2018-11-18 17:05:00,594 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:00,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1343 states. [2018-11-18 17:05:00,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1343 to 1243. [2018-11-18 17:05:00,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:00,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1813 transitions. [2018-11-18 17:05:00,659 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1813 transitions. Word has length 164 [2018-11-18 17:05:00,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:00,659 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1813 transitions. [2018-11-18 17:05:00,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:00,660 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1813 transitions. [2018-11-18 17:05:00,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2018-11-18 17:05:00,664 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:00,665 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:00,665 INFO L423 AbstractCegarLoop]: === Iteration 49 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:00,665 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:00,665 INFO L82 PathProgramCache]: Analyzing trace with hash 667439018, now seen corresponding path program 1 times [2018-11-18 17:05:00,665 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:00,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:00,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:00,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:00,666 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:00,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:00,782 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 159 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:05:00,782 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:00,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:00,782 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:00,783 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:00,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:00,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:00,783 INFO L87 Difference]: Start difference. First operand 1243 states and 1813 transitions. Second operand 4 states. [2018-11-18 17:05:01,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:01,083 INFO L93 Difference]: Finished difference Result 2550 states and 3710 transitions. [2018-11-18 17:05:01,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:01,084 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 165 [2018-11-18 17:05:01,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:01,086 INFO L225 Difference]: With dead ends: 2550 [2018-11-18 17:05:01,086 INFO L226 Difference]: Without dead ends: 1333 [2018-11-18 17:05:01,088 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:01,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1333 states. [2018-11-18 17:05:01,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1333 to 1243. [2018-11-18 17:05:01,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:01,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1808 transitions. [2018-11-18 17:05:01,131 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1808 transitions. Word has length 165 [2018-11-18 17:05:01,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:01,132 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1808 transitions. [2018-11-18 17:05:01,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:01,132 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1808 transitions. [2018-11-18 17:05:01,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-11-18 17:05:01,134 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:01,134 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:01,134 INFO L423 AbstractCegarLoop]: === Iteration 50 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:01,134 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:01,134 INFO L82 PathProgramCache]: Analyzing trace with hash -265239387, now seen corresponding path program 1 times [2018-11-18 17:05:01,134 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:01,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:01,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:01,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:01,135 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:01,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:01,258 INFO L134 CoverageAnalysis]: Checked inductivity of 203 backedges. 161 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:05:01,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:01,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:01,259 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:01,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:01,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:01,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:01,260 INFO L87 Difference]: Start difference. First operand 1243 states and 1808 transitions. Second operand 4 states. [2018-11-18 17:05:02,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:02,216 INFO L93 Difference]: Finished difference Result 2550 states and 3700 transitions. [2018-11-18 17:05:02,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:02,217 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 167 [2018-11-18 17:05:02,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:02,219 INFO L225 Difference]: With dead ends: 2550 [2018-11-18 17:05:02,219 INFO L226 Difference]: Without dead ends: 1333 [2018-11-18 17:05:02,220 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:02,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1333 states. [2018-11-18 17:05:02,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1333 to 1243. [2018-11-18 17:05:02,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:02,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1803 transitions. [2018-11-18 17:05:02,311 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1803 transitions. Word has length 167 [2018-11-18 17:05:02,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:02,312 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1803 transitions. [2018-11-18 17:05:02,312 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:02,312 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1803 transitions. [2018-11-18 17:05:02,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-11-18 17:05:02,317 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:02,317 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:02,318 INFO L423 AbstractCegarLoop]: === Iteration 51 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:02,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:02,319 INFO L82 PathProgramCache]: Analyzing trace with hash -916902530, now seen corresponding path program 1 times [2018-11-18 17:05:02,319 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:02,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:02,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:02,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:02,320 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:02,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:02,536 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 163 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:05:02,537 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:02,537 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:02,537 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:02,537 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:02,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:02,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:02,537 INFO L87 Difference]: Start difference. First operand 1243 states and 1803 transitions. Second operand 4 states. [2018-11-18 17:05:03,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:03,013 INFO L93 Difference]: Finished difference Result 2530 states and 3667 transitions. [2018-11-18 17:05:03,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:03,017 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 168 [2018-11-18 17:05:03,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:03,018 INFO L225 Difference]: With dead ends: 2530 [2018-11-18 17:05:03,018 INFO L226 Difference]: Without dead ends: 1313 [2018-11-18 17:05:03,020 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:03,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1313 states. [2018-11-18 17:05:03,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1313 to 1243. [2018-11-18 17:05:03,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:03,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1798 transitions. [2018-11-18 17:05:03,086 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1798 transitions. Word has length 168 [2018-11-18 17:05:03,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:03,086 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1798 transitions. [2018-11-18 17:05:03,087 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:03,087 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1798 transitions. [2018-11-18 17:05:03,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-11-18 17:05:03,088 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:03,092 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:03,093 INFO L423 AbstractCegarLoop]: === Iteration 52 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:03,093 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:03,093 INFO L82 PathProgramCache]: Analyzing trace with hash -1000875284, now seen corresponding path program 1 times [2018-11-18 17:05:03,093 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:03,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:03,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:03,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:03,094 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:03,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:03,185 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 193 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 17:05:03,186 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:03,186 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:03,186 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:03,186 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:03,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:03,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:03,187 INFO L87 Difference]: Start difference. First operand 1243 states and 1798 transitions. Second operand 4 states. [2018-11-18 17:05:04,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:04,265 INFO L93 Difference]: Finished difference Result 2530 states and 3657 transitions. [2018-11-18 17:05:04,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:04,267 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 172 [2018-11-18 17:05:04,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:04,269 INFO L225 Difference]: With dead ends: 2530 [2018-11-18 17:05:04,269 INFO L226 Difference]: Without dead ends: 1313 [2018-11-18 17:05:04,271 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:04,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1313 states. [2018-11-18 17:05:04,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1313 to 1243. [2018-11-18 17:05:04,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:04,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1793 transitions. [2018-11-18 17:05:04,337 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1793 transitions. Word has length 172 [2018-11-18 17:05:04,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:04,337 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1793 transitions. [2018-11-18 17:05:04,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:04,338 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1793 transitions. [2018-11-18 17:05:04,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-11-18 17:05:04,339 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:04,339 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:04,339 INFO L423 AbstractCegarLoop]: === Iteration 53 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:04,340 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:04,340 INFO L82 PathProgramCache]: Analyzing trace with hash 712016915, now seen corresponding path program 1 times [2018-11-18 17:05:04,340 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:04,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:04,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:04,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:04,341 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:04,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:04,431 INFO L134 CoverageAnalysis]: Checked inductivity of 257 backedges. 197 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 17:05:04,431 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:04,431 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:04,431 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:04,432 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:04,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:04,432 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:04,432 INFO L87 Difference]: Start difference. First operand 1243 states and 1793 transitions. Second operand 4 states. [2018-11-18 17:05:06,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:06,000 INFO L93 Difference]: Finished difference Result 2530 states and 3647 transitions. [2018-11-18 17:05:06,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:06,001 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 173 [2018-11-18 17:05:06,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:06,003 INFO L225 Difference]: With dead ends: 2530 [2018-11-18 17:05:06,003 INFO L226 Difference]: Without dead ends: 1313 [2018-11-18 17:05:06,004 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:06,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1313 states. [2018-11-18 17:05:06,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1313 to 1243. [2018-11-18 17:05:06,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:06,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1788 transitions. [2018-11-18 17:05:06,074 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1788 transitions. Word has length 173 [2018-11-18 17:05:06,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:06,074 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1788 transitions. [2018-11-18 17:05:06,074 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:06,074 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1788 transitions. [2018-11-18 17:05:06,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-11-18 17:05:06,076 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:06,076 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:06,076 INFO L423 AbstractCegarLoop]: === Iteration 54 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:06,076 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:06,083 INFO L82 PathProgramCache]: Analyzing trace with hash 204101585, now seen corresponding path program 1 times [2018-11-18 17:05:06,083 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:06,083 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:06,083 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:06,083 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:06,084 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:06,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:06,196 INFO L134 CoverageAnalysis]: Checked inductivity of 261 backedges. 201 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-11-18 17:05:06,197 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:06,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:06,197 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:06,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:06,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:06,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:06,198 INFO L87 Difference]: Start difference. First operand 1243 states and 1788 transitions. Second operand 4 states. [2018-11-18 17:05:06,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:06,651 INFO L93 Difference]: Finished difference Result 2515 states and 3620 transitions. [2018-11-18 17:05:06,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:06,652 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 174 [2018-11-18 17:05:06,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:06,654 INFO L225 Difference]: With dead ends: 2515 [2018-11-18 17:05:06,654 INFO L226 Difference]: Without dead ends: 1298 [2018-11-18 17:05:06,655 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:06,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1298 states. [2018-11-18 17:05:06,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1298 to 1243. [2018-11-18 17:05:06,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2018-11-18 17:05:06,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 1783 transitions. [2018-11-18 17:05:06,695 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 1783 transitions. Word has length 174 [2018-11-18 17:05:06,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:06,695 INFO L480 AbstractCegarLoop]: Abstraction has 1243 states and 1783 transitions. [2018-11-18 17:05:06,695 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:06,695 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 1783 transitions. [2018-11-18 17:05:06,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 17:05:06,697 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:06,697 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:06,697 INFO L423 AbstractCegarLoop]: === Iteration 55 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:06,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:06,697 INFO L82 PathProgramCache]: Analyzing trace with hash -401542991, now seen corresponding path program 1 times [2018-11-18 17:05:06,698 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:06,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:06,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:06,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:06,698 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:06,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:07,160 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-11-18 17:05:07,362 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 15 proven. 152 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:05:07,362 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:07,363 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 17:05:07,363 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 176 with the following transitions: [2018-11-18 17:05:07,365 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [188], [190], [195], [198], [200], [205], [208], [279], [282], [290], [292], [295], [303], [306], [310], [501], [504], [520], [525], [528], [536], [541], [543], [546], [554], [557], [561], [582], [616], [618], [630], [633], [634], [635], [637] [2018-11-18 17:05:07,407 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 17:05:07,407 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 17:05:08,556 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 17:05:08,559 INFO L272 AbstractInterpreter]: Visited 77 different actions 240 times. Merged at 55 different actions 151 times. Never widened. Performed 1667 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1667 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 8 fixpoints after 7 different actions. Largest state had 118 variables. [2018-11-18 17:05:08,621 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:08,622 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 17:05:08,622 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:08,622 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 17:05:08,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:08,824 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 17:05:08,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:09,003 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:05:09,229 WARN L180 SmtUtils]: Spent 168.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2018-11-18 17:05:09,272 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-11-18 17:05:09,650 WARN L180 SmtUtils]: Spent 372.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 20 [2018-11-18 17:05:09,668 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,680 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 44 [2018-11-18 17:05:09,910 WARN L180 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 20 [2018-11-18 17:05:09,920 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,933 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,937 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,939 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:09,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-11-18 17:05:09,941 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:09,970 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:09,979 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 17:05:10,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 17:05:10,028 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:10,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 17:05:10,034 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:10,048 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:10,064 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:10,073 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:10,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 7 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 68 [2018-11-18 17:05:10,075 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,130 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,173 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,221 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,292 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,293 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:57, output treesize:79 [2018-11-18 17:05:10,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 125 [2018-11-18 17:05:10,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2018-11-18 17:05:10,739 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,753 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:10,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-18 17:05:10,770 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:10,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-11-18 17:05:10,773 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:10,799 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:10,830 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:10,830 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:128, output treesize:106 [2018-11-18 17:05:11,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:05:11,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:11,129 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,167 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,229 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:115 [2018-11-18 17:05:11,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 113 [2018-11-18 17:05:11,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 17:05:11,419 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 9 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 68 [2018-11-18 17:05:11,474 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,506 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-11-18 17:05:11,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-18 17:05:11,568 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,637 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-11-18 17:05:11,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-18 17:05:11,656 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,659 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,665 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:146, output treesize:23 [2018-11-18 17:05:11,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 17:05:11,805 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:11,812 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:11,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:05:11,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,893 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:11,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:11,954 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:32 [2018-11-18 17:05:12,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-11-18 17:05:12,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:12,208 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:12,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-18 17:05:12,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:12,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 17:05:12,226 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:12,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:12,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:12,231 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:41, output treesize:3 [2018-11-18 17:05:12,500 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 67 proven. 100 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:05:12,500 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:05:13,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 17:05:13,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 17:05:13,043 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:13,073 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:13,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:13,096 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 17:05:13,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-18 17:05:13,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-18 17:05:13,279 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:13,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-11-18 17:05:13,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-18 17:05:13,288 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:13,291 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:13,295 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:13,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:13,299 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:52, output treesize:10 [2018-11-18 17:05:13,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 17:05:13,348 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:05:13,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 52 [2018-11-18 17:05:13,352 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:13,389 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:13,393 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:13,393 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:44 [2018-11-18 17:05:13,928 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 0 proven. 167 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:05:13,954 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 17:05:13,954 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 9] total 23 [2018-11-18 17:05:13,954 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 17:05:13,954 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 17:05:13,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 17:05:13,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=433, Unknown=0, NotChecked=0, Total=506 [2018-11-18 17:05:13,955 INFO L87 Difference]: Start difference. First operand 1243 states and 1783 transitions. Second operand 17 states. [2018-11-18 17:05:14,866 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 32 [2018-11-18 17:05:21,522 WARN L180 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 90 [2018-11-18 17:05:24,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:24,106 INFO L93 Difference]: Finished difference Result 6407 states and 9483 transitions. [2018-11-18 17:05:24,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-18 17:05:24,112 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 175 [2018-11-18 17:05:24,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:24,123 INFO L225 Difference]: With dead ends: 6407 [2018-11-18 17:05:24,123 INFO L226 Difference]: Without dead ends: 5190 [2018-11-18 17:05:24,128 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 335 SyntacticMatches, 5 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 297 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=384, Invalid=1422, Unknown=0, NotChecked=0, Total=1806 [2018-11-18 17:05:24,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5190 states. [2018-11-18 17:05:24,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5190 to 1408. [2018-11-18 17:05:24,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1408 states. [2018-11-18 17:05:24,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1408 states to 1408 states and 2078 transitions. [2018-11-18 17:05:24,384 INFO L78 Accepts]: Start accepts. Automaton has 1408 states and 2078 transitions. Word has length 175 [2018-11-18 17:05:24,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:24,384 INFO L480 AbstractCegarLoop]: Abstraction has 1408 states and 2078 transitions. [2018-11-18 17:05:24,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 17:05:24,384 INFO L276 IsEmpty]: Start isEmpty. Operand 1408 states and 2078 transitions. [2018-11-18 17:05:24,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 17:05:24,392 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:24,392 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:24,393 INFO L423 AbstractCegarLoop]: === Iteration 56 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:24,393 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:24,393 INFO L82 PathProgramCache]: Analyzing trace with hash 254227643, now seen corresponding path program 1 times [2018-11-18 17:05:24,393 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:24,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:24,397 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:24,397 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:24,397 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:24,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:24,844 WARN L180 SmtUtils]: Spent 375.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:24,987 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 168 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 17:05:24,988 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:24,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:24,988 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:24,988 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:24,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:24,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:24,988 INFO L87 Difference]: Start difference. First operand 1408 states and 2078 transitions. Second operand 4 states. [2018-11-18 17:05:25,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:25,678 INFO L93 Difference]: Finished difference Result 3160 states and 4683 transitions. [2018-11-18 17:05:25,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:25,685 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 175 [2018-11-18 17:05:25,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:25,690 INFO L225 Difference]: With dead ends: 3160 [2018-11-18 17:05:25,691 INFO L226 Difference]: Without dead ends: 1778 [2018-11-18 17:05:25,694 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:25,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1778 states. [2018-11-18 17:05:25,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1778 to 1553. [2018-11-18 17:05:25,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1553 states. [2018-11-18 17:05:25,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1553 states to 1553 states and 2333 transitions. [2018-11-18 17:05:25,895 INFO L78 Accepts]: Start accepts. Automaton has 1553 states and 2333 transitions. Word has length 175 [2018-11-18 17:05:25,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:25,901 INFO L480 AbstractCegarLoop]: Abstraction has 1553 states and 2333 transitions. [2018-11-18 17:05:25,901 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:25,901 INFO L276 IsEmpty]: Start isEmpty. Operand 1553 states and 2333 transitions. [2018-11-18 17:05:25,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-11-18 17:05:25,903 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:25,903 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:25,903 INFO L423 AbstractCegarLoop]: === Iteration 57 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:25,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:25,904 INFO L82 PathProgramCache]: Analyzing trace with hash -969189429, now seen corresponding path program 1 times [2018-11-18 17:05:25,904 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:25,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:25,911 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:25,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:25,911 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:25,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:26,217 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:26,321 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-11-18 17:05:26,322 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:26,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:26,322 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:26,322 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:26,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:26,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:26,322 INFO L87 Difference]: Start difference. First operand 1553 states and 2333 transitions. Second operand 4 states. [2018-11-18 17:05:26,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:26,805 INFO L93 Difference]: Finished difference Result 3662 states and 5501 transitions. [2018-11-18 17:05:26,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:26,809 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 190 [2018-11-18 17:05:26,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:26,811 INFO L225 Difference]: With dead ends: 3662 [2018-11-18 17:05:26,812 INFO L226 Difference]: Without dead ends: 2135 [2018-11-18 17:05:26,818 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:26,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2135 states. [2018-11-18 17:05:27,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2135 to 1753. [2018-11-18 17:05:27,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1753 states. [2018-11-18 17:05:27,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1753 states to 1753 states and 2698 transitions. [2018-11-18 17:05:27,071 INFO L78 Accepts]: Start accepts. Automaton has 1753 states and 2698 transitions. Word has length 190 [2018-11-18 17:05:27,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:27,071 INFO L480 AbstractCegarLoop]: Abstraction has 1753 states and 2698 transitions. [2018-11-18 17:05:27,071 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:27,071 INFO L276 IsEmpty]: Start isEmpty. Operand 1753 states and 2698 transitions. [2018-11-18 17:05:27,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-11-18 17:05:27,092 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:27,093 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:27,093 INFO L423 AbstractCegarLoop]: === Iteration 58 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:27,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:27,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1544438629, now seen corresponding path program 1 times [2018-11-18 17:05:27,094 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:27,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:27,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:27,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:27,095 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:27,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:27,309 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:27,417 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 225 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:27,417 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:27,417 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:27,418 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:27,418 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:27,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:27,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:27,418 INFO L87 Difference]: Start difference. First operand 1753 states and 2698 transitions. Second operand 4 states. [2018-11-18 17:05:28,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:28,206 INFO L93 Difference]: Finished difference Result 3700 states and 5658 transitions. [2018-11-18 17:05:28,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:28,208 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 190 [2018-11-18 17:05:28,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:28,210 INFO L225 Difference]: With dead ends: 3700 [2018-11-18 17:05:28,211 INFO L226 Difference]: Without dead ends: 1973 [2018-11-18 17:05:28,214 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:28,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1973 states. [2018-11-18 17:05:28,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1973 to 1753. [2018-11-18 17:05:28,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1753 states. [2018-11-18 17:05:28,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1753 states to 1753 states and 2693 transitions. [2018-11-18 17:05:28,347 INFO L78 Accepts]: Start accepts. Automaton has 1753 states and 2693 transitions. Word has length 190 [2018-11-18 17:05:28,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:28,348 INFO L480 AbstractCegarLoop]: Abstraction has 1753 states and 2693 transitions. [2018-11-18 17:05:28,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:28,348 INFO L276 IsEmpty]: Start isEmpty. Operand 1753 states and 2693 transitions. [2018-11-18 17:05:28,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 17:05:28,357 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:28,357 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:28,357 INFO L423 AbstractCegarLoop]: === Iteration 59 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:28,357 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:28,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1139670277, now seen corresponding path program 1 times [2018-11-18 17:05:28,358 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:28,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:28,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:28,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:28,359 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:28,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:28,864 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 130 proven. 7 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 17:05:28,865 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:28,865 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 17:05:28,865 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 192 with the following transitions: [2018-11-18 17:05:28,865 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [53], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [188], [190], [195], [198], [200], [205], [208], [225], [228], [232], [236], [251], [257], [260], [265], [279], [282], [290], [292], [295], [303], [306], [310], [501], [504], [520], [525], [528], [536], [541], [543], [546], [554], [557], [561], [582], [616], [618], [630], [633], [634], [635], [637] [2018-11-18 17:05:28,870 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 17:05:28,871 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 17:05:29,767 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 17:05:29,769 INFO L272 AbstractInterpreter]: Visited 86 different actions 279 times. Merged at 64 different actions 178 times. Never widened. Performed 1901 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1901 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 12 fixpoints after 9 different actions. Largest state had 125 variables. [2018-11-18 17:05:29,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:29,807 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 17:05:29,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:29,808 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 17:05:29,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:29,862 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 17:05:29,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:29,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:05:30,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 66 [2018-11-18 17:05:30,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 24 [2018-11-18 17:05:30,023 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,035 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 74 [2018-11-18 17:05:30,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 58 [2018-11-18 17:05:30,042 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,051 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 78 [2018-11-18 17:05:30,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 53 [2018-11-18 17:05:30,065 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,072 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-11-18 17:05:30,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 48 [2018-11-18 17:05:30,117 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,124 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 17:05:30,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 13 [2018-11-18 17:05:30,130 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,141 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-11-18 17:05:30,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 41 [2018-11-18 17:05:30,150 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,158 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:05:30,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 53 [2018-11-18 17:05:30,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-18 17:05:30,258 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,308 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 48 [2018-11-18 17:05:30,310 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,392 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 47 [2018-11-18 17:05:30,406 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,473 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 35 [2018-11-18 17:05:30,475 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,497 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,538 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 61 [2018-11-18 17:05:30,557 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 37 [2018-11-18 17:05:30,559 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,593 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,596 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 44 [2018-11-18 17:05:30,598 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,705 INFO L267 ElimStorePlain]: Start of recursive call 19: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:05:30,820 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 36 [2018-11-18 17:05:30,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:30,834 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,848 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-11-18 17:05:30,854 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:30,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 18 [2018-11-18 17:05:30,855 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,860 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,882 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:05:30,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:30,895 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,898 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:30,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:05:30,925 INFO L202 ElimStorePlain]: Needed 27 recursive calls to eliminate 3 variables, input treesize:81, output treesize:19 [2018-11-18 17:05:31,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:05:31,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:05:31,101 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:31,107 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:31,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:31,110 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:05:31,190 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 17:05:31,191 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:05:31,312 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 17:05:31,338 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:05:31,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 5] imperfect sequences [9] total 13 [2018-11-18 17:05:31,339 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:31,339 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 17:05:31,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 17:05:31,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-18 17:05:31,339 INFO L87 Difference]: Start difference. First operand 1753 states and 2693 transitions. Second operand 6 states. [2018-11-18 17:05:32,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:32,233 INFO L93 Difference]: Finished difference Result 4077 states and 6238 transitions. [2018-11-18 17:05:32,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 17:05:32,235 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 191 [2018-11-18 17:05:32,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:32,238 INFO L225 Difference]: With dead ends: 4077 [2018-11-18 17:05:32,239 INFO L226 Difference]: Without dead ends: 2350 [2018-11-18 17:05:32,242 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 398 GetRequests, 377 SyntacticMatches, 9 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:05:32,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2350 states. [2018-11-18 17:05:32,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2350 to 1753. [2018-11-18 17:05:32,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1753 states. [2018-11-18 17:05:32,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1753 states to 1753 states and 2693 transitions. [2018-11-18 17:05:32,383 INFO L78 Accepts]: Start accepts. Automaton has 1753 states and 2693 transitions. Word has length 191 [2018-11-18 17:05:32,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:32,383 INFO L480 AbstractCegarLoop]: Abstraction has 1753 states and 2693 transitions. [2018-11-18 17:05:32,383 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 17:05:32,383 INFO L276 IsEmpty]: Start isEmpty. Operand 1753 states and 2693 transitions. [2018-11-18 17:05:32,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 17:05:32,391 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:32,391 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:32,391 INFO L423 AbstractCegarLoop]: === Iteration 60 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:32,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:32,391 INFO L82 PathProgramCache]: Analyzing trace with hash 12564028, now seen corresponding path program 1 times [2018-11-18 17:05:32,391 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:32,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:32,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:32,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:32,392 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:32,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:32,992 WARN L180 SmtUtils]: Spent 375.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:33,107 INFO L134 CoverageAnalysis]: Checked inductivity of 278 backedges. 116 proven. 0 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-11-18 17:05:33,108 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:33,108 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:33,108 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:33,112 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:33,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:33,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:33,112 INFO L87 Difference]: Start difference. First operand 1753 states and 2693 transitions. Second operand 4 states. [2018-11-18 17:05:33,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:33,954 INFO L93 Difference]: Finished difference Result 4040 states and 6189 transitions. [2018-11-18 17:05:33,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:33,955 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 191 [2018-11-18 17:05:33,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:33,957 INFO L225 Difference]: With dead ends: 4040 [2018-11-18 17:05:33,957 INFO L226 Difference]: Without dead ends: 2313 [2018-11-18 17:05:33,959 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:33,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2313 states. [2018-11-18 17:05:34,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2313 to 1948. [2018-11-18 17:05:34,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:34,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3053 transitions. [2018-11-18 17:05:34,065 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3053 transitions. Word has length 191 [2018-11-18 17:05:34,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:34,065 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3053 transitions. [2018-11-18 17:05:34,065 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:34,065 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3053 transitions. [2018-11-18 17:05:34,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 17:05:34,067 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:34,067 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:34,067 INFO L423 AbstractCegarLoop]: === Iteration 61 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:34,068 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:34,068 INFO L82 PathProgramCache]: Analyzing trace with hash 1316214759, now seen corresponding path program 1 times [2018-11-18 17:05:34,068 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:34,069 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:34,069 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:34,069 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:34,069 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:34,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:34,337 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 13 [2018-11-18 17:05:34,586 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 20 DAG size of output: 17 [2018-11-18 17:05:34,642 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 189 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:34,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:34,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:34,643 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:34,647 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:34,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:34,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:34,647 INFO L87 Difference]: Start difference. First operand 1948 states and 3053 transitions. Second operand 4 states. [2018-11-18 17:05:35,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:35,331 INFO L93 Difference]: Finished difference Result 4090 states and 6368 transitions. [2018-11-18 17:05:35,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:35,332 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 191 [2018-11-18 17:05:35,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:35,334 INFO L225 Difference]: With dead ends: 4090 [2018-11-18 17:05:35,335 INFO L226 Difference]: Without dead ends: 2168 [2018-11-18 17:05:35,336 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:35,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2168 states. [2018-11-18 17:05:35,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2168 to 1948. [2018-11-18 17:05:35,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:35,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3048 transitions. [2018-11-18 17:05:35,479 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3048 transitions. Word has length 191 [2018-11-18 17:05:35,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:35,479 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3048 transitions. [2018-11-18 17:05:35,479 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:35,479 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3048 transitions. [2018-11-18 17:05:35,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-11-18 17:05:35,481 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:35,481 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:35,481 INFO L423 AbstractCegarLoop]: === Iteration 62 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:35,482 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:35,482 INFO L82 PathProgramCache]: Analyzing trace with hash 962705474, now seen corresponding path program 1 times [2018-11-18 17:05:35,482 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:35,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:35,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:35,483 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:35,483 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:35,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:35,891 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 132 proven. 7 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 17:05:35,891 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:35,891 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 17:05:35,892 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 193 with the following transitions: [2018-11-18 17:05:35,892 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [53], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [190], [193], [195], [198], [200], [205], [208], [225], [228], [232], [236], [251], [257], [260], [265], [279], [282], [290], [292], [295], [303], [306], [310], [501], [504], [520], [525], [528], [536], [541], [543], [546], [554], [557], [561], [582], [616], [618], [630], [633], [634], [635], [637] [2018-11-18 17:05:35,895 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 17:05:35,895 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 17:05:36,393 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 17:05:36,393 INFO L272 AbstractInterpreter]: Visited 86 different actions 212 times. Merged at 59 different actions 116 times. Never widened. Performed 1405 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1405 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 8 fixpoints after 6 different actions. Largest state had 125 variables. [2018-11-18 17:05:36,500 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:36,501 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 17:05:36,501 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:36,501 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 17:05:36,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:36,514 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 17:05:36,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:36,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:05:36,819 WARN L180 SmtUtils]: Spent 197.00 ms on a formula simplification that was a NOOP. DAG size: 41 [2018-11-18 17:05:36,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 72 [2018-11-18 17:05:36,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:36,831 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,840 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:36,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 80 [2018-11-18 17:05:36,877 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:36,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 30 [2018-11-18 17:05:36,878 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,913 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,918 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 62 [2018-11-18 17:05:36,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:36,923 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,931 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:36,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 53 [2018-11-18 17:05:36,934 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:05:36,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 35 [2018-11-18 17:05:36,935 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,941 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,946 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:36,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 84 treesize of output 101 [2018-11-18 17:05:36,968 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:36,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 90 [2018-11-18 17:05:36,970 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 83 [2018-11-18 17:05:37,004 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,038 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,039 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 82 treesize of output 137 [2018-11-18 17:05:37,058 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,069 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 125 [2018-11-18 17:05:37,071 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,199 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,208 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 80 [2018-11-18 17:05:37,219 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,249 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:05:37,424 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,426 INFO L303 Elim1Store]: Index analysis took 103 ms [2018-11-18 17:05:37,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 73 treesize of output 109 [2018-11-18 17:05:37,477 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61 [2018-11-18 17:05:37,479 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,502 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,506 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:37,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 80 [2018-11-18 17:05:37,509 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,540 INFO L267 ElimStorePlain]: Start of recursive call 16: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:05:37,605 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-11-18 17:05:37,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-11-18 17:05:37,709 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,749 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-11-18 17:05:37,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2018-11-18 17:05:37,754 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,765 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-11-18 17:05:37,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 9 [2018-11-18 17:05:37,786 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,789 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:37,801 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:05:37,801 INFO L202 ElimStorePlain]: Needed 24 recursive calls to eliminate 3 variables, input treesize:81, output treesize:19 [2018-11-18 17:05:38,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:05:38,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:05:38,060 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:38,062 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:38,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:38,081 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:05:38,142 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 17:05:38,143 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:05:38,261 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2018-11-18 17:05:38,287 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:05:38,287 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 5] imperfect sequences [9] total 13 [2018-11-18 17:05:38,287 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:38,287 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 17:05:38,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 17:05:38,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-18 17:05:38,288 INFO L87 Difference]: Start difference. First operand 1948 states and 3048 transitions. Second operand 6 states. [2018-11-18 17:05:39,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:39,303 INFO L93 Difference]: Finished difference Result 4245 states and 6551 transitions. [2018-11-18 17:05:39,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 17:05:39,305 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 192 [2018-11-18 17:05:39,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:39,307 INFO L225 Difference]: With dead ends: 4245 [2018-11-18 17:05:39,307 INFO L226 Difference]: Without dead ends: 2323 [2018-11-18 17:05:39,309 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 379 SyntacticMatches, 9 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:05:39,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2323 states. [2018-11-18 17:05:39,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2323 to 1748. [2018-11-18 17:05:39,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1748 states. [2018-11-18 17:05:39,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 2683 transitions. [2018-11-18 17:05:39,441 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 2683 transitions. Word has length 192 [2018-11-18 17:05:39,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:39,441 INFO L480 AbstractCegarLoop]: Abstraction has 1748 states and 2683 transitions. [2018-11-18 17:05:39,441 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 17:05:39,441 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 2683 transitions. [2018-11-18 17:05:39,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-11-18 17:05:39,443 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:39,443 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:39,443 INFO L423 AbstractCegarLoop]: === Iteration 63 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:39,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:39,444 INFO L82 PathProgramCache]: Analyzing trace with hash -2137304009, now seen corresponding path program 1 times [2018-11-18 17:05:39,444 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:39,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:39,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:39,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:39,445 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:39,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:39,749 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 195 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:39,749 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:39,749 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:39,749 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:39,750 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:39,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:39,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:39,757 INFO L87 Difference]: Start difference. First operand 1748 states and 2683 transitions. Second operand 4 states. [2018-11-18 17:05:40,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:40,332 INFO L93 Difference]: Finished difference Result 3690 states and 5628 transitions. [2018-11-18 17:05:40,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:40,334 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 192 [2018-11-18 17:05:40,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:40,336 INFO L225 Difference]: With dead ends: 3690 [2018-11-18 17:05:40,336 INFO L226 Difference]: Without dead ends: 1968 [2018-11-18 17:05:40,337 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:40,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1968 states. [2018-11-18 17:05:40,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1968 to 1748. [2018-11-18 17:05:40,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1748 states. [2018-11-18 17:05:40,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 2678 transitions. [2018-11-18 17:05:40,421 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 2678 transitions. Word has length 192 [2018-11-18 17:05:40,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:40,421 INFO L480 AbstractCegarLoop]: Abstraction has 1748 states and 2678 transitions. [2018-11-18 17:05:40,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:40,421 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 2678 transitions. [2018-11-18 17:05:40,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-18 17:05:40,423 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:40,423 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:40,424 INFO L423 AbstractCegarLoop]: === Iteration 64 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:40,424 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:40,424 INFO L82 PathProgramCache]: Analyzing trace with hash 275380738, now seen corresponding path program 1 times [2018-11-18 17:05:40,424 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:40,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:40,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:40,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:40,427 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:40,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:40,589 INFO L134 CoverageAnalysis]: Checked inductivity of 317 backedges. 201 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:40,590 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:40,590 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:40,590 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:40,590 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:40,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:40,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:40,590 INFO L87 Difference]: Start difference. First operand 1748 states and 2678 transitions. Second operand 4 states. [2018-11-18 17:05:40,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:40,890 INFO L93 Difference]: Finished difference Result 3690 states and 5618 transitions. [2018-11-18 17:05:40,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:40,892 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 193 [2018-11-18 17:05:40,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:40,894 INFO L225 Difference]: With dead ends: 3690 [2018-11-18 17:05:40,894 INFO L226 Difference]: Without dead ends: 1968 [2018-11-18 17:05:40,896 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:40,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1968 states. [2018-11-18 17:05:40,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1968 to 1748. [2018-11-18 17:05:40,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1748 states. [2018-11-18 17:05:40,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 2673 transitions. [2018-11-18 17:05:40,983 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 2673 transitions. Word has length 193 [2018-11-18 17:05:40,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:40,983 INFO L480 AbstractCegarLoop]: Abstraction has 1748 states and 2673 transitions. [2018-11-18 17:05:40,983 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:40,983 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 2673 transitions. [2018-11-18 17:05:40,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-11-18 17:05:40,985 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:40,986 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:40,986 INFO L423 AbstractCegarLoop]: === Iteration 65 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:40,986 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:40,986 INFO L82 PathProgramCache]: Analyzing trace with hash -143219278, now seen corresponding path program 1 times [2018-11-18 17:05:40,986 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:40,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:40,987 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:40,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:40,987 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:41,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:41,177 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:41,238 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 207 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:41,238 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:41,238 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:41,238 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:41,239 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:41,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:41,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:41,239 INFO L87 Difference]: Start difference. First operand 1748 states and 2673 transitions. Second operand 4 states. [2018-11-18 17:05:41,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:41,534 INFO L93 Difference]: Finished difference Result 3640 states and 5543 transitions. [2018-11-18 17:05:41,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:41,536 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 194 [2018-11-18 17:05:41,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:41,538 INFO L225 Difference]: With dead ends: 3640 [2018-11-18 17:05:41,538 INFO L226 Difference]: Without dead ends: 1918 [2018-11-18 17:05:41,540 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:41,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1918 states. [2018-11-18 17:05:41,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1918 to 1748. [2018-11-18 17:05:41,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1748 states. [2018-11-18 17:05:41,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 2668 transitions. [2018-11-18 17:05:41,626 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 2668 transitions. Word has length 194 [2018-11-18 17:05:41,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:41,626 INFO L480 AbstractCegarLoop]: Abstraction has 1748 states and 2668 transitions. [2018-11-18 17:05:41,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:41,627 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 2668 transitions. [2018-11-18 17:05:41,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 17:05:41,628 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:41,629 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:41,629 INFO L423 AbstractCegarLoop]: === Iteration 66 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:41,629 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:41,629 INFO L82 PathProgramCache]: Analyzing trace with hash 581879610, now seen corresponding path program 1 times [2018-11-18 17:05:41,629 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:41,630 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:41,630 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:41,630 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:41,630 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:41,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:41,884 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2018-11-18 17:05:41,884 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:41,884 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 17:05:41,884 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 199 with the following transitions: [2018-11-18 17:05:41,885 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [188], [190], [195], [198], [200], [205], [208], [279], [282], [290], [292], [295], [297], [303], [306], [310], [501], [504], [520], [525], [528], [536], [541], [543], [546], [554], [557], [561], [582], [616], [618], [630], [633], [634], [635], [637] [2018-11-18 17:05:41,890 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 17:05:41,890 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 17:05:42,606 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 17:05:42,612 INFO L272 AbstractInterpreter]: Visited 78 different actions 299 times. Merged at 56 different actions 202 times. Never widened. Performed 1898 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1898 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 16 fixpoints after 13 different actions. Largest state had 118 variables. [2018-11-18 17:05:42,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:42,663 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 17:05:42,664 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:42,664 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 17:05:42,677 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:42,677 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 17:05:42,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:42,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:05:42,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-11-18 17:05:42,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-11-18 17:05:42,877 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:42,901 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:42,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:42,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:4 [2018-11-18 17:05:43,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:05:43,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:43,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,069 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,073 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 17:05:43,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-18 17:05:43,082 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:43,084 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:43,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:05:43,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,092 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,095 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:19 [2018-11-18 17:05:43,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-11-18 17:05:43,111 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:43,112 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:43,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-18 17:05:43,113 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,118 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:43,118 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:3 [2018-11-18 17:05:43,148 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2018-11-18 17:05:43,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:05:43,185 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-11-18 17:05:43,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 17:05:43,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 8] total 9 [2018-11-18 17:05:43,202 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:43,202 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:43,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:43,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:05:43,202 INFO L87 Difference]: Start difference. First operand 1748 states and 2668 transitions. Second operand 4 states. [2018-11-18 17:05:43,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:43,581 INFO L93 Difference]: Finished difference Result 4292 states and 6581 transitions. [2018-11-18 17:05:43,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:43,583 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 198 [2018-11-18 17:05:43,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:43,585 INFO L225 Difference]: With dead ends: 4292 [2018-11-18 17:05:43,585 INFO L226 Difference]: Without dead ends: 2570 [2018-11-18 17:05:43,587 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 390 SyntacticMatches, 7 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-18 17:05:43,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2570 states. [2018-11-18 17:05:43,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2570 to 1948. [2018-11-18 17:05:43,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:43,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3033 transitions. [2018-11-18 17:05:43,680 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3033 transitions. Word has length 198 [2018-11-18 17:05:43,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:43,681 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3033 transitions. [2018-11-18 17:05:43,681 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:43,681 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3033 transitions. [2018-11-18 17:05:43,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 17:05:43,683 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:43,683 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:43,683 INFO L423 AbstractCegarLoop]: === Iteration 67 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:43,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:43,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1606622644, now seen corresponding path program 1 times [2018-11-18 17:05:43,684 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:43,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:43,684 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:43,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:43,684 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:43,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:43,808 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 251 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:43,808 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:43,808 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:43,808 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:43,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:43,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:43,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:43,809 INFO L87 Difference]: Start difference. First operand 1948 states and 3033 transitions. Second operand 4 states. [2018-11-18 17:05:44,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:44,103 INFO L93 Difference]: Finished difference Result 4040 states and 6263 transitions. [2018-11-18 17:05:44,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:44,104 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 198 [2018-11-18 17:05:44,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:44,106 INFO L225 Difference]: With dead ends: 4040 [2018-11-18 17:05:44,106 INFO L226 Difference]: Without dead ends: 2118 [2018-11-18 17:05:44,109 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:44,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2118 states. [2018-11-18 17:05:44,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2118 to 1948. [2018-11-18 17:05:44,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:44,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3028 transitions. [2018-11-18 17:05:44,238 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3028 transitions. Word has length 198 [2018-11-18 17:05:44,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:44,239 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3028 transitions. [2018-11-18 17:05:44,239 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:44,239 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3028 transitions. [2018-11-18 17:05:44,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 17:05:44,241 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:44,241 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:44,241 INFO L423 AbstractCegarLoop]: === Iteration 68 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:44,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:44,242 INFO L82 PathProgramCache]: Analyzing trace with hash 762005656, now seen corresponding path program 1 times [2018-11-18 17:05:44,242 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:44,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:44,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:44,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:44,243 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:44,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:44,449 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:44,524 INFO L134 CoverageAnalysis]: Checked inductivity of 373 backedges. 257 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:44,524 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:44,524 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:44,524 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:44,525 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:44,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:44,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:44,525 INFO L87 Difference]: Start difference. First operand 1948 states and 3028 transitions. Second operand 4 states. [2018-11-18 17:05:44,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:44,824 INFO L93 Difference]: Finished difference Result 4040 states and 6253 transitions. [2018-11-18 17:05:44,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:44,825 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 198 [2018-11-18 17:05:44,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:44,827 INFO L225 Difference]: With dead ends: 4040 [2018-11-18 17:05:44,827 INFO L226 Difference]: Without dead ends: 2118 [2018-11-18 17:05:44,829 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:44,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2118 states. [2018-11-18 17:05:44,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2118 to 1948. [2018-11-18 17:05:44,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:44,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3023 transitions. [2018-11-18 17:05:44,922 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3023 transitions. Word has length 198 [2018-11-18 17:05:44,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:44,922 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3023 transitions. [2018-11-18 17:05:44,922 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:44,922 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3023 transitions. [2018-11-18 17:05:44,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 17:05:44,924 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:44,924 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:44,925 INFO L423 AbstractCegarLoop]: === Iteration 69 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:44,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:44,925 INFO L82 PathProgramCache]: Analyzing trace with hash 851063981, now seen corresponding path program 1 times [2018-11-18 17:05:44,925 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:44,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:44,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:44,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:44,926 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:44,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:45,413 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 14 [2018-11-18 17:05:45,505 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 120 proven. 3 refuted. 0 times theorem prover too weak. 177 trivial. 0 not checked. [2018-11-18 17:05:45,505 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:45,506 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 17:05:45,506 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 200 with the following transitions: [2018-11-18 17:05:45,506 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [9], [12], [16], [27], [29], [33], [37], [43], [45], [50], [55], [60], [65], [70], [75], [80], [85], [88], [90], [95], [100], [103], [105], [110], [115], [120], [125], [130], [135], [140], [145], [150], [155], [160], [165], [170], [175], [180], [185], [190], [193], [195], [198], [200], [205], [208], [279], [282], [290], [292], [295], [297], [303], [306], [310], [501], [504], [520], [525], [528], [536], [541], [543], [546], [554], [557], [561], [582], [616], [618], [630], [633], [634], [635], [637] [2018-11-18 17:05:45,508 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 17:05:45,513 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 17:05:45,864 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 17:05:45,865 INFO L272 AbstractInterpreter]: Visited 78 different actions 244 times. Merged at 55 different actions 152 times. Never widened. Performed 1495 root evaluator evaluations with a maximum evaluation depth of 5. Performed 1495 inverse root evaluator evaluations with a maximum inverse evaluation depth of 5. Found 12 fixpoints after 11 different actions. Largest state had 118 variables. [2018-11-18 17:05:45,912 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:45,913 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 17:05:45,913 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:05:45,913 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 17:05:45,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:45,985 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 17:05:46,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:46,063 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:05:46,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-11-18 17:05:46,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-11-18 17:05:46,073 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,076 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,081 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:4 [2018-11-18 17:05:46,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:05:46,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:05:46,087 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,093 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,097 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,097 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 17:05:46,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-18 17:05:46,116 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:46,117 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:46,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:05:46,118 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,144 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,147 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,148 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:19 [2018-11-18 17:05:46,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-11-18 17:05:46,170 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:46,171 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:05:46,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-11-18 17:05:46,172 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,186 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,188 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,188 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:3 [2018-11-18 17:05:46,215 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 120 proven. 3 refuted. 0 times theorem prover too weak. 177 trivial. 0 not checked. [2018-11-18 17:05:46,215 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:05:46,227 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:05:46,227 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:05:46,229 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:1 [2018-11-18 17:05:46,253 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-11-18 17:05:46,269 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 17:05:46,269 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 7] total 9 [2018-11-18 17:05:46,270 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:46,270 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:46,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:46,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:05:46,270 INFO L87 Difference]: Start difference. First operand 1948 states and 3023 transitions. Second operand 4 states. [2018-11-18 17:05:46,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:46,708 INFO L93 Difference]: Finished difference Result 4522 states and 6991 transitions. [2018-11-18 17:05:46,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:46,709 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 17:05:46,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:46,712 INFO L225 Difference]: With dead ends: 4522 [2018-11-18 17:05:46,712 INFO L226 Difference]: Without dead ends: 2600 [2018-11-18 17:05:46,713 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 393 SyntacticMatches, 5 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-11-18 17:05:46,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2600 states. [2018-11-18 17:05:46,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2600 to 1948. [2018-11-18 17:05:46,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:46,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3028 transitions. [2018-11-18 17:05:46,811 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3028 transitions. Word has length 199 [2018-11-18 17:05:46,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:46,812 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3028 transitions. [2018-11-18 17:05:46,812 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:46,812 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3028 transitions. [2018-11-18 17:05:46,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 17:05:46,814 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:46,814 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:46,814 INFO L423 AbstractCegarLoop]: === Iteration 70 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:46,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:46,815 INFO L82 PathProgramCache]: Analyzing trace with hash -855312612, now seen corresponding path program 1 times [2018-11-18 17:05:46,815 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:46,815 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:46,815 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:46,815 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:46,816 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:46,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:46,913 INFO L134 CoverageAnalysis]: Checked inductivity of 371 backedges. 255 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:46,913 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:46,913 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:46,913 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:46,913 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:46,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:46,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:46,914 INFO L87 Difference]: Start difference. First operand 1948 states and 3028 transitions. Second operand 4 states. [2018-11-18 17:05:47,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:47,229 INFO L93 Difference]: Finished difference Result 4020 states and 6226 transitions. [2018-11-18 17:05:47,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:47,231 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 17:05:47,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:47,233 INFO L225 Difference]: With dead ends: 4020 [2018-11-18 17:05:47,233 INFO L226 Difference]: Without dead ends: 2098 [2018-11-18 17:05:47,235 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:47,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2098 states. [2018-11-18 17:05:47,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2098 to 1948. [2018-11-18 17:05:47,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:47,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3023 transitions. [2018-11-18 17:05:47,334 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3023 transitions. Word has length 199 [2018-11-18 17:05:47,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:47,334 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3023 transitions. [2018-11-18 17:05:47,334 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:47,334 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3023 transitions. [2018-11-18 17:05:47,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 17:05:47,336 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:47,336 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:47,337 INFO L423 AbstractCegarLoop]: === Iteration 71 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:47,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:47,337 INFO L82 PathProgramCache]: Analyzing trace with hash -1046233592, now seen corresponding path program 1 times [2018-11-18 17:05:47,337 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:47,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:47,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:47,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:47,338 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:47,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:47,531 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:47,580 INFO L134 CoverageAnalysis]: Checked inductivity of 376 backedges. 260 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:05:47,581 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:47,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:47,581 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:47,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:47,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:47,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:47,581 INFO L87 Difference]: Start difference. First operand 1948 states and 3023 transitions. Second operand 4 states. [2018-11-18 17:05:48,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:48,386 INFO L93 Difference]: Finished difference Result 3995 states and 6184 transitions. [2018-11-18 17:05:48,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:48,388 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 199 [2018-11-18 17:05:48,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:48,390 INFO L225 Difference]: With dead ends: 3995 [2018-11-18 17:05:48,390 INFO L226 Difference]: Without dead ends: 2073 [2018-11-18 17:05:48,392 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:48,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2073 states. [2018-11-18 17:05:48,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2073 to 1948. [2018-11-18 17:05:48,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1948 states. [2018-11-18 17:05:48,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1948 states to 1948 states and 3018 transitions. [2018-11-18 17:05:48,555 INFO L78 Accepts]: Start accepts. Automaton has 1948 states and 3018 transitions. Word has length 199 [2018-11-18 17:05:48,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:48,555 INFO L480 AbstractCegarLoop]: Abstraction has 1948 states and 3018 transitions. [2018-11-18 17:05:48,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:48,555 INFO L276 IsEmpty]: Start isEmpty. Operand 1948 states and 3018 transitions. [2018-11-18 17:05:48,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-18 17:05:48,557 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:48,557 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:48,557 INFO L423 AbstractCegarLoop]: === Iteration 72 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:48,558 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:48,558 INFO L82 PathProgramCache]: Analyzing trace with hash 1232469000, now seen corresponding path program 1 times [2018-11-18 17:05:48,558 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:48,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:48,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:48,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:48,559 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:48,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:48,733 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 9 [2018-11-18 17:05:48,866 INFO L134 CoverageAnalysis]: Checked inductivity of 382 backedges. 218 proven. 0 refuted. 0 times theorem prover too weak. 164 trivial. 0 not checked. [2018-11-18 17:05:48,866 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:48,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:48,866 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:48,868 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:48,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:48,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:48,869 INFO L87 Difference]: Start difference. First operand 1948 states and 3018 transitions. Second operand 4 states. [2018-11-18 17:05:49,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:49,555 INFO L93 Difference]: Finished difference Result 4260 states and 6593 transitions. [2018-11-18 17:05:49,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:49,557 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 201 [2018-11-18 17:05:49,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:49,559 INFO L225 Difference]: With dead ends: 4260 [2018-11-18 17:05:49,559 INFO L226 Difference]: Without dead ends: 2338 [2018-11-18 17:05:49,561 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:49,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2338 states. [2018-11-18 17:05:49,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2338 to 2103. [2018-11-18 17:05:49,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2103 states. [2018-11-18 17:05:49,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2103 states to 2103 states and 3293 transitions. [2018-11-18 17:05:49,738 INFO L78 Accepts]: Start accepts. Automaton has 2103 states and 3293 transitions. Word has length 201 [2018-11-18 17:05:49,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:49,738 INFO L480 AbstractCegarLoop]: Abstraction has 2103 states and 3293 transitions. [2018-11-18 17:05:49,738 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:49,739 INFO L276 IsEmpty]: Start isEmpty. Operand 2103 states and 3293 transitions. [2018-11-18 17:05:49,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-11-18 17:05:49,741 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:49,741 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:49,741 INFO L423 AbstractCegarLoop]: === Iteration 73 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:49,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:49,741 INFO L82 PathProgramCache]: Analyzing trace with hash -67619220, now seen corresponding path program 1 times [2018-11-18 17:05:49,741 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:49,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:49,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:49,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:49,742 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:49,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:05:49,892 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 278 proven. 0 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-11-18 17:05:49,892 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:05:49,893 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:05:49,893 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 17:05:49,893 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:05:49,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:05:49,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:05:49,893 INFO L87 Difference]: Start difference. First operand 2103 states and 3293 transitions. Second operand 4 states. [2018-11-18 17:05:50,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:05:50,526 INFO L93 Difference]: Finished difference Result 4305 states and 6724 transitions. [2018-11-18 17:05:50,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:05:50,537 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 204 [2018-11-18 17:05:50,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:05:50,539 INFO L225 Difference]: With dead ends: 4305 [2018-11-18 17:05:50,539 INFO L226 Difference]: Without dead ends: 2228 [2018-11-18 17:05:50,542 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:05:50,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2228 states. [2018-11-18 17:05:50,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2228 to 2103. [2018-11-18 17:05:50,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2103 states. [2018-11-18 17:05:50,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2103 states to 2103 states and 3288 transitions. [2018-11-18 17:05:50,718 INFO L78 Accepts]: Start accepts. Automaton has 2103 states and 3288 transitions. Word has length 204 [2018-11-18 17:05:50,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:05:50,718 INFO L480 AbstractCegarLoop]: Abstraction has 2103 states and 3288 transitions. [2018-11-18 17:05:50,718 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:05:50,718 INFO L276 IsEmpty]: Start isEmpty. Operand 2103 states and 3288 transitions. [2018-11-18 17:05:50,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-11-18 17:05:50,720 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:05:50,720 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:05:50,721 INFO L423 AbstractCegarLoop]: === Iteration 74 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:05:50,721 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:05:50,721 INFO L82 PathProgramCache]: Analyzing trace with hash 362821223, now seen corresponding path program 1 times [2018-11-18 17:05:50,721 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 17:05:50,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:50,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:05:50,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 17:05:50,722 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 17:05:50,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 17:05:50,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 17:05:51,060 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 17:05:51,164 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 24583 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 17:05:51,166 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 24586 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 17:05:51,337 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 05:05:51 BoogieIcfgContainer [2018-11-18 17:05:51,337 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 17:05:51,337 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 17:05:51,337 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 17:05:51,337 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 17:05:51,338 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:04:02" (3/4) ... [2018-11-18 17:05:51,346 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-18 17:05:51,346 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 17:05:51,347 INFO L168 Benchmark]: Toolchain (without parser) took 112421.69 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 759.2 MB). Free memory was 958.0 MB in the beginning and 1.2 GB in the end (delta: -221.5 MB). Peak memory consumption was 537.7 MB. Max. memory is 11.5 GB. [2018-11-18 17:05:51,347 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 17:05:51,347 INFO L168 Benchmark]: CACSL2BoogieTranslator took 1353.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.9 MB). Free memory was 958.0 MB in the beginning and 1.0 GB in the end (delta: -89.6 MB). Peak memory consumption was 101.8 MB. Max. memory is 11.5 GB. [2018-11-18 17:05:51,348 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 17:05:51,348 INFO L168 Benchmark]: Boogie Preprocessor took 155.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 11.5 GB. [2018-11-18 17:05:51,348 INFO L168 Benchmark]: RCFGBuilder took 2447.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 955.4 MB in the end (delta: 84.2 MB). Peak memory consumption was 84.2 MB. Max. memory is 11.5 GB. [2018-11-18 17:05:51,348 INFO L168 Benchmark]: TraceAbstraction took 108384.90 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 620.2 MB). Free memory was 955.4 MB in the beginning and 1.2 GB in the end (delta: -224.2 MB). Peak memory consumption was 396.1 MB. Max. memory is 11.5 GB. [2018-11-18 17:05:51,348 INFO L168 Benchmark]: Witness Printer took 9.08 ms. Allocated memory is still 1.8 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 17:05:51,350 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 1353.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.9 MB). Free memory was 958.0 MB in the beginning and 1.0 GB in the end (delta: -89.6 MB). Peak memory consumption was 101.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 67.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 155.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2447.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.0 GB in the beginning and 955.4 MB in the end (delta: 84.2 MB). Peak memory consumption was 84.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 108384.90 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 620.2 MB). Free memory was 955.4 MB in the beginning and 1.2 GB in the end (delta: -224.2 MB). Peak memory consumption was 396.1 MB. Max. memory is 11.5 GB. * Witness Printer took 9.08 ms. Allocated memory is still 1.8 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 24583 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 24586 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1727]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseAnd at line 1121. Possible FailurePath: [L1042] static int init = 1; [L1043] FCALL static SSL_METHOD SSLv3_server_data ; VAL [\old(init)=24577, \old(SSLv3_server_data)=null, \old(SSLv3_server_data)=null, init=1, SSLv3_server_data={1:0}] [L1065] SSL *s ; [L1066] int tmp ; [L1070] EXPR, FCALL malloc(sizeof(SSL)) [L1070] s = malloc(sizeof(SSL)) [L1071] EXPR, FCALL malloc(sizeof(struct ssl3_state_st)) [L1071] FCALL s->s3 = malloc(sizeof(struct ssl3_state_st)) [L1072] EXPR, FCALL malloc(sizeof(SSL_CTX)) [L1072] FCALL s->ctx = malloc(sizeof(SSL_CTX)) [L1073] EXPR, FCALL malloc(sizeof(SSL_SESSION)) [L1073] FCALL s->session = malloc(sizeof(SSL_SESSION)) VAL [init=1, malloc(sizeof(SSL))={24579:0}, malloc(sizeof(SSL_CTX))={24580:0}, malloc(sizeof(SSL_SESSION))={24581:0}, malloc(sizeof(struct ssl3_state_st))={24588:0}, s={24579:0}, SSLv3_server_data={1:0}] [L1074] CALL ssl3_accept(s) VAL [init=1, s={24579:0}, SSLv3_server_data={1:0}] [L1080] BUF_MEM *buf ; [L1081] unsigned long l ; [L1082] unsigned long Time ; [L1083] unsigned long tmp ; [L1084] void (*cb)() ; [L1085] long num1 ; [L1086] int ret ; [L1087] int new_state ; [L1088] int state ; [L1089] int skip ; [L1090] int got_new_session ; [L1091] int tmp___1 = __VERIFIER_nondet_int() ; [L1092] int tmp___2 = __VERIFIER_nondet_int() ; [L1093] int tmp___3 = __VERIFIER_nondet_int() ; [L1094] int tmp___4 = __VERIFIER_nondet_int() ; [L1095] int tmp___5 = __VERIFIER_nondet_int() ; [L1096] int tmp___6 = __VERIFIER_nondet_int() ; [L1097] int tmp___7 ; [L1098] long tmp___8 = __VERIFIER_nondet_long() ; [L1099] int tmp___9 = __VERIFIER_nondet_int() ; [L1100] int tmp___10 = __VERIFIER_nondet_int() ; [L1101] int blastFlag ; [L1105] FCALL s->state = 8464 [L1106] blastFlag = 0 [L1107] FCALL s->hit=__VERIFIER_nondet_int () [L1108] FCALL s->state = 8464 [L1109] tmp = __VERIFIER_nondet_int() [L1110] Time = tmp [L1111] cb = (void (*)())((void *)0) [L1112] ret = -1 [L1113] skip = 0 [L1114] got_new_session = 0 [L1115] EXPR, FCALL s->info_callback VAL [={0:0}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->info_callback={2:-1}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1115] COND TRUE (unsigned long )s->info_callback != (unsigned long )((void *)0) [L1116] EXPR, FCALL s->info_callback [L1116] cb = s->info_callback [L1120] EXPR, FCALL s->in_handshake [L1120] FCALL s->in_handshake += 1 [L1121] COND FALSE !(tmp___1 & 12288) VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] EXPR, FCALL s->cert VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->cert={3:-2}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] COND FALSE !((unsigned long )s->cert == (unsigned long )((void *)0)) [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=0, got_new_session=0, init=1, ret=-1, s={24579:0}, s={24579:0}, s->state=8464, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND TRUE s->state == 8464 [L1323] FCALL s->shutdown = 0 [L1324] ret = __VERIFIER_nondet_int() [L1325] COND TRUE blastFlag == 0 [L1326] blastFlag = 1 VAL [={2:-1}, blastFlag=1, got_new_session=0, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1330] COND FALSE !(ret <= 0) [L1335] got_new_session = 1 [L1336] FCALL s->state = 8496 [L1337] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24582, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=1, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8496, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND TRUE s->state == 8496 [L1341] ret = __VERIFIER_nondet_int() [L1342] COND TRUE blastFlag == 1 [L1343] blastFlag = 2 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1347] COND FALSE !(ret <= 0) [L1352] FCALL s->hit VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->hit=1, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1352] COND TRUE s->hit [L1353] FCALL s->state = 8656 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1357] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24582, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=2, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8656, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND TRUE s->state == 8656 [L1579] EXPR, FCALL s->session [L1579] EXPR, FCALL s->s3 [L1579] EXPR, FCALL (s->s3)->tmp.new_cipher [L1579] FCALL (s->session)->cipher = (s->s3)->tmp.new_cipher [L1580] COND FALSE !(! tmp___9) [L1586] ret = __VERIFIER_nondet_int() [L1587] COND TRUE blastFlag == 2 [L1588] blastFlag = 3 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1592] COND FALSE !(ret <= 0) [L1597] FCALL s->state = 8672 [L1598] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1599] COND FALSE !(! tmp___10) VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24582, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND FALSE !(s->state == 8656) [L1232] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1232] COND FALSE !(s->state == 8657) [L1235] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=3, got_new_session=1, init=1, ret=1, s={24579:0}, s={24579:0}, s->state=8672, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1235] COND TRUE s->state == 8672 [L1608] ret = __VERIFIER_nondet_int() [L1609] COND TRUE blastFlag == 3 [L1610] blastFlag = 4 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1614] COND FALSE !(ret <= 0) [L1619] FCALL s->state = 8448 [L1620] FCALL s->hit VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->hit=1, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1620] COND TRUE s->hit [L1621] EXPR, FCALL s->s3 [L1621] FCALL (s->s3)->tmp.next_state = 8640 [L1625] FCALL s->init_num = 0 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24582, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, ret=7, s={24579:0}, s={24579:0}, s->state=8448, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND TRUE s->state == 8448 [L1490] COND FALSE !(num1 > 0L) VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1503] EXPR, FCALL s->s3 [L1503] EXPR, FCALL (s->s3)->tmp.next_state [L1503] FCALL s->state = (s->s3)->tmp.next_state [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={2:-1}, (s->s3)->tmp.reuse_message=24582, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->s3={24588:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=7, s={24579:0}, s={24579:0}, s->state=8640, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND TRUE s->state == 8640 [L1559] ret = __VERIFIER_nondet_int() [L1560] COND TRUE blastFlag == 4 VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1727] __VERIFIER_error() VAL [={2:-1}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={24579:0}, s={24579:0}, skip=0, SSLv3_server_data={1:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 160 locations, 1 error locations. UNSAFE Result, 108.3s OverallTime, 74 OverallIterations, 8 TraceHistogramMax, 69.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 17799 SDtfs, 7083 SDslu, 28601 SDs, 0 SdLazy, 18513 SolverSat, 861 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 56.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2393 GetRequests, 2010 SyntacticMatches, 106 SemanticMatches, 277 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 437 ImplicationChecksByTransitivity, 20.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2103occurred in iteration=72, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 3.9s AbstIntTime, 5 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 4.4s AutomataMinimizationTime, 73 MinimizatonAttempts, 16081 StatesRemovedByMinimization, 71 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.5s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 25.8s InterpolantComputationTime, 11357 NumberOfCodeBlocks, 11357 NumberOfCodeBlocksAsserted, 79 NumberOfCheckSat, 12024 ConstructedInterpolants, 166 QuantifiedInterpolants, 8031677 SizeOfPredicates, 46 NumberOfNonLiveVariables, 3421 ConjunctsInSsa, 69 ConjunctsInUnsatCore, 83 InterpolantComputations, 74 PerfectInterpolantSequences, 14476/14923 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-5842f4b [2018-11-18 17:05:53,650 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 17:05:53,652 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 17:05:53,666 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-11-18 17:05:53,678 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 17:05:53,679 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 17:05:53,679 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 17:05:53,682 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 17:05:53,683 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 17:05:53,684 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 17:05:53,685 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 17:05:53,687 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 17:05:53,688 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 17:05:53,699 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 17:05:53,702 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 17:05:53,704 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 17:05:53,704 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 17:05:53,704 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 17:05:53,709 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 17:05:53,710 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 17:05:53,711 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 17:05:53,711 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 17:05:53,712 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 17:05:53,715 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 17:05:53,716 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 17:05:53,716 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 17:05:53,716 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 17:05:53,717 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 17:05:53,717 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 17:05:53,718 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-11-18 17:05:53,736 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 17:05:53,740 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 17:05:53,740 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 17:05:53,740 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 17:05:53,741 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 17:05:53,741 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 17:05:53,741 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 17:05:53,741 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 17:05:53,741 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 17:05:53,741 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 17:05:53,742 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 17:05:53,742 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 17:05:53,742 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 17:05:53,742 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 17:05:53,742 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 17:05:53,742 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 17:05:53,743 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 17:05:53,743 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 17:05:53,745 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 17:05:53,745 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 17:05:53,745 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 17:05:53,745 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 17:05:53,746 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 17:05:53,746 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 17:05:53,746 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 17:05:53,746 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 17:05:53,746 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 17:05:53,746 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 17:05:53,746 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 17:05:53,747 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c336041bbe834e5f5652b9c9de80bd23d0aa7014 [2018-11-18 17:05:53,790 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 17:05:53,803 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 17:05:53,806 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 17:05:53,807 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 17:05:53,807 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 17:05:53,808 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/../../sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c [2018-11-18 17:05:53,905 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/a62dfacbc/7c55741820b74eeeb4bc7c94af118797/FLAG47060fe50 [2018-11-18 17:05:54,450 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 17:05:54,457 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/sv-benchmarks/c/ssh/s3_srvr.blast.13_false-unreach-call.i.cil.c [2018-11-18 17:05:54,476 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/a62dfacbc/7c55741820b74eeeb4bc7c94af118797/FLAG47060fe50 [2018-11-18 17:05:54,665 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/data/a62dfacbc/7c55741820b74eeeb4bc7c94af118797 [2018-11-18 17:05:54,668 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 17:05:54,669 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 17:05:54,670 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 17:05:54,670 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 17:05:54,672 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 17:05:54,673 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:05:54" (1/1) ... [2018-11-18 17:05:54,675 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@689feb36 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:54, skipping insertion in model container [2018-11-18 17:05:54,675 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:05:54" (1/1) ... [2018-11-18 17:05:54,683 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 17:05:54,739 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 17:05:55,439 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 17:05:55,479 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 17:05:55,907 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 17:05:56,092 INFO L195 MainTranslator]: Completed translation [2018-11-18 17:05:56,093 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56 WrapperNode [2018-11-18 17:05:56,093 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 17:05:56,093 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 17:05:56,094 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 17:05:56,094 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 17:05:56,102 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,123 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,139 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 17:05:56,140 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 17:05:56,141 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 17:05:56,142 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 17:05:56,150 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,150 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,165 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,176 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,242 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,253 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,267 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... [2018-11-18 17:05:56,271 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 17:05:56,273 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 17:05:56,273 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 17:05:56,273 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 17:05:56,274 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 17:05:56,414 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-18 17:05:56,414 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 17:05:56,414 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 17:05:56,415 INFO L130 BoogieDeclarations]: Found specification of procedure ssl3_accept [2018-11-18 17:05:56,415 INFO L138 BoogieDeclarations]: Found implementation of procedure ssl3_accept [2018-11-18 17:05:56,415 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-18 17:05:56,415 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 17:05:56,415 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 17:05:56,415 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 17:05:56,415 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-18 17:05:56,416 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-18 17:05:56,416 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 17:05:56,416 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 17:05:56,416 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-18 17:05:58,983 WARN L684 $ProcedureCfgBuilder]: Two Gotos in a row! There was dead code [2018-11-18 17:05:58,983 WARN L649 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-18 17:06:00,947 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 17:06:00,948 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:06:00 BoogieIcfgContainer [2018-11-18 17:06:00,948 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 17:06:00,948 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 17:06:00,948 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 17:06:00,951 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 17:06:00,951 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 05:05:54" (1/3) ... [2018-11-18 17:06:00,952 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d1a468e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:06:00, skipping insertion in model container [2018-11-18 17:06:00,952 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:05:56" (2/3) ... [2018-11-18 17:06:00,968 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d1a468e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:06:00, skipping insertion in model container [2018-11-18 17:06:00,969 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:06:00" (3/3) ... [2018-11-18 17:06:00,970 INFO L112 eAbstractionObserver]: Analyzing ICFG s3_srvr.blast.13_false-unreach-call.i.cil.c [2018-11-18 17:06:00,979 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 17:06:01,001 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 17:06:01,014 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 17:06:01,048 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 17:06:01,048 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 17:06:01,048 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 17:06:01,048 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 17:06:01,049 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 17:06:01,049 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 17:06:01,049 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 17:06:01,049 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 17:06:01,049 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 17:06:01,086 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states. [2018-11-18 17:06:01,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 17:06:01,107 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:01,108 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:01,111 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:01,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:01,124 INFO L82 PathProgramCache]: Analyzing trace with hash 661829922, now seen corresponding path program 1 times [2018-11-18 17:06:01,129 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:01,131 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:01,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:01,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:01,474 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:01,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:06:01,629 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:01,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:01,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:01,640 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:01,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:01,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:01,654 INFO L87 Difference]: Start difference. First operand 158 states. Second operand 3 states. [2018-11-18 17:06:02,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:02,143 INFO L93 Difference]: Finished difference Result 438 states and 739 transitions. [2018-11-18 17:06:02,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:02,145 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2018-11-18 17:06:02,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:02,170 INFO L225 Difference]: With dead ends: 438 [2018-11-18 17:06:02,170 INFO L226 Difference]: Without dead ends: 267 [2018-11-18 17:06:02,173 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:02,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-11-18 17:06:02,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 267. [2018-11-18 17:06:02,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267 states. [2018-11-18 17:06:02,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 399 transitions. [2018-11-18 17:06:02,235 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 399 transitions. Word has length 42 [2018-11-18 17:06:02,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:02,235 INFO L480 AbstractCegarLoop]: Abstraction has 267 states and 399 transitions. [2018-11-18 17:06:02,236 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:02,236 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 399 transitions. [2018-11-18 17:06:02,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-11-18 17:06:02,238 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:02,238 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:02,238 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:02,238 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:02,239 INFO L82 PathProgramCache]: Analyzing trace with hash 233986428, now seen corresponding path program 1 times [2018-11-18 17:06:02,239 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:02,239 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:02,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:02,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:02,363 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:02,416 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 17:06:02,416 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:02,424 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:02,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:02,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:02,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:02,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:02,436 INFO L87 Difference]: Start difference. First operand 267 states and 399 transitions. Second operand 3 states. [2018-11-18 17:06:02,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:02,615 INFO L93 Difference]: Finished difference Result 518 states and 788 transitions. [2018-11-18 17:06:02,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:02,616 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2018-11-18 17:06:02,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:02,618 INFO L225 Difference]: With dead ends: 518 [2018-11-18 17:06:02,618 INFO L226 Difference]: Without dead ends: 390 [2018-11-18 17:06:02,619 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:02,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2018-11-18 17:06:02,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390. [2018-11-18 17:06:02,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2018-11-18 17:06:02,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 581 transitions. [2018-11-18 17:06:02,640 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 581 transitions. Word has length 60 [2018-11-18 17:06:02,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:02,641 INFO L480 AbstractCegarLoop]: Abstraction has 390 states and 581 transitions. [2018-11-18 17:06:02,641 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:02,641 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 581 transitions. [2018-11-18 17:06:02,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 17:06:02,644 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:02,644 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:02,644 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:02,646 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:02,646 INFO L82 PathProgramCache]: Analyzing trace with hash 540992405, now seen corresponding path program 1 times [2018-11-18 17:06:02,646 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:02,646 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:02,690 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:02,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:02,780 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:02,860 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 17:06:02,872 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:02,875 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:02,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:02,876 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:02,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:02,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:02,876 INFO L87 Difference]: Start difference. First operand 390 states and 581 transitions. Second operand 3 states. [2018-11-18 17:06:03,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:03,308 INFO L93 Difference]: Finished difference Result 764 states and 1153 transitions. [2018-11-18 17:06:03,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:03,308 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2018-11-18 17:06:03,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:03,312 INFO L225 Difference]: With dead ends: 764 [2018-11-18 17:06:03,312 INFO L226 Difference]: Without dead ends: 513 [2018-11-18 17:06:03,313 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:03,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states. [2018-11-18 17:06:03,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 513. [2018-11-18 17:06:03,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 513 states. [2018-11-18 17:06:03,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 513 states to 513 states and 764 transitions. [2018-11-18 17:06:03,350 INFO L78 Accepts]: Start accepts. Automaton has 513 states and 764 transitions. Word has length 83 [2018-11-18 17:06:03,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:03,350 INFO L480 AbstractCegarLoop]: Abstraction has 513 states and 764 transitions. [2018-11-18 17:06:03,351 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:03,351 INFO L276 IsEmpty]: Start isEmpty. Operand 513 states and 764 transitions. [2018-11-18 17:06:03,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-11-18 17:06:03,355 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:03,355 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:03,356 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:03,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:03,356 INFO L82 PathProgramCache]: Analyzing trace with hash -2108182396, now seen corresponding path program 1 times [2018-11-18 17:06:03,357 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:03,358 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:03,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:03,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:03,563 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:03,632 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:06:03,634 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:03,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:03,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:03,637 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:03,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:03,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:03,639 INFO L87 Difference]: Start difference. First operand 513 states and 764 transitions. Second operand 3 states. [2018-11-18 17:06:03,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:03,966 INFO L93 Difference]: Finished difference Result 1012 states and 1521 transitions. [2018-11-18 17:06:03,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:03,967 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 108 [2018-11-18 17:06:03,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:03,969 INFO L225 Difference]: With dead ends: 1012 [2018-11-18 17:06:03,970 INFO L226 Difference]: Without dead ends: 638 [2018-11-18 17:06:03,971 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 106 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:03,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 638 states. [2018-11-18 17:06:03,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 638 to 638. [2018-11-18 17:06:03,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 638 states. [2018-11-18 17:06:03,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 638 states to 638 states and 949 transitions. [2018-11-18 17:06:03,991 INFO L78 Accepts]: Start accepts. Automaton has 638 states and 949 transitions. Word has length 108 [2018-11-18 17:06:03,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:03,992 INFO L480 AbstractCegarLoop]: Abstraction has 638 states and 949 transitions. [2018-11-18 17:06:03,992 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:03,992 INFO L276 IsEmpty]: Start isEmpty. Operand 638 states and 949 transitions. [2018-11-18 17:06:03,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-11-18 17:06:03,998 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:03,998 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:03,998 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:03,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:03,998 INFO L82 PathProgramCache]: Analyzing trace with hash -2014675063, now seen corresponding path program 1 times [2018-11-18 17:06:03,999 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:03,999 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:04,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:04,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:04,184 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:04,278 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:06:04,278 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:04,280 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:04,281 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:04,281 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:04,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:04,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:04,281 INFO L87 Difference]: Start difference. First operand 638 states and 949 transitions. Second operand 3 states. [2018-11-18 17:06:04,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:04,637 INFO L93 Difference]: Finished difference Result 1260 states and 1888 transitions. [2018-11-18 17:06:04,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:04,637 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 125 [2018-11-18 17:06:04,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:04,640 INFO L225 Difference]: With dead ends: 1260 [2018-11-18 17:06:04,640 INFO L226 Difference]: Without dead ends: 761 [2018-11-18 17:06:04,643 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:04,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 761 states. [2018-11-18 17:06:04,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 761 to 761. [2018-11-18 17:06:04,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 761 states. [2018-11-18 17:06:04,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 761 states to 761 states and 1131 transitions. [2018-11-18 17:06:04,670 INFO L78 Accepts]: Start accepts. Automaton has 761 states and 1131 transitions. Word has length 125 [2018-11-18 17:06:04,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:04,671 INFO L480 AbstractCegarLoop]: Abstraction has 761 states and 1131 transitions. [2018-11-18 17:06:04,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:04,671 INFO L276 IsEmpty]: Start isEmpty. Operand 761 states and 1131 transitions. [2018-11-18 17:06:04,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-11-18 17:06:04,675 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:04,675 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:04,675 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:04,675 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:04,676 INFO L82 PathProgramCache]: Analyzing trace with hash 483748542, now seen corresponding path program 1 times [2018-11-18 17:06:04,676 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:04,677 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:04,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:05,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:05,032 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:05,131 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 17:06:05,132 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:05,137 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:05,138 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:05,138 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:05,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:05,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:05,139 INFO L87 Difference]: Start difference. First operand 761 states and 1131 transitions. Second operand 3 states. [2018-11-18 17:06:05,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:05,797 INFO L93 Difference]: Finished difference Result 1508 states and 2255 transitions. [2018-11-18 17:06:05,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:05,798 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2018-11-18 17:06:05,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:05,801 INFO L225 Difference]: With dead ends: 1508 [2018-11-18 17:06:05,801 INFO L226 Difference]: Without dead ends: 886 [2018-11-18 17:06:05,802 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:05,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 886 states. [2018-11-18 17:06:05,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 886 to 886. [2018-11-18 17:06:05,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 886 states. [2018-11-18 17:06:05,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 886 states to 886 states and 1316 transitions. [2018-11-18 17:06:05,844 INFO L78 Accepts]: Start accepts. Automaton has 886 states and 1316 transitions. Word has length 138 [2018-11-18 17:06:05,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:05,844 INFO L480 AbstractCegarLoop]: Abstraction has 886 states and 1316 transitions. [2018-11-18 17:06:05,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:05,844 INFO L276 IsEmpty]: Start isEmpty. Operand 886 states and 1316 transitions. [2018-11-18 17:06:05,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-11-18 17:06:05,847 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:05,848 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:05,856 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:05,857 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:05,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1195979437, now seen corresponding path program 1 times [2018-11-18 17:06:05,858 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:05,859 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:06,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:06,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:06,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:06,418 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 78 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 17:06:06,420 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:06,423 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:06,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 17:06:06,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 17:06:06,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 17:06:06,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:06,424 INFO L87 Difference]: Start difference. First operand 886 states and 1316 transitions. Second operand 3 states. [2018-11-18 17:06:07,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:07,017 INFO L93 Difference]: Finished difference Result 1756 states and 2620 transitions. [2018-11-18 17:06:07,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 17:06:07,021 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 169 [2018-11-18 17:06:07,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:07,024 INFO L225 Difference]: With dead ends: 1756 [2018-11-18 17:06:07,024 INFO L226 Difference]: Without dead ends: 1009 [2018-11-18 17:06:07,035 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 17:06:07,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1009 states. [2018-11-18 17:06:07,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1009 to 1007. [2018-11-18 17:06:07,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1007 states. [2018-11-18 17:06:07,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1007 states to 1007 states and 1496 transitions. [2018-11-18 17:06:07,074 INFO L78 Accepts]: Start accepts. Automaton has 1007 states and 1496 transitions. Word has length 169 [2018-11-18 17:06:07,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:07,075 INFO L480 AbstractCegarLoop]: Abstraction has 1007 states and 1496 transitions. [2018-11-18 17:06:07,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 17:06:07,075 INFO L276 IsEmpty]: Start isEmpty. Operand 1007 states and 1496 transitions. [2018-11-18 17:06:07,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 17:06:07,084 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:07,085 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:07,085 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:07,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:07,085 INFO L82 PathProgramCache]: Analyzing trace with hash 683885949, now seen corresponding path program 1 times [2018-11-18 17:06:07,086 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:07,086 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:07,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:07,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:07,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:07,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2018-11-18 17:06:07,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 17:06:07,763 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:07,789 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:07,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:07,806 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:21 [2018-11-18 17:06:07,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 27 [2018-11-18 17:06:07,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 3 [2018-11-18 17:06:07,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:07,881 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:07,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:07,977 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:43, output treesize:3 [2018-11-18 17:06:08,103 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 144 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:06:08,103 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:08,121 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:08,121 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:06:08,121 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:06:08,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:06:08,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:06:08,122 INFO L87 Difference]: Start difference. First operand 1007 states and 1496 transitions. Second operand 4 states. [2018-11-18 17:06:11,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:11,059 INFO L93 Difference]: Finished difference Result 2095 states and 3127 transitions. [2018-11-18 17:06:11,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:06:11,060 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 175 [2018-11-18 17:06:11,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:11,064 INFO L225 Difference]: With dead ends: 2095 [2018-11-18 17:06:11,065 INFO L226 Difference]: Without dead ends: 1102 [2018-11-18 17:06:11,067 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:06:11,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states. [2018-11-18 17:06:11,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 1023. [2018-11-18 17:06:11,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1023 states. [2018-11-18 17:06:11,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1023 states to 1023 states and 1512 transitions. [2018-11-18 17:06:11,089 INFO L78 Accepts]: Start accepts. Automaton has 1023 states and 1512 transitions. Word has length 175 [2018-11-18 17:06:11,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:11,089 INFO L480 AbstractCegarLoop]: Abstraction has 1023 states and 1512 transitions. [2018-11-18 17:06:11,090 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:06:11,090 INFO L276 IsEmpty]: Start isEmpty. Operand 1023 states and 1512 transitions. [2018-11-18 17:06:11,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 17:06:11,094 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:11,094 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:11,094 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:11,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:11,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1533744449, now seen corresponding path program 1 times [2018-11-18 17:06:11,095 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:11,095 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:11,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:12,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:12,433 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:12,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:06:12,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:06:12,527 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:12,552 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:12,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:06:12,554 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,666 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,741 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,762 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:06:12,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:06:12,826 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:12,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:06:12,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,847 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,849 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:12,849 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:06:12,984 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 168 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 17:06:12,984 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:06:12,987 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:06:12,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 17:06:12,988 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 17:06:12,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 17:06:12,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-18 17:06:12,989 INFO L87 Difference]: Start difference. First operand 1023 states and 1512 transitions. Second operand 7 states. [2018-11-18 17:06:14,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:06:14,421 INFO L93 Difference]: Finished difference Result 2879 states and 4275 transitions. [2018-11-18 17:06:14,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 17:06:14,425 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 175 [2018-11-18 17:06:14,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:06:14,431 INFO L225 Difference]: With dead ends: 2879 [2018-11-18 17:06:14,431 INFO L226 Difference]: Without dead ends: 1870 [2018-11-18 17:06:14,433 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 169 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 17:06:14,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1870 states. [2018-11-18 17:06:14,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1870 to 1327. [2018-11-18 17:06:14,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1327 states. [2018-11-18 17:06:14,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1327 states to 1327 states and 2064 transitions. [2018-11-18 17:06:14,476 INFO L78 Accepts]: Start accepts. Automaton has 1327 states and 2064 transitions. Word has length 175 [2018-11-18 17:06:14,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:06:14,476 INFO L480 AbstractCegarLoop]: Abstraction has 1327 states and 2064 transitions. [2018-11-18 17:06:14,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 17:06:14,477 INFO L276 IsEmpty]: Start isEmpty. Operand 1327 states and 2064 transitions. [2018-11-18 17:06:14,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-11-18 17:06:14,480 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:06:14,481 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:06:14,481 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:06:14,481 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:06:14,481 INFO L82 PathProgramCache]: Analyzing trace with hash -401542991, now seen corresponding path program 1 times [2018-11-18 17:06:14,482 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:06:14,482 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:06:14,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:14,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:15,048 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:15,109 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-18 17:06:15,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 17:06:15,160 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,165 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,168 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-18 17:06:15,170 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,206 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,238 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 17:06:15,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 17:06:15,306 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 17:06:15,314 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,315 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,324 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-18 17:06:15,327 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,338 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,346 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,354 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,376 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:49, output treesize:56 [2018-11-18 17:06:15,481 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,512 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,515 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 123 [2018-11-18 17:06:15,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 39 [2018-11-18 17:06:15,555 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,594 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-11-18 17:06:15,647 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:15,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-11-18 17:06:15,652 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:15,667 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:15,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:15,704 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:93, output treesize:77 [2018-11-18 17:06:15,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:06:15,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:06:15,915 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,938 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:15,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:15,989 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-11-18 17:06:16,145 WARN L180 SmtUtils]: Spent 126.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-11-18 17:06:16,159 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:16,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-11-18 17:06:16,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 17:06:16,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-18 17:06:16,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:06:16,287 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:16,303 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:16,385 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:16,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-11-18 17:06:16,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 17:06:16,407 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,444 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:06:16,445 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:16,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 43 [2018-11-18 17:06:16,449 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:16,463 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:16,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:16,478 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:117, output treesize:26 [2018-11-18 17:06:16,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 17:06:16,542 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:16,543 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:16,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:06:16,544 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,560 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:16,580 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:35 [2018-11-18 17:06:16,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-11-18 17:06:16,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 17:06:16,676 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,686 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:16,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:06:16,687 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,691 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,695 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:16,695 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:5 [2018-11-18 17:06:16,890 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 67 proven. 100 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:06:16,890 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:06:16,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 17:06:16,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 17:06:16,989 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:17,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:17,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:17,066 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 17:06:17,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-18 17:06:17,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-18 17:06:17,192 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:17,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-11-18 17:06:17,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-18 17:06:17,213 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:17,215 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:17,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:17,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:17,233 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:52, output treesize:10 [2018-11-18 17:06:17,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 17:06:17,280 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:06:17,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 52 [2018-11-18 17:06:17,287 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:17,338 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:17,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:17,354 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:44 [2018-11-18 17:06:18,024 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 0 proven. 167 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:06:18,026 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 17:06:18,026 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 17:06:18,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:06:18,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:06:18,143 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:06:18,196 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-18 17:06:18,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 17:06:18,226 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,230 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,233 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-11-18 17:06:18,234 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,270 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 17:06:18,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 17:06:18,373 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 17:06:18,380 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,381 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,382 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-18 17:06:18,384 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,398 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,407 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,417 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,443 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:49, output treesize:56 [2018-11-18 17:06:18,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 45 [2018-11-18 17:06:18,464 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-11-18 17:06:18,469 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:18,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:18,526 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,529 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,531 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 111 [2018-11-18 17:06:18,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-11-18 17:06:18,580 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,623 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,672 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:18,672 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:93, output treesize:77 [2018-11-18 17:06:18,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:06:18,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:06:18,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,791 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,842 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:18,842 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-11-18 17:06:18,853 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:18,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-11-18 17:06:18,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 17:06:18,876 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,894 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:18,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-18 17:06:18,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:06:18,995 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,005 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,070 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:19,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-11-18 17:06:19,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 17:06:19,090 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,111 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:06:19,112 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:19,113 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:06:19,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-11-18 17:06:19,118 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,135 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,149 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:117, output treesize:26 [2018-11-18 17:06:19,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 17:06:19,199 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:19,200 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:19,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:06:19,202 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,241 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:35 [2018-11-18 17:06:19,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-11-18 17:06:19,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 17:06:19,311 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,421 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:06:19,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:06:19,422 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,426 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,431 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:5 [2018-11-18 17:06:19,577 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 67 proven. 100 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:06:19,577 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:06:19,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 17:06:19,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 17:06:19,616 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,623 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,628 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,628 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 17:06:19,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-11-18 17:06:19,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-11-18 17:06:19,744 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-11-18 17:06:19,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-11-18 17:06:19,785 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,789 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,796 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,834 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:06:19,834 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:52, output treesize:10 [2018-11-18 17:06:19,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-11-18 17:06:19,864 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:06:19,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 52 [2018-11-18 17:06:19,874 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,901 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:06:19,909 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:44 [2018-11-18 17:06:20,144 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 0 proven. 167 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:06:20,161 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 17:06:20,161 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9] total 17 [2018-11-18 17:06:20,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 17:06:20,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 17:06:20,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2018-11-18 17:06:20,162 INFO L87 Difference]: Start difference. First operand 1327 states and 2064 transitions. Second operand 17 states. [2018-11-18 17:06:49,499 WARN L180 SmtUtils]: Spent 325.00 ms on a formula simplification that was a NOOP. DAG size: 59 [2018-11-18 17:07:32,106 WARN L180 SmtUtils]: Spent 143.00 ms on a formula simplification that was a NOOP. DAG size: 42 [2018-11-18 17:07:41,757 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 56 [2018-11-18 17:08:36,645 WARN L180 SmtUtils]: Spent 386.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-11-18 17:09:21,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:09:21,263 INFO L93 Difference]: Finished difference Result 15223 states and 23484 transitions. [2018-11-18 17:09:21,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-18 17:09:21,264 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 175 [2018-11-18 17:09:21,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:09:21,286 INFO L225 Difference]: With dead ends: 15223 [2018-11-18 17:09:21,286 INFO L226 Difference]: Without dead ends: 13910 [2018-11-18 17:09:21,290 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 714 GetRequests, 677 SyntacticMatches, 6 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=239, Invalid=817, Unknown=0, NotChecked=0, Total=1056 [2018-11-18 17:09:21,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13910 states. [2018-11-18 17:09:21,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13910 to 7532. [2018-11-18 17:09:21,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7532 states. [2018-11-18 17:09:21,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7532 states to 7532 states and 12181 transitions. [2018-11-18 17:09:21,491 INFO L78 Accepts]: Start accepts. Automaton has 7532 states and 12181 transitions. Word has length 175 [2018-11-18 17:09:21,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:09:21,491 INFO L480 AbstractCegarLoop]: Abstraction has 7532 states and 12181 transitions. [2018-11-18 17:09:21,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 17:09:21,491 INFO L276 IsEmpty]: Start isEmpty. Operand 7532 states and 12181 transitions. [2018-11-18 17:09:21,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-11-18 17:09:21,497 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:09:21,498 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:09:21,498 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:09:21,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:09:21,498 INFO L82 PathProgramCache]: Analyzing trace with hash 609449356, now seen corresponding path program 1 times [2018-11-18 17:09:21,498 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:09:21,498 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:09:21,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:09:21,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:09:22,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:09:22,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:09:22,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:09:22,082 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:22,083 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:22,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:09:22,084 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,090 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,094 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,100 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:09:22,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:09:22,117 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:22,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:09:22,118 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,120 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,121 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:22,121 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:09:22,148 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 168 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-11-18 17:09:22,148 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:09:22,167 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:09:22,167 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 17:09:22,167 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 17:09:22,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 17:09:22,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-18 17:09:22,168 INFO L87 Difference]: Start difference. First operand 7532 states and 12181 transitions. Second operand 7 states. [2018-11-18 17:09:23,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:09:23,377 INFO L93 Difference]: Finished difference Result 17346 states and 27378 transitions. [2018-11-18 17:09:23,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 17:09:23,379 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 176 [2018-11-18 17:09:23,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:09:23,397 INFO L225 Difference]: With dead ends: 17346 [2018-11-18 17:09:23,397 INFO L226 Difference]: Without dead ends: 9828 [2018-11-18 17:09:23,408 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 170 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 17:09:23,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9828 states. [2018-11-18 17:09:23,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9828 to 7577. [2018-11-18 17:09:23,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7577 states. [2018-11-18 17:09:23,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7577 states to 7577 states and 12226 transitions. [2018-11-18 17:09:23,638 INFO L78 Accepts]: Start accepts. Automaton has 7577 states and 12226 transitions. Word has length 176 [2018-11-18 17:09:23,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:09:23,638 INFO L480 AbstractCegarLoop]: Abstraction has 7577 states and 12226 transitions. [2018-11-18 17:09:23,638 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 17:09:23,638 INFO L276 IsEmpty]: Start isEmpty. Operand 7577 states and 12226 transitions. [2018-11-18 17:09:23,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-11-18 17:09:23,646 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:09:23,647 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:09:23,647 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:09:23,647 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:09:23,647 INFO L82 PathProgramCache]: Analyzing trace with hash 429734422, now seen corresponding path program 1 times [2018-11-18 17:09:23,648 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:09:23,648 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:09:23,672 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:09:24,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:09:24,117 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:09:24,160 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-18 17:09:24,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 17:09:24,181 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,183 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,186 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-11-18 17:09:24,187 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,212 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,232 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-11-18 17:09:24,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-18 17:09:24,282 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 33 [2018-11-18 17:09:24,288 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,289 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,290 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 52 [2018-11-18 17:09:24,292 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,303 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,311 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,318 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,338 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,338 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:49, output treesize:56 [2018-11-18 17:09:24,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 45 [2018-11-18 17:09:24,409 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-11-18 17:09:24,413 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:24,424 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:24,464 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,465 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,467 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 111 [2018-11-18 17:09:24,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-11-18 17:09:24,496 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,527 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,557 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:24,558 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:93, output treesize:77 [2018-11-18 17:09:24,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:09:24,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:09:24,660 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,667 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,715 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:24,715 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-11-18 17:09:24,802 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-11-18 17:09:24,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 17:09:24,825 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,850 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:24,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-11-18 17:09:24,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:09:24,919 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:24,929 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:24,990 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:24,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-11-18 17:09:25,012 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:09:25,014 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:25,014 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 17:09:25,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 48 [2018-11-18 17:09:25,025 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 17:09:25,050 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,066 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,077 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:117, output treesize:26 [2018-11-18 17:09:25,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-11-18 17:09:25,123 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:25,124 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:25,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:09:25,125 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,137 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,151 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:35 [2018-11-18 17:09:25,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-11-18 17:09:25,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 17:09:25,203 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,210 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:09:25,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:09:25,211 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,214 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:09:25,218 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:5 [2018-11-18 17:09:25,354 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 67 proven. 102 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-18 17:09:25,354 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:09:25,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-18 17:09:25,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 17:09:25,421 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,425 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,430 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:09:25,430 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:32 [2018-11-18 17:09:25,477 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 102 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-11-18 17:09:25,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:09:25,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [10] total 12 [2018-11-18 17:09:25,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 17:09:25,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 17:09:25,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-11-18 17:09:25,480 INFO L87 Difference]: Start difference. First operand 7577 states and 12226 transitions. Second operand 12 states. [2018-11-18 17:10:36,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:10:36,353 INFO L93 Difference]: Finished difference Result 23354 states and 36692 transitions. [2018-11-18 17:10:36,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 17:10:36,355 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 176 [2018-11-18 17:10:36,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:10:36,378 INFO L225 Difference]: With dead ends: 23354 [2018-11-18 17:10:36,378 INFO L226 Difference]: Without dead ends: 15791 [2018-11-18 17:10:36,387 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 343 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=103, Invalid=317, Unknown=0, NotChecked=0, Total=420 [2018-11-18 17:10:36,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15791 states. [2018-11-18 17:10:36,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15791 to 8604. [2018-11-18 17:10:36,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8604 states. [2018-11-18 17:10:36,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8604 states to 8604 states and 14110 transitions. [2018-11-18 17:10:36,700 INFO L78 Accepts]: Start accepts. Automaton has 8604 states and 14110 transitions. Word has length 176 [2018-11-18 17:10:36,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:10:36,700 INFO L480 AbstractCegarLoop]: Abstraction has 8604 states and 14110 transitions. [2018-11-18 17:10:36,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 17:10:36,700 INFO L276 IsEmpty]: Start isEmpty. Operand 8604 states and 14110 transitions. [2018-11-18 17:10:36,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-11-18 17:10:36,708 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:10:36,708 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:10:36,708 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:10:36,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:10:36,709 INFO L82 PathProgramCache]: Analyzing trace with hash 2036683278, now seen corresponding path program 1 times [2018-11-18 17:10:36,709 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:10:36,709 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:10:36,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:10:37,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:10:37,388 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:10:37,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:10:37,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:10:37,431 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:37,431 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:37,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:10:37,432 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,438 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,443 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,453 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,453 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:10:37,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:10:37,476 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:37,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:10:37,476 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,485 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:10:37,518 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 209 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:10:37,518 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:10:37,545 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:10:37,545 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:37,546 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:10:37,558 INFO L134 CoverageAnalysis]: Checked inductivity of 329 backedges. 213 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:10:37,561 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:10:37,562 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:10:37,562 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:10:37,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:10:37,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:10:37,562 INFO L87 Difference]: Start difference. First operand 8604 states and 14110 transitions. Second operand 9 states. [2018-11-18 17:10:43,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:10:43,365 INFO L93 Difference]: Finished difference Result 24025 states and 38051 transitions. [2018-11-18 17:10:43,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:10:43,365 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 189 [2018-11-18 17:10:43,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:10:43,380 INFO L225 Difference]: With dead ends: 24025 [2018-11-18 17:10:43,380 INFO L226 Difference]: Without dead ends: 15435 [2018-11-18 17:10:43,387 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 373 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:10:43,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15435 states. [2018-11-18 17:10:43,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15435 to 9320. [2018-11-18 17:10:43,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9320 states. [2018-11-18 17:10:43,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9320 states to 9320 states and 15177 transitions. [2018-11-18 17:10:43,695 INFO L78 Accepts]: Start accepts. Automaton has 9320 states and 15177 transitions. Word has length 189 [2018-11-18 17:10:43,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:10:43,695 INFO L480 AbstractCegarLoop]: Abstraction has 9320 states and 15177 transitions. [2018-11-18 17:10:43,695 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:10:43,695 INFO L276 IsEmpty]: Start isEmpty. Operand 9320 states and 15177 transitions. [2018-11-18 17:10:43,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-11-18 17:10:43,700 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:10:43,700 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:10:43,700 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:10:43,701 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:10:43,701 INFO L82 PathProgramCache]: Analyzing trace with hash 403662027, now seen corresponding path program 1 times [2018-11-18 17:10:43,701 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:10:43,701 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:10:43,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:10:43,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:10:43,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:10:43,982 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:43,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 74 [2018-11-18 17:10:43,991 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:43,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 30 [2018-11-18 17:10:43,992 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:10:44,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:10:44,002 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,006 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,009 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,017 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:109, output treesize:9 [2018-11-18 17:10:44,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:10:44,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:10:44,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:44,034 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:10:44,052 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 182 proven. 0 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-11-18 17:10:44,053 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:10:44,055 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:10:44,055 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:10:44,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:10:44,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:10:44,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:10:44,056 INFO L87 Difference]: Start difference. First operand 9320 states and 15177 transitions. Second operand 4 states. [2018-11-18 17:10:47,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:10:47,054 INFO L93 Difference]: Finished difference Result 21867 states and 35199 transitions. [2018-11-18 17:10:47,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:10:47,055 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 190 [2018-11-18 17:10:47,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:10:47,067 INFO L225 Difference]: With dead ends: 21867 [2018-11-18 17:10:47,067 INFO L226 Difference]: Without dead ends: 12561 [2018-11-18 17:10:47,078 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 187 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:10:47,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12561 states. [2018-11-18 17:10:47,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12561 to 10265. [2018-11-18 17:10:47,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10265 states. [2018-11-18 17:10:47,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10265 states to 10265 states and 17022 transitions. [2018-11-18 17:10:47,437 INFO L78 Accepts]: Start accepts. Automaton has 10265 states and 17022 transitions. Word has length 190 [2018-11-18 17:10:47,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:10:47,437 INFO L480 AbstractCegarLoop]: Abstraction has 10265 states and 17022 transitions. [2018-11-18 17:10:47,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:10:47,437 INFO L276 IsEmpty]: Start isEmpty. Operand 10265 states and 17022 transitions. [2018-11-18 17:10:47,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-11-18 17:10:47,442 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:10:47,442 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:10:47,442 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:10:47,442 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:10:47,442 INFO L82 PathProgramCache]: Analyzing trace with hash 552123927, now seen corresponding path program 1 times [2018-11-18 17:10:47,443 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:10:47,443 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:10:47,455 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:10:47,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:10:47,676 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:10:47,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:10:47,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:10:47,683 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:47,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:47,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:47,687 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 17:10:47,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:10:47,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:10:47,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:47,695 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:47,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:47,696 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:10:47,713 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 196 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-18 17:10:47,713 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:10:47,715 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:10:47,715 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:10:47,715 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:10:47,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:10:47,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:10:47,716 INFO L87 Difference]: Start difference. First operand 10265 states and 17022 transitions. Second operand 4 states. [2018-11-18 17:10:50,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:10:50,763 INFO L93 Difference]: Finished difference Result 24499 states and 40046 transitions. [2018-11-18 17:10:50,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:10:50,764 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 190 [2018-11-18 17:10:50,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:10:50,777 INFO L225 Difference]: With dead ends: 24499 [2018-11-18 17:10:50,777 INFO L226 Difference]: Without dead ends: 14248 [2018-11-18 17:10:50,787 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 187 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:10:50,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14248 states. [2018-11-18 17:10:51,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14248 to 11007. [2018-11-18 17:10:51,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11007 states. [2018-11-18 17:10:51,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11007 states to 11007 states and 18179 transitions. [2018-11-18 17:10:51,172 INFO L78 Accepts]: Start accepts. Automaton has 11007 states and 18179 transitions. Word has length 190 [2018-11-18 17:10:51,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:10:51,172 INFO L480 AbstractCegarLoop]: Abstraction has 11007 states and 18179 transitions. [2018-11-18 17:10:51,172 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:10:51,172 INFO L276 IsEmpty]: Start isEmpty. Operand 11007 states and 18179 transitions. [2018-11-18 17:10:51,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-11-18 17:10:51,178 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:10:51,178 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:10:51,178 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:10:51,178 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:10:51,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1686207594, now seen corresponding path program 1 times [2018-11-18 17:10:51,179 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:10:51,179 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:10:51,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:10:51,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:10:51,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:10:51,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:10:51,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:10:51,798 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:51,799 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:51,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:10:51,800 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,805 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,809 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,816 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,816 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:10:51,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:10:51,832 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:51,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:10:51,833 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,836 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,838 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,838 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:10:51,859 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 215 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:10:51,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:10:51,879 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:10:51,879 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:51,880 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:10:51,892 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 219 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:10:51,895 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:10:51,895 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:10:51,895 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:10:51,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:10:51,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:10:51,895 INFO L87 Difference]: Start difference. First operand 11007 states and 18179 transitions. Second operand 9 states. [2018-11-18 17:10:55,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:10:55,998 INFO L93 Difference]: Finished difference Result 26426 states and 42132 transitions. [2018-11-18 17:10:55,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:10:55,998 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 190 [2018-11-18 17:10:55,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:10:56,010 INFO L225 Difference]: With dead ends: 26426 [2018-11-18 17:10:56,011 INFO L226 Difference]: Without dead ends: 15433 [2018-11-18 17:10:56,019 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 387 GetRequests, 375 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:10:56,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15433 states. [2018-11-18 17:10:56,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15433 to 11007. [2018-11-18 17:10:56,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11007 states. [2018-11-18 17:10:56,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11007 states to 11007 states and 18025 transitions. [2018-11-18 17:10:56,410 INFO L78 Accepts]: Start accepts. Automaton has 11007 states and 18025 transitions. Word has length 190 [2018-11-18 17:10:56,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:10:56,411 INFO L480 AbstractCegarLoop]: Abstraction has 11007 states and 18025 transitions. [2018-11-18 17:10:56,411 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:10:56,411 INFO L276 IsEmpty]: Start isEmpty. Operand 11007 states and 18025 transitions. [2018-11-18 17:10:56,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 17:10:56,416 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:10:56,416 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:10:56,417 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:10:56,417 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:10:56,417 INFO L82 PathProgramCache]: Analyzing trace with hash -51677953, now seen corresponding path program 1 times [2018-11-18 17:10:56,417 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:10:56,417 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:10:56,430 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:10:56,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:10:56,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:10:56,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:10:56,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:10:56,997 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:56,998 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:56,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:10:56,999 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,005 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,009 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,019 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,019 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:10:57,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:10:57,042 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:10:57,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:10:57,043 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,046 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,048 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:10:57,068 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 179 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:10:57,068 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:10:57,090 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:10:57,090 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,090 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:10:57,090 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:10:57,101 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:10:57,104 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:10:57,104 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:10:57,104 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:10:57,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:10:57,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:10:57,105 INFO L87 Difference]: Start difference. First operand 11007 states and 18025 transitions. Second operand 9 states. [2018-11-18 17:11:03,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:03,205 INFO L93 Difference]: Finished difference Result 26350 states and 41748 transitions. [2018-11-18 17:11:03,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:03,206 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 191 [2018-11-18 17:11:03,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:03,216 INFO L225 Difference]: With dead ends: 26350 [2018-11-18 17:11:03,216 INFO L226 Difference]: Without dead ends: 15357 [2018-11-18 17:11:03,223 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 389 GetRequests, 377 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:03,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15357 states. [2018-11-18 17:11:03,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15357 to 10999. [2018-11-18 17:11:03,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10999 states. [2018-11-18 17:11:03,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10999 states to 10999 states and 17818 transitions. [2018-11-18 17:11:03,649 INFO L78 Accepts]: Start accepts. Automaton has 10999 states and 17818 transitions. Word has length 191 [2018-11-18 17:11:03,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:03,649 INFO L480 AbstractCegarLoop]: Abstraction has 10999 states and 17818 transitions. [2018-11-18 17:11:03,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:03,649 INFO L276 IsEmpty]: Start isEmpty. Operand 10999 states and 17818 transitions. [2018-11-18 17:11:03,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 17:11:03,655 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:03,656 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:03,656 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:03,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:03,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1885144555, now seen corresponding path program 1 times [2018-11-18 17:11:03,656 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:03,656 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:03,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:04,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:04,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:04,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:04,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:04,226 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:04,227 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:04,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:04,227 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,233 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,242 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,242 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:04,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:04,259 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:04,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:04,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,264 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:04,283 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 185 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:04,283 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:04,302 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:04,302 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,302 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:04,302 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:11:04,314 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 189 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:04,316 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:04,316 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:04,316 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:04,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:04,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:04,317 INFO L87 Difference]: Start difference. First operand 10999 states and 17818 transitions. Second operand 9 states. [2018-11-18 17:11:10,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:10,297 INFO L93 Difference]: Finished difference Result 26342 states and 41342 transitions. [2018-11-18 17:11:10,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:10,298 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 191 [2018-11-18 17:11:10,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:10,307 INFO L225 Difference]: With dead ends: 26342 [2018-11-18 17:11:10,307 INFO L226 Difference]: Without dead ends: 15357 [2018-11-18 17:11:10,313 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 389 GetRequests, 377 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:10,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15357 states. [2018-11-18 17:11:10,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15357 to 10999. [2018-11-18 17:11:10,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10999 states. [2018-11-18 17:11:10,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10999 states to 10999 states and 17619 transitions. [2018-11-18 17:11:10,721 INFO L78 Accepts]: Start accepts. Automaton has 10999 states and 17619 transitions. Word has length 191 [2018-11-18 17:11:10,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:10,721 INFO L480 AbstractCegarLoop]: Abstraction has 10999 states and 17619 transitions. [2018-11-18 17:11:10,721 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:10,721 INFO L276 IsEmpty]: Start isEmpty. Operand 10999 states and 17619 transitions. [2018-11-18 17:11:10,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-11-18 17:11:10,726 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:10,726 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:10,726 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:10,726 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:10,726 INFO L82 PathProgramCache]: Analyzing trace with hash 846859572, now seen corresponding path program 1 times [2018-11-18 17:11:10,727 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:10,727 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:10,738 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:10,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:10,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:10,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-18 17:11:10,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-18 17:11:10,966 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:10,969 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:10,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:10,971 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-18 17:11:10,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:11:10,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:11:10,979 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:10,981 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:10,982 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:10,982 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:11:10,999 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 196 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-11-18 17:11:10,999 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:11:11,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:11:11,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:11:11,003 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:11:11,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:11:11,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:11:11,004 INFO L87 Difference]: Start difference. First operand 10999 states and 17619 transitions. Second operand 4 states. [2018-11-18 17:11:14,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:14,135 INFO L93 Difference]: Finished difference Result 25017 states and 39777 transitions. [2018-11-18 17:11:14,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:11:14,135 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 191 [2018-11-18 17:11:14,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:14,145 INFO L225 Difference]: With dead ends: 25017 [2018-11-18 17:11:14,145 INFO L226 Difference]: Without dead ends: 14032 [2018-11-18 17:11:14,152 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 188 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:11:14,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14032 states. [2018-11-18 17:11:14,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14032 to 10283. [2018-11-18 17:11:14,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10283 states. [2018-11-18 17:11:14,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10283 states to 10283 states and 16578 transitions. [2018-11-18 17:11:14,600 INFO L78 Accepts]: Start accepts. Automaton has 10283 states and 16578 transitions. Word has length 191 [2018-11-18 17:11:14,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:14,600 INFO L480 AbstractCegarLoop]: Abstraction has 10283 states and 16578 transitions. [2018-11-18 17:11:14,600 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:11:14,600 INFO L276 IsEmpty]: Start isEmpty. Operand 10283 states and 16578 transitions. [2018-11-18 17:11:14,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-11-18 17:11:14,604 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:14,604 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:14,605 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:14,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:14,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1680349517, now seen corresponding path program 1 times [2018-11-18 17:11:14,605 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:14,605 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:14,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:15,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:15,155 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:15,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:15,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:15,178 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:15,179 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:15,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:15,179 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,185 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,188 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,194 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:15,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:15,211 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:15,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:15,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,214 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,215 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:15,234 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 191 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:15,235 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:15,253 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:15,254 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:15,254 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:11:15,266 INFO L134 CoverageAnalysis]: Checked inductivity of 311 backedges. 195 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:15,268 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:15,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:15,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:15,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:15,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:15,269 INFO L87 Difference]: Start difference. First operand 10283 states and 16578 transitions. Second operand 9 states. [2018-11-18 17:11:21,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:21,336 INFO L93 Difference]: Finished difference Result 26616 states and 41748 transitions. [2018-11-18 17:11:21,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:21,337 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 192 [2018-11-18 17:11:21,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:21,347 INFO L225 Difference]: With dead ends: 26616 [2018-11-18 17:11:21,347 INFO L226 Difference]: Without dead ends: 16347 [2018-11-18 17:11:21,352 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 391 GetRequests, 379 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:21,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16347 states. [2018-11-18 17:11:21,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16347 to 10283. [2018-11-18 17:11:21,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10283 states. [2018-11-18 17:11:21,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10283 states to 10283 states and 16424 transitions. [2018-11-18 17:11:21,789 INFO L78 Accepts]: Start accepts. Automaton has 10283 states and 16424 transitions. Word has length 192 [2018-11-18 17:11:21,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:21,790 INFO L480 AbstractCegarLoop]: Abstraction has 10283 states and 16424 transitions. [2018-11-18 17:11:21,790 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:21,790 INFO L276 IsEmpty]: Start isEmpty. Operand 10283 states and 16424 transitions. [2018-11-18 17:11:21,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-18 17:11:21,794 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:21,795 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:21,795 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:21,795 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:21,795 INFO L82 PathProgramCache]: Analyzing trace with hash -1716583513, now seen corresponding path program 1 times [2018-11-18 17:11:21,795 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:21,795 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:21,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:22,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:22,396 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:22,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:22,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:22,414 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:22,415 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:22,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:22,416 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,422 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,426 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,433 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:22,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:22,457 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:22,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:22,458 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,460 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,461 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:22,484 INFO L134 CoverageAnalysis]: Checked inductivity of 350 backedges. 230 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:22,484 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:22,505 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:22,506 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,506 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:22,506 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:11:22,524 INFO L134 CoverageAnalysis]: Checked inductivity of 350 backedges. 234 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:22,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:22,527 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:22,527 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:22,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:22,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:22,528 INFO L87 Difference]: Start difference. First operand 10283 states and 16424 transitions. Second operand 9 states. [2018-11-18 17:11:26,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:26,961 INFO L93 Difference]: Finished difference Result 27547 states and 42927 transitions. [2018-11-18 17:11:26,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:26,962 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 193 [2018-11-18 17:11:26,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:26,974 INFO L225 Difference]: With dead ends: 27547 [2018-11-18 17:11:26,975 INFO L226 Difference]: Without dead ends: 18656 [2018-11-18 17:11:26,983 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 393 GetRequests, 381 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:26,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18656 states. [2018-11-18 17:11:27,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18656 to 11134. [2018-11-18 17:11:27,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11134 states. [2018-11-18 17:11:27,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11134 states to 11134 states and 17491 transitions. [2018-11-18 17:11:27,511 INFO L78 Accepts]: Start accepts. Automaton has 11134 states and 17491 transitions. Word has length 193 [2018-11-18 17:11:27,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:27,511 INFO L480 AbstractCegarLoop]: Abstraction has 11134 states and 17491 transitions. [2018-11-18 17:11:27,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:27,511 INFO L276 IsEmpty]: Start isEmpty. Operand 11134 states and 17491 transitions. [2018-11-18 17:11:27,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-18 17:11:27,515 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:27,515 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:27,516 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:27,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:27,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1556068102, now seen corresponding path program 1 times [2018-11-18 17:11:27,516 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:27,516 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:27,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:27,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:28,064 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:28,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:28,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:28,111 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:28,112 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:28,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:28,112 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,117 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,121 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,127 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:28,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:28,144 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:28,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:28,145 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,147 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,148 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:28,168 INFO L134 CoverageAnalysis]: Checked inductivity of 317 backedges. 197 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:28,168 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:28,188 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:28,188 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,188 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:28,188 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:11:28,200 INFO L134 CoverageAnalysis]: Checked inductivity of 317 backedges. 201 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:28,203 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:28,203 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:28,203 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:28,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:28,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:28,204 INFO L87 Difference]: Start difference. First operand 11134 states and 17491 transitions. Second operand 9 states. [2018-11-18 17:11:32,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:32,405 INFO L93 Difference]: Finished difference Result 28318 states and 43484 transitions. [2018-11-18 17:11:32,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:32,406 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 193 [2018-11-18 17:11:32,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:32,416 INFO L225 Difference]: With dead ends: 28318 [2018-11-18 17:11:32,416 INFO L226 Difference]: Without dead ends: 17198 [2018-11-18 17:11:32,422 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 393 GetRequests, 381 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:32,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17198 states. [2018-11-18 17:11:32,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17198 to 11134. [2018-11-18 17:11:32,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11134 states. [2018-11-18 17:11:32,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11134 states to 11134 states and 17292 transitions. [2018-11-18 17:11:32,938 INFO L78 Accepts]: Start accepts. Automaton has 11134 states and 17292 transitions. Word has length 193 [2018-11-18 17:11:32,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:32,938 INFO L480 AbstractCegarLoop]: Abstraction has 11134 states and 17292 transitions. [2018-11-18 17:11:32,938 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:32,938 INFO L276 IsEmpty]: Start isEmpty. Operand 11134 states and 17292 transitions. [2018-11-18 17:11:32,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-11-18 17:11:32,943 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:32,943 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:32,943 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:32,943 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:32,943 INFO L82 PathProgramCache]: Analyzing trace with hash 903383342, now seen corresponding path program 1 times [2018-11-18 17:11:32,944 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:32,944 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:32,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:33,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:33,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:33,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:33,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:33,528 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:33,529 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:33,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:33,530 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,539 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,543 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,552 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,553 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:33,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:33,571 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:33,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:33,572 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,575 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,576 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:33,598 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 203 proven. 4 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:33,598 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:33,617 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:33,617 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,618 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:33,618 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:11:33,663 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 207 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:33,666 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:33,666 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:33,667 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:33,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:33,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:33,667 INFO L87 Difference]: Start difference. First operand 11134 states and 17292 transitions. Second operand 9 states. [2018-11-18 17:11:38,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:38,004 INFO L93 Difference]: Finished difference Result 27078 states and 41309 transitions. [2018-11-18 17:11:38,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:38,005 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 194 [2018-11-18 17:11:38,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:38,017 INFO L225 Difference]: With dead ends: 27078 [2018-11-18 17:11:38,017 INFO L226 Difference]: Without dead ends: 15958 [2018-11-18 17:11:38,024 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 395 GetRequests, 383 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:38,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15958 states. [2018-11-18 17:11:38,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15958 to 10574. [2018-11-18 17:11:38,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10574 states. [2018-11-18 17:11:38,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10574 states to 10574 states and 16261 transitions. [2018-11-18 17:11:38,574 INFO L78 Accepts]: Start accepts. Automaton has 10574 states and 16261 transitions. Word has length 194 [2018-11-18 17:11:38,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:38,574 INFO L480 AbstractCegarLoop]: Abstraction has 10574 states and 16261 transitions. [2018-11-18 17:11:38,574 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:38,574 INFO L276 IsEmpty]: Start isEmpty. Operand 10574 states and 16261 transitions. [2018-11-18 17:11:38,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-11-18 17:11:38,579 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:38,579 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:38,580 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:38,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:38,580 INFO L82 PathProgramCache]: Analyzing trace with hash 723216276, now seen corresponding path program 1 times [2018-11-18 17:11:38,580 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:38,581 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:38,603 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:39,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:39,177 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:39,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:39,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:39,214 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:39,215 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:39,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:39,216 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,222 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,237 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:39,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:39,259 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:39,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:39,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,262 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,263 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:39,286 INFO L134 CoverageAnalysis]: Checked inductivity of 355 backedges. 236 proven. 3 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:39,286 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:39,304 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:39,304 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,305 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:39,305 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:11:39,318 INFO L134 CoverageAnalysis]: Checked inductivity of 355 backedges. 239 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:39,320 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:39,320 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:39,320 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:39,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:39,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:39,321 INFO L87 Difference]: Start difference. First operand 10574 states and 16261 transitions. Second operand 9 states. [2018-11-18 17:11:43,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:43,718 INFO L93 Difference]: Finished difference Result 25893 states and 39385 transitions. [2018-11-18 17:11:43,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:43,719 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 194 [2018-11-18 17:11:43,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:43,738 INFO L225 Difference]: With dead ends: 25893 [2018-11-18 17:11:43,738 INFO L226 Difference]: Without dead ends: 16754 [2018-11-18 17:11:43,744 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 395 GetRequests, 383 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:43,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16754 states. [2018-11-18 17:11:44,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16754 to 10623. [2018-11-18 17:11:44,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10623 states. [2018-11-18 17:11:44,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10623 states to 10623 states and 16203 transitions. [2018-11-18 17:11:44,296 INFO L78 Accepts]: Start accepts. Automaton has 10623 states and 16203 transitions. Word has length 194 [2018-11-18 17:11:44,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:44,297 INFO L480 AbstractCegarLoop]: Abstraction has 10623 states and 16203 transitions. [2018-11-18 17:11:44,297 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:44,297 INFO L276 IsEmpty]: Start isEmpty. Operand 10623 states and 16203 transitions. [2018-11-18 17:11:44,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-11-18 17:11:44,301 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:44,301 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:44,301 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:44,302 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:44,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1435040692, now seen corresponding path program 1 times [2018-11-18 17:11:44,302 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:44,302 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:44,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:44,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:44,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:44,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:44,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:44,919 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:44,920 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:44,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:44,921 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,926 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,958 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,965 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:44,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:44,982 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:44,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:44,983 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,985 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,986 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:44,986 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:45,010 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 241 proven. 3 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:45,010 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:45,030 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:45,030 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:45,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:45,031 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:1 [2018-11-18 17:11:45,070 INFO L134 CoverageAnalysis]: Checked inductivity of 360 backedges. 244 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:45,072 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:45,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:45,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:45,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:45,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:45,073 INFO L87 Difference]: Start difference. First operand 10623 states and 16203 transitions. Second operand 9 states. [2018-11-18 17:11:49,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:49,583 INFO L93 Difference]: Finished difference Result 27275 states and 41012 transitions. [2018-11-18 17:11:49,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:49,584 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 195 [2018-11-18 17:11:49,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:49,602 INFO L225 Difference]: With dead ends: 27275 [2018-11-18 17:11:49,602 INFO L226 Difference]: Without dead ends: 18104 [2018-11-18 17:11:49,608 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 397 GetRequests, 385 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:49,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18104 states. [2018-11-18 17:11:50,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18104 to 11564. [2018-11-18 17:11:50,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11564 states. [2018-11-18 17:11:50,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11564 states to 11564 states and 17278 transitions. [2018-11-18 17:11:50,202 INFO L78 Accepts]: Start accepts. Automaton has 11564 states and 17278 transitions. Word has length 195 [2018-11-18 17:11:50,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:50,203 INFO L480 AbstractCegarLoop]: Abstraction has 11564 states and 17278 transitions. [2018-11-18 17:11:50,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:50,203 INFO L276 IsEmpty]: Start isEmpty. Operand 11564 states and 17278 transitions. [2018-11-18 17:11:50,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 17:11:50,207 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:50,207 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:50,208 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:50,208 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:50,208 INFO L82 PathProgramCache]: Analyzing trace with hash 1271441352, now seen corresponding path program 1 times [2018-11-18 17:11:50,208 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:50,208 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:50,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:50,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:50,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:50,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:50,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:50,825 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:50,826 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:50,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:50,827 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,833 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,836 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,843 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,843 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:50,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:50,860 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:50,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:50,860 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,863 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,864 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:50,888 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 248 proven. 3 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:50,888 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:50,924 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:50,924 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:50,924 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:11:50,946 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 251 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:50,949 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:50,949 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:50,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:50,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:50,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:50,950 INFO L87 Difference]: Start difference. First operand 11564 states and 17278 transitions. Second operand 9 states. [2018-11-18 17:11:55,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:11:55,337 INFO L93 Difference]: Finished difference Result 30292 states and 44803 transitions. [2018-11-18 17:11:55,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:11:55,338 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 198 [2018-11-18 17:11:55,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:11:55,350 INFO L225 Difference]: With dead ends: 30292 [2018-11-18 17:11:55,350 INFO L226 Difference]: Without dead ends: 18754 [2018-11-18 17:11:55,357 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 403 GetRequests, 391 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:11:55,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18754 states. [2018-11-18 17:11:56,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18754 to 12419. [2018-11-18 17:11:56,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12419 states. [2018-11-18 17:11:56,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12419 states to 12419 states and 18230 transitions. [2018-11-18 17:11:56,040 INFO L78 Accepts]: Start accepts. Automaton has 12419 states and 18230 transitions. Word has length 198 [2018-11-18 17:11:56,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:11:56,040 INFO L480 AbstractCegarLoop]: Abstraction has 12419 states and 18230 transitions. [2018-11-18 17:11:56,040 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:11:56,040 INFO L276 IsEmpty]: Start isEmpty. Operand 12419 states and 18230 transitions. [2018-11-18 17:11:56,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-11-18 17:11:56,045 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:11:56,045 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:11:56,046 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:11:56,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:11:56,046 INFO L82 PathProgramCache]: Analyzing trace with hash -654897644, now seen corresponding path program 1 times [2018-11-18 17:11:56,046 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:11:56,046 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:11:56,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:11:56,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:11:56,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:11:56,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:11:56,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:11:56,697 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:56,700 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:56,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:11:56,701 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,706 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,709 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,715 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,716 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:11:56,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:11:56,733 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:11:56,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:11:56,733 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,736 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,737 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,737 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:11:56,762 INFO L134 CoverageAnalysis]: Checked inductivity of 373 backedges. 255 proven. 2 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:56,762 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:11:56,783 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:11:56,783 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,783 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:11:56,784 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:11:56,798 INFO L134 CoverageAnalysis]: Checked inductivity of 373 backedges. 257 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:11:56,801 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:11:56,801 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:11:56,801 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:11:56,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:11:56,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:11:56,801 INFO L87 Difference]: Start difference. First operand 12419 states and 18230 transitions. Second operand 9 states. [2018-11-18 17:12:01,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:01,243 INFO L93 Difference]: Finished difference Result 32037 states and 46659 transitions. [2018-11-18 17:12:01,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:12:01,244 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 198 [2018-11-18 17:12:01,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:01,255 INFO L225 Difference]: With dead ends: 32037 [2018-11-18 17:12:01,255 INFO L226 Difference]: Without dead ends: 19644 [2018-11-18 17:12:01,261 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 403 GetRequests, 391 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:12:01,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19644 states. [2018-11-18 17:12:01,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19644 to 13385. [2018-11-18 17:12:01,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13385 states. [2018-11-18 17:12:01,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13385 states to 13385 states and 19332 transitions. [2018-11-18 17:12:01,953 INFO L78 Accepts]: Start accepts. Automaton has 13385 states and 19332 transitions. Word has length 198 [2018-11-18 17:12:01,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:01,953 INFO L480 AbstractCegarLoop]: Abstraction has 13385 states and 19332 transitions. [2018-11-18 17:12:01,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:12:01,953 INFO L276 IsEmpty]: Start isEmpty. Operand 13385 states and 19332 transitions. [2018-11-18 17:12:01,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 17:12:01,958 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:01,958 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:01,958 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:01,958 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:01,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1542157918, now seen corresponding path program 1 times [2018-11-18 17:12:01,959 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:01,959 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:01,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:02,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:12:02,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:12:02,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:12:02,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:12:02,576 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:02,577 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:02,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:12:02,578 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,583 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,593 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:12:02,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:12:02,610 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:02,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:12:02,610 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,613 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,613 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,614 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:12:02,638 INFO L134 CoverageAnalysis]: Checked inductivity of 371 backedges. 253 proven. 2 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:12:02,638 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:12:02,657 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:12:02,657 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,658 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:02,658 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:12:02,671 INFO L134 CoverageAnalysis]: Checked inductivity of 371 backedges. 255 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:12:02,674 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:12:02,674 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:12:02,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:12:02,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:12:02,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:12:02,674 INFO L87 Difference]: Start difference. First operand 13385 states and 19332 transitions. Second operand 9 states. [2018-11-18 17:12:07,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:07,081 INFO L93 Difference]: Finished difference Result 31830 states and 45644 transitions. [2018-11-18 17:12:07,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:12:07,082 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 199 [2018-11-18 17:12:07,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:07,094 INFO L225 Difference]: With dead ends: 31830 [2018-11-18 17:12:07,094 INFO L226 Difference]: Without dead ends: 18471 [2018-11-18 17:12:07,102 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 393 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:12:07,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18471 states. [2018-11-18 17:12:07,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18471 to 13354. [2018-11-18 17:12:07,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13354 states. [2018-11-18 17:12:07,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13354 states to 13354 states and 19108 transitions. [2018-11-18 17:12:07,850 INFO L78 Accepts]: Start accepts. Automaton has 13354 states and 19108 transitions. Word has length 199 [2018-11-18 17:12:07,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:07,851 INFO L480 AbstractCegarLoop]: Abstraction has 13354 states and 19108 transitions. [2018-11-18 17:12:07,851 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:12:07,851 INFO L276 IsEmpty]: Start isEmpty. Operand 13354 states and 19108 transitions. [2018-11-18 17:12:07,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-11-18 17:12:07,856 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:07,856 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:07,856 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:07,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:07,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1351236938, now seen corresponding path program 1 times [2018-11-18 17:12:07,856 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:07,856 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:07,868 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:08,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:12:08,480 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:12:08,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:12:08,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:12:08,505 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:08,506 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:08,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:12:08,507 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,512 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,516 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,522 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:12:08,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:12:08,540 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:08,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:12:08,541 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,543 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,544 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,544 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:12:08,571 INFO L134 CoverageAnalysis]: Checked inductivity of 376 backedges. 259 proven. 1 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:12:08,571 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 17:12:08,591 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-18 17:12:08,591 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:08,592 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:1 [2018-11-18 17:12:08,608 INFO L134 CoverageAnalysis]: Checked inductivity of 376 backedges. 260 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:12:08,610 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 17:12:08,610 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2018-11-18 17:12:08,610 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 17:12:08,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 17:12:08,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-18 17:12:08,611 INFO L87 Difference]: Start difference. First operand 13354 states and 19108 transitions. Second operand 9 states. [2018-11-18 17:12:13,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:13,063 INFO L93 Difference]: Finished difference Result 31584 states and 44927 transitions. [2018-11-18 17:12:13,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 17:12:13,064 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 199 [2018-11-18 17:12:13,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:13,075 INFO L225 Difference]: With dead ends: 31584 [2018-11-18 17:12:13,075 INFO L226 Difference]: Without dead ends: 18256 [2018-11-18 17:12:13,082 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 393 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-11-18 17:12:13,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18256 states. [2018-11-18 17:12:13,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18256 to 13344. [2018-11-18 17:12:13,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13344 states. [2018-11-18 17:12:13,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13344 states to 13344 states and 18950 transitions. [2018-11-18 17:12:13,815 INFO L78 Accepts]: Start accepts. Automaton has 13344 states and 18950 transitions. Word has length 199 [2018-11-18 17:12:13,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:13,816 INFO L480 AbstractCegarLoop]: Abstraction has 13344 states and 18950 transitions. [2018-11-18 17:12:13,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 17:12:13,816 INFO L276 IsEmpty]: Start isEmpty. Operand 13344 states and 18950 transitions. [2018-11-18 17:12:13,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-18 17:12:13,821 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:13,821 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:13,821 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:13,821 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:13,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1195789622, now seen corresponding path program 1 times [2018-11-18 17:12:13,822 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:13,822 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:13,834 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:14,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:12:14,067 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:12:14,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 36 [2018-11-18 17:12:14,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 17:12:14,080 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 35 treesize of output 59 [2018-11-18 17:12:14,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-18 17:12:14,169 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,221 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:14,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 48 [2018-11-18 17:12:14,236 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-18 17:12:14,269 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:12:14,292 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:12:14,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 29 [2018-11-18 17:12:14,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:12:14,319 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:14,329 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:14,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-11-18 17:12:14,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 17:12:14,334 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,342 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-18 17:12:14,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-18 17:12:14,367 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:14,375 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:14,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-18 17:12:14,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 17:12:14,379 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,381 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,388 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 3 variables, input treesize:69, output treesize:9 [2018-11-18 17:12:14,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:12:14,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:12:14,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,396 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:14,397 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:12:14,416 INFO L134 CoverageAnalysis]: Checked inductivity of 382 backedges. 218 proven. 0 refuted. 0 times theorem prover too weak. 164 trivial. 0 not checked. [2018-11-18 17:12:14,416 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:12:14,418 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:12:14,418 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:12:14,418 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:12:14,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:12:14,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:12:14,418 INFO L87 Difference]: Start difference. First operand 13344 states and 18950 transitions. Second operand 4 states. [2018-11-18 17:12:17,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:17,888 INFO L93 Difference]: Finished difference Result 29703 states and 42161 transitions. [2018-11-18 17:12:17,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:12:17,889 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 201 [2018-11-18 17:12:17,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:17,900 INFO L225 Difference]: With dead ends: 29703 [2018-11-18 17:12:17,900 INFO L226 Difference]: Without dead ends: 16385 [2018-11-18 17:12:17,908 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 198 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:12:17,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16385 states. [2018-11-18 17:12:18,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16385 to 14228. [2018-11-18 17:12:18,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14228 states. [2018-11-18 17:12:18,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14228 states to 14228 states and 20120 transitions. [2018-11-18 17:12:18,711 INFO L78 Accepts]: Start accepts. Automaton has 14228 states and 20120 transitions. Word has length 201 [2018-11-18 17:12:18,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:18,712 INFO L480 AbstractCegarLoop]: Abstraction has 14228 states and 20120 transitions. [2018-11-18 17:12:18,712 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:12:18,712 INFO L276 IsEmpty]: Start isEmpty. Operand 14228 states and 20120 transitions. [2018-11-18 17:12:18,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-11-18 17:12:18,717 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:18,717 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:18,717 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:18,717 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:18,718 INFO L82 PathProgramCache]: Analyzing trace with hash -1798852895, now seen corresponding path program 1 times [2018-11-18 17:12:18,718 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:18,718 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:18,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:18,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:12:18,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:12:18,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 36 [2018-11-18 17:12:18,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-11-18 17:12:18,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 35 treesize of output 59 [2018-11-18 17:12:19,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-11-18 17:12:19,036 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,086 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:19,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 48 [2018-11-18 17:12:19,100 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-11-18 17:12:19,133 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:12:19,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 17:12:19,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 29 [2018-11-18 17:12:19,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:12:19,180 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:19,189 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:19,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-11-18 17:12:19,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-11-18 17:12:19,195 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,204 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-18 17:12:19,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-18 17:12:19,236 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:19,244 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-18 17:12:19,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-11-18 17:12:19,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-11-18 17:12:19,248 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,251 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,258 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 3 variables, input treesize:69, output treesize:9 [2018-11-18 17:12:19,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-11-18 17:12:19,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-11-18 17:12:19,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,267 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,268 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:19,268 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-11-18 17:12:19,286 INFO L134 CoverageAnalysis]: Checked inductivity of 382 backedges. 218 proven. 0 refuted. 0 times theorem prover too weak. 164 trivial. 0 not checked. [2018-11-18 17:12:19,287 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:12:19,288 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:12:19,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 17:12:19,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 17:12:19,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 17:12:19,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 17:12:19,289 INFO L87 Difference]: Start difference. First operand 14228 states and 20120 transitions. Second operand 4 states. [2018-11-18 17:12:22,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:22,741 INFO L93 Difference]: Finished difference Result 30479 states and 43170 transitions. [2018-11-18 17:12:22,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 17:12:22,742 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 202 [2018-11-18 17:12:22,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:22,752 INFO L225 Difference]: With dead ends: 30479 [2018-11-18 17:12:22,752 INFO L226 Difference]: Without dead ends: 16277 [2018-11-18 17:12:22,761 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 199 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-18 17:12:22,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16277 states. [2018-11-18 17:12:23,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16277 to 13344. [2018-11-18 17:12:23,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13344 states. [2018-11-18 17:12:23,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13344 states to 13344 states and 18950 transitions. [2018-11-18 17:12:23,536 INFO L78 Accepts]: Start accepts. Automaton has 13344 states and 18950 transitions. Word has length 202 [2018-11-18 17:12:23,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:23,537 INFO L480 AbstractCegarLoop]: Abstraction has 13344 states and 18950 transitions. [2018-11-18 17:12:23,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 17:12:23,537 INFO L276 IsEmpty]: Start isEmpty. Operand 13344 states and 18950 transitions. [2018-11-18 17:12:23,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-11-18 17:12:23,542 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:23,542 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:23,542 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:23,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:23,543 INFO L82 PathProgramCache]: Analyzing trace with hash -1014705975, now seen corresponding path program 1 times [2018-11-18 17:12:23,543 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:23,543 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:23,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:24,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:12:24,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:12:24,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:12:24,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:12:24,205 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:24,205 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:24,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:12:24,206 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,211 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,215 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,221 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:12:24,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:12:24,238 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:24,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:12:24,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,241 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,242 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:24,242 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:12:24,270 INFO L134 CoverageAnalysis]: Checked inductivity of 382 backedges. 266 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:12:24,270 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:12:24,272 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:12:24,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 17:12:24,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 17:12:24,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 17:12:24,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-18 17:12:24,273 INFO L87 Difference]: Start difference. First operand 13344 states and 18950 transitions. Second operand 7 states. [2018-11-18 17:12:28,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:28,221 INFO L93 Difference]: Finished difference Result 27102 states and 38354 transitions. [2018-11-18 17:12:28,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 17:12:28,222 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 203 [2018-11-18 17:12:28,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:28,231 INFO L225 Difference]: With dead ends: 27102 [2018-11-18 17:12:28,231 INFO L226 Difference]: Without dead ends: 16277 [2018-11-18 17:12:28,236 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 197 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 17:12:28,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16277 states. [2018-11-18 17:12:29,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16277 to 14690. [2018-11-18 17:12:29,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14690 states. [2018-11-18 17:12:29,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14690 states to 14690 states and 20711 transitions. [2018-11-18 17:12:29,033 INFO L78 Accepts]: Start accepts. Automaton has 14690 states and 20711 transitions. Word has length 203 [2018-11-18 17:12:29,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:29,033 INFO L480 AbstractCegarLoop]: Abstraction has 14690 states and 20711 transitions. [2018-11-18 17:12:29,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 17:12:29,033 INFO L276 IsEmpty]: Start isEmpty. Operand 14690 states and 20711 transitions. [2018-11-18 17:12:29,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-11-18 17:12:29,039 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:29,039 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:29,039 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:29,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:29,039 INFO L82 PathProgramCache]: Analyzing trace with hash 133498677, now seen corresponding path program 1 times [2018-11-18 17:12:29,040 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:29,040 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:29,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:29,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 17:12:29,677 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 17:12:29,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-18 17:12:29,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-11-18 17:12:29,705 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:29,705 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:29,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 17:12:29,706 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,711 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,721 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,721 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:22, output treesize:22 [2018-11-18 17:12:29,737 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 17:12:29,738 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 17:12:29,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-11-18 17:12:29,739 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,741 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 17:12:29,742 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:5 [2018-11-18 17:12:29,770 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 267 proven. 0 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-11-18 17:12:29,771 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 17:12:29,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 17:12:29,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-18 17:12:29,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-18 17:12:29,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-18 17:12:29,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-18 17:12:29,774 INFO L87 Difference]: Start difference. First operand 14690 states and 20711 transitions. Second operand 7 states. [2018-11-18 17:12:33,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 17:12:33,667 INFO L93 Difference]: Finished difference Result 28169 states and 39721 transitions. [2018-11-18 17:12:33,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 17:12:33,668 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 204 [2018-11-18 17:12:33,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 17:12:33,677 INFO L225 Difference]: With dead ends: 28169 [2018-11-18 17:12:33,678 INFO L226 Difference]: Without dead ends: 16215 [2018-11-18 17:12:33,684 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 198 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-18 17:12:33,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16215 states. [2018-11-18 17:12:34,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16215 to 14735. [2018-11-18 17:12:34,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14735 states. [2018-11-18 17:12:34,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14735 states to 14735 states and 20756 transitions. [2018-11-18 17:12:34,492 INFO L78 Accepts]: Start accepts. Automaton has 14735 states and 20756 transitions. Word has length 204 [2018-11-18 17:12:34,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 17:12:34,492 INFO L480 AbstractCegarLoop]: Abstraction has 14735 states and 20756 transitions. [2018-11-18 17:12:34,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-18 17:12:34,492 INFO L276 IsEmpty]: Start isEmpty. Operand 14735 states and 20756 transitions. [2018-11-18 17:12:34,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-11-18 17:12:34,497 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 17:12:34,498 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 17:12:34,498 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ssl3_acceptErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 17:12:34,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 17:12:34,498 INFO L82 PathProgramCache]: Analyzing trace with hash 362821223, now seen corresponding path program 1 times [2018-11-18 17:12:34,498 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 17:12:34,498 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 17:12:34,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 17:12:34,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 17:12:35,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 17:12:35,673 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 17:12:35,724 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 17:12:35,724 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 17:12:35,788 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 05:12:35 BoogieIcfgContainer [2018-11-18 17:12:35,788 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 17:12:35,789 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 17:12:35,789 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 17:12:35,789 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 17:12:35,789 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:06:00" (3/4) ... [2018-11-18 17:12:35,791 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 17:12:35,808 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 17:12:35,808 WARN L1239 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# [2018-11-18 17:12:35,887 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_36966f84-7454-4464-9333-05f481d149b4/bin-2019/utaipan/witness.graphml [2018-11-18 17:12:35,887 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 17:12:35,888 INFO L168 Benchmark]: Toolchain (without parser) took 401219.57 ms. Allocated memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: 1.5 GB). Free memory was 942.5 MB in the beginning and 824.7 MB in the end (delta: 117.8 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2018-11-18 17:12:35,888 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 17:12:35,888 INFO L168 Benchmark]: CACSL2BoogieTranslator took 1423.53 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 194.5 MB). Free memory was 942.5 MB in the beginning and 1.2 GB in the end (delta: -242.1 MB). Peak memory consumption was 193.6 MB. Max. memory is 11.5 GB. [2018-11-18 17:12:35,889 INFO L168 Benchmark]: Boogie Procedure Inliner took 46.81 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 17:12:35,889 INFO L168 Benchmark]: Boogie Preprocessor took 132.08 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 5.9 MB). Peak memory consumption was 5.9 MB. Max. memory is 11.5 GB. [2018-11-18 17:12:35,889 INFO L168 Benchmark]: RCFGBuilder took 4674.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 87.8 MB). Peak memory consumption was 87.8 MB. Max. memory is 11.5 GB. [2018-11-18 17:12:35,889 INFO L168 Benchmark]: TraceAbstraction took 394840.10 ms. Allocated memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: 1.3 GB). Free memory was 1.1 GB in the beginning and 855.6 MB in the end (delta: 235.3 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2018-11-18 17:12:35,890 INFO L168 Benchmark]: Witness Printer took 98.39 ms. Allocated memory is still 2.5 GB. Free memory was 855.6 MB in the beginning and 824.7 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 11.5 GB. [2018-11-18 17:12:35,891 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 1423.53 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 194.5 MB). Free memory was 942.5 MB in the beginning and 1.2 GB in the end (delta: -242.1 MB). Peak memory consumption was 193.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 46.81 ms. Allocated memory is still 1.2 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 132.08 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 5.9 MB). Peak memory consumption was 5.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 4674.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 87.8 MB). Peak memory consumption was 87.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 394840.10 ms. Allocated memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: 1.3 GB). Free memory was 1.1 GB in the beginning and 855.6 MB in the end (delta: 235.3 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 98.39 ms. Allocated memory is still 2.5 GB. Free memory was 855.6 MB in the beginning and 824.7 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ssl_method_st?version~INT?ssl_new~*((*~SSL~0 ) : INT)?ssl_clear~*((*~SSL~0 ) : VOID)?ssl_free~*((*~SSL~0 ) : VOID)?ssl_accept~*((*~SSL~0 ) : INT)?ssl_connect~*((*~SSL~0 ) : INT)?ssl_read~*((*~SSL~0 *VOID INT ) : INT)?ssl_peek~*((*~SSL~0 *VOID INT ) : INT)?ssl_write~*((*~SSL~0 *VOID INT ) : INT)?ssl_shutdown~*((*~SSL~0 ) : INT)?ssl_renegotiate~*((*~SSL~0 ) : INT)?ssl_renegotiate_check~*((*~SSL~0 ) : INT)?ssl_ctrl~*((*~SSL~0 INT LONG *CHAR ) : LONG)?ssl_ctx_ctrl~*((*~SSL_CTX~0 INT LONG *CHAR ) : LONG)?get_cipher_by_char~*((*UCHAR ) : *~SSL_CIPHER~0)?put_cipher_by_char~*((*~SSL_CIPHER~0 *UCHAR ) : INT)?ssl_pending~*((*~SSL~0 ) : INT)?num_ciphers~*(() : INT)?get_cipher~*((UINT ) : *~SSL_CIPHER~0)?get_ssl_method~*((INT ) : *ssl_method_st)?get_timeout~*(() : LONG)?ssl3_enc~*ssl3_enc_method?ssl_version~*(() : INT)?ssl_callback_ctrl~*((*~SSL~0 INT *(() : VOID) ) : LONG)?ssl_ctx_callback_ctrl~*((*~SSL_CTX~0 INT *(() : VOID) ) : LONG)# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1727]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L1042] static int init = 1; [L1043] FCALL static SSL_METHOD SSLv3_server_data ; VAL [\old(init)=0, \old(SSLv3_server_data)=null, \old(SSLv3_server_data)=null, init=1, SSLv3_server_data={2018562434:0}] [L1065] SSL *s ; [L1066] int tmp ; [L1070] EXPR, FCALL malloc(sizeof(SSL)) [L1070] s = malloc(sizeof(SSL)) [L1071] EXPR, FCALL malloc(sizeof(struct ssl3_state_st)) [L1071] FCALL s->s3 = malloc(sizeof(struct ssl3_state_st)) [L1072] EXPR, FCALL malloc(sizeof(SSL_CTX)) [L1072] FCALL s->ctx = malloc(sizeof(SSL_CTX)) [L1073] EXPR, FCALL malloc(sizeof(SSL_SESSION)) [L1073] FCALL s->session = malloc(sizeof(SSL_SESSION)) VAL [init=1, malloc(sizeof(SSL))={-1173354496:0}, malloc(sizeof(SSL_CTX))={2018562435:0}, malloc(sizeof(SSL_SESSION))={-128921214:0}, malloc(sizeof(struct ssl3_state_st))={-1761605632:0}, s={-1173354496:0}, SSLv3_server_data={2018562434:0}] [L1074] CALL ssl3_accept(s) VAL [init=1, s={-1173354496:0}, SSLv3_server_data={2018562434:0}] [L1080] BUF_MEM *buf ; [L1081] unsigned long l ; [L1082] unsigned long Time ; [L1083] unsigned long tmp ; [L1084] void (*cb)() ; [L1085] long num1 ; [L1086] int ret ; [L1087] int new_state ; [L1088] int state ; [L1089] int skip ; [L1090] int got_new_session ; [L1091] int tmp___1 = __VERIFIER_nondet_int() ; [L1092] int tmp___2 = __VERIFIER_nondet_int() ; [L1093] int tmp___3 = __VERIFIER_nondet_int() ; [L1094] int tmp___4 = __VERIFIER_nondet_int() ; [L1095] int tmp___5 = __VERIFIER_nondet_int() ; [L1096] int tmp___6 = __VERIFIER_nondet_int() ; [L1097] int tmp___7 ; [L1098] long tmp___8 = __VERIFIER_nondet_long() ; [L1099] int tmp___9 = __VERIFIER_nondet_int() ; [L1100] int tmp___10 = __VERIFIER_nondet_int() ; [L1101] int blastFlag ; [L1105] FCALL s->state = 8464 [L1106] blastFlag = 0 [L1107] FCALL s->hit=__VERIFIER_nondet_int () [L1108] FCALL s->state = 8464 [L1109] tmp = __VERIFIER_nondet_int() [L1110] Time = tmp [L1111] cb = (void (*)())((void *)0) [L1112] ret = -1 [L1113] skip = 0 [L1114] got_new_session = 0 [L1115] EXPR, FCALL s->info_callback VAL [={0:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->info_callback={1:0}, skip=0, SSLv3_server_data={2018562434:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1115] COND TRUE (unsigned long )s->info_callback != (unsigned long )((void *)0) [L1116] EXPR, FCALL s->info_callback [L1116] cb = s->info_callback [L1120] EXPR, FCALL s->in_handshake [L1120] FCALL s->in_handshake += 1 [L1121] COND FALSE !(tmp___1 & 12288) VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] EXPR, FCALL s->cert VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->cert={1:0}, skip=0, SSLv3_server_data={2018562434:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1130] COND FALSE !((unsigned long )s->cert == (unsigned long )((void *)0)) [L1136] COND TRUE 1 VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={1:0}, blastFlag=0, got_new_session=0, init=1, ret=4294967295, s={-1173354496:0}, s={-1173354496:0}, s->state=8464, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND TRUE s->state == 8464 [L1323] FCALL s->shutdown = 0 [L1324] ret = __VERIFIER_nondet_int() [L1325] COND TRUE blastFlag == 0 [L1326] blastFlag = 1 VAL [={1:0}, blastFlag=1, got_new_session=0, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1330] COND FALSE !(ret <= 0) [L1335] got_new_session = 1 [L1336] FCALL s->state = 8496 [L1337] FCALL s->init_num = 0 VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={1:0}, (s->s3)->tmp.reuse_message=1, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->s3={-1761605632:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8464, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={1:0}, blastFlag=1, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8496, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND TRUE s->state == 8496 [L1341] ret = __VERIFIER_nondet_int() [L1342] COND TRUE blastFlag == 1 [L1343] blastFlag = 2 VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1347] COND FALSE !(ret <= 0) [L1352] FCALL s->hit VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->hit=1, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1352] COND TRUE s->hit [L1353] FCALL s->state = 8656 VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1357] FCALL s->init_num = 0 VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={1:0}, (s->s3)->tmp.reuse_message=1, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->s3={-1761605632:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8496, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={1:0}, blastFlag=2, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8656, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND TRUE s->state == 8656 [L1579] EXPR, FCALL s->session [L1579] EXPR, FCALL s->s3 [L1579] EXPR, FCALL (s->s3)->tmp.new_cipher [L1579] FCALL (s->session)->cipher = (s->s3)->tmp.new_cipher [L1580] COND FALSE !(! tmp___9) [L1586] ret = __VERIFIER_nondet_int() [L1587] COND TRUE blastFlag == 2 [L1588] blastFlag = 3 VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1592] COND FALSE !(ret <= 0) [L1597] FCALL s->state = 8672 [L1598] FCALL s->init_num = 0 VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1599] COND FALSE !(! tmp___10) VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={1:0}, (s->s3)->tmp.reuse_message=1, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->s3={-1761605632:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8656, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND FALSE !(s->state == 8640) [L1226] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1226] COND FALSE !(s->state == 8641) [L1229] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1229] COND FALSE !(s->state == 8656) [L1232] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1232] COND FALSE !(s->state == 8657) [L1235] EXPR, FCALL s->state VAL [={1:0}, blastFlag=3, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8672, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1235] COND TRUE s->state == 8672 [L1608] ret = __VERIFIER_nondet_int() [L1609] COND TRUE blastFlag == 3 [L1610] blastFlag = 4 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1614] COND FALSE !(ret <= 0) [L1619] FCALL s->state = 8448 [L1620] FCALL s->hit VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->hit=1, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1620] COND TRUE s->hit [L1621] EXPR, FCALL s->s3 [L1621] FCALL (s->s3)->tmp.next_state = 8640 [L1625] FCALL s->init_num = 0 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={1:0}, (s->s3)->tmp.reuse_message=1, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->s3={-1761605632:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8672, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8448, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND TRUE s->state == 8448 [L1490] COND FALSE !(num1 > 0L) VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1503] EXPR, FCALL s->s3 [L1503] EXPR, FCALL (s->s3)->tmp.next_state [L1503] FCALL s->state = (s->s3)->tmp.next_state [L1686] EXPR, FCALL s->s3 [L1686] EXPR, FCALL (s->s3)->tmp.reuse_message VAL [={1:0}, (s->s3)->tmp.reuse_message=1, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->s3={-1761605632:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1686] COND FALSE !(! (s->s3)->tmp.reuse_message) [L1715] skip = 0 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1136] COND TRUE 1 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8448, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1138] EXPR, FCALL s->state [L1138] state = s->state [L1139] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1139] COND FALSE !(s->state == 12292) [L1142] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1142] COND FALSE !(s->state == 16384) [L1145] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1145] COND FALSE !(s->state == 8192) [L1148] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1148] COND FALSE !(s->state == 24576) [L1151] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1151] COND FALSE !(s->state == 8195) [L1154] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1154] COND FALSE !(s->state == 8480) [L1157] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1157] COND FALSE !(s->state == 8481) [L1160] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1160] COND FALSE !(s->state == 8482) [L1163] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1163] COND FALSE !(s->state == 8464) [L1166] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1166] COND FALSE !(s->state == 8465) [L1169] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1169] COND FALSE !(s->state == 8466) [L1172] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1172] COND FALSE !(s->state == 8496) [L1175] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1175] COND FALSE !(s->state == 8497) [L1178] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1178] COND FALSE !(s->state == 8512) [L1181] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1181] COND FALSE !(s->state == 8513) [L1184] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1184] COND FALSE !(s->state == 8528) [L1187] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1187] COND FALSE !(s->state == 8529) [L1190] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1190] COND FALSE !(s->state == 8544) [L1193] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1193] COND FALSE !(s->state == 8545) [L1196] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1196] COND FALSE !(s->state == 8560) [L1199] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1199] COND FALSE !(s->state == 8561) [L1202] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1202] COND FALSE !(s->state == 8448) [L1205] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1205] COND FALSE !(s->state == 8576) [L1208] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1208] COND FALSE !(s->state == 8577) [L1211] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1211] COND FALSE !(s->state == 8592) [L1214] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1214] COND FALSE !(s->state == 8593) [L1217] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1217] COND FALSE !(s->state == 8608) [L1220] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1220] COND FALSE !(s->state == 8609) [L1223] EXPR, FCALL s->state VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=1073741824, s={-1173354496:0}, s={-1173354496:0}, s->state=8640, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1223] COND TRUE s->state == 8640 [L1559] ret = __VERIFIER_nondet_int() [L1560] COND TRUE blastFlag == 4 VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] [L1727] __VERIFIER_error() VAL [={1:0}, blastFlag=4, got_new_session=1, init=1, num1=0, ret=0, s={-1173354496:0}, s={-1173354496:0}, skip=0, SSLv3_server_data={2018562434:0}, state=8640, Time=0, tmp=0, tmp___1=0, tmp___10=1, tmp___2=0, tmp___3=0, tmp___4=0, tmp___5=0, tmp___6=0, tmp___8=0, tmp___9=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 160 locations, 1 error locations. UNSAFE Result, 394.7s OverallTime, 34 OverallIterations, 7 TraceHistogramMax, 352.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 8414 SDtfs, 20133 SDslu, 20521 SDs, 0 SdLazy, 20726 SolverSat, 2953 SolverUnsat, 122 SolverUnknown, 0 SolverNotchecked, 319.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 9241 GetRequests, 8958 SyntacticMatches, 8 SemanticMatches, 275 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 451 ImplicationChecksByTransitivity, 7.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14735occurred in iteration=33, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 12.9s AutomataMinimizationTime, 33 MinimizatonAttempts, 113468 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.2s SsaConstructionTime, 11.2s SatisfiabilityAnalysisTime, 13.9s InterpolantComputationTime, 6079 NumberOfCodeBlocks, 6079 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 9065 ConstructedInterpolants, 415 QuantifiedInterpolants, 10288364 SizeOfPredicates, 206 NumberOfNonLiveVariables, 13450 ConjunctsInSsa, 217 ConjunctsInUnsatCore, 51 InterpolantComputations, 32 PerfectInterpolantSequences, 14001/14683 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...