./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 16:22:29,796 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 16:22:29,797 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 16:22:29,805 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 16:22:29,805 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 16:22:29,806 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 16:22:29,806 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 16:22:29,807 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 16:22:29,808 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 16:22:29,809 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 16:22:29,810 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 16:22:29,810 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 16:22:29,811 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 16:22:29,811 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 16:22:29,812 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 16:22:29,813 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 16:22:29,813 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 16:22:29,814 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 16:22:29,816 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 16:22:29,817 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 16:22:29,817 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 16:22:29,818 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 16:22:29,820 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 16:22:29,820 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 16:22:29,820 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 16:22:29,821 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 16:22:29,821 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 16:22:29,822 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 16:22:29,823 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 16:22:29,823 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 16:22:29,824 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 16:22:29,824 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 16:22:29,824 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 16:22:29,824 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 16:22:29,825 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 16:22:29,825 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 16:22:29,825 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 16:22:29,836 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 16:22:29,836 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 16:22:29,836 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 16:22:29,837 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 16:22:29,837 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 16:22:29,838 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 16:22:29,838 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 16:22:29,838 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 16:22:29,838 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 16:22:29,838 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 16:22:29,838 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 16:22:29,839 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 16:22:29,840 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 16:22:29,840 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 16:22:29,840 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 16:22:29,840 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 16:22:29,840 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 16:22:29,840 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:22:29,840 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 16:22:29,841 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-11-18 16:22:29,865 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 16:22:29,872 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 16:22:29,874 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 16:22:29,874 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 16:22:29,875 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 16:22:29,875 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-18 16:22:29,909 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/9e5131e86/ba2694a31b974db0b70ed42a3b6b1c17/FLAG892c78048 [2018-11-18 16:22:30,219 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 16:22:30,220 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-18 16:22:30,225 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/9e5131e86/ba2694a31b974db0b70ed42a3b6b1c17/FLAG892c78048 [2018-11-18 16:22:30,233 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/9e5131e86/ba2694a31b974db0b70ed42a3b6b1c17 [2018-11-18 16:22:30,236 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 16:22:30,236 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 16:22:30,237 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 16:22:30,237 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 16:22:30,239 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 16:22:30,240 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,241 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25c31600 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30, skipping insertion in model container [2018-11-18 16:22:30,242 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,247 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 16:22:30,267 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 16:22:30,397 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:22:30,399 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 16:22:30,422 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:22:30,430 INFO L195 MainTranslator]: Completed translation [2018-11-18 16:22:30,430 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30 WrapperNode [2018-11-18 16:22:30,430 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 16:22:30,431 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 16:22:30,431 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 16:22:30,431 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 16:22:30,438 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,444 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,450 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 16:22:30,450 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 16:22:30,450 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 16:22:30,450 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 16:22:30,493 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,493 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,495 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,495 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,501 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,507 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,508 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... [2018-11-18 16:22:30,510 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 16:22:30,510 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 16:22:30,511 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 16:22:30,511 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 16:22:30,512 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:22:30,549 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 16:22:30,549 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 16:22:30,549 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-11-18 16:22:30,549 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-11-18 16:22:30,549 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 16:22:30,549 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 16:22:30,549 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 16:22:30,549 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 16:22:30,549 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-11-18 16:22:30,549 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-11-18 16:22:30,549 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-18 16:22:30,549 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-18 16:22:30,763 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 16:22:30,763 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:22:30 BoogieIcfgContainer [2018-11-18 16:22:30,763 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 16:22:30,764 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 16:22:30,764 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 16:22:30,767 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 16:22:30,767 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 04:22:30" (1/3) ... [2018-11-18 16:22:30,768 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38cb0f47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:22:30, skipping insertion in model container [2018-11-18 16:22:30,768 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:30" (2/3) ... [2018-11-18 16:22:30,768 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38cb0f47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:22:30, skipping insertion in model container [2018-11-18 16:22:30,769 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:22:30" (3/3) ... [2018-11-18 16:22:30,770 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-18 16:22:30,776 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 16:22:30,781 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 16:22:30,791 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 16:22:30,814 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 16:22:30,814 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 16:22:30,814 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 16:22:30,814 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 16:22:30,814 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 16:22:30,814 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 16:22:30,814 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 16:22:30,814 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 16:22:30,828 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states. [2018-11-18 16:22:30,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:22:30,834 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:30,834 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:30,836 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:30,840 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:30,840 INFO L82 PathProgramCache]: Analyzing trace with hash -926055278, now seen corresponding path program 1 times [2018-11-18 16:22:30,841 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:30,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:30,871 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:30,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:30,871 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:30,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:31,132 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:31,133 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:31,134 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 16:22:31,134 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 35 with the following transitions: [2018-11-18 16:22:31,136 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [64], [65], [69], [71], [73], [75], [96], [99], [107], [131], [134], [136], [142], [143], [144], [146], [147], [148], [149], [150], [151], [152], [158] [2018-11-18 16:22:31,164 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 16:22:31,164 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 16:22:31,250 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 16:22:31,251 INFO L272 AbstractInterpreter]: Visited 21 different actions 29 times. Never merged. Never widened. Performed 79 root evaluator evaluations with a maximum evaluation depth of 3. Performed 79 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 19 variables. [2018-11-18 16:22:31,255 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:31,256 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 16:22:31,318 INFO L227 lantSequenceWeakener]: Weakened 16 states. On average, predicates are now at 62.81% of their original sizes. [2018-11-18 16:22:31,318 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 16:22:31,402 INFO L415 sIntCurrentIteration]: We unified 33 AI predicates to 33 [2018-11-18 16:22:31,402 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 16:22:31,403 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 16:22:31,403 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [9] total 20 [2018-11-18 16:22:31,403 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:22:31,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 16:22:31,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 16:22:31,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:22:31,413 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 13 states. [2018-11-18 16:22:31,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:31,931 INFO L93 Difference]: Finished difference Result 150 states and 222 transitions. [2018-11-18 16:22:31,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 16:22:31,932 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-11-18 16:22:31,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:31,940 INFO L225 Difference]: With dead ends: 150 [2018-11-18 16:22:31,940 INFO L226 Difference]: Without dead ends: 87 [2018-11-18 16:22:31,943 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 38 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=254, Unknown=0, NotChecked=0, Total=306 [2018-11-18 16:22:31,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-11-18 16:22:31,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 73. [2018-11-18 16:22:31,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-11-18 16:22:31,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 93 transitions. [2018-11-18 16:22:31,979 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 93 transitions. Word has length 34 [2018-11-18 16:22:31,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:31,979 INFO L480 AbstractCegarLoop]: Abstraction has 73 states and 93 transitions. [2018-11-18 16:22:31,979 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 16:22:31,979 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 93 transitions. [2018-11-18 16:22:31,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:22:31,981 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:31,981 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:31,981 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:31,981 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:31,982 INFO L82 PathProgramCache]: Analyzing trace with hash -589241676, now seen corresponding path program 1 times [2018-11-18 16:22:31,982 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:31,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:31,982 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:31,983 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:31,983 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:32,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:32,123 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:32,123 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:32,123 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 16:22:32,124 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 40 with the following transitions: [2018-11-18 16:22:32,124 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [36], [40], [46], [50], [56], [64], [65], [69], [71], [73], [75], [96], [99], [107], [131], [134], [136], [142], [143], [144], [146], [147], [148], [149], [150], [151], [152], [158] [2018-11-18 16:22:32,126 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 16:22:32,126 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 16:22:32,181 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 16:22:32,181 INFO L272 AbstractInterpreter]: Visited 32 different actions 78 times. Merged at 7 different actions 15 times. Never widened. Performed 226 root evaluator evaluations with a maximum evaluation depth of 6. Performed 226 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 1 fixpoints after 1 different actions. Largest state had 19 variables. [2018-11-18 16:22:32,193 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:32,194 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 16:22:32,195 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:32,195 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:32,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:32,210 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 16:22:32,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:32,240 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:32,343 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:22:32,343 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:32,501 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:32,516 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:22:32,516 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 19 [2018-11-18 16:22:32,516 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 16:22:32,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 16:22:32,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 16:22:32,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342 [2018-11-18 16:22:32,519 INFO L87 Difference]: Start difference. First operand 73 states and 93 transitions. Second operand 12 states. [2018-11-18 16:22:32,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:32,817 INFO L93 Difference]: Finished difference Result 148 states and 196 transitions. [2018-11-18 16:22:32,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 16:22:32,817 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 39 [2018-11-18 16:22:32,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:32,818 INFO L225 Difference]: With dead ends: 148 [2018-11-18 16:22:32,818 INFO L226 Difference]: Without dead ends: 122 [2018-11-18 16:22:32,819 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=102, Invalid=600, Unknown=0, NotChecked=0, Total=702 [2018-11-18 16:22:32,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-18 16:22:32,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 95. [2018-11-18 16:22:32,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-18 16:22:32,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 121 transitions. [2018-11-18 16:22:32,830 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 121 transitions. Word has length 39 [2018-11-18 16:22:32,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:32,830 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 121 transitions. [2018-11-18 16:22:32,831 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 16:22:32,831 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 121 transitions. [2018-11-18 16:22:32,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:22:32,832 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:32,832 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:32,832 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:32,832 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:32,832 INFO L82 PathProgramCache]: Analyzing trace with hash -531983374, now seen corresponding path program 1 times [2018-11-18 16:22:32,833 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:32,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:32,833 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:32,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:32,834 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:32,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:32,968 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:32,969 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:32,969 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 16:22:32,969 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 40 with the following transitions: [2018-11-18 16:22:32,970 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [36], [40], [46], [50], [56], [64], [65], [69], [71], [73], [75], [96], [101], [107], [131], [134], [136], [142], [143], [144], [146], [147], [148], [149], [150], [151], [152], [158] [2018-11-18 16:22:32,971 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 16:22:32,971 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 16:22:33,003 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 16:22:33,003 INFO L272 AbstractInterpreter]: Visited 32 different actions 84 times. Merged at 7 different actions 17 times. Never widened. Performed 240 root evaluator evaluations with a maximum evaluation depth of 6. Performed 240 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Never found a fixpoint. Largest state had 19 variables. [2018-11-18 16:22:33,005 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:33,005 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 16:22:33,005 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:33,005 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:33,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:33,018 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 16:22:33,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:33,038 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:33,109 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 16:22:33,109 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:33,267 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:33,282 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:22:33,282 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11, 9] total 20 [2018-11-18 16:22:33,282 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 16:22:33,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 16:22:33,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 16:22:33,283 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2018-11-18 16:22:33,283 INFO L87 Difference]: Start difference. First operand 95 states and 121 transitions. Second operand 13 states. [2018-11-18 16:22:33,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:33,517 INFO L93 Difference]: Finished difference Result 154 states and 202 transitions. [2018-11-18 16:22:33,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-18 16:22:33,517 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 39 [2018-11-18 16:22:33,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:33,519 INFO L225 Difference]: With dead ends: 154 [2018-11-18 16:22:33,519 INFO L226 Difference]: Without dead ends: 118 [2018-11-18 16:22:33,519 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 67 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=119, Invalid=693, Unknown=0, NotChecked=0, Total=812 [2018-11-18 16:22:33,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-11-18 16:22:33,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 87. [2018-11-18 16:22:33,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-11-18 16:22:33,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 107 transitions. [2018-11-18 16:22:33,530 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 107 transitions. Word has length 39 [2018-11-18 16:22:33,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:33,530 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 107 transitions. [2018-11-18 16:22:33,530 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 16:22:33,530 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 107 transitions. [2018-11-18 16:22:33,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:22:33,531 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:33,531 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:33,531 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:33,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:33,532 INFO L82 PathProgramCache]: Analyzing trace with hash 866979360, now seen corresponding path program 2 times [2018-11-18 16:22:33,532 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:33,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:33,533 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:33,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:33,533 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:33,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:33,610 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:33,611 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:33,611 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 16:22:33,611 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-11-18 16:22:33,611 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-11-18 16:22:33,611 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:33,611 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:33,624 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-18 16:22:33,624 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-11-18 16:22:33,638 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2018-11-18 16:22:33,639 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:22:33,640 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:33,683 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:33,683 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:33,784 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:33,800 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 16:22:33,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8, 8] imperfect sequences [8] total 20 [2018-11-18 16:22:33,800 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:22:33,800 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:22:33,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:22:33,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=337, Unknown=0, NotChecked=0, Total=380 [2018-11-18 16:22:33,800 INFO L87 Difference]: Start difference. First operand 87 states and 107 transitions. Second operand 8 states. [2018-11-18 16:22:33,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:33,848 INFO L93 Difference]: Finished difference Result 128 states and 162 transitions. [2018-11-18 16:22:33,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 16:22:33,849 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2018-11-18 16:22:33,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:33,850 INFO L225 Difference]: With dead ends: 128 [2018-11-18 16:22:33,850 INFO L226 Difference]: Without dead ends: 102 [2018-11-18 16:22:33,851 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-11-18 16:22:33,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-11-18 16:22:33,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 95. [2018-11-18 16:22:33,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-11-18 16:22:33,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 115 transitions. [2018-11-18 16:22:33,858 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 115 transitions. Word has length 39 [2018-11-18 16:22:33,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:33,858 INFO L480 AbstractCegarLoop]: Abstraction has 95 states and 115 transitions. [2018-11-18 16:22:33,858 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:22:33,858 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 115 transitions. [2018-11-18 16:22:33,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:33,859 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:33,859 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:33,860 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:33,860 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:33,860 INFO L82 PathProgramCache]: Analyzing trace with hash 530522598, now seen corresponding path program 3 times [2018-11-18 16:22:33,860 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:33,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:33,861 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:22:33,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:33,861 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:33,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:33,970 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:22:33,970 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:33,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-18 16:22:33,971 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:22:33,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 16:22:33,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 16:22:33,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:22:33,971 INFO L87 Difference]: Start difference. First operand 95 states and 115 transitions. Second operand 10 states. [2018-11-18 16:22:34,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:34,107 INFO L93 Difference]: Finished difference Result 159 states and 209 transitions. [2018-11-18 16:22:34,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:22:34,108 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 44 [2018-11-18 16:22:34,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:34,109 INFO L225 Difference]: With dead ends: 159 [2018-11-18 16:22:34,110 INFO L226 Difference]: Without dead ends: 133 [2018-11-18 16:22:34,110 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-11-18 16:22:34,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-18 16:22:34,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 117. [2018-11-18 16:22:34,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-18 16:22:34,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 149 transitions. [2018-11-18 16:22:34,121 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 149 transitions. Word has length 44 [2018-11-18 16:22:34,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:34,121 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 149 transitions. [2018-11-18 16:22:34,121 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 16:22:34,121 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 149 transitions. [2018-11-18 16:22:34,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:34,122 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:34,123 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:34,123 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:34,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:34,123 INFO L82 PathProgramCache]: Analyzing trace with hash 587780900, now seen corresponding path program 2 times [2018-11-18 16:22:34,123 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:34,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:34,124 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:22:34,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:34,124 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:34,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:34,283 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:22:34,284 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:34,284 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-18 16:22:34,284 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 16:22:34,284 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 16:22:34,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 16:22:34,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:22:34,285 INFO L87 Difference]: Start difference. First operand 117 states and 149 transitions. Second operand 13 states. [2018-11-18 16:22:34,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:34,423 INFO L93 Difference]: Finished difference Result 142 states and 181 transitions. [2018-11-18 16:22:34,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:22:34,423 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 44 [2018-11-18 16:22:34,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:34,424 INFO L225 Difference]: With dead ends: 142 [2018-11-18 16:22:34,424 INFO L226 Difference]: Without dead ends: 140 [2018-11-18 16:22:34,425 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:22:34,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-11-18 16:22:34,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 121. [2018-11-18 16:22:34,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-11-18 16:22:34,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 152 transitions. [2018-11-18 16:22:34,436 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 152 transitions. Word has length 44 [2018-11-18 16:22:34,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:34,437 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 152 transitions. [2018-11-18 16:22:34,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 16:22:34,437 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 152 transitions. [2018-11-18 16:22:34,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:34,438 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:34,438 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:34,438 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:34,438 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:34,438 INFO L82 PathProgramCache]: Analyzing trace with hash 2053954602, now seen corresponding path program 1 times [2018-11-18 16:22:34,439 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:34,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:34,439 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:22:34,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:34,439 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:34,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:34,514 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:34,515 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:34,515 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 16:22:34,515 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-11-18 16:22:34,515 INFO L202 CegarAbsIntRunner]: [0], [1], [4], [6], [36], [40], [46], [50], [52], [56], [62], [64], [65], [69], [71], [73], [75], [96], [99], [107], [131], [134], [136], [142], [143], [144], [146], [147], [148], [149], [150], [151], [152], [158] [2018-11-18 16:22:34,516 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 16:22:34,516 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 16:22:34,579 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 16:22:34,579 INFO L272 AbstractInterpreter]: Visited 34 different actions 142 times. Merged at 8 different actions 40 times. Never widened. Performed 450 root evaluator evaluations with a maximum evaluation depth of 6. Performed 450 inverse root evaluator evaluations with a maximum inverse evaluation depth of 6. Found 2 fixpoints after 1 different actions. Largest state had 19 variables. [2018-11-18 16:22:34,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:34,580 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 16:22:34,580 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:34,580 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:34,591 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:34,591 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 16:22:34,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:34,604 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:34,613 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:34,613 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:38,432 WARN L180 SmtUtils]: Spent 580.00 ms on a formula simplification that was a NOOP. DAG size: 7 [2018-11-18 16:22:39,061 WARN L832 $PredicateComparison]: unable to prove that (forall ((addflt_~b Int)) (<= (mod addflt_~b 4294967296) (mod |c_addflt_#in~a| 4294967296))) is different from false [2018-11-18 16:22:39,715 WARN L832 $PredicateComparison]: unable to prove that (forall ((addflt_~b Int)) (<= (mod addflt_~b 4294967296) (mod c_main_~a~0 4294967296))) is different from false [2018-11-18 16:22:40,346 WARN L832 $PredicateComparison]: unable to prove that (forall ((addflt_~b Int)) (<= (mod addflt_~b 4294967296) (mod |c_main_#t~ret5| 4294967296))) is different from false [2018-11-18 16:22:41,023 WARN L832 $PredicateComparison]: unable to prove that (forall ((addflt_~b Int)) (<= (mod addflt_~b 4294967296) (mod |c_base2flt_#res| 4294967296))) is different from false [2018-11-18 16:22:41,660 WARN L832 $PredicateComparison]: unable to prove that (forall ((addflt_~b Int)) (<= (mod addflt_~b 4294967296) (mod c_base2flt_~__retres4~0 4294967296))) is different from false [2018-11-18 16:22:41,667 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:41,683 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:22:41,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2018-11-18 16:22:41,684 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-11-18 16:22:41,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:22:41,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:22:41,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=56, Unknown=10, NotChecked=90, Total=182 [2018-11-18 16:22:41,684 INFO L87 Difference]: Start difference. First operand 121 states and 152 transitions. Second operand 8 states. [2018-11-18 16:22:42,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:42,381 INFO L93 Difference]: Finished difference Result 190 states and 245 transitions. [2018-11-18 16:22:42,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 16:22:42,381 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-11-18 16:22:42,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:42,382 INFO L225 Difference]: With dead ends: 190 [2018-11-18 16:22:42,382 INFO L226 Difference]: Without dead ends: 164 [2018-11-18 16:22:42,382 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 82 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 7.7s TimeCoverageRelationStatistics Valid=35, Invalid=84, Unknown=11, NotChecked=110, Total=240 [2018-11-18 16:22:42,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-11-18 16:22:42,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 149. [2018-11-18 16:22:42,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-11-18 16:22:42,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 191 transitions. [2018-11-18 16:22:42,392 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 191 transitions. Word has length 44 [2018-11-18 16:22:42,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:42,392 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 191 transitions. [2018-11-18 16:22:42,392 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:22:42,392 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 191 transitions. [2018-11-18 16:22:42,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:42,393 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:42,393 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:42,393 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:42,393 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:42,393 INFO L82 PathProgramCache]: Analyzing trace with hash 2111212904, now seen corresponding path program 1 times [2018-11-18 16:22:42,393 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 16:22:42,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:42,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:42,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 16:22:42,394 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 16:22:42,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:22:42,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 16:22:42,420 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 16:22:42,440 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 04:22:42 BoogieIcfgContainer [2018-11-18 16:22:42,440 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 16:22:42,440 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 16:22:42,440 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 16:22:42,440 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 16:22:42,441 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:22:30" (3/4) ... [2018-11-18 16:22:42,444 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-18 16:22:42,444 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 16:22:42,445 INFO L168 Benchmark]: Toolchain (without parser) took 12209.01 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 185.1 MB). Free memory was 959.1 MB in the beginning and 1.0 GB in the end (delta: -44.5 MB). Peak memory consumption was 140.5 MB. Max. memory is 11.5 GB. [2018-11-18 16:22:42,446 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:22:42,446 INFO L168 Benchmark]: CACSL2BoogieTranslator took 193.47 ms. Allocated memory is still 1.0 GB. Free memory was 959.1 MB in the beginning and 945.7 MB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. [2018-11-18 16:22:42,446 INFO L168 Benchmark]: Boogie Procedure Inliner took 19.09 ms. Allocated memory is still 1.0 GB. Free memory is still 943.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:22:42,446 INFO L168 Benchmark]: Boogie Preprocessor took 60.25 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 943.0 MB in the beginning and 1.1 GB in the end (delta: -191.4 MB). Peak memory consumption was 14.3 MB. Max. memory is 11.5 GB. [2018-11-18 16:22:42,447 INFO L168 Benchmark]: RCFGBuilder took 253.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 22.4 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. [2018-11-18 16:22:42,447 INFO L168 Benchmark]: TraceAbstraction took 11675.85 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 50.9 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 108.3 MB). Peak memory consumption was 159.2 MB. Max. memory is 11.5 GB. [2018-11-18 16:22:42,448 INFO L168 Benchmark]: Witness Printer took 4.19 ms. Allocated memory is still 1.2 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:22:42,451 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 193.47 ms. Allocated memory is still 1.0 GB. Free memory was 959.1 MB in the beginning and 945.7 MB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 19.09 ms. Allocated memory is still 1.0 GB. Free memory is still 943.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 60.25 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.2 MB). Free memory was 943.0 MB in the beginning and 1.1 GB in the end (delta: -191.4 MB). Peak memory consumption was 14.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 253.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 22.4 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 11675.85 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 50.9 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 108.3 MB). Peak memory consumption was 159.2 MB. Max. memory is 11.5 GB. * Witness Printer took 4.19 ms. Allocated memory is still 1.2 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 100, overapproximation of bitwiseAnd at line 98. Possible FailurePath: [L215] unsigned int a ; [L216] unsigned int ma = __VERIFIER_nondet_uint(); [L217] signed char ea = __VERIFIER_nondet_char(); [L218] unsigned int b ; [L219] unsigned int mb = __VERIFIER_nondet_uint(); [L220] signed char eb = __VERIFIER_nondet_char(); [L221] unsigned int r_add1 ; [L222] unsigned int r_add2 ; [L223] unsigned int zero ; [L224] int tmp ; [L225] int tmp___0 ; [L226] int __retres14 ; VAL [ea=127, eb=0, ma=33554432, mb=16777216] [L230] CALL, EXPR base2flt(0, 0) VAL [\old(e)=0, \old(m)=0] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=0, e=0, m=0] [L19] COND TRUE ! m [L20] __retres4 = 0U VAL [\old(e)=0, \old(m)=0, __retres4=0, e=0, m=0] [L70] RET return (__retres4); VAL [\old(e)=0, \old(m)=0, \result=0, __retres4=0, e=0, m=0] [L230] EXPR base2flt(0, 0) VAL [base2flt(0, 0)=0, ea=127, eb=0, ma=33554432, mb=16777216] [L230] zero = base2flt(0, 0) [L231] CALL, EXPR base2flt(ma, ea) VAL [\old(e)=127, \old(m)=33554432] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L19] COND FALSE !(! m) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L47] COND TRUE 1 VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L49] COND TRUE m >= 1U << 25U VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U VAL [\old(e)=127, \old(m)=33554432, __retres4=4294967295, e=127, m=33554432] [L70] RET return (__retres4); VAL [\old(e)=127, \old(m)=33554432, \result=4294967295, __retres4=4294967295, e=127, m=33554432] [L231] EXPR base2flt(ma, ea) VAL [base2flt(ma, ea)=4294967295, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L231] a = base2flt(ma, ea) [L232] CALL, EXPR base2flt(mb, eb) VAL [\old(e)=0, \old(m)=16777216] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L19] COND FALSE !(! m) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L47] COND TRUE 1 VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L49] COND FALSE !(m >= 1U << 25U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L66] m = m & ~ (1U << 24U) [L67] res = m | (unsigned int )((e + 128) << 24U) [L68] __retres4 = res VAL [\old(e)=0, \old(m)=16777216, __retres4=4278190080, e=0, res=4278190080] [L70] RET return (__retres4); VAL [\old(e)=0, \old(m)=16777216, \result=36028797002186752, __retres4=4278190080, e=0, res=4278190080] [L232] EXPR base2flt(mb, eb) VAL [a=4294967295, base2flt(mb, eb)=36028797002186752, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L232] b = base2flt(mb, eb) [L233] CALL addflt(a, b) VAL [\old(a)=4294967295, \old(b)=4278190080] [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L84] COND FALSE !(a < b) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] eb = (int )(b >> 24U) - 128 [L103] mb = mb | (1U << 24U) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080, ea=127, eb=2147483519] [L104] CALL __VERIFIER_assert(ea >= eb) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 58 locations, 1 error locations. UNSAFE Result, 11.6s OverallTime, 8 OverallIterations, 3 TraceHistogramMax, 2.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 606 SDtfs, 308 SDslu, 4780 SDs, 0 SdLazy, 908 SolverSat, 46 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 2 DeclaredPredicates, 446 GetRequests, 314 SyntacticMatches, 3 SemanticMatches, 129 ConstructedPredicates, 5 IntricatePredicates, 1 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 9.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=149occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.2s AbstIntTime, 4 AbstIntIterations, 1 AbstIntStrong, 0.5444444444444445 AbsIntWeakeningRatio, 1.8484848484848484 AbsIntAvgWeakeningVarsNumRemoved, 1.0 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 7 MinimizatonAttempts, 129 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 8.5s InterpolantComputationTime, 488 NumberOfCodeBlocks, 469 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 590 ConstructedInterpolants, 26 QuantifiedInterpolants, 62787 SizeOfPredicates, 19 NumberOfNonLiveVariables, 431 ConjunctsInSsa, 71 ConjunctsInUnsatCore, 15 InterpolantComputations, 4 PerfectInterpolantSequences, 198/247 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-5842f4b [2018-11-18 16:22:43,867 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 16:22:43,868 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 16:22:43,875 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 16:22:43,875 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 16:22:43,876 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 16:22:43,877 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 16:22:43,878 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 16:22:43,879 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 16:22:43,880 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 16:22:43,880 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 16:22:43,880 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 16:22:43,881 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 16:22:43,882 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 16:22:43,883 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 16:22:43,883 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 16:22:43,884 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 16:22:43,886 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 16:22:43,887 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 16:22:43,888 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 16:22:43,889 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 16:22:43,890 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 16:22:43,892 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 16:22:43,892 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 16:22:43,892 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 16:22:43,893 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 16:22:43,894 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 16:22:43,895 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 16:22:43,895 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 16:22:43,896 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 16:22:43,896 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 16:22:43,896 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 16:22:43,897 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 16:22:43,897 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 16:22:43,898 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 16:22:43,898 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 16:22:43,898 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-11-18 16:22:43,909 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 16:22:43,909 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 16:22:43,910 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 16:22:43,910 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 16:22:43,910 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 16:22:43,910 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 16:22:43,910 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 16:22:43,910 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 16:22:43,910 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 16:22:43,911 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 16:22:43,911 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 16:22:43,911 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 16:22:43,911 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 16:22:43,911 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 16:22:43,911 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 16:22:43,912 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 16:22:43,914 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 16:22:43,914 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 16:22:43,914 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 16:22:43,914 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 16:22:43,914 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:22:43,915 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 16:22:43,915 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-11-18 16:22:43,942 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 16:22:43,950 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 16:22:43,952 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 16:22:43,953 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 16:22:43,953 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 16:22:43,953 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-18 16:22:43,989 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/3e320435e/ef5347f0b0264185bf6c8cf53cf21488/FLAG9b42d8552 [2018-11-18 16:22:44,313 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 16:22:44,314 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-18 16:22:44,319 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/3e320435e/ef5347f0b0264185bf6c8cf53cf21488/FLAG9b42d8552 [2018-11-18 16:22:44,328 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/data/3e320435e/ef5347f0b0264185bf6c8cf53cf21488 [2018-11-18 16:22:44,331 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 16:22:44,332 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 16:22:44,333 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 16:22:44,333 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 16:22:44,335 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 16:22:44,336 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,338 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a4379e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44, skipping insertion in model container [2018-11-18 16:22:44,338 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,344 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 16:22:44,365 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 16:22:44,523 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:22:44,526 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 16:22:44,553 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 16:22:44,562 INFO L195 MainTranslator]: Completed translation [2018-11-18 16:22:44,562 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44 WrapperNode [2018-11-18 16:22:44,563 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 16:22:44,563 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 16:22:44,563 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 16:22:44,563 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 16:22:44,569 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,575 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,579 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 16:22:44,579 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 16:22:44,579 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 16:22:44,579 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 16:22:44,585 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,585 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,587 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,587 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,594 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,599 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,600 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... [2018-11-18 16:22:44,602 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 16:22:44,603 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 16:22:44,603 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 16:22:44,603 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 16:22:44,604 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 16:22:44,675 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 16:22:44,676 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 16:22:44,676 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-11-18 16:22:44,676 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-11-18 16:22:44,676 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 16:22:44,676 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 16:22:44,676 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 16:22:44,676 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 16:22:44,676 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-11-18 16:22:44,677 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-11-18 16:22:44,677 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-18 16:22:44,677 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-18 16:22:44,903 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 16:22:44,903 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:22:44 BoogieIcfgContainer [2018-11-18 16:22:44,903 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 16:22:44,904 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 16:22:44,904 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 16:22:44,907 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 16:22:44,907 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 04:22:44" (1/3) ... [2018-11-18 16:22:44,908 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@155f5d61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:22:44, skipping insertion in model container [2018-11-18 16:22:44,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:22:44" (2/3) ... [2018-11-18 16:22:44,908 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@155f5d61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:22:44, skipping insertion in model container [2018-11-18 16:22:44,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:22:44" (3/3) ... [2018-11-18 16:22:44,910 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-11-18 16:22:44,915 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 16:22:44,920 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 16:22:44,933 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 16:22:44,955 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 16:22:44,955 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 16:22:44,955 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 16:22:44,955 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 16:22:44,955 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 16:22:44,955 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 16:22:44,956 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 16:22:44,956 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 16:22:44,956 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 16:22:44,966 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states. [2018-11-18 16:22:44,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-18 16:22:44,970 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:44,971 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:44,972 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:44,975 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:44,975 INFO L82 PathProgramCache]: Analyzing trace with hash -926055278, now seen corresponding path program 1 times [2018-11-18 16:22:44,978 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:44,978 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:44,991 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:45,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:45,039 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:45,162 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:45,162 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:45,225 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:45,230 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:45,230 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:45,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:45,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:45,259 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:45,266 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:45,266 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:45,313 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:45,332 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:22:45,332 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 9 [2018-11-18 16:22:45,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:22:45,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:22:45,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:22:45,345 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 9 states. [2018-11-18 16:22:45,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:45,508 INFO L93 Difference]: Finished difference Result 140 states and 208 transitions. [2018-11-18 16:22:45,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 16:22:45,509 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-11-18 16:22:45,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:45,519 INFO L225 Difference]: With dead ends: 140 [2018-11-18 16:22:45,519 INFO L226 Difference]: Without dead ends: 80 [2018-11-18 16:22:45,523 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:22:45,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-11-18 16:22:45,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 66. [2018-11-18 16:22:45,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-11-18 16:22:45,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 88 transitions. [2018-11-18 16:22:45,555 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 88 transitions. Word has length 34 [2018-11-18 16:22:45,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:45,555 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 88 transitions. [2018-11-18 16:22:45,556 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:22:45,556 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 88 transitions. [2018-11-18 16:22:45,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:22:45,557 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:45,557 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:45,557 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:45,558 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:45,558 INFO L82 PathProgramCache]: Analyzing trace with hash 866979360, now seen corresponding path program 1 times [2018-11-18 16:22:45,558 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:45,558 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:45,569 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:45,591 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:45,656 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:45,656 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:45,726 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:45,727 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:45,728 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:45,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:45,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:45,762 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:45,879 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-18 16:22:45,879 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:46,024 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:46,046 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:22:46,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [8, 8, 12] total 18 [2018-11-18 16:22:46,047 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 16:22:46,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 16:22:46,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2018-11-18 16:22:46,047 INFO L87 Difference]: Start difference. First operand 66 states and 88 transitions. Second operand 18 states. [2018-11-18 16:22:46,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:46,441 INFO L93 Difference]: Finished difference Result 171 states and 236 transitions. [2018-11-18 16:22:46,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 16:22:46,441 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-11-18 16:22:46,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:46,444 INFO L225 Difference]: With dead ends: 171 [2018-11-18 16:22:46,444 INFO L226 Difference]: Without dead ends: 141 [2018-11-18 16:22:46,444 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 134 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=466, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:22:46,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-11-18 16:22:46,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 94. [2018-11-18 16:22:46,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-18 16:22:46,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 128 transitions. [2018-11-18 16:22:46,457 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 128 transitions. Word has length 39 [2018-11-18 16:22:46,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:46,457 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 128 transitions. [2018-11-18 16:22:46,458 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 16:22:46,458 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 128 transitions. [2018-11-18 16:22:46,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-18 16:22:46,459 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:46,459 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:46,459 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:46,459 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:46,459 INFO L82 PathProgramCache]: Analyzing trace with hash -1106005862, now seen corresponding path program 1 times [2018-11-18 16:22:46,460 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:46,460 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:46,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:46,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:46,492 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:46,535 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:46,535 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:46,536 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:46,536 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:22:46,536 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:22:46,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:22:46,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:22:46,537 INFO L87 Difference]: Start difference. First operand 94 states and 128 transitions. Second operand 8 states. [2018-11-18 16:22:46,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:46,590 INFO L93 Difference]: Finished difference Result 151 states and 204 transitions. [2018-11-18 16:22:46,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:22:46,590 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2018-11-18 16:22:46,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:46,592 INFO L225 Difference]: With dead ends: 151 [2018-11-18 16:22:46,592 INFO L226 Difference]: Without dead ends: 115 [2018-11-18 16:22:46,592 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:22:46,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-11-18 16:22:46,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 94. [2018-11-18 16:22:46,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-18 16:22:46,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 128 transitions. [2018-11-18 16:22:46,605 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 128 transitions. Word has length 39 [2018-11-18 16:22:46,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:46,606 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 128 transitions. [2018-11-18 16:22:46,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:22:46,606 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 128 transitions. [2018-11-18 16:22:46,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-18 16:22:46,607 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:46,607 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:46,607 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:46,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:46,607 INFO L82 PathProgramCache]: Analyzing trace with hash -279422863, now seen corresponding path program 1 times [2018-11-18 16:22:46,607 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:46,607 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:46,619 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:46,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:46,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:46,683 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-18 16:22:46,683 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:46,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:46,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:22:46,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:22:46,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:22:46,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:22:46,685 INFO L87 Difference]: Start difference. First operand 94 states and 128 transitions. Second operand 9 states. [2018-11-18 16:22:46,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:46,780 INFO L93 Difference]: Finished difference Result 138 states and 184 transitions. [2018-11-18 16:22:46,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 16:22:46,781 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-11-18 16:22:46,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:46,782 INFO L225 Difference]: With dead ends: 138 [2018-11-18 16:22:46,783 INFO L226 Difference]: Without dead ends: 117 [2018-11-18 16:22:46,783 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:22:46,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-11-18 16:22:46,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 102. [2018-11-18 16:22:46,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-18 16:22:46,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 137 transitions. [2018-11-18 16:22:46,796 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 137 transitions. Word has length 42 [2018-11-18 16:22:46,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:46,796 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 137 transitions. [2018-11-18 16:22:46,796 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:22:46,797 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 137 transitions. [2018-11-18 16:22:46,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:46,798 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:46,798 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:46,799 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:46,799 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:46,799 INFO L82 PathProgramCache]: Analyzing trace with hash 587780900, now seen corresponding path program 1 times [2018-11-18 16:22:46,799 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:46,800 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:46,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:46,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:46,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:46,946 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:22:46,946 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:46,948 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:46,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-18 16:22:46,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 16:22:46,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 16:22:46,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:22:46,948 INFO L87 Difference]: Start difference. First operand 102 states and 137 transitions. Second operand 13 states. [2018-11-18 16:22:47,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:47,130 INFO L93 Difference]: Finished difference Result 183 states and 248 transitions. [2018-11-18 16:22:47,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:22:47,131 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 44 [2018-11-18 16:22:47,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:47,132 INFO L225 Difference]: With dead ends: 183 [2018-11-18 16:22:47,133 INFO L226 Difference]: Without dead ends: 152 [2018-11-18 16:22:47,133 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:22:47,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-11-18 16:22:47,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 136. [2018-11-18 16:22:47,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-18 16:22:47,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 178 transitions. [2018-11-18 16:22:47,148 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 178 transitions. Word has length 44 [2018-11-18 16:22:47,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:47,148 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 178 transitions. [2018-11-18 16:22:47,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 16:22:47,148 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 178 transitions. [2018-11-18 16:22:47,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:47,149 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:47,149 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:47,149 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:47,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:47,150 INFO L82 PathProgramCache]: Analyzing trace with hash 2111212904, now seen corresponding path program 1 times [2018-11-18 16:22:47,150 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:47,150 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:47,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:47,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:47,193 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:47,264 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:47,264 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:47,409 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:47,409 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:47,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:47,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:47,426 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:47,436 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:47,437 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:47,458 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:22:47,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-18 16:22:47,458 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:22:47,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:22:47,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:22:47,459 INFO L87 Difference]: Start difference. First operand 136 states and 178 transitions. Second operand 11 states. [2018-11-18 16:22:47,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:47,680 INFO L93 Difference]: Finished difference Result 195 states and 249 transitions. [2018-11-18 16:22:47,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 16:22:47,680 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 44 [2018-11-18 16:22:47,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:47,682 INFO L225 Difference]: With dead ends: 195 [2018-11-18 16:22:47,682 INFO L226 Difference]: Without dead ends: 164 [2018-11-18 16:22:47,682 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2018-11-18 16:22:47,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-11-18 16:22:47,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 144. [2018-11-18 16:22:47,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-11-18 16:22:47,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 183 transitions. [2018-11-18 16:22:47,695 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 183 transitions. Word has length 44 [2018-11-18 16:22:47,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:47,696 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 183 transitions. [2018-11-18 16:22:47,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:22:47,696 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 183 transitions. [2018-11-18 16:22:47,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:47,698 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:47,698 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:47,698 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:47,698 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:47,698 INFO L82 PathProgramCache]: Analyzing trace with hash 1014208042, now seen corresponding path program 1 times [2018-11-18 16:22:47,698 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:47,699 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:47,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:47,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:47,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:47,846 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:47,846 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:47,848 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:47,848 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-18 16:22:47,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 16:22:47,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 16:22:47,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:22:47,849 INFO L87 Difference]: Start difference. First operand 144 states and 183 transitions. Second operand 12 states. [2018-11-18 16:22:48,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:48,138 INFO L93 Difference]: Finished difference Result 222 states and 287 transitions. [2018-11-18 16:22:48,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-18 16:22:48,139 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 44 [2018-11-18 16:22:48,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:48,140 INFO L225 Difference]: With dead ends: 222 [2018-11-18 16:22:48,140 INFO L226 Difference]: Without dead ends: 192 [2018-11-18 16:22:48,141 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2018-11-18 16:22:48,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-11-18 16:22:48,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 172. [2018-11-18 16:22:48,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-18 16:22:48,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 216 transitions. [2018-11-18 16:22:48,156 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 216 transitions. Word has length 44 [2018-11-18 16:22:48,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:48,156 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 216 transitions. [2018-11-18 16:22:48,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 16:22:48,156 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 216 transitions. [2018-11-18 16:22:48,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:48,157 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:48,157 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:48,158 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:48,158 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:48,158 INFO L82 PathProgramCache]: Analyzing trace with hash -1757327250, now seen corresponding path program 1 times [2018-11-18 16:22:48,158 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:48,158 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:48,174 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:48,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:48,218 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:48,247 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:22:48,247 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:48,248 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:48,249 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 16:22:48,249 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 16:22:48,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 16:22:48,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 16:22:48,249 INFO L87 Difference]: Start difference. First operand 172 states and 216 transitions. Second operand 6 states. [2018-11-18 16:22:50,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:50,252 INFO L93 Difference]: Finished difference Result 217 states and 271 transitions. [2018-11-18 16:22:50,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 16:22:50,253 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-11-18 16:22:50,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:50,254 INFO L225 Difference]: With dead ends: 217 [2018-11-18 16:22:50,254 INFO L226 Difference]: Without dead ends: 215 [2018-11-18 16:22:50,255 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:22:50,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-11-18 16:22:50,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 178. [2018-11-18 16:22:50,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-11-18 16:22:50,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 223 transitions. [2018-11-18 16:22:50,268 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 223 transitions. Word has length 44 [2018-11-18 16:22:50,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:50,268 INFO L480 AbstractCegarLoop]: Abstraction has 178 states and 223 transitions. [2018-11-18 16:22:50,268 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 16:22:50,268 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 223 transitions. [2018-11-18 16:22:50,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 16:22:50,270 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:50,270 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:50,270 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:50,270 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:50,270 INFO L82 PathProgramCache]: Analyzing trace with hash -1700068948, now seen corresponding path program 2 times [2018-11-18 16:22:50,270 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:50,270 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:50,290 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:22:50,309 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-18 16:22:50,309 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:22:50,312 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:50,343 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:22:50,343 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:50,345 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:50,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 16:22:50,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 16:22:50,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 16:22:50,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 16:22:50,345 INFO L87 Difference]: Start difference. First operand 178 states and 223 transitions. Second operand 6 states. [2018-11-18 16:22:52,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:52,448 INFO L93 Difference]: Finished difference Result 184 states and 228 transitions. [2018-11-18 16:22:52,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 16:22:52,450 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-11-18 16:22:52,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:52,451 INFO L225 Difference]: With dead ends: 184 [2018-11-18 16:22:52,451 INFO L226 Difference]: Without dead ends: 182 [2018-11-18 16:22:52,452 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:22:52,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-11-18 16:22:52,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 176. [2018-11-18 16:22:52,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-11-18 16:22:52,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 219 transitions. [2018-11-18 16:22:52,466 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 219 transitions. Word has length 44 [2018-11-18 16:22:52,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:52,467 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 219 transitions. [2018-11-18 16:22:52,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 16:22:52,467 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 219 transitions. [2018-11-18 16:22:52,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:22:52,468 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:52,468 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:52,468 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:52,468 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:52,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1322732898, now seen corresponding path program 1 times [2018-11-18 16:22:52,469 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:52,470 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:52,492 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:22:52,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:52,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:52,562 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:52,563 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:52,637 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:52,638 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:52,638 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:52,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:52,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:52,654 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:52,674 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:52,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:52,733 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:52,748 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:22:52,748 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 10 [2018-11-18 16:22:52,749 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-18 16:22:52,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-18 16:22:52,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-11-18 16:22:52,749 INFO L87 Difference]: Start difference. First operand 176 states and 219 transitions. Second operand 10 states. [2018-11-18 16:22:52,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:52,897 INFO L93 Difference]: Finished difference Result 233 states and 297 transitions. [2018-11-18 16:22:52,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:22:52,897 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 47 [2018-11-18 16:22:52,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:52,899 INFO L225 Difference]: With dead ends: 233 [2018-11-18 16:22:52,899 INFO L226 Difference]: Without dead ends: 222 [2018-11-18 16:22:52,899 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 174 SyntacticMatches, 7 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-11-18 16:22:52,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-11-18 16:22:52,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 190. [2018-11-18 16:22:52,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-11-18 16:22:52,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 238 transitions. [2018-11-18 16:22:52,916 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 238 transitions. Word has length 47 [2018-11-18 16:22:52,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:52,917 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 238 transitions. [2018-11-18 16:22:52,917 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-18 16:22:52,917 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 238 transitions. [2018-11-18 16:22:52,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-18 16:22:52,918 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:52,918 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:52,918 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:52,919 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:52,919 INFO L82 PathProgramCache]: Analyzing trace with hash -621668320, now seen corresponding path program 1 times [2018-11-18 16:22:52,919 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:52,919 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:52,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:52,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:52,952 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:52,996 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:52,996 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:53,096 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:53,101 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:53,101 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:53,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:53,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:53,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:53,161 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:53,161 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:53,176 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:22:53,176 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [10, 10] total 17 [2018-11-18 16:22:53,176 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 16:22:53,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 16:22:53,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:22:53,177 INFO L87 Difference]: Start difference. First operand 190 states and 238 transitions. Second operand 17 states. [2018-11-18 16:22:53,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:53,487 INFO L93 Difference]: Finished difference Result 259 states and 328 transitions. [2018-11-18 16:22:53,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 16:22:53,488 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-11-18 16:22:53,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:53,489 INFO L225 Difference]: With dead ends: 259 [2018-11-18 16:22:53,489 INFO L226 Difference]: Without dead ends: 252 [2018-11-18 16:22:53,490 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 124 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=539, Unknown=0, NotChecked=0, Total=650 [2018-11-18 16:22:53,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-11-18 16:22:53,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 209. [2018-11-18 16:22:53,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-11-18 16:22:53,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 264 transitions. [2018-11-18 16:22:53,512 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 264 transitions. Word has length 47 [2018-11-18 16:22:53,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:53,512 INFO L480 AbstractCegarLoop]: Abstraction has 209 states and 264 transitions. [2018-11-18 16:22:53,512 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 16:22:53,512 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 264 transitions. [2018-11-18 16:22:53,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:22:53,514 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:53,515 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:53,515 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:53,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:53,515 INFO L82 PathProgramCache]: Analyzing trace with hash -659491386, now seen corresponding path program 1 times [2018-11-18 16:22:53,515 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:53,515 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:53,535 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:53,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:53,556 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:53,646 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:53,646 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:53,791 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:53,793 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:53,794 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:53,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:53,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:53,824 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:53,903 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:53,903 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:53,947 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:53,963 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:22:53,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 11, 11] total 21 [2018-11-18 16:22:53,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-18 16:22:53,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-18 16:22:53,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2018-11-18 16:22:53,964 INFO L87 Difference]: Start difference. First operand 209 states and 264 transitions. Second operand 21 states. [2018-11-18 16:22:54,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:54,492 INFO L93 Difference]: Finished difference Result 306 states and 391 transitions. [2018-11-18 16:22:54,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 16:22:54,492 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-11-18 16:22:54,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:54,493 INFO L225 Difference]: With dead ends: 306 [2018-11-18 16:22:54,493 INFO L226 Difference]: Without dead ends: 273 [2018-11-18 16:22:54,494 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=132, Invalid=798, Unknown=0, NotChecked=0, Total=930 [2018-11-18 16:22:54,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-11-18 16:22:54,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 230. [2018-11-18 16:22:54,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-11-18 16:22:54,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 291 transitions. [2018-11-18 16:22:54,511 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 291 transitions. Word has length 49 [2018-11-18 16:22:54,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:54,511 INFO L480 AbstractCegarLoop]: Abstraction has 230 states and 291 transitions. [2018-11-18 16:22:54,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-18 16:22:54,511 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 291 transitions. [2018-11-18 16:22:54,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-18 16:22:54,512 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:54,512 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:54,512 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:54,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:54,512 INFO L82 PathProgramCache]: Analyzing trace with hash -602233084, now seen corresponding path program 1 times [2018-11-18 16:22:54,513 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:54,513 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:54,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:54,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:54,566 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:54,582 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:22:54,582 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:54,583 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:54,583 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 16:22:54,584 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 16:22:54,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 16:22:54,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 16:22:54,584 INFO L87 Difference]: Start difference. First operand 230 states and 291 transitions. Second operand 6 states. [2018-11-18 16:22:54,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:54,626 INFO L93 Difference]: Finished difference Result 238 states and 298 transitions. [2018-11-18 16:22:54,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 16:22:54,626 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 49 [2018-11-18 16:22:54,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:54,627 INFO L225 Difference]: With dead ends: 238 [2018-11-18 16:22:54,627 INFO L226 Difference]: Without dead ends: 211 [2018-11-18 16:22:54,628 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-11-18 16:22:54,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-11-18 16:22:54,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 203. [2018-11-18 16:22:54,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-11-18 16:22:54,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 255 transitions. [2018-11-18 16:22:54,640 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 255 transitions. Word has length 49 [2018-11-18 16:22:54,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:54,640 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 255 transitions. [2018-11-18 16:22:54,640 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 16:22:54,640 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 255 transitions. [2018-11-18 16:22:54,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:22:54,641 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:54,641 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:54,641 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:54,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:54,642 INFO L82 PathProgramCache]: Analyzing trace with hash 300383676, now seen corresponding path program 1 times [2018-11-18 16:22:54,642 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:54,642 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:54,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:54,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:54,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:54,741 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:54,742 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:54,861 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:54,863 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:54,863 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:54,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:54,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:54,879 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:54,883 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:54,883 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:54,960 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:54,976 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:22:54,976 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12] total 16 [2018-11-18 16:22:54,976 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-18 16:22:54,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-18 16:22:54,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-11-18 16:22:54,976 INFO L87 Difference]: Start difference. First operand 203 states and 255 transitions. Second operand 16 states. [2018-11-18 16:22:55,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:55,383 INFO L93 Difference]: Finished difference Result 275 states and 370 transitions. [2018-11-18 16:22:55,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-18 16:22:55,384 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 52 [2018-11-18 16:22:55,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:55,385 INFO L225 Difference]: With dead ends: 275 [2018-11-18 16:22:55,385 INFO L226 Difference]: Without dead ends: 266 [2018-11-18 16:22:55,386 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 188 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=554, Unknown=0, NotChecked=0, Total=650 [2018-11-18 16:22:55,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states. [2018-11-18 16:22:55,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 219. [2018-11-18 16:22:55,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2018-11-18 16:22:55,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 279 transitions. [2018-11-18 16:22:55,412 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 279 transitions. Word has length 52 [2018-11-18 16:22:55,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:55,413 INFO L480 AbstractCegarLoop]: Abstraction has 219 states and 279 transitions. [2018-11-18 16:22:55,413 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-18 16:22:55,413 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 279 transitions. [2018-11-18 16:22:55,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:22:55,413 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:55,414 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:55,414 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:55,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:55,414 INFO L82 PathProgramCache]: Analyzing trace with hash -1885236744, now seen corresponding path program 1 times [2018-11-18 16:22:55,414 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:55,414 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:55,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:55,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:55,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:55,543 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:55,543 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:55,784 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:55,785 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:55,785 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:55,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:55,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:55,812 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:55,816 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:55,816 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:55,894 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:22:55,909 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:22:55,909 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-11-18 16:22:55,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 16:22:55,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 16:22:55,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:22:55,910 INFO L87 Difference]: Start difference. First operand 219 states and 279 transitions. Second operand 24 states. [2018-11-18 16:22:56,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:56,661 INFO L93 Difference]: Finished difference Result 298 states and 409 transitions. [2018-11-18 16:22:56,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-18 16:22:56,662 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 52 [2018-11-18 16:22:56,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:56,664 INFO L225 Difference]: With dead ends: 298 [2018-11-18 16:22:56,664 INFO L226 Difference]: Without dead ends: 264 [2018-11-18 16:22:56,664 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 222 GetRequests, 181 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=199, Invalid=1361, Unknown=0, NotChecked=0, Total=1560 [2018-11-18 16:22:56,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-11-18 16:22:56,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 211. [2018-11-18 16:22:56,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-11-18 16:22:56,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 281 transitions. [2018-11-18 16:22:56,681 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 281 transitions. Word has length 52 [2018-11-18 16:22:56,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:56,682 INFO L480 AbstractCegarLoop]: Abstraction has 211 states and 281 transitions. [2018-11-18 16:22:56,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 16:22:56,682 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 281 transitions. [2018-11-18 16:22:56,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:22:56,683 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:56,683 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:56,683 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:56,683 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:56,683 INFO L82 PathProgramCache]: Analyzing trace with hash 580231120, now seen corresponding path program 2 times [2018-11-18 16:22:56,683 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:56,683 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:56,697 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:22:56,714 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:22:56,714 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:22:56,717 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:56,780 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:56,781 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:56,899 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:56,900 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:56,900 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:56,907 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:22:56,933 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:22:56,933 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:22:56,934 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:56,942 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:56,942 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:57,013 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-18 16:22:57,028 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:22:57,029 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 14 [2018-11-18 16:22:57,029 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-18 16:22:57,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-18 16:22:57,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-11-18 16:22:57,029 INFO L87 Difference]: Start difference. First operand 211 states and 281 transitions. Second operand 14 states. [2018-11-18 16:22:57,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:57,423 INFO L93 Difference]: Finished difference Result 269 states and 383 transitions. [2018-11-18 16:22:57,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 16:22:57,424 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 52 [2018-11-18 16:22:57,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:57,426 INFO L225 Difference]: With dead ends: 269 [2018-11-18 16:22:57,426 INFO L226 Difference]: Without dead ends: 262 [2018-11-18 16:22:57,427 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 192 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2018-11-18 16:22:57,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-11-18 16:22:57,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 215. [2018-11-18 16:22:57,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2018-11-18 16:22:57,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 287 transitions. [2018-11-18 16:22:57,460 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 287 transitions. Word has length 52 [2018-11-18 16:22:57,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:57,461 INFO L480 AbstractCegarLoop]: Abstraction has 215 states and 287 transitions. [2018-11-18 16:22:57,462 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-18 16:22:57,462 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 287 transitions. [2018-11-18 16:22:57,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:22:57,462 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:57,463 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:57,463 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:57,463 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:57,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1534294561, now seen corresponding path program 1 times [2018-11-18 16:22:57,463 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:57,463 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:57,484 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:22:57,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:57,534 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:57,666 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:22:57,666 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:22:57,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:22:57,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-18 16:22:57,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-18 16:22:57,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-18 16:22:57,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-11-18 16:22:57,670 INFO L87 Difference]: Start difference. First operand 215 states and 287 transitions. Second operand 13 states. [2018-11-18 16:22:57,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:22:57,815 INFO L93 Difference]: Finished difference Result 266 states and 356 transitions. [2018-11-18 16:22:57,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 16:22:57,815 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 52 [2018-11-18 16:22:57,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:22:57,816 INFO L225 Difference]: With dead ends: 266 [2018-11-18 16:22:57,816 INFO L226 Difference]: Without dead ends: 224 [2018-11-18 16:22:57,817 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:22:57,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-11-18 16:22:57,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 206. [2018-11-18 16:22:57,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-11-18 16:22:57,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 271 transitions. [2018-11-18 16:22:57,851 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 271 transitions. Word has length 52 [2018-11-18 16:22:57,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:22:57,852 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 271 transitions. [2018-11-18 16:22:57,852 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-18 16:22:57,852 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 271 transitions. [2018-11-18 16:22:57,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:22:57,852 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:22:57,853 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:22:57,853 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:22:57,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:22:57,853 INFO L82 PathProgramCache]: Analyzing trace with hash -1273712539, now seen corresponding path program 1 times [2018-11-18 16:22:57,853 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:22:57,853 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:22:57,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:57,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:57,922 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:58,116 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:58,117 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:58,220 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:22:58,220 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:22:58,226 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:22:58,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:22:58,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:22:58,282 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:22:58,282 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:22:58,346 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:22:58,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-11-18 16:22:58,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:22:58,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:22:58,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-11-18 16:22:58,347 INFO L87 Difference]: Start difference. First operand 206 states and 271 transitions. Second operand 11 states. [2018-11-18 16:23:00,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:23:00,942 INFO L93 Difference]: Finished difference Result 270 states and 352 transitions. [2018-11-18 16:23:00,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 16:23:00,943 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 52 [2018-11-18 16:23:00,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:23:00,944 INFO L225 Difference]: With dead ends: 270 [2018-11-18 16:23:00,944 INFO L226 Difference]: Without dead ends: 219 [2018-11-18 16:23:00,945 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-11-18 16:23:00,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-11-18 16:23:00,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 207. [2018-11-18 16:23:00,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-11-18 16:23:00,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 269 transitions. [2018-11-18 16:23:00,961 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 269 transitions. Word has length 52 [2018-11-18 16:23:00,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:23:00,961 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 269 transitions. [2018-11-18 16:23:00,961 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:23:00,961 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 269 transitions. [2018-11-18 16:23:00,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:23:00,962 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:23:00,962 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:23:00,962 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:23:00,962 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:23:00,962 INFO L82 PathProgramCache]: Analyzing trace with hash -1880911852, now seen corresponding path program 2 times [2018-11-18 16:23:00,962 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:23:00,963 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:23:00,982 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:23:01,000 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:23:01,000 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:23:01,003 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:23:01,095 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:23:01,095 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:23:01,417 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:23:01,418 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:23:01,418 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:23:01,424 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:23:01,443 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:23:01,443 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:23:01,445 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:23:01,448 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:23:01,448 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:23:01,538 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 16:23:01,553 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:23:01,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13] total 24 [2018-11-18 16:23:01,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 16:23:01,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 16:23:01,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:23:01,554 INFO L87 Difference]: Start difference. First operand 207 states and 269 transitions. Second operand 24 states. [2018-11-18 16:23:02,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:23:02,486 INFO L93 Difference]: Finished difference Result 259 states and 343 transitions. [2018-11-18 16:23:02,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-18 16:23:02,487 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 52 [2018-11-18 16:23:02,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:23:02,488 INFO L225 Difference]: With dead ends: 259 [2018-11-18 16:23:02,488 INFO L226 Difference]: Without dead ends: 220 [2018-11-18 16:23:02,489 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 181 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=184, Invalid=1298, Unknown=0, NotChecked=0, Total=1482 [2018-11-18 16:23:02,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-11-18 16:23:02,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 181. [2018-11-18 16:23:02,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-11-18 16:23:02,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 238 transitions. [2018-11-18 16:23:02,513 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 238 transitions. Word has length 52 [2018-11-18 16:23:02,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:23:02,513 INFO L480 AbstractCegarLoop]: Abstraction has 181 states and 238 transitions. [2018-11-18 16:23:02,513 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 16:23:02,514 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 238 transitions. [2018-11-18 16:23:02,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:23:02,514 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:23:02,514 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:23:02,515 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:23:02,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:23:02,515 INFO L82 PathProgramCache]: Analyzing trace with hash 84268839, now seen corresponding path program 1 times [2018-11-18 16:23:02,515 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:23:02,515 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:23:02,526 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:23:02,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:02,557 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:23:04,666 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-18 16:23:04,666 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:23:04,667 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:23:04,667 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-18 16:23:04,667 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 16:23:04,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 16:23:04,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=110, Unknown=1, NotChecked=0, Total=132 [2018-11-18 16:23:04,668 INFO L87 Difference]: Start difference. First operand 181 states and 238 transitions. Second operand 12 states. [2018-11-18 16:23:14,056 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-18 16:23:19,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:23:19,547 INFO L93 Difference]: Finished difference Result 244 states and 319 transitions. [2018-11-18 16:23:19,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-18 16:23:19,548 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-11-18 16:23:19,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:23:19,549 INFO L225 Difference]: With dead ends: 244 [2018-11-18 16:23:19,549 INFO L226 Difference]: Without dead ends: 193 [2018-11-18 16:23:19,549 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 15.1s TimeCoverageRelationStatistics Valid=100, Invalid=401, Unknown=5, NotChecked=0, Total=506 [2018-11-18 16:23:19,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-11-18 16:23:19,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 176. [2018-11-18 16:23:19,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-11-18 16:23:19,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 231 transitions. [2018-11-18 16:23:19,569 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 231 transitions. Word has length 52 [2018-11-18 16:23:19,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:23:19,570 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 231 transitions. [2018-11-18 16:23:19,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 16:23:19,570 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 231 transitions. [2018-11-18 16:23:19,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-18 16:23:19,571 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:23:19,571 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:23:19,571 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:23:19,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:23:19,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1571229035, now seen corresponding path program 1 times [2018-11-18 16:23:19,571 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:23:19,571 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:23:19,587 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:23:19,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:19,620 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:23:25,879 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:23:25,879 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:23:25,881 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:23:25,881 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:23:25,881 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:23:25,881 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:23:25,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=37, Unknown=3, NotChecked=0, Total=56 [2018-11-18 16:23:25,882 INFO L87 Difference]: Start difference. First operand 176 states and 231 transitions. Second operand 8 states. [2018-11-18 16:23:37,042 WARN L180 SmtUtils]: Spent 5.10 s on a formula simplification. DAG size of input: 25 DAG size of output: 17 [2018-11-18 16:23:37,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:23:37,225 INFO L93 Difference]: Finished difference Result 193 states and 253 transitions. [2018-11-18 16:23:37,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 16:23:37,226 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-11-18 16:23:37,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:23:37,227 INFO L225 Difference]: With dead ends: 193 [2018-11-18 16:23:37,227 INFO L226 Difference]: Without dead ends: 191 [2018-11-18 16:23:37,227 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=25, Invalid=62, Unknown=3, NotChecked=0, Total=90 [2018-11-18 16:23:37,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-11-18 16:23:37,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 181. [2018-11-18 16:23:37,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-11-18 16:23:37,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 236 transitions. [2018-11-18 16:23:37,251 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 236 transitions. Word has length 52 [2018-11-18 16:23:37,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:23:37,252 INFO L480 AbstractCegarLoop]: Abstraction has 181 states and 236 transitions. [2018-11-18 16:23:37,252 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:23:37,252 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 236 transitions. [2018-11-18 16:23:37,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-18 16:23:37,253 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:23:37,253 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:23:37,253 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:23:37,253 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:23:37,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1228823104, now seen corresponding path program 1 times [2018-11-18 16:23:37,254 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:23:37,254 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:23:37,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:23:37,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:23:37,319 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:23:47,061 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:23:47,061 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:23:47,063 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:23:47,063 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-18 16:23:47,063 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-18 16:23:47,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-18 16:23:47,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=37, Unknown=4, NotChecked=0, Total=56 [2018-11-18 16:23:47,064 INFO L87 Difference]: Start difference. First operand 181 states and 236 transitions. Second operand 8 states. [2018-11-18 16:24:04,037 WARN L180 SmtUtils]: Spent 2.06 s on a formula simplification that was a NOOP. DAG size: 21 [2018-11-18 16:24:16,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:16,872 INFO L93 Difference]: Finished difference Result 197 states and 256 transitions. [2018-11-18 16:24:16,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-18 16:24:16,874 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 53 [2018-11-18 16:24:16,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:16,874 INFO L225 Difference]: With dead ends: 197 [2018-11-18 16:24:16,875 INFO L226 Difference]: Without dead ends: 193 [2018-11-18 16:24:16,875 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 15.8s TimeCoverageRelationStatistics Valid=23, Invalid=61, Unknown=6, NotChecked=0, Total=90 [2018-11-18 16:24:16,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-11-18 16:24:16,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 178. [2018-11-18 16:24:16,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-11-18 16:24:16,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 232 transitions. [2018-11-18 16:24:16,902 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 232 transitions. Word has length 53 [2018-11-18 16:24:16,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:16,902 INFO L480 AbstractCegarLoop]: Abstraction has 178 states and 232 transitions. [2018-11-18 16:24:16,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-18 16:24:16,902 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 232 transitions. [2018-11-18 16:24:16,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-18 16:24:16,903 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:16,904 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:16,904 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:16,904 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:16,904 INFO L82 PathProgramCache]: Analyzing trace with hash -1939175126, now seen corresponding path program 1 times [2018-11-18 16:24:16,904 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:16,904 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:16,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:16,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:16,952 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:17,016 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:24:17,017 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:24:17,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:24:17,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-18 16:24:17,018 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-18 16:24:17,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-18 16:24:17,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-11-18 16:24:17,018 INFO L87 Difference]: Start difference. First operand 178 states and 232 transitions. Second operand 9 states. [2018-11-18 16:24:17,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:17,171 INFO L93 Difference]: Finished difference Result 217 states and 305 transitions. [2018-11-18 16:24:17,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:24:17,171 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 59 [2018-11-18 16:24:17,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:17,173 INFO L225 Difference]: With dead ends: 217 [2018-11-18 16:24:17,173 INFO L226 Difference]: Without dead ends: 208 [2018-11-18 16:24:17,173 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:24:17,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-11-18 16:24:17,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 183. [2018-11-18 16:24:17,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-11-18 16:24:17,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 246 transitions. [2018-11-18 16:24:17,199 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 246 transitions. Word has length 59 [2018-11-18 16:24:17,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:17,200 INFO L480 AbstractCegarLoop]: Abstraction has 183 states and 246 transitions. [2018-11-18 16:24:17,200 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-18 16:24:17,200 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 246 transitions. [2018-11-18 16:24:17,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-18 16:24:17,201 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:17,201 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:17,201 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:17,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:17,201 INFO L82 PathProgramCache]: Analyzing trace with hash -2081391002, now seen corresponding path program 1 times [2018-11-18 16:24:17,201 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:17,201 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:17,224 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:17,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:17,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:17,269 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:17,269 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:24:17,270 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:24:17,270 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 16:24:17,270 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 16:24:17,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 16:24:17,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:24:17,271 INFO L87 Difference]: Start difference. First operand 183 states and 246 transitions. Second operand 5 states. [2018-11-18 16:24:17,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:17,340 INFO L93 Difference]: Finished difference Result 222 states and 328 transitions. [2018-11-18 16:24:17,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 16:24:17,340 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 59 [2018-11-18 16:24:17,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:17,341 INFO L225 Difference]: With dead ends: 222 [2018-11-18 16:24:17,341 INFO L226 Difference]: Without dead ends: 211 [2018-11-18 16:24:17,342 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 16:24:17,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-11-18 16:24:17,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 204. [2018-11-18 16:24:17,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-11-18 16:24:17,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 291 transitions. [2018-11-18 16:24:17,373 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 291 transitions. Word has length 59 [2018-11-18 16:24:17,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:17,374 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 291 transitions. [2018-11-18 16:24:17,374 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 16:24:17,374 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 291 transitions. [2018-11-18 16:24:17,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 16:24:17,375 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:17,375 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:17,375 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:17,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:17,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1594467825, now seen corresponding path program 1 times [2018-11-18 16:24:17,376 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:17,376 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:17,396 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:17,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:17,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:17,476 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:24:17,476 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:17,615 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:24:17,616 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:17,616 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:17,622 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:17,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:17,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:17,640 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:24:17,640 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:17,711 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-18 16:24:17,727 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:17,727 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11] total 18 [2018-11-18 16:24:17,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 16:24:17,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 16:24:17,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-11-18 16:24:17,728 INFO L87 Difference]: Start difference. First operand 204 states and 291 transitions. Second operand 18 states. [2018-11-18 16:24:17,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:17,942 INFO L93 Difference]: Finished difference Result 233 states and 329 transitions. [2018-11-18 16:24:17,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 16:24:17,942 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 66 [2018-11-18 16:24:17,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:17,944 INFO L225 Difference]: With dead ends: 233 [2018-11-18 16:24:17,944 INFO L226 Difference]: Without dead ends: 224 [2018-11-18 16:24:17,944 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2018-11-18 16:24:17,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-11-18 16:24:17,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 209. [2018-11-18 16:24:17,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-11-18 16:24:17,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 297 transitions. [2018-11-18 16:24:17,969 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 297 transitions. Word has length 66 [2018-11-18 16:24:17,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:17,969 INFO L480 AbstractCegarLoop]: Abstraction has 209 states and 297 transitions. [2018-11-18 16:24:17,969 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 16:24:17,969 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 297 transitions. [2018-11-18 16:24:17,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 16:24:17,970 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:17,970 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:17,970 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:17,971 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:17,971 INFO L82 PathProgramCache]: Analyzing trace with hash 2084814796, now seen corresponding path program 1 times [2018-11-18 16:24:17,971 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:17,971 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:17,987 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:18,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:18,007 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:18,034 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,034 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:18,098 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,099 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:18,099 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:18,111 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:18,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:18,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:18,127 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,127 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:18,178 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,193 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:18,193 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-11-18 16:24:18,193 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:24:18,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:24:18,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:24:18,193 INFO L87 Difference]: Start difference. First operand 209 states and 297 transitions. Second operand 11 states. [2018-11-18 16:24:18,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:18,326 INFO L93 Difference]: Finished difference Result 227 states and 319 transitions. [2018-11-18 16:24:18,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 16:24:18,326 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-11-18 16:24:18,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:18,327 INFO L225 Difference]: With dead ends: 227 [2018-11-18 16:24:18,327 INFO L226 Difference]: Without dead ends: 209 [2018-11-18 16:24:18,328 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-11-18 16:24:18,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-11-18 16:24:18,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2018-11-18 16:24:18,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-11-18 16:24:18,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 295 transitions. [2018-11-18 16:24:18,354 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 295 transitions. Word has length 66 [2018-11-18 16:24:18,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:18,354 INFO L480 AbstractCegarLoop]: Abstraction has 209 states and 295 transitions. [2018-11-18 16:24:18,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:24:18,354 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 295 transitions. [2018-11-18 16:24:18,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-11-18 16:24:18,355 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:18,356 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:18,356 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:18,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:18,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1901977140, now seen corresponding path program 2 times [2018-11-18 16:24:18,356 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:18,356 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:18,378 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:18,416 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:18,416 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:18,419 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:18,450 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:18,528 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,529 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:18,529 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:18,546 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:18,566 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:18,566 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:18,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:18,573 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,573 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:18,648 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-11-18 16:24:18,663 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:18,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-11-18 16:24:18,663 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:24:18,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:24:18,663 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:24:18,664 INFO L87 Difference]: Start difference. First operand 209 states and 295 transitions. Second operand 11 states. [2018-11-18 16:24:18,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:18,826 INFO L93 Difference]: Finished difference Result 222 states and 313 transitions. [2018-11-18 16:24:18,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:24:18,827 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-11-18 16:24:18,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:18,827 INFO L225 Difference]: With dead ends: 222 [2018-11-18 16:24:18,827 INFO L226 Difference]: Without dead ends: 204 [2018-11-18 16:24:18,828 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-11-18 16:24:18,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-11-18 16:24:18,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 204. [2018-11-18 16:24:18,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-11-18 16:24:18,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 286 transitions. [2018-11-18 16:24:18,857 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 286 transitions. Word has length 66 [2018-11-18 16:24:18,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:18,857 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 286 transitions. [2018-11-18 16:24:18,857 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:24:18,857 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 286 transitions. [2018-11-18 16:24:18,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-18 16:24:18,859 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:18,859 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:18,859 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:18,859 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:18,859 INFO L82 PathProgramCache]: Analyzing trace with hash -1472200244, now seen corresponding path program 1 times [2018-11-18 16:24:18,860 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:18,860 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:18,887 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:24:18,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:18,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:18,969 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:18,969 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:19,159 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,165 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:19,165 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:19,174 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:19,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:19,196 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:19,200 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,200 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:19,269 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,293 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:19,294 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-11-18 16:24:19,294 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:24:19,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:24:19,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:24:19,294 INFO L87 Difference]: Start difference. First operand 204 states and 286 transitions. Second operand 11 states. [2018-11-18 16:24:19,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:19,413 INFO L93 Difference]: Finished difference Result 215 states and 297 transitions. [2018-11-18 16:24:19,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 16:24:19,413 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 68 [2018-11-18 16:24:19,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:19,414 INFO L225 Difference]: With dead ends: 215 [2018-11-18 16:24:19,414 INFO L226 Difference]: Without dead ends: 201 [2018-11-18 16:24:19,414 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 274 GetRequests, 261 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-11-18 16:24:19,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-11-18 16:24:19,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 201. [2018-11-18 16:24:19,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-11-18 16:24:19,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 280 transitions. [2018-11-18 16:24:19,444 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 280 transitions. Word has length 68 [2018-11-18 16:24:19,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:19,444 INFO L480 AbstractCegarLoop]: Abstraction has 201 states and 280 transitions. [2018-11-18 16:24:19,444 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:24:19,444 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 280 transitions. [2018-11-18 16:24:19,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-18 16:24:19,445 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:19,445 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:19,445 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:19,445 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:19,445 INFO L82 PathProgramCache]: Analyzing trace with hash 736457104, now seen corresponding path program 2 times [2018-11-18 16:24:19,446 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:19,446 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:19,458 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:19,487 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:19,487 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:19,489 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:19,551 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,551 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:19,623 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,624 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:19,624 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:19,630 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:19,644 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:19,644 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:19,646 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:19,649 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,649 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:19,696 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:24:19,711 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:19,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 11 [2018-11-18 16:24:19,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:24:19,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:24:19,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:24:19,711 INFO L87 Difference]: Start difference. First operand 201 states and 280 transitions. Second operand 11 states. [2018-11-18 16:24:19,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:19,834 INFO L93 Difference]: Finished difference Result 212 states and 291 transitions. [2018-11-18 16:24:19,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-18 16:24:19,834 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 68 [2018-11-18 16:24:19,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:19,835 INFO L225 Difference]: With dead ends: 212 [2018-11-18 16:24:19,835 INFO L226 Difference]: Without dead ends: 198 [2018-11-18 16:24:19,836 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 261 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-11-18 16:24:19,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-11-18 16:24:19,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 196. [2018-11-18 16:24:19,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-11-18 16:24:19,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 263 transitions. [2018-11-18 16:24:19,855 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 263 transitions. Word has length 68 [2018-11-18 16:24:19,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:19,855 INFO L480 AbstractCegarLoop]: Abstraction has 196 states and 263 transitions. [2018-11-18 16:24:19,855 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:24:19,855 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 263 transitions. [2018-11-18 16:24:19,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-18 16:24:19,856 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:19,856 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:19,856 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:19,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:19,856 INFO L82 PathProgramCache]: Analyzing trace with hash -899575060, now seen corresponding path program 1 times [2018-11-18 16:24:19,856 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:19,856 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:19,869 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:24:19,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:19,888 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:19,950 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:19,951 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:20,103 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:20,104 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:20,104 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:20,110 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:20,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:20,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:20,133 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:20,134 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:20,250 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:20,265 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:20,266 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12] total 16 [2018-11-18 16:24:20,266 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-18 16:24:20,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-18 16:24:20,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-11-18 16:24:20,266 INFO L87 Difference]: Start difference. First operand 196 states and 263 transitions. Second operand 16 states. [2018-11-18 16:24:20,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:20,610 INFO L93 Difference]: Finished difference Result 214 states and 291 transitions. [2018-11-18 16:24:20,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 16:24:20,611 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 73 [2018-11-18 16:24:20,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:20,612 INFO L225 Difference]: With dead ends: 214 [2018-11-18 16:24:20,612 INFO L226 Difference]: Without dead ends: 171 [2018-11-18 16:24:20,612 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 273 SyntacticMatches, 6 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=90, Invalid=462, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:24:20,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-11-18 16:24:20,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 161. [2018-11-18 16:24:20,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-11-18 16:24:20,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 229 transitions. [2018-11-18 16:24:20,628 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 229 transitions. Word has length 73 [2018-11-18 16:24:20,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:20,628 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 229 transitions. [2018-11-18 16:24:20,628 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-18 16:24:20,628 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 229 transitions. [2018-11-18 16:24:20,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-18 16:24:20,629 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:20,629 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:20,629 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:20,630 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:20,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1026746132, now seen corresponding path program 2 times [2018-11-18 16:24:20,630 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:20,630 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:20,644 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:20,678 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:20,678 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:20,681 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:20,825 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 10 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:20,826 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:21,129 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:21,129 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:21,135 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:21,150 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:21,150 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:21,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:21,274 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-18 16:24:21,274 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:24:21,290 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 16:24:21,290 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [15] total 20 [2018-11-18 16:24:21,290 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-18 16:24:21,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-18 16:24:21,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=454, Unknown=0, NotChecked=0, Total=506 [2018-11-18 16:24:21,290 INFO L87 Difference]: Start difference. First operand 161 states and 229 transitions. Second operand 20 states. [2018-11-18 16:24:21,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:21,981 INFO L93 Difference]: Finished difference Result 216 states and 284 transitions. [2018-11-18 16:24:21,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-18 16:24:21,981 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 73 [2018-11-18 16:24:21,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:21,982 INFO L225 Difference]: With dead ends: 216 [2018-11-18 16:24:21,982 INFO L226 Difference]: Without dead ends: 176 [2018-11-18 16:24:21,983 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 2 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=171, Invalid=1089, Unknown=0, NotChecked=0, Total=1260 [2018-11-18 16:24:21,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-11-18 16:24:21,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 153. [2018-11-18 16:24:21,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-11-18 16:24:21,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 208 transitions. [2018-11-18 16:24:21,997 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 208 transitions. Word has length 73 [2018-11-18 16:24:21,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:21,997 INFO L480 AbstractCegarLoop]: Abstraction has 153 states and 208 transitions. [2018-11-18 16:24:21,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-18 16:24:21,997 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 208 transitions. [2018-11-18 16:24:21,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-18 16:24:21,998 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:21,998 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:21,998 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:21,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:21,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1234717445, now seen corresponding path program 1 times [2018-11-18 16:24:21,999 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:21,999 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:22,024 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:24:22,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:22,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:22,426 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:22,427 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:23,519 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:23,520 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:23,520 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:23,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:23,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:23,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:23,566 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:23,566 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:23,970 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:23,985 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:23,986 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12, 13] total 22 [2018-11-18 16:24:23,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-18 16:24:23,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-18 16:24:23,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-11-18 16:24:23,986 INFO L87 Difference]: Start difference. First operand 153 states and 208 transitions. Second operand 22 states. [2018-11-18 16:24:24,391 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 46 [2018-11-18 16:24:24,681 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 43 [2018-11-18 16:24:25,083 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 38 [2018-11-18 16:24:25,384 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 40 [2018-11-18 16:24:26,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:26,191 INFO L93 Difference]: Finished difference Result 200 states and 282 transitions. [2018-11-18 16:24:26,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 16:24:26,192 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-11-18 16:24:26,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:26,193 INFO L225 Difference]: With dead ends: 200 [2018-11-18 16:24:26,193 INFO L226 Difference]: Without dead ends: 189 [2018-11-18 16:24:26,194 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 263 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=185, Invalid=807, Unknown=0, NotChecked=0, Total=992 [2018-11-18 16:24:26,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-11-18 16:24:26,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 165. [2018-11-18 16:24:26,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-11-18 16:24:26,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 234 transitions. [2018-11-18 16:24:26,223 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 234 transitions. Word has length 73 [2018-11-18 16:24:26,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:26,224 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 234 transitions. [2018-11-18 16:24:26,224 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-18 16:24:26,224 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 234 transitions. [2018-11-18 16:24:26,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-18 16:24:26,225 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:26,225 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:26,225 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:26,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:26,225 INFO L82 PathProgramCache]: Analyzing trace with hash -1261074497, now seen corresponding path program 2 times [2018-11-18 16:24:26,225 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:26,226 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:26,239 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:26,333 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:26,333 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:26,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:26,669 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:26,669 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:27,738 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:27,739 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:27,740 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:27,749 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:27,779 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:27,780 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:27,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:27,793 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:27,794 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:28,125 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:28,140 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:28,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12, 13] total 22 [2018-11-18 16:24:28,140 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-18 16:24:28,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-18 16:24:28,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2018-11-18 16:24:28,141 INFO L87 Difference]: Start difference. First operand 165 states and 234 transitions. Second operand 22 states. [2018-11-18 16:24:28,644 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 45 [2018-11-18 16:24:29,091 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 42 [2018-11-18 16:24:29,542 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 38 [2018-11-18 16:24:29,835 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 40 [2018-11-18 16:24:30,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:30,751 INFO L93 Difference]: Finished difference Result 207 states and 294 transitions. [2018-11-18 16:24:30,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-18 16:24:30,753 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-11-18 16:24:30,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:30,753 INFO L225 Difference]: With dead ends: 207 [2018-11-18 16:24:30,754 INFO L226 Difference]: Without dead ends: 196 [2018-11-18 16:24:30,754 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 267 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=186, Invalid=806, Unknown=0, NotChecked=0, Total=992 [2018-11-18 16:24:30,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-11-18 16:24:30,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 175. [2018-11-18 16:24:30,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-11-18 16:24:30,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 251 transitions. [2018-11-18 16:24:30,785 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 251 transitions. Word has length 73 [2018-11-18 16:24:30,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:30,785 INFO L480 AbstractCegarLoop]: Abstraction has 175 states and 251 transitions. [2018-11-18 16:24:30,785 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-18 16:24:30,785 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 251 transitions. [2018-11-18 16:24:30,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-18 16:24:30,786 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:30,786 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:30,786 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:30,786 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:30,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1179699928, now seen corresponding path program 1 times [2018-11-18 16:24:30,787 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:30,787 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:30,804 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:24:30,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:30,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:30,952 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:30,952 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:31,021 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:31,021 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:31,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:31,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:31,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:31,723 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:24:31,723 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:24:31,738 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 16:24:31,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [13] total 23 [2018-11-18 16:24:31,739 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-18 16:24:31,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-18 16:24:31,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=489, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:24:31,739 INFO L87 Difference]: Start difference. First operand 175 states and 251 transitions. Second operand 23 states. [2018-11-18 16:24:32,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:32,797 INFO L93 Difference]: Finished difference Result 204 states and 283 transitions. [2018-11-18 16:24:32,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-18 16:24:32,797 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 73 [2018-11-18 16:24:32,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:32,798 INFO L225 Difference]: With dead ends: 204 [2018-11-18 16:24:32,799 INFO L226 Difference]: Without dead ends: 188 [2018-11-18 16:24:32,799 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 127 SyntacticMatches, 4 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=158, Invalid=964, Unknown=0, NotChecked=0, Total=1122 [2018-11-18 16:24:32,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-11-18 16:24:32,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 175. [2018-11-18 16:24:32,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-11-18 16:24:32,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 245 transitions. [2018-11-18 16:24:32,819 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 245 transitions. Word has length 73 [2018-11-18 16:24:32,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:32,819 INFO L480 AbstractCegarLoop]: Abstraction has 175 states and 245 transitions. [2018-11-18 16:24:32,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-18 16:24:32,819 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 245 transitions. [2018-11-18 16:24:32,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-18 16:24:32,820 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:32,820 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:32,820 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:32,820 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:32,820 INFO L82 PathProgramCache]: Analyzing trace with hash 1054558486, now seen corresponding path program 1 times [2018-11-18 16:24:32,821 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:32,821 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:32,833 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:32,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:32,910 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:33,238 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-11-18 16:24:33,238 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:33,791 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-11-18 16:24:34,717 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:24:34,719 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:34,719 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:34,725 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:34,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:34,813 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:34,862 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-11-18 16:24:34,862 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:35,149 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 47 [2018-11-18 16:24:35,330 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:24:35,345 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:35,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 13, 15] total 24 [2018-11-18 16:24:35,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-18 16:24:35,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-18 16:24:35,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:24:35,346 INFO L87 Difference]: Start difference. First operand 175 states and 245 transitions. Second operand 24 states. [2018-11-18 16:24:38,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:38,012 INFO L93 Difference]: Finished difference Result 243 states and 320 transitions. [2018-11-18 16:24:38,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-18 16:24:38,013 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 79 [2018-11-18 16:24:38,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:38,014 INFO L225 Difference]: With dead ends: 243 [2018-11-18 16:24:38,014 INFO L226 Difference]: Without dead ends: 179 [2018-11-18 16:24:38,015 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 289 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=262, Invalid=1220, Unknown=0, NotChecked=0, Total=1482 [2018-11-18 16:24:38,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-11-18 16:24:38,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 168. [2018-11-18 16:24:38,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-11-18 16:24:38,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 234 transitions. [2018-11-18 16:24:38,034 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 234 transitions. Word has length 79 [2018-11-18 16:24:38,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:38,034 INFO L480 AbstractCegarLoop]: Abstraction has 168 states and 234 transitions. [2018-11-18 16:24:38,034 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-18 16:24:38,034 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 234 transitions. [2018-11-18 16:24:38,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 16:24:38,035 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:38,035 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:38,035 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:38,035 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:38,036 INFO L82 PathProgramCache]: Analyzing trace with hash -1351148917, now seen corresponding path program 1 times [2018-11-18 16:24:38,036 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:38,036 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:38,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:38,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:38,117 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:38,410 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:38,410 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:39,430 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:39,431 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:39,431 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:39,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:39,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:39,474 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:39,835 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-11-18 16:24:39,836 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:41,962 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-11-18 16:24:41,977 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:41,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 15, 16] total 39 [2018-11-18 16:24:41,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-11-18 16:24:41,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-11-18 16:24:41,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=204, Invalid=1278, Unknown=0, NotChecked=0, Total=1482 [2018-11-18 16:24:41,978 INFO L87 Difference]: Start difference. First operand 168 states and 234 transitions. Second operand 39 states. [2018-11-18 16:24:42,716 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 41 [2018-11-18 16:24:43,561 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 38 [2018-11-18 16:24:44,009 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 40 [2018-11-18 16:24:44,309 WARN L180 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 43 [2018-11-18 16:24:46,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:46,592 INFO L93 Difference]: Finished difference Result 206 states and 276 transitions. [2018-11-18 16:24:46,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-18 16:24:46,593 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 75 [2018-11-18 16:24:46,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:46,594 INFO L225 Difference]: With dead ends: 206 [2018-11-18 16:24:46,594 INFO L226 Difference]: Without dead ends: 186 [2018-11-18 16:24:46,595 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 259 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 463 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=482, Invalid=2380, Unknown=0, NotChecked=0, Total=2862 [2018-11-18 16:24:46,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-11-18 16:24:46,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 166. [2018-11-18 16:24:46,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-18 16:24:46,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 224 transitions. [2018-11-18 16:24:46,629 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 224 transitions. Word has length 75 [2018-11-18 16:24:46,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:46,629 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 224 transitions. [2018-11-18 16:24:46,629 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-11-18 16:24:46,629 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 224 transitions. [2018-11-18 16:24:46,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 16:24:46,630 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:46,630 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:46,630 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:46,630 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:46,631 INFO L82 PathProgramCache]: Analyzing trace with hash 2044795360, now seen corresponding path program 1 times [2018-11-18 16:24:46,631 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:46,631 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:46,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:46,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:46,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:46,737 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-11-18 16:24:46,738 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:46,780 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-11-18 16:24:46,781 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:46,781 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:46,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:24:46,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:24:46,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:46,814 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-11-18 16:24:46,814 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:46,861 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-11-18 16:24:46,887 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:46,887 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6] total 6 [2018-11-18 16:24:46,888 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 16:24:46,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 16:24:46,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 16:24:46,888 INFO L87 Difference]: Start difference. First operand 166 states and 224 transitions. Second operand 6 states. [2018-11-18 16:24:46,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:46,945 INFO L93 Difference]: Finished difference Result 180 states and 241 transitions. [2018-11-18 16:24:46,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 16:24:46,945 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2018-11-18 16:24:46,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:46,946 INFO L225 Difference]: With dead ends: 180 [2018-11-18 16:24:46,946 INFO L226 Difference]: Without dead ends: 175 [2018-11-18 16:24:46,946 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 299 GetRequests, 290 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:24:46,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-11-18 16:24:46,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 166. [2018-11-18 16:24:46,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-11-18 16:24:46,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 224 transitions. [2018-11-18 16:24:46,970 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 224 transitions. Word has length 75 [2018-11-18 16:24:46,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:46,970 INFO L480 AbstractCegarLoop]: Abstraction has 166 states and 224 transitions. [2018-11-18 16:24:46,971 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 16:24:46,971 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 224 transitions. [2018-11-18 16:24:46,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-11-18 16:24:46,971 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:46,972 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:46,972 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:46,972 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:46,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1416165594, now seen corresponding path program 2 times [2018-11-18 16:24:46,972 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:46,972 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:46,986 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:47,067 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:47,067 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:47,083 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:47,392 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-11-18 16:24:47,392 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:48,171 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 41 [2018-11-18 16:24:49,241 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:24:49,243 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:49,243 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:49,249 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:49,349 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:49,349 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:49,352 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:49,690 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-11-18 16:24:49,690 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:50,601 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 41 [2018-11-18 16:24:51,598 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-18 16:24:51,614 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:24:51,614 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 14, 15] total 39 [2018-11-18 16:24:51,614 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-11-18 16:24:51,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-11-18 16:24:51,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=1285, Unknown=0, NotChecked=0, Total=1482 [2018-11-18 16:24:51,615 INFO L87 Difference]: Start difference. First operand 166 states and 224 transitions. Second operand 39 states. [2018-11-18 16:24:54,290 WARN L180 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 35 [2018-11-18 16:24:55,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:24:55,160 INFO L93 Difference]: Finished difference Result 228 states and 293 transitions. [2018-11-18 16:24:55,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-18 16:24:55,161 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 79 [2018-11-18 16:24:55,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:24:55,162 INFO L225 Difference]: With dead ends: 228 [2018-11-18 16:24:55,162 INFO L226 Difference]: Without dead ends: 163 [2018-11-18 16:24:55,163 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 272 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 527 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=511, Invalid=2351, Unknown=0, NotChecked=0, Total=2862 [2018-11-18 16:24:55,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-11-18 16:24:55,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 151. [2018-11-18 16:24:55,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-11-18 16:24:55,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 200 transitions. [2018-11-18 16:24:55,180 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 200 transitions. Word has length 79 [2018-11-18 16:24:55,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:24:55,181 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 200 transitions. [2018-11-18 16:24:55,181 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-11-18 16:24:55,181 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 200 transitions. [2018-11-18 16:24:55,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-11-18 16:24:55,181 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:24:55,181 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:24:55,182 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:24:55,182 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:24:55,182 INFO L82 PathProgramCache]: Analyzing trace with hash 126031055, now seen corresponding path program 2 times [2018-11-18 16:24:55,182 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:24:55,182 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:24:55,197 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:55,266 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:55,266 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:55,277 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:55,590 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:55,591 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:56,841 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-11-18 16:24:56,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:24:56,843 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:24:56,850 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:24:56,898 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:24:56,898 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:24:56,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:24:58,218 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:24:58,219 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:24:58,984 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:24:58,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 14] total 32 [2018-11-18 16:24:58,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-11-18 16:24:58,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-11-18 16:24:58,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=1046, Unknown=0, NotChecked=0, Total=1190 [2018-11-18 16:24:58,985 INFO L87 Difference]: Start difference. First operand 151 states and 200 transitions. Second operand 32 states. [2018-11-18 16:24:59,567 WARN L180 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 43 [2018-11-18 16:25:00,078 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-11-18 16:25:00,372 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 43 [2018-11-18 16:25:00,674 WARN L180 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 45 [2018-11-18 16:25:00,932 WARN L180 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 48 [2018-11-18 16:25:02,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:02,342 INFO L93 Difference]: Finished difference Result 174 states and 225 transitions. [2018-11-18 16:25:02,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-18 16:25:02,344 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 75 [2018-11-18 16:25:02,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:02,344 INFO L225 Difference]: With dead ends: 174 [2018-11-18 16:25:02,344 INFO L226 Difference]: Without dead ends: 160 [2018-11-18 16:25:02,345 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 197 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 452 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=329, Invalid=1927, Unknown=0, NotChecked=0, Total=2256 [2018-11-18 16:25:02,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-11-18 16:25:02,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-11-18 16:25:02,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-18 16:25:02,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 189 transitions. [2018-11-18 16:25:02,361 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 189 transitions. Word has length 75 [2018-11-18 16:25:02,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:02,361 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 189 transitions. [2018-11-18 16:25:02,361 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-11-18 16:25:02,361 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 189 transitions. [2018-11-18 16:25:02,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-18 16:25:02,362 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:02,362 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:02,362 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:02,362 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:02,362 INFO L82 PathProgramCache]: Analyzing trace with hash 874834250, now seen corresponding path program 1 times [2018-11-18 16:25:02,362 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:02,362 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:02,376 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:25:02,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:02,396 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:02,409 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-11-18 16:25:02,409 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:25:02,410 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:25:02,410 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 16:25:02,410 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 16:25:02,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 16:25:02,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 16:25:02,411 INFO L87 Difference]: Start difference. First operand 148 states and 189 transitions. Second operand 6 states. [2018-11-18 16:25:02,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:02,451 INFO L93 Difference]: Finished difference Result 160 states and 201 transitions. [2018-11-18 16:25:02,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 16:25:02,451 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2018-11-18 16:25:02,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:02,452 INFO L225 Difference]: With dead ends: 160 [2018-11-18 16:25:02,452 INFO L226 Difference]: Without dead ends: 151 [2018-11-18 16:25:02,453 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 16:25:02,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-11-18 16:25:02,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 148. [2018-11-18 16:25:02,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-18 16:25:02,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 184 transitions. [2018-11-18 16:25:02,470 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 184 transitions. Word has length 77 [2018-11-18 16:25:02,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:02,470 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 184 transitions. [2018-11-18 16:25:02,470 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 16:25:02,470 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 184 transitions. [2018-11-18 16:25:02,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-18 16:25:02,471 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:02,471 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:02,471 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:02,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:02,471 INFO L82 PathProgramCache]: Analyzing trace with hash -1135528952, now seen corresponding path program 1 times [2018-11-18 16:25:02,471 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:02,471 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 68 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:02,483 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:02,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:02,547 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:02,707 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:02,707 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:02,842 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:02,843 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:02,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:02,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:02,872 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:03,052 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 24 proven. 3 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-11-18 16:25:03,053 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:03,258 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:25:03,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15] total 15 [2018-11-18 16:25:03,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 16:25:03,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 16:25:03,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-11-18 16:25:03,259 INFO L87 Difference]: Start difference. First operand 148 states and 184 transitions. Second operand 15 states. [2018-11-18 16:25:08,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:08,167 INFO L93 Difference]: Finished difference Result 171 states and 213 transitions. [2018-11-18 16:25:08,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 16:25:08,169 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 82 [2018-11-18 16:25:08,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:08,170 INFO L225 Difference]: With dead ends: 171 [2018-11-18 16:25:08,170 INFO L226 Difference]: Without dead ends: 162 [2018-11-18 16:25:08,170 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 166 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=439, Unknown=0, NotChecked=0, Total=506 [2018-11-18 16:25:08,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-11-18 16:25:08,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 155. [2018-11-18 16:25:08,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-11-18 16:25:08,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 197 transitions. [2018-11-18 16:25:08,188 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 197 transitions. Word has length 82 [2018-11-18 16:25:08,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:08,189 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 197 transitions. [2018-11-18 16:25:08,189 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 16:25:08,189 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 197 transitions. [2018-11-18 16:25:08,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-18 16:25:08,190 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:08,190 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:08,190 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:08,190 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:08,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1782955212, now seen corresponding path program 2 times [2018-11-18 16:25:08,190 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:08,190 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 70 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:08,206 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:08,267 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:08,267 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:08,279 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:08,443 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:08,443 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 16:25:08,445 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 16:25:08,445 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-18 16:25:08,445 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-18 16:25:08,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-18 16:25:08,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-11-18 16:25:08,446 INFO L87 Difference]: Start difference. First operand 155 states and 197 transitions. Second operand 11 states. [2018-11-18 16:25:11,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:11,719 INFO L93 Difference]: Finished difference Result 171 states and 214 transitions. [2018-11-18 16:25:11,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 16:25:11,720 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 82 [2018-11-18 16:25:11,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:11,721 INFO L225 Difference]: With dead ends: 171 [2018-11-18 16:25:11,721 INFO L226 Difference]: Without dead ends: 162 [2018-11-18 16:25:11,721 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:25:11,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-11-18 16:25:11,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 146. [2018-11-18 16:25:11,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-11-18 16:25:11,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 187 transitions. [2018-11-18 16:25:11,738 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 187 transitions. Word has length 82 [2018-11-18 16:25:11,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:11,739 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 187 transitions. [2018-11-18 16:25:11,739 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-18 16:25:11,739 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 187 transitions. [2018-11-18 16:25:11,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-18 16:25:11,739 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:11,740 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:11,740 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:11,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:11,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1530504208, now seen corresponding path program 1 times [2018-11-18 16:25:11,740 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:11,740 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:11,756 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:25:11,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:11,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:12,484 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:12,484 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:14,786 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:14,787 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:14,787 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:14,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:14,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:14,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:16,339 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:16,339 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:16,660 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2018-11-18 16:25:17,659 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-11-18 16:25:18,776 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:25:18,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18] total 36 [2018-11-18 16:25:18,777 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-18 16:25:18,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-18 16:25:18,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=1492, Unknown=0, NotChecked=0, Total=1722 [2018-11-18 16:25:18,777 INFO L87 Difference]: Start difference. First operand 146 states and 187 transitions. Second operand 36 states. [2018-11-18 16:25:20,553 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 43 [2018-11-18 16:25:21,244 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 45 [2018-11-18 16:25:23,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:23,300 INFO L93 Difference]: Finished difference Result 184 states and 231 transitions. [2018-11-18 16:25:23,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-18 16:25:23,301 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 82 [2018-11-18 16:25:23,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:23,302 INFO L225 Difference]: With dead ends: 184 [2018-11-18 16:25:23,302 INFO L226 Difference]: Without dead ends: 173 [2018-11-18 16:25:23,303 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 273 GetRequests, 216 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 626 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=458, Invalid=2734, Unknown=0, NotChecked=0, Total=3192 [2018-11-18 16:25:23,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-11-18 16:25:23,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 146. [2018-11-18 16:25:23,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-11-18 16:25:23,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 187 transitions. [2018-11-18 16:25:23,320 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 187 transitions. Word has length 82 [2018-11-18 16:25:23,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:23,320 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 187 transitions. [2018-11-18 16:25:23,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-18 16:25:23,320 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 187 transitions. [2018-11-18 16:25:23,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-11-18 16:25:23,320 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:23,320 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:23,321 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:23,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:23,321 INFO L82 PathProgramCache]: Analyzing trace with hash 1852855628, now seen corresponding path program 2 times [2018-11-18 16:25:23,321 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:23,321 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:23,334 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:23,433 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:23,434 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:23,450 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:24,012 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:24,012 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:26,277 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:26,279 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:26,279 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:26,285 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:26,448 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:26,448 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:26,450 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:27,700 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:27,700 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:28,039 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-11-18 16:25:30,070 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-11-18 16:25:30,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18] total 35 [2018-11-18 16:25:30,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-11-18 16:25:30,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-11-18 16:25:30,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=1422, Unknown=0, NotChecked=0, Total=1640 [2018-11-18 16:25:30,071 INFO L87 Difference]: Start difference. First operand 146 states and 187 transitions. Second operand 35 states. [2018-11-18 16:25:30,748 WARN L180 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 38 [2018-11-18 16:25:31,519 WARN L180 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 39 [2018-11-18 16:25:32,557 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 39 [2018-11-18 16:25:32,872 WARN L180 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 42 [2018-11-18 16:25:33,766 WARN L180 SmtUtils]: Spent 235.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 38 [2018-11-18 16:25:34,284 WARN L180 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 38 [2018-11-18 16:25:35,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:35,865 INFO L93 Difference]: Finished difference Result 198 states and 244 transitions. [2018-11-18 16:25:35,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-18 16:25:35,866 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 82 [2018-11-18 16:25:35,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:35,867 INFO L225 Difference]: With dead ends: 198 [2018-11-18 16:25:35,867 INFO L226 Difference]: Without dead ends: 178 [2018-11-18 16:25:35,867 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 217 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 638 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=475, Invalid=2831, Unknown=0, NotChecked=0, Total=3306 [2018-11-18 16:25:35,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-11-18 16:25:35,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 164. [2018-11-18 16:25:35,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-11-18 16:25:35,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 205 transitions. [2018-11-18 16:25:35,887 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 205 transitions. Word has length 82 [2018-11-18 16:25:35,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:35,888 INFO L480 AbstractCegarLoop]: Abstraction has 164 states and 205 transitions. [2018-11-18 16:25:35,888 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-11-18 16:25:35,888 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 205 transitions. [2018-11-18 16:25:35,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 16:25:35,888 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:35,888 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:35,888 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:35,888 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:35,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1073274921, now seen corresponding path program 1 times [2018-11-18 16:25:35,889 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:35,889 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:35,902 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:25:35,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:35,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:35,991 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 17 proven. 5 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:35,991 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:36,134 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:36,136 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:36,136 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:36,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:36,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:36,159 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:36,164 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:36,164 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:36,215 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:36,231 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:25:36,231 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10] total 18 [2018-11-18 16:25:36,231 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 16:25:36,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 16:25:36,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2018-11-18 16:25:36,232 INFO L87 Difference]: Start difference. First operand 164 states and 205 transitions. Second operand 18 states. [2018-11-18 16:25:36,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:36,623 INFO L93 Difference]: Finished difference Result 175 states and 217 transitions. [2018-11-18 16:25:36,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 16:25:36,624 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 83 [2018-11-18 16:25:36,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:36,624 INFO L225 Difference]: With dead ends: 175 [2018-11-18 16:25:36,624 INFO L226 Difference]: Without dead ends: 145 [2018-11-18 16:25:36,625 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 341 GetRequests, 317 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=506, Unknown=0, NotChecked=0, Total=600 [2018-11-18 16:25:36,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-11-18 16:25:36,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-11-18 16:25:36,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-11-18 16:25:36,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 184 transitions. [2018-11-18 16:25:36,643 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 184 transitions. Word has length 83 [2018-11-18 16:25:36,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:36,643 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 184 transitions. [2018-11-18 16:25:36,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 16:25:36,644 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 184 transitions. [2018-11-18 16:25:36,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 16:25:36,644 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:36,644 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:36,644 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:36,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:36,644 INFO L82 PathProgramCache]: Analyzing trace with hash 1351970789, now seen corresponding path program 2 times [2018-11-18 16:25:36,644 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:36,644 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:36,658 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:36,691 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:36,691 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:36,694 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:36,750 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:36,750 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:36,906 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-11-18 16:25:36,907 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 16:25:36,907 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [11] total 17 [2018-11-18 16:25:36,907 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 16:25:36,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 16:25:36,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-11-18 16:25:36,908 INFO L87 Difference]: Start difference. First operand 145 states and 184 transitions. Second operand 17 states. [2018-11-18 16:25:37,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:37,356 INFO L93 Difference]: Finished difference Result 156 states and 195 transitions. [2018-11-18 16:25:37,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 16:25:37,356 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 83 [2018-11-18 16:25:37,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:37,357 INFO L225 Difference]: With dead ends: 156 [2018-11-18 16:25:37,357 INFO L226 Difference]: Without dead ends: 115 [2018-11-18 16:25:37,357 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=468, Unknown=0, NotChecked=0, Total=552 [2018-11-18 16:25:37,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-11-18 16:25:37,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 112. [2018-11-18 16:25:37,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-11-18 16:25:37,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 147 transitions. [2018-11-18 16:25:37,373 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 147 transitions. Word has length 83 [2018-11-18 16:25:37,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:37,373 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 147 transitions. [2018-11-18 16:25:37,373 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-18 16:25:37,373 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 147 transitions. [2018-11-18 16:25:37,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 16:25:37,374 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:37,374 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:37,374 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:37,374 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:37,374 INFO L82 PathProgramCache]: Analyzing trace with hash 2115924257, now seen corresponding path program 1 times [2018-11-18 16:25:37,374 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:37,374 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 78 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:37,386 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:25:37,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:37,492 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:37,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:37,650 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:37,651 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:37,651 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:37,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:37,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:37,680 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:37,686 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:37,686 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:37,768 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:37,784 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:25:37,784 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 15 [2018-11-18 16:25:37,784 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 16:25:37,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 16:25:37,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-11-18 16:25:37,785 INFO L87 Difference]: Start difference. First operand 112 states and 147 transitions. Second operand 15 states. [2018-11-18 16:25:38,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:38,227 INFO L93 Difference]: Finished difference Result 121 states and 155 transitions. [2018-11-18 16:25:38,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-18 16:25:38,228 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 83 [2018-11-18 16:25:38,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:38,228 INFO L225 Difference]: With dead ends: 121 [2018-11-18 16:25:38,228 INFO L226 Difference]: Without dead ends: 110 [2018-11-18 16:25:38,228 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 337 GetRequests, 313 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-11-18 16:25:38,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-11-18 16:25:38,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-11-18 16:25:38,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-11-18 16:25:38,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 143 transitions. [2018-11-18 16:25:38,241 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 143 transitions. Word has length 83 [2018-11-18 16:25:38,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:38,242 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 143 transitions. [2018-11-18 16:25:38,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 16:25:38,242 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 143 transitions. [2018-11-18 16:25:38,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-18 16:25:38,242 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:38,242 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:38,242 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:38,243 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:38,243 INFO L82 PathProgramCache]: Analyzing trace with hash 1576366416, now seen corresponding path program 1 times [2018-11-18 16:25:38,243 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:38,243 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 80 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:38,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:38,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:38,378 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:39,047 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:39,047 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:41,158 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:41,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:41,159 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:41,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:25:41,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:25:41,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:43,001 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:43,001 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:47,697 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:47,713 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:25:47,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18, 21] total 52 [2018-11-18 16:25:47,713 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-11-18 16:25:47,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-11-18 16:25:47,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=284, Invalid=2368, Unknown=0, NotChecked=0, Total=2652 [2018-11-18 16:25:47,714 INFO L87 Difference]: Start difference. First operand 110 states and 143 transitions. Second operand 52 states. [2018-11-18 16:25:48,845 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 44 [2018-11-18 16:25:52,389 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-11-18 16:25:52,753 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-11-18 16:25:55,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:55,768 INFO L93 Difference]: Finished difference Result 138 states and 173 transitions. [2018-11-18 16:25:55,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-11-18 16:25:55,769 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 80 [2018-11-18 16:25:55,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:55,769 INFO L225 Difference]: With dead ends: 138 [2018-11-18 16:25:55,769 INFO L226 Difference]: Without dead ends: 128 [2018-11-18 16:25:55,771 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 261 SyntacticMatches, 7 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1297 ImplicationChecksByTransitivity, 12.7s TimeCoverageRelationStatistics Valid=808, Invalid=5198, Unknown=0, NotChecked=0, Total=6006 [2018-11-18 16:25:55,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-11-18 16:25:55,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 118. [2018-11-18 16:25:55,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-11-18 16:25:55,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 150 transitions. [2018-11-18 16:25:55,792 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 150 transitions. Word has length 80 [2018-11-18 16:25:55,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:55,793 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 150 transitions. [2018-11-18 16:25:55,793 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-11-18 16:25:55,793 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 150 transitions. [2018-11-18 16:25:55,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-11-18 16:25:55,793 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:55,793 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:55,793 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:55,793 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:55,793 INFO L82 PathProgramCache]: Analyzing trace with hash -776083611, now seen corresponding path program 2 times [2018-11-18 16:25:55,794 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:55,794 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 82 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:55,806 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:55,840 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:55,840 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:55,842 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:55,899 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:55,899 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:56,026 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:56,027 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:56,027 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:56,034 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:56,052 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:56,052 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:56,054 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:56,060 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:56,060 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:56,124 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:56,141 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:25:56,141 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 15 [2018-11-18 16:25:56,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-18 16:25:56,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-18 16:25:56,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-11-18 16:25:56,142 INFO L87 Difference]: Start difference. First operand 118 states and 150 transitions. Second operand 15 states. [2018-11-18 16:25:56,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:25:56,555 INFO L93 Difference]: Finished difference Result 125 states and 156 transitions. [2018-11-18 16:25:56,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-18 16:25:56,556 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 83 [2018-11-18 16:25:56,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:25:56,556 INFO L225 Difference]: With dead ends: 125 [2018-11-18 16:25:56,556 INFO L226 Difference]: Without dead ends: 104 [2018-11-18 16:25:56,557 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 337 GetRequests, 312 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=360, Unknown=0, NotChecked=0, Total=462 [2018-11-18 16:25:56,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-11-18 16:25:56,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 96. [2018-11-18 16:25:56,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-18 16:25:56,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 121 transitions. [2018-11-18 16:25:56,572 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 121 transitions. Word has length 83 [2018-11-18 16:25:56,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:25:56,572 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 121 transitions. [2018-11-18 16:25:56,572 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-18 16:25:56,572 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 121 transitions. [2018-11-18 16:25:56,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-11-18 16:25:56,573 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:25:56,573 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:25:56,573 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:25:56,573 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:25:56,573 INFO L82 PathProgramCache]: Analyzing trace with hash -1652805936, now seen corresponding path program 2 times [2018-11-18 16:25:56,573 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:25:56,573 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 84 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:25:56,591 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:56,698 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:56,698 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:56,714 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:25:57,330 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:25:57,331 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:25:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:25:59,425 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:25:59,425 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:25:59,437 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:25:59,601 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:25:59,601 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:25:59,603 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:01,047 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:26:01,047 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:04,585 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-11-18 16:26:04,600 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:26:04,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 18, 21] total 48 [2018-11-18 16:26:04,601 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-18 16:26:04,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-18 16:26:04,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=246, Invalid=2010, Unknown=0, NotChecked=0, Total=2256 [2018-11-18 16:26:04,602 INFO L87 Difference]: Start difference. First operand 96 states and 121 transitions. Second operand 48 states. [2018-11-18 16:26:05,459 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 55 [2018-11-18 16:26:06,499 WARN L180 SmtUtils]: Spent 249.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 68 [2018-11-18 16:26:07,234 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 54 [2018-11-18 16:26:08,370 WARN L180 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 39 [2018-11-18 16:26:09,325 WARN L180 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 50 [2018-11-18 16:26:09,639 WARN L180 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 50 [2018-11-18 16:26:11,300 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-11-18 16:26:11,835 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-11-18 16:26:13,261 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 39 [2018-11-18 16:26:13,657 WARN L180 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 39 [2018-11-18 16:26:14,547 WARN L180 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 40 [2018-11-18 16:26:14,987 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 39 [2018-11-18 16:26:15,445 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 40 [2018-11-18 16:26:16,304 WARN L180 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 48 [2018-11-18 16:26:16,642 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 51 [2018-11-18 16:26:18,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:26:18,223 INFO L93 Difference]: Finished difference Result 125 states and 155 transitions. [2018-11-18 16:26:18,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-11-18 16:26:18,225 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 80 [2018-11-18 16:26:18,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:26:18,225 INFO L225 Difference]: With dead ends: 125 [2018-11-18 16:26:18,225 INFO L226 Difference]: Without dead ends: 112 [2018-11-18 16:26:18,226 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 270 SyntacticMatches, 2 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1162 ImplicationChecksByTransitivity, 14.1s TimeCoverageRelationStatistics Valid=828, Invalid=5024, Unknown=0, NotChecked=0, Total=5852 [2018-11-18 16:26:18,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-11-18 16:26:18,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 91. [2018-11-18 16:26:18,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-11-18 16:26:18,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 114 transitions. [2018-11-18 16:26:18,238 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 114 transitions. Word has length 80 [2018-11-18 16:26:18,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:26:18,238 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 114 transitions. [2018-11-18 16:26:18,238 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-18 16:26:18,239 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 114 transitions. [2018-11-18 16:26:18,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-18 16:26:18,239 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:26:18,239 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:26:18,239 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:26:18,239 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:26:18,240 INFO L82 PathProgramCache]: Analyzing trace with hash -256991366, now seen corresponding path program 1 times [2018-11-18 16:26:18,240 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:26:18,240 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 86 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:26:18,255 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:26:18,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:18,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:20,156 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:26:20,156 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:21,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:26:21,807 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:26:21,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:26:22,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:22,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:22,977 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 16 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2018-11-18 16:26:22,978 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:23,637 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:26:23,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 22] total 22 [2018-11-18 16:26:23,637 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-18 16:26:23,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-18 16:26:23,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=695, Unknown=0, NotChecked=0, Total=756 [2018-11-18 16:26:23,638 INFO L87 Difference]: Start difference. First operand 91 states and 114 transitions. Second operand 22 states. [2018-11-18 16:26:27,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:26:27,638 INFO L93 Difference]: Finished difference Result 107 states and 131 transitions. [2018-11-18 16:26:27,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-18 16:26:27,639 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 85 [2018-11-18 16:26:27,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:26:27,640 INFO L225 Difference]: With dead ends: 107 [2018-11-18 16:26:27,640 INFO L226 Difference]: Without dead ends: 98 [2018-11-18 16:26:27,640 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 163 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 193 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=137, Invalid=1669, Unknown=0, NotChecked=0, Total=1806 [2018-11-18 16:26:27,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-18 16:26:27,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 89. [2018-11-18 16:26:27,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-11-18 16:26:27,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 110 transitions. [2018-11-18 16:26:27,651 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 110 transitions. Word has length 85 [2018-11-18 16:26:27,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:26:27,652 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 110 transitions. [2018-11-18 16:26:27,652 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-18 16:26:27,652 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 110 transitions. [2018-11-18 16:26:27,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-11-18 16:26:27,652 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:26:27,652 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:26:27,653 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:26:27,653 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:26:27,653 INFO L82 PathProgramCache]: Analyzing trace with hash -750628358, now seen corresponding path program 2 times [2018-11-18 16:26:27,653 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:26:27,653 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 88 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:26:27,667 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:26:28,008 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:26:28,008 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:26:28,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:29,586 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:26:29,586 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:29,894 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-11-18 16:26:30,060 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-11-18 16:26:31,289 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:26:31,289 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:26:31,296 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:26:32,103 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:26:32,104 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:26:32,108 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:32,491 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 17 proven. 13 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:26:32,491 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:32,755 WARN L180 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-11-18 16:26:33,669 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:26:33,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 22] total 22 [2018-11-18 16:26:33,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-18 16:26:33,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-18 16:26:33,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=746, Unknown=0, NotChecked=0, Total=812 [2018-11-18 16:26:33,670 INFO L87 Difference]: Start difference. First operand 89 states and 110 transitions. Second operand 22 states. [2018-11-18 16:26:37,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:26:37,988 INFO L93 Difference]: Finished difference Result 105 states and 127 transitions. [2018-11-18 16:26:37,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-18 16:26:37,990 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 85 [2018-11-18 16:26:37,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:26:37,991 INFO L225 Difference]: With dead ends: 105 [2018-11-18 16:26:37,991 INFO L226 Difference]: Without dead ends: 96 [2018-11-18 16:26:37,991 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 162 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=144, Invalid=1748, Unknown=0, NotChecked=0, Total=1892 [2018-11-18 16:26:37,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-11-18 16:26:38,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 87. [2018-11-18 16:26:38,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-11-18 16:26:38,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 105 transitions. [2018-11-18 16:26:38,007 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 105 transitions. Word has length 85 [2018-11-18 16:26:38,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:26:38,007 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 105 transitions. [2018-11-18 16:26:38,007 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-18 16:26:38,007 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 105 transitions. [2018-11-18 16:26:38,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 16:26:38,007 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:26:38,007 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:26:38,007 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:26:38,008 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:26:38,008 INFO L82 PathProgramCache]: Analyzing trace with hash -325209685, now seen corresponding path program 1 times [2018-11-18 16:26:38,008 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:26:38,008 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 90 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:26:38,022 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:26:38,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:38,146 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:38,626 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:26:38,626 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:38,770 WARN L180 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 42 [2018-11-18 16:26:40,685 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-18 16:26:40,687 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:26:40,687 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:26:40,699 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:26:40,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:26:40,950 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:41,261 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 16 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2018-11-18 16:26:41,261 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:41,660 WARN L180 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 56 [2018-11-18 16:26:42,832 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-18 16:26:42,847 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:26:42,848 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 16, 16] total 31 [2018-11-18 16:26:42,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-11-18 16:26:42,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-11-18 16:26:42,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=803, Unknown=0, NotChecked=0, Total=930 [2018-11-18 16:26:42,848 INFO L87 Difference]: Start difference. First operand 87 states and 105 transitions. Second operand 31 states. [2018-11-18 16:26:43,893 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-18 16:26:44,592 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-11-18 16:26:45,200 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 41 [2018-11-18 16:26:47,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:26:47,931 INFO L93 Difference]: Finished difference Result 120 states and 144 transitions. [2018-11-18 16:26:47,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-18 16:26:47,932 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 86 [2018-11-18 16:26:47,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:26:47,933 INFO L225 Difference]: With dead ends: 120 [2018-11-18 16:26:47,933 INFO L226 Difference]: Without dead ends: 89 [2018-11-18 16:26:47,933 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 361 GetRequests, 310 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 355 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=402, Invalid=2048, Unknown=0, NotChecked=0, Total=2450 [2018-11-18 16:26:47,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-11-18 16:26:47,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 84. [2018-11-18 16:26:47,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-11-18 16:26:47,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 101 transitions. [2018-11-18 16:26:47,943 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 101 transitions. Word has length 86 [2018-11-18 16:26:47,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:26:47,943 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 101 transitions. [2018-11-18 16:26:47,943 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-11-18 16:26:47,943 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 101 transitions. [2018-11-18 16:26:47,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-18 16:26:47,943 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:26:47,943 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:26:47,943 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:26:47,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:26:47,944 INFO L82 PathProgramCache]: Analyzing trace with hash 1551912747, now seen corresponding path program 2 times [2018-11-18 16:26:47,944 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:26:47,944 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 92 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:26:47,958 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:26:48,073 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:26:48,073 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:26:48,091 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:48,578 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:26:48,578 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:48,701 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-11-18 16:26:50,563 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-18 16:26:50,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:26:50,564 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:26:50,572 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:26:50,794 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:26:50,794 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:26:50,797 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:26:52,514 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:26:52,515 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:26:52,760 WARN L180 SmtUtils]: Spent 243.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 66 [2018-11-18 16:26:53,134 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2018-11-18 16:26:53,473 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-18 16:26:53,488 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-11-18 16:26:53,489 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 19, 14] total 34 [2018-11-18 16:26:53,489 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-11-18 16:26:53,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-11-18 16:26:53,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=968, Unknown=0, NotChecked=0, Total=1122 [2018-11-18 16:26:53,489 INFO L87 Difference]: Start difference. First operand 84 states and 101 transitions. Second operand 34 states. [2018-11-18 16:26:55,044 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification that was a NOOP. DAG size: 63 [2018-11-18 16:26:56,815 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 36 [2018-11-18 16:26:57,224 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 38 [2018-11-18 16:26:58,311 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 35 [2018-11-18 16:26:58,634 WARN L180 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 35 [2018-11-18 16:26:59,111 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 35 [2018-11-18 16:27:00,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:27:00,110 INFO L93 Difference]: Finished difference Result 121 states and 141 transitions. [2018-11-18 16:27:00,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-18 16:27:00,111 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 86 [2018-11-18 16:27:00,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:27:00,112 INFO L225 Difference]: With dead ends: 121 [2018-11-18 16:27:00,112 INFO L226 Difference]: Without dead ends: 77 [2018-11-18 16:27:00,113 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 310 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 746 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=513, Invalid=3027, Unknown=0, NotChecked=0, Total=3540 [2018-11-18 16:27:00,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-11-18 16:27:00,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-11-18 16:27:00,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-11-18 16:27:00,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 91 transitions. [2018-11-18 16:27:00,121 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 91 transitions. Word has length 86 [2018-11-18 16:27:00,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:27:00,122 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 91 transitions. [2018-11-18 16:27:00,122 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-11-18 16:27:00,122 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 91 transitions. [2018-11-18 16:27:00,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-18 16:27:00,122 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:27:00,122 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:27:00,122 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:27:00,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:27:00,123 INFO L82 PathProgramCache]: Analyzing trace with hash 498698560, now seen corresponding path program 1 times [2018-11-18 16:27:00,123 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:27:00,123 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 94 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:27:00,140 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 16:27:00,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:27:00,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:27:02,568 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:27:02,569 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:27:02,967 WARN L180 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2018-11-18 16:27:03,138 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 59 [2018-11-18 16:27:03,250 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 59 [2018-11-18 16:27:04,341 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:27:04,341 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:27:04,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 16:27:05,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 16:27:05,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:27:09,638 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 17 proven. 14 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-11-18 16:27:09,639 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:27:09,935 WARN L180 SmtUtils]: Spent 279.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 73 [2018-11-18 16:27:11,117 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2018-11-18 16:27:12,391 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-11-18 16:27:12,999 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-11-18 16:27:13,020 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:27:13,020 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 25] total 37 [2018-11-18 16:27:13,020 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-11-18 16:27:13,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-11-18 16:27:13,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=2122, Unknown=0, NotChecked=0, Total=2256 [2018-11-18 16:27:13,020 INFO L87 Difference]: Start difference. First operand 77 states and 91 transitions. Second operand 37 states. [2018-11-18 16:27:19,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:27:19,479 INFO L93 Difference]: Finished difference Result 88 states and 102 transitions. [2018-11-18 16:27:19,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-18 16:27:19,480 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 87 [2018-11-18 16:27:19,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:27:19,481 INFO L225 Difference]: With dead ends: 88 [2018-11-18 16:27:19,481 INFO L226 Difference]: Without dead ends: 75 [2018-11-18 16:27:19,481 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 146 SyntacticMatches, 4 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 770 ImplicationChecksByTransitivity, 14.5s TimeCoverageRelationStatistics Valid=249, Invalid=3911, Unknown=0, NotChecked=0, Total=4160 [2018-11-18 16:27:19,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-11-18 16:27:19,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 73. [2018-11-18 16:27:19,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-11-18 16:27:19,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 85 transitions. [2018-11-18 16:27:19,488 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 85 transitions. Word has length 87 [2018-11-18 16:27:19,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:27:19,488 INFO L480 AbstractCegarLoop]: Abstraction has 73 states and 85 transitions. [2018-11-18 16:27:19,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-11-18 16:27:19,489 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 85 transitions. [2018-11-18 16:27:19,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-18 16:27:19,489 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 16:27:19,489 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 16:27:19,489 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 16:27:19,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 16:27:19,489 INFO L82 PathProgramCache]: Analyzing trace with hash 421140228, now seen corresponding path program 2 times [2018-11-18 16:27:19,489 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 16:27:19,489 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/cvc4nyu Starting monitored process 96 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 16:27:19,506 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 16:27:19,778 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:27:19,778 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:27:19,795 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:27:21,715 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-11-18 16:27:21,715 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:27:22,128 WARN L180 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-11-18 16:27:23,422 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 16:27:23,422 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/z3 Starting monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 16:27:23,429 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-18 16:27:24,201 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 16:27:24,201 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 16:27:24,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 16:27:26,678 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2018-11-18 16:27:26,679 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 16:27:26,941 WARN L180 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 71 [2018-11-18 16:27:28,655 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 16:27:28,655 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 32 [2018-11-18 16:27:28,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-11-18 16:27:28,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-11-18 16:27:28,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1612, Unknown=0, NotChecked=0, Total=1722 [2018-11-18 16:27:28,656 INFO L87 Difference]: Start difference. First operand 73 states and 85 transitions. Second operand 32 states. [2018-11-18 16:27:33,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 16:27:33,619 INFO L93 Difference]: Finished difference Result 73 states and 85 transitions. [2018-11-18 16:27:33,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-18 16:27:33,620 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 87 [2018-11-18 16:27:33,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 16:27:33,620 INFO L225 Difference]: With dead ends: 73 [2018-11-18 16:27:33,621 INFO L226 Difference]: Without dead ends: 0 [2018-11-18 16:27:33,621 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 154 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 517 ImplicationChecksByTransitivity, 9.9s TimeCoverageRelationStatistics Valid=210, Invalid=3212, Unknown=0, NotChecked=0, Total=3422 [2018-11-18 16:27:33,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-11-18 16:27:33,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-11-18 16:27:33,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-11-18 16:27:33,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-11-18 16:27:33,622 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 87 [2018-11-18 16:27:33,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 16:27:33,622 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-11-18 16:27:33,622 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-11-18 16:27:33,622 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-11-18 16:27:33,622 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 16:27:33,626 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-11-18 16:27:33,966 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:34,329 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:34,345 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:34,484 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 162 DAG size of output: 141 [2018-11-18 16:27:34,486 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:34,868 WARN L180 SmtUtils]: Spent 378.00 ms on a formula simplification. DAG size of input: 294 DAG size of output: 278 [2018-11-18 16:27:35,204 WARN L180 SmtUtils]: Spent 334.00 ms on a formula simplification. DAG size of input: 325 DAG size of output: 304 [2018-11-18 16:27:35,397 WARN L180 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 294 DAG size of output: 278 [2018-11-18 16:27:35,508 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 290 DAG size of output: 274 [2018-11-18 16:27:35,639 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 346 DAG size of output: 322 [2018-11-18 16:27:35,701 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:35,917 WARN L180 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 260 DAG size of output: 244 [2018-11-18 16:27:36,021 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 235 DAG size of output: 219 [2018-11-18 16:27:36,024 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:36,025 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:36,260 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 350 DAG size of output: 330 [2018-11-18 16:27:36,432 WARN L180 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 252 DAG size of output: 237 [2018-11-18 16:27:36,487 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-11-18 16:27:36,618 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 357 DAG size of output: 333 [2018-11-18 16:27:36,800 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 340 DAG size of output: 325 [2018-11-18 16:27:37,036 WARN L180 SmtUtils]: Spent 234.00 ms on a formula simplification. DAG size of input: 361 DAG size of output: 339 [2018-11-18 16:27:37,189 WARN L180 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 259 DAG size of output: 244 [2018-11-18 16:27:37,330 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 317 DAG size of output: 294 [2018-11-18 16:29:02,597 WARN L180 SmtUtils]: Spent 1.41 m on a formula simplification. DAG size of input: 290 DAG size of output: 64 [2018-11-18 16:29:02,802 WARN L180 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 1 [2018-11-18 16:31:00,108 WARN L180 SmtUtils]: Spent 1.95 m on a formula simplification. DAG size of input: 671 DAG size of output: 152 [2018-11-18 16:31:02,582 WARN L180 SmtUtils]: Spent 2.47 s on a formula simplification. DAG size of input: 179 DAG size of output: 90 [2018-11-18 16:33:41,659 WARN L180 SmtUtils]: Spent 2.65 m on a formula simplification. DAG size of input: 409 DAG size of output: 131 [2018-11-18 16:33:41,662 INFO L428 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L27-1(lines 27 42) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L19(lines 19 24) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L48(lines 47 62) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L428 ceAbstractionStarter]: At program point L69(lines 18 71) the Hoare annotation is: true [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L28(lines 27 42) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L49(lines 47 62) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L37(lines 37 41) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L428 ceAbstractionStarter]: At program point L37-1(lines 27 42) the Hoare annotation is: true [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point L25(lines 25 65) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L428 ceAbstractionStarter]: At program point base2fltENTRY(lines 14 72) the Hoare annotation is: true [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point base2fltFINAL(lines 14 72) no Hoare annotation was computed. [2018-11-18 16:33:41,662 INFO L428 ceAbstractionStarter]: At program point L63(lines 25 65) the Hoare annotation is: true [2018-11-18 16:33:41,662 INFO L425 ceAbstractionStarter]: For program point base2fltEXIT(lines 14 72) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L425 ceAbstractionStarter]: For program point L47-1(lines 47 62) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L428 ceAbstractionStarter]: At program point L47-3(lines 47 62) the Hoare annotation is: true [2018-11-18 16:33:41,663 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L428 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-11-18 16:33:41,663 INFO L428 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-11-18 16:33:41,663 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L425 ceAbstractionStarter]: For program point mainEXIT(lines 214 252) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L425 ceAbstractionStarter]: For program point mainFINAL(lines 214 252) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L425 ceAbstractionStarter]: For program point L236(lines 236 245) no Hoare annotation was computed. [2018-11-18 16:33:41,663 INFO L421 ceAbstractionStarter]: At program point L234(line 234) the Hoare annotation is: (let ((.cse24 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~b~0))) (.cse25 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~a~0))) (.cse13 (bvlshr main_~b~0 (_ bv24 32))) (.cse15 (bvlshr main_~a~0 (_ bv24 32)))) (let ((.cse22 (bvlshr .cse25 (bvadd .cse13 (bvneg (bvadd .cse15 (_ bv4294967168 32))) (_ bv4294967168 32)))) (.cse23 (bvlshr .cse24 (bvadd (bvneg (bvadd .cse13 (_ bv4294967168 32))) .cse15 (_ bv4294967168 32))))) (let ((.cse14 (bvadd .cse25 .cse23)) (.cse12 (bvadd .cse22 .cse24))) (let ((.cse6 (= (_ bv0 32) (bvand (_ bv33554432 32) .cse12))) (.cse18 (= main_~a~0 (_ bv0 32))) (.cse0 (= (bvand (_ bv33554432 32) .cse14) (_ bv0 32)))) (let ((.cse11 (= .cse23 (_ bv0 32))) (.cse17 (= (bvadd .cse15 (_ bv4294967041 32)) (_ bv0 32))) (.cse16 (not .cse0)) (.cse19 (= main_~b~0 (_ bv0 32))) (.cse7 (= .cse22 (_ bv0 32))) (.cse21 (not .cse18)) (.cse4 (= (bvadd .cse13 (_ bv4294967041 32)) (_ bv0 32))) (.cse8 (bvult main_~a~0 main_~b~0)) (.cse2 (not .cse6))) (let ((.cse5 (or (and .cse6 .cse21 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) .cse12) (bvshl .cse13 (_ bv24 32)))) (not .cse7)) (and .cse21 (not .cse4) .cse8 .cse2))) (.cse1 (let ((.cse20 (not .cse19))) (or (and .cse0 .cse20 (= (bvor (bvand (_ bv16777215 32) .cse14) (bvshl .cse15 (_ bv24 32))) main_~r_add1~0) (not .cse11)) (and (not .cse17) .cse20 .cse21 .cse16)))) (.cse3 (= (_ bv4294967295 32) main_~r_add1~0)) (.cse9 (= main_~b~0 main_~r_add1~0)) (.cse10 (= main_~a~0 main_~r_add1~0))) (or (and .cse0 .cse1) (and .cse2 .cse3 .cse4) (and .cse5 .cse6) (and .cse7 .cse8 .cse9) (and .cse10 .cse11 (not .cse8)) (and .cse5 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse12 (_ bv1 32))) (bvshl (bvadd .cse13 (_ bv1 32)) (_ bv24 32))))) (and .cse1 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse14 (_ bv1 32))) (bvshl (bvadd .cse15 (_ bv1 32)) (_ bv24 32))))) (and .cse16 .cse17 .cse3) (and .cse18 .cse9) (and .cse19 .cse10)))))))) [2018-11-18 16:33:41,663 INFO L421 ceAbstractionStarter]: At program point L236-2(lines 236 245) the Hoare annotation is: (and (= main_~tmp___0~0 (_ bv0 32)) (= main_~tmp~2 (_ bv0 32))) [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L234-1(line 234) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L428 ceAbstractionStarter]: At program point L232(line 232) the Hoare annotation is: true [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L232-1(line 232) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L428 ceAbstractionStarter]: At program point L230(line 230) the Hoare annotation is: true [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L230-1(line 230) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L428 ceAbstractionStarter]: At program point mainENTRY(lines 214 252) the Hoare annotation is: true [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L247(line 247) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L239(lines 239 243) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L239-2(lines 239 243) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L428 ceAbstractionStarter]: At program point L233(line 233) the Hoare annotation is: true [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L233-1(line 233) no Hoare annotation was computed. [2018-11-18 16:33:41,664 INFO L428 ceAbstractionStarter]: At program point L231(line 231) the Hoare annotation is: true [2018-11-18 16:33:41,664 INFO L425 ceAbstractionStarter]: For program point L231-1(line 231) no Hoare annotation was computed. [2018-11-18 16:33:41,665 INFO L425 ceAbstractionStarter]: For program point L128(line 128) no Hoare annotation was computed. [2018-11-18 16:33:41,665 INFO L428 ceAbstractionStarter]: At program point addfltENTRY(lines 73 136) the Hoare annotation is: true [2018-11-18 16:33:41,665 INFO L425 ceAbstractionStarter]: For program point addfltFINAL(lines 73 136) no Hoare annotation was computed. [2018-11-18 16:33:41,665 INFO L425 ceAbstractionStarter]: For program point L116(lines 116 121) no Hoare annotation was computed. [2018-11-18 16:33:41,665 INFO L425 ceAbstractionStarter]: For program point L108(lines 108 113) no Hoare annotation was computed. [2018-11-18 16:33:41,665 INFO L421 ceAbstractionStarter]: At program point L104(line 104) the Hoare annotation is: (let ((.cse4 (and (not (= (_ bv0 32) |addflt_#in~b|)) (exists ((addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (and (= (bvadd addflt_~eb~0 (_ bv128 32)) (bvlshr addflt_~b (_ bv24 32))) (not (bvult addflt_~a addflt_~b)) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (not (bvult addflt_~a addflt_~b))))) (let ((.cse1 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse2 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse3 (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0)) (.cse5 (and (bvult |addflt_#in~a| |addflt_#in~b|) (= addflt_~b |addflt_#in~a|) (exists ((addflt_~b (_ BitVec 32))) (= (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~mb~0)) (exists ((addflt_~a (_ BitVec 32))) (= addflt_~ma~0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))) .cse4 (= addflt_~a |addflt_#in~b|))) (.cse0 (= addflt_~a |addflt_#in~a|))) (and (or .cse0 (and (= .cse1 addflt_~ma~0) (= .cse2 addflt_~mb~0) (= (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32)) addflt_~eb~0) .cse3)) (or (and (= .cse1 addflt_~mb~0) .cse4 (= (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv4294967168 32)) addflt_~eb~0) (= .cse2 addflt_~ma~0) .cse3) .cse5) (or .cse5 (and .cse0 (= addflt_~b |addflt_#in~b|))) (not (= (_ bv0 32) |addflt_#in~a|))))) [2018-11-18 16:33:41,665 INFO L425 ceAbstractionStarter]: For program point L104-1(line 104) no Hoare annotation was computed. [2018-11-18 16:33:41,666 INFO L421 ceAbstractionStarter]: At program point L133(lines 83 135) the Hoare annotation is: (let ((.cse8 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse29 (bvadd .cse8 (_ bv4294967168 32)))) (let ((.cse20 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse14 (bvlshr |addflt_#in~a| (_ bv24 32))) (.cse43 (bvneg .cse29))) (let ((.cse1 (bvlshr .cse20 (bvadd .cse14 .cse43 (_ bv4294967168 32)))) (.cse21 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)))) (let ((.cse13 (bvadd .cse1 .cse21))) (let ((.cse17 (= (bvadd .cse8 (_ bv4294967041 32)) (_ bv0 32))) (.cse37 (bvlshr .cse20 (bvadd .cse43 addflt_~ea~0))) (.cse30 (bvlshr addflt_~a (_ bv24 32))) (.cse2 (= (bvand (_ bv33554432 32) .cse13) (_ bv0 32))) (.cse15 (= addflt_~a |addflt_#in~a|)) (.cse42 (= (_ bv0 32) |addflt_#in~b|)) (.cse34 (= addflt_~b |addflt_#in~b|))) (let ((.cse0 (and .cse15 .cse42 .cse34 (= addflt_~__retres10~0 |addflt_#in~a|))) (.cse32 (not .cse2)) (.cse24 (= (bvadd .cse14 (_ bv4294967041 32)) (_ bv0 32))) (.cse11 (= (bvlshr .cse20 (bvadd .cse30 .cse43 (_ bv4294967168 32))) addflt_~mb~0)) (.cse23 (bvadd .cse37 .cse21)) (.cse28 (= (_ bv0 32) |addflt_#in~a|)) (.cse27 (= addflt_~__retres10~0 |addflt_#in~b|)) (.cse5 (not .cse17))) (and (let ((.cse31 (bvadd .cse14 (_ bv4294967168 32)))) (let ((.cse22 (bvneg .cse31))) (let ((.cse26 (bvlshr .cse21 (bvadd .cse8 .cse22 (_ bv4294967168 32))))) (let ((.cse7 (bvadd .cse26 .cse20))) (let ((.cse25 (= (bvand (_ bv33554432 32) .cse7) (_ bv0 32))) (.cse12 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0)))) (let ((.cse3 (or .cse32 .cse12)) (.cse6 (or (not (= (_ bv127 32) addflt_~ea~0)) .cse12 (and .cse32 .cse24))) (.cse9 (not .cse25)) (.cse16 (= (bvadd addflt_~__retres10~0 (_ bv1 32)) (_ bv0 32))) (.cse10 (= .cse31 addflt_~ea~0)) (.cse4 (= (bvlshr .cse21 (bvadd .cse22 .cse30 (_ bv4294967168 32))) addflt_~mb~0)) (.cse18 (= .cse29 addflt_~ea~0)) (.cse19 (= .cse26 addflt_~mb~0))) (or .cse0 (and (not (= .cse1 (_ bv0 32))) .cse2 .cse3) (and .cse4 .cse5 .cse6 (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse7 (_ bv1 32))) (bvshl (bvadd .cse8 (_ bv1 32)) (_ bv24 32)))) .cse9 .cse3) (and (exists ((addflt_~a (_ BitVec 32))) (= addflt_~ma~0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))) .cse10 .cse11 (= (_ bv0 32) addflt_~mb~0)) (and .cse6 (or .cse12 .cse9) (= (bvor (bvand (_ bv16777215 32) (bvlshr .cse13 (_ bv1 32))) (bvshl (bvadd .cse14 (_ bv1 32)) (_ bv24 32))) addflt_~__retres10~0) .cse15) (and .cse16 .cse17 .cse18 .cse19 .cse9 (= (bvadd .cse20 (bvlshr .cse21 (bvadd .cse22 addflt_~ea~0))) addflt_~ma~0)) (and (= .cse23 addflt_~ma~0) .cse16 .cse10 .cse24) (and .cse12 .cse25 .cse4 .cse18 (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) .cse7) (bvshl .cse8 (_ bv24 32))))) (and (= .cse26 (_ bv0 32)) .cse18 .cse19 .cse27) .cse28))))))) (let ((.cse40 (= addflt_~a |addflt_#in~b|))) (let ((.cse39 (let ((.cse41 (and (not .cse42) (not (bvult addflt_~a addflt_~b))))) (or (and .cse41 .cse40) (and .cse34 .cse41))))) (let ((.cse36 (and .cse15 .cse39))) (let ((.cse33 (let ((.cse38 (and (or (and .cse39 .cse40) .cse36) (not (bvult addflt_~a |addflt_#in~a|))))) (or (and (= addflt_~b |addflt_#in~a|) .cse38) (and .cse15 .cse38)))) (.cse35 (= addflt_~mb~0 .cse37))) (or .cse0 (and .cse32 .cse33 .cse34 .cse11 (not .cse24)) (and .cse33 (bvult |addflt_#in~a| |addflt_#in~b|)) (and .cse33 .cse11 .cse35 (= (bvor (bvand (_ bv16777215 32) .cse13) (bvshl .cse14 (_ bv24 32))) addflt_~__retres10~0)) (and .cse24 .cse11 (not (= (_ bv0 32) (bvand (_ bv33554432 32) .cse23))) (and .cse36 (not (bvult addflt_~__retres10~0 |addflt_#in~a|))) .cse35)))))) (or (not .cse28) .cse27) (or .cse2 .cse5))))))))) [2018-11-18 16:33:41,666 INFO L425 ceAbstractionStarter]: For program point addfltEXIT(lines 73 136) no Hoare annotation was computed. [2018-11-18 16:33:41,666 INFO L425 ceAbstractionStarter]: For program point L84(lines 84 90) no Hoare annotation was computed. [2018-11-18 16:33:41,666 INFO L425 ceAbstractionStarter]: For program point L115(lines 115 126) no Hoare annotation was computed. [2018-11-18 16:33:41,666 INFO L425 ceAbstractionStarter]: For program point L84-2(lines 83 135) no Hoare annotation was computed. [2018-11-18 16:33:41,666 INFO L421 ceAbstractionStarter]: At program point L115-2(lines 115 126) the Hoare annotation is: (let ((.cse1 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse8 (bvadd .cse1 (_ bv4294967168 32))) (.cse6 (bvlshr |addflt_#in~a| (_ bv24 32)))) (let ((.cse2 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse3 (bvneg (bvadd .cse6 (_ bv4294967168 32)))) (.cse4 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse21 (bvlshr addflt_~a (_ bv24 32))) (.cse12 (bvneg .cse8))) (let ((.cse11 (= (bvlshr .cse4 (bvadd .cse21 .cse12 (_ bv4294967168 32))) addflt_~mb~0)) (.cse7 (bvlshr .cse4 (bvadd .cse6 .cse12 (_ bv4294967168 32)))) (.cse9 (= (bvadd .cse4 (bvlshr .cse2 (bvadd .cse3 addflt_~ea~0))) addflt_~ma~0))) (and (or (let ((.cse0 (bvadd (bvlshr .cse2 (bvadd .cse1 .cse3 (_ bv4294967168 32))) .cse4))) (and (= (bvlshr .cse0 (_ bv1 32)) addflt_~ma~0) (= (bvadd .cse1 (_ bv4294967169 32)) addflt_~ea~0) (not (= (bvand (_ bv33554432 32) .cse0) (_ bv0 32))))) (let ((.cse5 (bvadd .cse7 .cse2))) (and (= (bvlshr .cse5 (_ bv1 32)) addflt_~ma~0) (= (bvadd .cse6 (_ bv4294967169 32)) addflt_~ea~0) (not (= (bvand (_ bv33554432 32) .cse5) (_ bv0 32))) (not (= (bvadd .cse6 (_ bv4294967041 32)) (_ bv0 32))))) (and (= .cse8 addflt_~ea~0) (not (= (_ bv0 32) (bvadd (bvneg .cse4) addflt_~ma~0))) .cse9) (let ((.cse10 (bvlshr .cse4 (bvadd .cse12 addflt_~ea~0)))) (and (= (bvadd .cse10 .cse2) addflt_~ma~0) .cse11 (= addflt_~mb~0 .cse10)))) (let ((.cse19 (= addflt_~b |addflt_#in~a|)) (.cse17 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0))) (.cse20 (= addflt_~a |addflt_#in~b|)) (.cse14 (= addflt_~b |addflt_#in~b|)) (.cse13 (= (_ bv0 32) |addflt_#in~b|))) (let ((.cse16 (let ((.cse23 (= addflt_~a |addflt_#in~a|))) (let ((.cse22 (let ((.cse24 (and (let ((.cse25 (let ((.cse26 (and (or (not (= (_ bv0 32) addflt_~b)) .cse13) (not (bvult addflt_~a addflt_~b))))) (or (and .cse26 .cse20) (and .cse26 .cse14))))) (or (and .cse20 .cse25) (and .cse23 .cse25))) (not (bvult addflt_~a |addflt_#in~a|))))) (or (and (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvlshr (bvadd (bvneg (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0))) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a))) (_ bv1 32)) addflt_~ma~0)) .cse24) (and .cse17 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))) .cse24))))) (or (and .cse19 .cse22) (and .cse23 .cse22))))) (.cse18 (= (bvlshr .cse2 (bvadd .cse3 .cse21 (_ bv4294967168 32))) addflt_~mb~0)) (.cse15 (not (= (bvadd .cse1 (_ bv4294967041 32)) (_ bv0 32))))) (or (and (not .cse13) .cse14 .cse15 .cse16 .cse11 (not (= .cse7 (_ bv0 32)))) (and .cse17 .cse18 .cse19 .cse20 .cse9) (and .cse16 .cse18 .cse19 .cse15)))) (not (= (_ bv0 32) |addflt_#in~a|))))))) [2018-11-18 16:33:41,667 INFO L425 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 7) no Hoare annotation was computed. [2018-11-18 16:33:41,667 INFO L428 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 5 10) the Hoare annotation is: true [2018-11-18 16:33:41,667 INFO L425 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 5 10) no Hoare annotation was computed. [2018-11-18 16:33:41,667 INFO L425 ceAbstractionStarter]: For program point L7(line 7) no Hoare annotation was computed. [2018-11-18 16:33:41,667 INFO L425 ceAbstractionStarter]: For program point L6(lines 6 8) no Hoare annotation was computed. [2018-11-18 16:33:41,667 INFO L425 ceAbstractionStarter]: For program point L6-2(lines 5 10) no Hoare annotation was computed. [2018-11-18 16:33:41,674 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-18 16:33:41,697 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-18 16:33:41,703 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 04:33:41 BoogieIcfgContainer [2018-11-18 16:33:41,703 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 16:33:41,703 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 16:33:41,703 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 16:33:41,703 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 16:33:41,704 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:22:44" (3/4) ... [2018-11-18 16:33:41,714 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-11-18 16:33:41,718 INFO L333 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-11-18 16:33:41,719 INFO L333 RCFGBacktranslator]: Ignoring RootEdge to procedure base2flt [2018-11-18 16:33:41,719 INFO L333 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-11-18 16:33:41,719 INFO L333 RCFGBacktranslator]: Ignoring RootEdge to procedure addflt [2018-11-18 16:33:41,719 INFO L333 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-11-18 16:33:41,723 INFO L846 BoogieBacktranslator]: Reduced CFG by removing 13 nodes and edges [2018-11-18 16:33:41,724 INFO L846 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2018-11-18 16:33:41,724 INFO L846 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-11-18 16:33:41,743 WARN L220 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma)))) || (((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(a, 24bv32), 4294967168bv32)) == mb && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32))) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma)))) || ((((\exists addflt_~a : bv32 :: ma == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && 0bv32 == mb)) || (((((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && (0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10) && a == \old(a))) || (((((~bvadd64(__retres10, 1bv32) == 0bv32 && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma)) || (((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(__retres10, 1bv32) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) || ((((0bv32 == ~bvand64(33554432bv32, ma) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(a, 24bv32), 4294967168bv32)) == mb) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32 && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && __retres10 == \old(b))) || 0bv32 == \old(a)) && (((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((((!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ((b == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))) || (a == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))))) && b == \old(b)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) || (((b == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))) || (a == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a)))) && ~bvult64(\old(a), \old(b)))) || (((((b == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))) || (a == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a)))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || ((((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32 && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))) && (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b)))) && !~bvult64(__retres10, \old(a))) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))))) && (!(0bv32 == \old(a)) || __retres10 == \old(b))) && (~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32 || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) [2018-11-18 16:33:41,756 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_71dae49b-ead6-4ed6-8892-abfe47926744/bin-2019/utaipan/witness.graphml [2018-11-18 16:33:41,757 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 16:33:41,757 INFO L168 Benchmark]: Toolchain (without parser) took 657425.95 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 949.7 MB in the beginning and 956.0 MB in the end (delta: -6.3 MB). Peak memory consumption was 115.9 MB. Max. memory is 11.5 GB. [2018-11-18 16:33:41,758 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:33:41,758 INFO L168 Benchmark]: CACSL2BoogieTranslator took 230.18 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 933.6 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-11-18 16:33:41,758 INFO L168 Benchmark]: Boogie Procedure Inliner took 15.75 ms. Allocated memory is still 1.0 GB. Free memory is still 933.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 16:33:41,758 INFO L168 Benchmark]: Boogie Preprocessor took 23.48 ms. Allocated memory is still 1.0 GB. Free memory was 933.6 MB in the beginning and 928.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-18 16:33:41,758 INFO L168 Benchmark]: RCFGBuilder took 300.53 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.9 MB). Free memory was 928.3 MB in the beginning and 1.1 GB in the end (delta: -168.6 MB). Peak memory consumption was 15.4 MB. Max. memory is 11.5 GB. [2018-11-18 16:33:41,759 INFO L168 Benchmark]: TraceAbstraction took 656799.11 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: -5.8 MB). Free memory was 1.1 GB in the beginning and 962.8 MB in the end (delta: 134.1 MB). Peak memory consumption was 368.1 MB. Max. memory is 11.5 GB. [2018-11-18 16:33:41,759 INFO L168 Benchmark]: Witness Printer took 53.38 ms. Allocated memory is still 1.2 GB. Free memory was 962.8 MB in the beginning and 956.0 MB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-11-18 16:33:41,760 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 230.18 ms. Allocated memory is still 1.0 GB. Free memory was 949.7 MB in the beginning and 933.6 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 15.75 ms. Allocated memory is still 1.0 GB. Free memory is still 933.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.48 ms. Allocated memory is still 1.0 GB. Free memory was 933.6 MB in the beginning and 928.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 300.53 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.9 MB). Free memory was 928.3 MB in the beginning and 1.1 GB in the end (delta: -168.6 MB). Peak memory consumption was 15.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 656799.11 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: -5.8 MB). Free memory was 1.1 GB in the beginning and 962.8 MB in the end (delta: 134.1 MB). Peak memory consumption was 368.1 MB. Max. memory is 11.5 GB. * Witness Printer took 53.38 ms. Allocated memory is still 1.2 GB. Free memory was 962.8 MB in the beginning and 956.0 MB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 7]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 25]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 18]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 47]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 83]: Loop Invariant [2018-11-18 16:33:41,764 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-11-18 16:33:41,767 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] Derived loop invariant: ((((((((((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma)))) || (((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(a, 24bv32), 4294967168bv32)) == mb && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32))) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma)))) || ((((\exists addflt_~a : bv32 :: ma == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a))) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && 0bv32 == mb)) || (((((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && (0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32))) && ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10) && a == \old(a))) || (((((~bvadd64(__retres10, 1bv32) == 0bv32 && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma)) || (((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(__retres10, 1bv32) == 0bv32) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) || ((((0bv32 == ~bvand64(33554432bv32, ma) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ~bvlshr64(a, 24bv32), 4294967168bv32)) == mb) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))) || (((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32 && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && __retres10 == \old(b))) || 0bv32 == \old(a)) && (((((((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((((!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && ((b == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))) || (a == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))))) && b == \old(b)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) || (((b == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))) || (a == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a)))) && ~bvult64(\old(a), \old(b)))) || (((((b == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a))) || (a == \old(a) && (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))) && a == \old(b)) || (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b))))) && !~bvult64(a, \old(a)))) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || ((((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32 && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))) && (a == \old(a) && (((!(0bv32 == \old(b)) && !~bvult64(a, b)) && a == \old(b)) || (b == \old(b) && !(0bv32 == \old(b)) && !~bvult64(a, b)))) && !~bvult64(__retres10, \old(a))) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))))) && (!(0bv32 == \old(a)) || __retres10 == \old(b))) && (~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32 || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) - InvariantResult [Line: 27]: Loop Invariant Derived loop invariant: 1 - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 58 locations, 1 error locations. SAFE Result, 656.7s OverallTime, 56 OverallIterations, 5 TraceHistogramMax, 163.4s AutomataDifference, 0.0s DeadEndRemovalTime, 368.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4114 SDtfs, 4278 SDslu, 41500 SDs, 0 SdLazy, 19101 SolverSat, 1856 SolverUnsat, 20 SolverUnknown, 0 SolverNotchecked, 81.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 11075 GetRequests, 9466 SyntacticMatches, 114 SemanticMatches, 1495 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 9720 ImplicationChecksByTransitivity, 170.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=230occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 1.0s AutomataMinimizationTime, 56 MinimizatonAttempts, 918 StatesRemovedByMinimization, 49 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 20 LocationsWithAnnotation, 343 PreInvPairs, 1285 NumberOfFragments, 3719 HoareAnnotationTreeSize, 343 FomulaSimplifications, 101763471 FormulaSimplificationTreeSizeReduction, 4.3s HoareSimplificationTime, 20 FomulaSimplificationsInter, 8959284 FormulaSimplificationTreeSizeReductionInter, 363.6s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 7.9s SatisfiabilityAnalysisTime, 113.6s InterpolantComputationTime, 6421 NumberOfCodeBlocks, 6402 NumberOfCodeBlocksAsserted, 126 NumberOfCheckSat, 10273 ConstructedInterpolants, 114 QuantifiedInterpolants, 4810317 SizeOfPredicates, 978 NumberOfNonLiveVariables, 11332 ConjunctsInSsa, 1807 ConjunctsInUnsatCore, 155 InterpolantComputations, 20 PerfectInterpolantSequences, 4573/5522 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...