./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5842f4b8 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 447c919af4e106e36f468570351956f4c77293d2 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-5842f4b [2018-11-18 11:49:08,240 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 11:49:08,240 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 11:49:08,247 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 11:49:08,248 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 11:49:08,248 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 11:49:08,249 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 11:49:08,250 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 11:49:08,251 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 11:49:08,252 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 11:49:08,252 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 11:49:08,253 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 11:49:08,253 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 11:49:08,254 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 11:49:08,255 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 11:49:08,256 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 11:49:08,257 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 11:49:08,258 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 11:49:08,259 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 11:49:08,260 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 11:49:08,261 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 11:49:08,262 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 11:49:08,263 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 11:49:08,263 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 11:49:08,264 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 11:49:08,264 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 11:49:08,265 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 11:49:08,265 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 11:49:08,266 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 11:49:08,266 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 11:49:08,267 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 11:49:08,268 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 11:49:08,268 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 11:49:08,268 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 11:49:08,269 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 11:49:08,269 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 11:49:08,269 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-18 11:49:08,277 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 11:49:08,277 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 11:49:08,278 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-11-18 11:49:08,278 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-18 11:49:08,278 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-18 11:49:08,279 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-18 11:49:08,279 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-18 11:49:08,279 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 11:49:08,279 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 11:49:08,279 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-18 11:49:08,279 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 11:49:08,280 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 11:49:08,281 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 11:49:08,281 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-18 11:49:08,281 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 11:49:08,282 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 447c919af4e106e36f468570351956f4c77293d2 [2018-11-18 11:49:08,306 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 11:49:08,315 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 11:49:08,317 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 11:49:08,318 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 11:49:08,318 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 11:49:08,318 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/../../sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c [2018-11-18 11:49:08,354 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/data/b1e48a808/ecf01933bd9542599e3f2782c1251ca4/FLAG956f80eec [2018-11-18 11:49:08,769 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 11:49:08,770 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c [2018-11-18 11:49:08,776 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/data/b1e48a808/ecf01933bd9542599e3f2782c1251ca4/FLAG956f80eec [2018-11-18 11:49:08,786 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/data/b1e48a808/ecf01933bd9542599e3f2782c1251ca4 [2018-11-18 11:49:08,788 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 11:49:08,789 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-18 11:49:08,790 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 11:49:08,790 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 11:49:08,792 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 11:49:08,793 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 11:49:08" (1/1) ... [2018-11-18 11:49:08,795 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3849faec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:08, skipping insertion in model container [2018-11-18 11:49:08,796 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 11:49:08" (1/1) ... [2018-11-18 11:49:08,802 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 11:49:08,825 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 11:49:08,969 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 11:49:08,973 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 11:49:09,004 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 11:49:09,017 INFO L195 MainTranslator]: Completed translation [2018-11-18 11:49:09,017 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09 WrapperNode [2018-11-18 11:49:09,017 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 11:49:09,018 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-18 11:49:09,018 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-18 11:49:09,018 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-18 11:49:09,023 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,029 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,085 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-18 11:49:09,085 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 11:49:09,085 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 11:49:09,085 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 11:49:09,092 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,092 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,094 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,094 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,102 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,111 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,112 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... [2018-11-18 11:49:09,115 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 11:49:09,115 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 11:49:09,116 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 11:49:09,116 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 11:49:09,116 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 11:49:09,165 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2018-11-18 11:49:09,165 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2018-11-18 11:49:09,165 INFO L130 BoogieDeclarations]: Found specification of procedure transmit3 [2018-11-18 11:49:09,165 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit3 [2018-11-18 11:49:09,166 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2018-11-18 11:49:09,166 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2018-11-18 11:49:09,166 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 11:49:09,166 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 11:49:09,166 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-18 11:49:09,166 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-18 11:49:09,166 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-18 11:49:09,166 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-18 11:49:09,166 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2018-11-18 11:49:09,167 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2018-11-18 11:49:09,167 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-18 11:49:09,167 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-18 11:49:09,167 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2018-11-18 11:49:09,167 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2018-11-18 11:49:09,167 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2018-11-18 11:49:09,167 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2018-11-18 11:49:09,167 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-18 11:49:09,167 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-18 11:49:09,168 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2018-11-18 11:49:09,168 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2018-11-18 11:49:09,168 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-18 11:49:09,168 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-18 11:49:09,168 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-18 11:49:09,168 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-18 11:49:09,168 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2018-11-18 11:49:09,168 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2018-11-18 11:49:09,168 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-18 11:49:09,169 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-18 11:49:09,169 INFO L130 BoogieDeclarations]: Found specification of procedure master [2018-11-18 11:49:09,169 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2018-11-18 11:49:09,169 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2018-11-18 11:49:09,169 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2018-11-18 11:49:09,169 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 11:49:09,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 11:49:09,169 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-18 11:49:09,169 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-18 11:49:09,169 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit3_triggered [2018-11-18 11:49:09,170 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit3_triggered [2018-11-18 11:49:09,170 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-18 11:49:09,170 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-18 11:49:09,170 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-18 11:49:09,170 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-18 11:49:09,170 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 11:49:09,170 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 11:49:09,170 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-18 11:49:09,170 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-18 11:49:09,620 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 11:49:09,621 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 11:49:09 BoogieIcfgContainer [2018-11-18 11:49:09,621 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 11:49:09,622 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 11:49:09,622 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 11:49:09,624 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 11:49:09,624 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 11:49:08" (1/3) ... [2018-11-18 11:49:09,625 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50ec2fa0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 11:49:09, skipping insertion in model container [2018-11-18 11:49:09,625 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 11:49:09" (2/3) ... [2018-11-18 11:49:09,625 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50ec2fa0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 11:49:09, skipping insertion in model container [2018-11-18 11:49:09,626 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 11:49:09" (3/3) ... [2018-11-18 11:49:09,627 INFO L112 eAbstractionObserver]: Analyzing ICFG transmitter.03_false-unreach-call_false-termination.cil.c [2018-11-18 11:49:09,636 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 11:49:09,644 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 11:49:09,657 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 11:49:09,684 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 11:49:09,685 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 11:49:09,685 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 11:49:09,685 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 11:49:09,685 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 11:49:09,685 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 11:49:09,685 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 11:49:09,685 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 11:49:09,704 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states. [2018-11-18 11:49:09,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:09,712 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:09,713 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:09,715 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:09,719 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:09,720 INFO L82 PathProgramCache]: Analyzing trace with hash -998916050, now seen corresponding path program 1 times [2018-11-18 11:49:09,722 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:09,753 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:09,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:09,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:09,754 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:09,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:09,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:09,986 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:09,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:09,987 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:09,991 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:09,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:10,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:10,001 INFO L87 Difference]: Start difference. First operand 206 states. Second operand 5 states. [2018-11-18 11:49:10,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:10,595 INFO L93 Difference]: Finished difference Result 427 states and 625 transitions. [2018-11-18 11:49:10,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:10,596 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2018-11-18 11:49:10,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:10,605 INFO L225 Difference]: With dead ends: 427 [2018-11-18 11:49:10,605 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 11:49:10,608 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:10,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 11:49:10,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 197. [2018-11-18 11:49:10,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-18 11:49:10,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 265 transitions. [2018-11-18 11:49:10,661 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 265 transitions. Word has length 107 [2018-11-18 11:49:10,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:10,661 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 265 transitions. [2018-11-18 11:49:10,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:10,662 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 265 transitions. [2018-11-18 11:49:10,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:10,665 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:10,665 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:10,665 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:10,666 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:10,666 INFO L82 PathProgramCache]: Analyzing trace with hash 1416920300, now seen corresponding path program 1 times [2018-11-18 11:49:10,666 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:10,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:10,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:10,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:10,667 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:10,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:10,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:10,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:10,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:10,773 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:10,774 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:10,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:10,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:10,775 INFO L87 Difference]: Start difference. First operand 197 states and 265 transitions. Second operand 5 states. [2018-11-18 11:49:11,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:11,112 INFO L93 Difference]: Finished difference Result 406 states and 563 transitions. [2018-11-18 11:49:11,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:11,112 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2018-11-18 11:49:11,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:11,115 INFO L225 Difference]: With dead ends: 406 [2018-11-18 11:49:11,115 INFO L226 Difference]: Without dead ends: 230 [2018-11-18 11:49:11,116 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:11,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-11-18 11:49:11,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 197. [2018-11-18 11:49:11,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-18 11:49:11,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 264 transitions. [2018-11-18 11:49:11,137 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 264 transitions. Word has length 107 [2018-11-18 11:49:11,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:11,138 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 264 transitions. [2018-11-18 11:49:11,138 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:11,138 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 264 transitions. [2018-11-18 11:49:11,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:11,140 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:11,140 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:11,140 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:11,141 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:11,141 INFO L82 PathProgramCache]: Analyzing trace with hash -1553190802, now seen corresponding path program 1 times [2018-11-18 11:49:11,141 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:11,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:11,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:11,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:11,142 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:11,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:11,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:11,231 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:11,231 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:11,231 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:11,232 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:11,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:11,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:11,233 INFO L87 Difference]: Start difference. First operand 197 states and 264 transitions. Second operand 5 states. [2018-11-18 11:49:11,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:11,475 INFO L93 Difference]: Finished difference Result 404 states and 557 transitions. [2018-11-18 11:49:11,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:11,476 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2018-11-18 11:49:11,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:11,477 INFO L225 Difference]: With dead ends: 404 [2018-11-18 11:49:11,478 INFO L226 Difference]: Without dead ends: 228 [2018-11-18 11:49:11,479 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:11,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-11-18 11:49:11,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 197. [2018-11-18 11:49:11,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-18 11:49:11,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 263 transitions. [2018-11-18 11:49:11,495 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 263 transitions. Word has length 107 [2018-11-18 11:49:11,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:11,496 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 263 transitions. [2018-11-18 11:49:11,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:11,496 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 263 transitions. [2018-11-18 11:49:11,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:11,497 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:11,498 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:11,498 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:11,498 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:11,498 INFO L82 PathProgramCache]: Analyzing trace with hash 13567148, now seen corresponding path program 1 times [2018-11-18 11:49:11,498 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:11,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:11,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:11,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:11,499 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:11,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:11,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:11,574 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:11,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:11,575 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:11,575 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:11,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:11,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:11,576 INFO L87 Difference]: Start difference. First operand 197 states and 263 transitions. Second operand 5 states. [2018-11-18 11:49:11,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:11,879 INFO L93 Difference]: Finished difference Result 424 states and 587 transitions. [2018-11-18 11:49:11,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:11,880 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2018-11-18 11:49:11,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:11,882 INFO L225 Difference]: With dead ends: 424 [2018-11-18 11:49:11,882 INFO L226 Difference]: Without dead ends: 248 [2018-11-18 11:49:11,882 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:11,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-11-18 11:49:11,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 197. [2018-11-18 11:49:11,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-18 11:49:11,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 262 transitions. [2018-11-18 11:49:11,899 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 262 transitions. Word has length 107 [2018-11-18 11:49:11,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:11,900 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 262 transitions. [2018-11-18 11:49:11,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:11,900 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 262 transitions. [2018-11-18 11:49:11,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:11,901 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:11,901 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:11,902 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:11,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:11,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1128935318, now seen corresponding path program 1 times [2018-11-18 11:49:11,902 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:11,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:11,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:11,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:11,903 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:11,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:11,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:11,960 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:11,960 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:11,960 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:11,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:11,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:11,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:11,961 INFO L87 Difference]: Start difference. First operand 197 states and 262 transitions. Second operand 5 states. [2018-11-18 11:49:12,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:12,310 INFO L93 Difference]: Finished difference Result 422 states and 581 transitions. [2018-11-18 11:49:12,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:12,311 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2018-11-18 11:49:12,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:12,312 INFO L225 Difference]: With dead ends: 422 [2018-11-18 11:49:12,313 INFO L226 Difference]: Without dead ends: 246 [2018-11-18 11:49:12,313 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:12,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-11-18 11:49:12,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 197. [2018-11-18 11:49:12,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-18 11:49:12,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 261 transitions. [2018-11-18 11:49:12,332 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 261 transitions. Word has length 107 [2018-11-18 11:49:12,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:12,333 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 261 transitions. [2018-11-18 11:49:12,333 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:12,333 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 261 transitions. [2018-11-18 11:49:12,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:12,334 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:12,334 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:12,334 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:12,334 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:12,335 INFO L82 PathProgramCache]: Analyzing trace with hash -888695572, now seen corresponding path program 1 times [2018-11-18 11:49:12,335 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:12,335 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,336 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:12,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,336 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:12,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:12,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:12,400 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:12,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:12,400 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:12,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:12,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:12,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:12,401 INFO L87 Difference]: Start difference. First operand 197 states and 261 transitions. Second operand 5 states. [2018-11-18 11:49:12,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:12,631 INFO L93 Difference]: Finished difference Result 420 states and 575 transitions. [2018-11-18 11:49:12,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:12,631 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 107 [2018-11-18 11:49:12,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:12,633 INFO L225 Difference]: With dead ends: 420 [2018-11-18 11:49:12,633 INFO L226 Difference]: Without dead ends: 244 [2018-11-18 11:49:12,634 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:12,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2018-11-18 11:49:12,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 197. [2018-11-18 11:49:12,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-11-18 11:49:12,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 260 transitions. [2018-11-18 11:49:12,646 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 260 transitions. Word has length 107 [2018-11-18 11:49:12,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:12,646 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 260 transitions. [2018-11-18 11:49:12,646 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:12,646 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 260 transitions. [2018-11-18 11:49:12,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:12,647 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:12,647 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:12,648 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:12,648 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:12,648 INFO L82 PathProgramCache]: Analyzing trace with hash -49661910, now seen corresponding path program 1 times [2018-11-18 11:49:12,648 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:12,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:12,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,649 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:12,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:12,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:12,704 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:12,704 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:49:12,704 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:12,705 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:49:12,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:49:12,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:12,705 INFO L87 Difference]: Start difference. First operand 197 states and 260 transitions. Second operand 6 states. [2018-11-18 11:49:12,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:12,731 INFO L93 Difference]: Finished difference Result 388 states and 528 transitions. [2018-11-18 11:49:12,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:12,731 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 107 [2018-11-18 11:49:12,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:12,733 INFO L225 Difference]: With dead ends: 388 [2018-11-18 11:49:12,733 INFO L226 Difference]: Without dead ends: 213 [2018-11-18 11:49:12,733 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:12,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-11-18 11:49:12,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 202. [2018-11-18 11:49:12,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-11-18 11:49:12,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 265 transitions. [2018-11-18 11:49:12,745 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 265 transitions. Word has length 107 [2018-11-18 11:49:12,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:12,745 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 265 transitions. [2018-11-18 11:49:12,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:49:12,746 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 265 transitions. [2018-11-18 11:49:12,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:12,746 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:12,746 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:12,747 INFO L423 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:12,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:12,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1735841748, now seen corresponding path program 1 times [2018-11-18 11:49:12,747 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:12,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:12,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,748 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:12,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:12,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:12,803 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:12,803 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:49:12,803 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:12,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:49:12,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:49:12,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:12,804 INFO L87 Difference]: Start difference. First operand 202 states and 265 transitions. Second operand 6 states. [2018-11-18 11:49:12,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:12,843 INFO L93 Difference]: Finished difference Result 392 states and 528 transitions. [2018-11-18 11:49:12,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:12,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 107 [2018-11-18 11:49:12,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:12,845 INFO L225 Difference]: With dead ends: 392 [2018-11-18 11:49:12,845 INFO L226 Difference]: Without dead ends: 212 [2018-11-18 11:49:12,846 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:12,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-11-18 11:49:12,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 207. [2018-11-18 11:49:12,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-11-18 11:49:12,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 270 transitions. [2018-11-18 11:49:12,863 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 270 transitions. Word has length 107 [2018-11-18 11:49:12,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:12,863 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 270 transitions. [2018-11-18 11:49:12,863 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:49:12,863 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 270 transitions. [2018-11-18 11:49:12,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-11-18 11:49:12,864 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:12,864 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:12,865 INFO L423 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:12,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:12,865 INFO L82 PathProgramCache]: Analyzing trace with hash -2088930130, now seen corresponding path program 1 times [2018-11-18 11:49:12,865 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:12,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:12,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:12,866 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:12,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:12,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:12,944 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:12,944 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-18 11:49:12,944 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:12,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:49:12,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:49:12,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:49:12,945 INFO L87 Difference]: Start difference. First operand 207 states and 270 transitions. Second operand 4 states. [2018-11-18 11:49:13,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:13,156 INFO L93 Difference]: Finished difference Result 567 states and 766 transitions. [2018-11-18 11:49:13,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-18 11:49:13,157 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2018-11-18 11:49:13,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:13,159 INFO L225 Difference]: With dead ends: 567 [2018-11-18 11:49:13,159 INFO L226 Difference]: Without dead ends: 382 [2018-11-18 11:49:13,160 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:49:13,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-11-18 11:49:13,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 382. [2018-11-18 11:49:13,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-11-18 11:49:13,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 496 transitions. [2018-11-18 11:49:13,193 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 496 transitions. Word has length 107 [2018-11-18 11:49:13,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:13,194 INFO L480 AbstractCegarLoop]: Abstraction has 382 states and 496 transitions. [2018-11-18 11:49:13,194 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:49:13,194 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 496 transitions. [2018-11-18 11:49:13,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:13,196 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:13,197 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:13,197 INFO L423 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:13,197 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:13,197 INFO L82 PathProgramCache]: Analyzing trace with hash 862112892, now seen corresponding path program 1 times [2018-11-18 11:49:13,197 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:13,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:13,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:13,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:13,198 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:13,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:13,258 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:49:13,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:13,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:13,259 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:13,259 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:13,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:13,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:13,260 INFO L87 Difference]: Start difference. First operand 382 states and 496 transitions. Second operand 5 states. [2018-11-18 11:49:13,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:13,528 INFO L93 Difference]: Finished difference Result 741 states and 966 transitions. [2018-11-18 11:49:13,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:13,528 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-18 11:49:13,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:13,530 INFO L225 Difference]: With dead ends: 741 [2018-11-18 11:49:13,530 INFO L226 Difference]: Without dead ends: 382 [2018-11-18 11:49:13,531 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:13,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-11-18 11:49:13,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 382. [2018-11-18 11:49:13,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-11-18 11:49:13,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 492 transitions. [2018-11-18 11:49:13,550 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 492 transitions. Word has length 129 [2018-11-18 11:49:13,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:13,550 INFO L480 AbstractCegarLoop]: Abstraction has 382 states and 492 transitions. [2018-11-18 11:49:13,550 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:13,550 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 492 transitions. [2018-11-18 11:49:13,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:13,553 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:13,553 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:13,553 INFO L423 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:13,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:13,553 INFO L82 PathProgramCache]: Analyzing trace with hash -2046068994, now seen corresponding path program 1 times [2018-11-18 11:49:13,553 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:13,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:13,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:13,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:13,554 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:13,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:13,625 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:49:13,625 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:13,625 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:13,625 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:13,626 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:13,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:13,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:13,626 INFO L87 Difference]: Start difference. First operand 382 states and 492 transitions. Second operand 5 states. [2018-11-18 11:49:13,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:13,833 INFO L93 Difference]: Finished difference Result 741 states and 958 transitions. [2018-11-18 11:49:13,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:49:13,833 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-18 11:49:13,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:13,835 INFO L225 Difference]: With dead ends: 741 [2018-11-18 11:49:13,835 INFO L226 Difference]: Without dead ends: 382 [2018-11-18 11:49:13,836 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:13,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-11-18 11:49:13,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 382. [2018-11-18 11:49:13,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-11-18 11:49:13,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 488 transitions. [2018-11-18 11:49:13,859 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 488 transitions. Word has length 129 [2018-11-18 11:49:13,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:13,859 INFO L480 AbstractCegarLoop]: Abstraction has 382 states and 488 transitions. [2018-11-18 11:49:13,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:13,860 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 488 transitions. [2018-11-18 11:49:13,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:13,861 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:13,861 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:13,861 INFO L423 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:13,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:13,861 INFO L82 PathProgramCache]: Analyzing trace with hash -1170049988, now seen corresponding path program 1 times [2018-11-18 11:49:13,861 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:13,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:13,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:13,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:13,862 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:13,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:13,932 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:49:13,933 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:13,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:13,933 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:13,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:13,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:13,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:13,934 INFO L87 Difference]: Start difference. First operand 382 states and 488 transitions. Second operand 5 states. [2018-11-18 11:49:14,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:14,258 INFO L93 Difference]: Finished difference Result 918 states and 1193 transitions. [2018-11-18 11:49:14,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:14,258 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-18 11:49:14,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:14,260 INFO L225 Difference]: With dead ends: 918 [2018-11-18 11:49:14,260 INFO L226 Difference]: Without dead ends: 559 [2018-11-18 11:49:14,261 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:14,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 559 states. [2018-11-18 11:49:14,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 559 to 521. [2018-11-18 11:49:14,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 521 states. [2018-11-18 11:49:14,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 660 transitions. [2018-11-18 11:49:14,290 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 660 transitions. Word has length 129 [2018-11-18 11:49:14,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:14,290 INFO L480 AbstractCegarLoop]: Abstraction has 521 states and 660 transitions. [2018-11-18 11:49:14,291 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:14,291 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 660 transitions. [2018-11-18 11:49:14,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:14,292 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:14,292 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:14,293 INFO L423 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:14,293 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:14,293 INFO L82 PathProgramCache]: Analyzing trace with hash -726149314, now seen corresponding path program 1 times [2018-11-18 11:49:14,293 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:14,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:14,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:14,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:14,294 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:14,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:14,356 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:49:14,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:14,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:14,356 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:14,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:14,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:14,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:14,357 INFO L87 Difference]: Start difference. First operand 521 states and 660 transitions. Second operand 5 states. [2018-11-18 11:49:14,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:14,690 INFO L93 Difference]: Finished difference Result 1289 states and 1715 transitions. [2018-11-18 11:49:14,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:14,691 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-18 11:49:14,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:14,693 INFO L225 Difference]: With dead ends: 1289 [2018-11-18 11:49:14,694 INFO L226 Difference]: Without dead ends: 791 [2018-11-18 11:49:14,695 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:14,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 791 states. [2018-11-18 11:49:14,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 791 to 632. [2018-11-18 11:49:14,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 632 states. [2018-11-18 11:49:14,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 786 transitions. [2018-11-18 11:49:14,726 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 786 transitions. Word has length 129 [2018-11-18 11:49:14,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:14,726 INFO L480 AbstractCegarLoop]: Abstraction has 632 states and 786 transitions. [2018-11-18 11:49:14,726 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:14,726 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 786 transitions. [2018-11-18 11:49:14,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:14,728 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:14,728 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:14,728 INFO L423 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:14,728 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:14,728 INFO L82 PathProgramCache]: Analyzing trace with hash 812190716, now seen corresponding path program 1 times [2018-11-18 11:49:14,728 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:14,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:14,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:14,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:14,729 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:14,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:14,781 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:49:14,781 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:14,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:14,781 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:14,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:14,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:14,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:14,782 INFO L87 Difference]: Start difference. First operand 632 states and 786 transitions. Second operand 5 states. [2018-11-18 11:49:15,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:15,151 INFO L93 Difference]: Finished difference Result 1441 states and 1889 transitions. [2018-11-18 11:49:15,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:15,152 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-18 11:49:15,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:15,155 INFO L225 Difference]: With dead ends: 1441 [2018-11-18 11:49:15,155 INFO L226 Difference]: Without dead ends: 832 [2018-11-18 11:49:15,157 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:15,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 832 states. [2018-11-18 11:49:15,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 832 to 713. [2018-11-18 11:49:15,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 713 states. [2018-11-18 11:49:15,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 713 states to 713 states and 872 transitions. [2018-11-18 11:49:15,211 INFO L78 Accepts]: Start accepts. Automaton has 713 states and 872 transitions. Word has length 129 [2018-11-18 11:49:15,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:15,212 INFO L480 AbstractCegarLoop]: Abstraction has 713 states and 872 transitions. [2018-11-18 11:49:15,212 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:15,212 INFO L276 IsEmpty]: Start isEmpty. Operand 713 states and 872 transitions. [2018-11-18 11:49:15,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:15,213 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:15,214 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:15,214 INFO L423 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:15,214 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:15,214 INFO L82 PathProgramCache]: Analyzing trace with hash -1216395394, now seen corresponding path program 1 times [2018-11-18 11:49:15,214 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:15,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:15,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:15,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:15,215 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:15,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:15,266 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:49:15,266 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:15,266 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-18 11:49:15,266 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:15,267 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:49:15,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:49:15,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-18 11:49:15,267 INFO L87 Difference]: Start difference. First operand 713 states and 872 transitions. Second operand 5 states. [2018-11-18 11:49:15,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:15,581 INFO L93 Difference]: Finished difference Result 1590 states and 2019 transitions. [2018-11-18 11:49:15,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:15,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 129 [2018-11-18 11:49:15,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:15,584 INFO L225 Difference]: With dead ends: 1590 [2018-11-18 11:49:15,585 INFO L226 Difference]: Without dead ends: 902 [2018-11-18 11:49:15,586 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:15,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 902 states. [2018-11-18 11:49:15,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 902 to 811. [2018-11-18 11:49:15,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 811 states. [2018-11-18 11:49:15,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 811 states to 811 states and 974 transitions. [2018-11-18 11:49:15,624 INFO L78 Accepts]: Start accepts. Automaton has 811 states and 974 transitions. Word has length 129 [2018-11-18 11:49:15,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:15,624 INFO L480 AbstractCegarLoop]: Abstraction has 811 states and 974 transitions. [2018-11-18 11:49:15,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:49:15,624 INFO L276 IsEmpty]: Start isEmpty. Operand 811 states and 974 transitions. [2018-11-18 11:49:15,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-18 11:49:15,625 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:15,625 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:15,626 INFO L423 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:15,626 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:15,626 INFO L82 PathProgramCache]: Analyzing trace with hash -1697475652, now seen corresponding path program 1 times [2018-11-18 11:49:15,626 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:15,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:15,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:15,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:15,626 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:15,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:15,659 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-18 11:49:15,659 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:15,659 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:49:15,660 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 130 with the following transitions: [2018-11-18 11:49:15,662 INFO L202 CegarAbsIntRunner]: [32], [34], [37], [43], [49], [51], [57], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [256], [258], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [448], [461], [474], [478], [481], [493], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [586], [587], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:49:15,688 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:49:15,688 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:49:15,859 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 11:49:15,860 INFO L272 AbstractInterpreter]: Visited 98 different actions 98 times. Never merged. Never widened. Performed 735 root evaluator evaluations with a maximum evaluation depth of 3. Performed 735 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Never found a fixpoint. Largest state had 46 variables. [2018-11-18 11:49:15,880 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:15,880 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 11:49:16,034 INFO L227 lantSequenceWeakener]: Weakened 107 states. On average, predicates are now at 70.27% of their original sizes. [2018-11-18 11:49:16,034 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 11:49:16,436 INFO L415 sIntCurrentIteration]: We unified 128 AI predicates to 128 [2018-11-18 11:49:16,436 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 11:49:16,437 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:49:16,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [38] imperfect sequences [3] total 39 [2018-11-18 11:49:16,437 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:16,437 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-18 11:49:16,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-18 11:49:16,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=277, Invalid=1129, Unknown=0, NotChecked=0, Total=1406 [2018-11-18 11:49:16,438 INFO L87 Difference]: Start difference. First operand 811 states and 974 transitions. Second operand 38 states. [2018-11-18 11:49:21,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:21,066 INFO L93 Difference]: Finished difference Result 1711 states and 2070 transitions. [2018-11-18 11:49:21,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-18 11:49:21,066 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 129 [2018-11-18 11:49:21,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:21,069 INFO L225 Difference]: With dead ends: 1711 [2018-11-18 11:49:21,069 INFO L226 Difference]: Without dead ends: 915 [2018-11-18 11:49:21,071 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 153 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 995 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=839, Invalid=3067, Unknown=0, NotChecked=0, Total=3906 [2018-11-18 11:49:21,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states. [2018-11-18 11:49:21,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 899. [2018-11-18 11:49:21,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 899 states. [2018-11-18 11:49:21,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 899 states to 899 states and 1060 transitions. [2018-11-18 11:49:21,114 INFO L78 Accepts]: Start accepts. Automaton has 899 states and 1060 transitions. Word has length 129 [2018-11-18 11:49:21,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:21,115 INFO L480 AbstractCegarLoop]: Abstraction has 899 states and 1060 transitions. [2018-11-18 11:49:21,115 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-11-18 11:49:21,115 INFO L276 IsEmpty]: Start isEmpty. Operand 899 states and 1060 transitions. [2018-11-18 11:49:21,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-11-18 11:49:21,117 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:21,117 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:21,117 INFO L423 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:21,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:21,118 INFO L82 PathProgramCache]: Analyzing trace with hash 1313821017, now seen corresponding path program 1 times [2018-11-18 11:49:21,118 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:21,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:21,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:21,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:21,118 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:21,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:21,156 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 9 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-18 11:49:21,156 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:21,156 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:49:21,156 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 133 with the following transitions: [2018-11-18 11:49:21,156 INFO L202 CegarAbsIntRunner]: [32], [34], [37], [43], [49], [51], [57], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [256], [258], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [448], [452], [458], [461], [465], [471], [474], [478], [481], [493], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [586], [587], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:49:21,159 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:49:21,160 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:49:21,223 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 11:49:21,223 INFO L272 AbstractInterpreter]: Visited 116 different actions 136 times. Merged at 12 different actions 12 times. Never widened. Performed 1083 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1083 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 48 variables. [2018-11-18 11:49:21,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:21,232 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 11:49:21,341 INFO L227 lantSequenceWeakener]: Weakened 127 states. On average, predicates are now at 73.59% of their original sizes. [2018-11-18 11:49:21,342 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 11:49:21,843 INFO L415 sIntCurrentIteration]: We unified 131 AI predicates to 131 [2018-11-18 11:49:21,843 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 11:49:21,843 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:49:21,843 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [3] total 47 [2018-11-18 11:49:21,843 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:21,844 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-11-18 11:49:21,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-11-18 11:49:21,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=519, Invalid=1551, Unknown=0, NotChecked=0, Total=2070 [2018-11-18 11:49:21,845 INFO L87 Difference]: Start difference. First operand 899 states and 1060 transitions. Second operand 46 states. [2018-11-18 11:49:34,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:34,068 INFO L93 Difference]: Finished difference Result 4829 states and 6059 transitions. [2018-11-18 11:49:34,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-11-18 11:49:34,068 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 132 [2018-11-18 11:49:34,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:34,077 INFO L225 Difference]: With dead ends: 4829 [2018-11-18 11:49:34,078 INFO L226 Difference]: Without dead ends: 3210 [2018-11-18 11:49:34,084 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 171 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2279 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1586, Invalid=5724, Unknown=0, NotChecked=0, Total=7310 [2018-11-18 11:49:34,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3210 states. [2018-11-18 11:49:34,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3210 to 3115. [2018-11-18 11:49:34,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3115 states. [2018-11-18 11:49:34,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3115 states to 3115 states and 3802 transitions. [2018-11-18 11:49:34,366 INFO L78 Accepts]: Start accepts. Automaton has 3115 states and 3802 transitions. Word has length 132 [2018-11-18 11:49:34,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:34,366 INFO L480 AbstractCegarLoop]: Abstraction has 3115 states and 3802 transitions. [2018-11-18 11:49:34,366 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-11-18 11:49:34,366 INFO L276 IsEmpty]: Start isEmpty. Operand 3115 states and 3802 transitions. [2018-11-18 11:49:34,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-11-18 11:49:34,372 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:34,372 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:34,373 INFO L423 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:34,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:34,373 INFO L82 PathProgramCache]: Analyzing trace with hash 923554158, now seen corresponding path program 1 times [2018-11-18 11:49:34,373 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:34,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:34,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:34,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:34,374 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:34,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:34,454 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 13 proven. 3 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-11-18 11:49:34,454 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:34,454 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:49:34,454 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 198 with the following transitions: [2018-11-18 11:49:34,455 INFO L202 CegarAbsIntRunner]: [2], [13], [19], [21], [29], [32], [34], [37], [43], [49], [51], [57], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [238], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [266], [271], [274], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [338], [340], [342], [343], [346], [352], [358], [364], [368], [371], [382], [388], [390], [392], [396], [402], [404], [412], [415], [416], [417], [421], [427], [430], [433], [439], [442], [445], [452], [455], [461], [465], [471], [474], [478], [481], [493], [496], [501], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [584], [585], [586], [587], [588], [589], [590], [591], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:49:34,457 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:49:34,457 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:49:34,633 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:49:34,633 INFO L272 AbstractInterpreter]: Visited 149 different actions 384 times. Merged at 36 different actions 50 times. Never widened. Performed 4155 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4155 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 8 fixpoints after 6 different actions. Largest state had 48 variables. [2018-11-18 11:49:34,639 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:34,640 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:49:34,640 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:34,640 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:49:34,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:34,649 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:49:34,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:34,744 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:49:34,794 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 11:49:34,794 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:49:35,022 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-11-18 11:49:35,039 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:49:35,039 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 4] imperfect sequences [5] total 7 [2018-11-18 11:49:35,039 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:35,039 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:49:35,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:49:35,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:35,040 INFO L87 Difference]: Start difference. First operand 3115 states and 3802 transitions. Second operand 3 states. [2018-11-18 11:49:35,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:35,384 INFO L93 Difference]: Finished difference Result 8711 states and 11179 transitions. [2018-11-18 11:49:35,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:49:35,385 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 197 [2018-11-18 11:49:35,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:35,405 INFO L225 Difference]: With dead ends: 8711 [2018-11-18 11:49:35,405 INFO L226 Difference]: Without dead ends: 5707 [2018-11-18 11:49:35,416 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 399 GetRequests, 394 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:35,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5707 states. [2018-11-18 11:49:35,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5707 to 5682. [2018-11-18 11:49:35,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5682 states. [2018-11-18 11:49:35,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5682 states to 5682 states and 7113 transitions. [2018-11-18 11:49:35,921 INFO L78 Accepts]: Start accepts. Automaton has 5682 states and 7113 transitions. Word has length 197 [2018-11-18 11:49:35,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:35,922 INFO L480 AbstractCegarLoop]: Abstraction has 5682 states and 7113 transitions. [2018-11-18 11:49:35,922 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:49:35,922 INFO L276 IsEmpty]: Start isEmpty. Operand 5682 states and 7113 transitions. [2018-11-18 11:49:35,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-11-18 11:49:35,933 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:35,933 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:35,933 INFO L423 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:35,933 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:35,933 INFO L82 PathProgramCache]: Analyzing trace with hash -621523665, now seen corresponding path program 1 times [2018-11-18 11:49:35,934 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:35,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:35,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:35,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:35,935 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:35,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:36,018 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-18 11:49:36,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 11:49:36,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-18 11:49:36,018 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:36,020 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:49:36,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:49:36,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:49:36,021 INFO L87 Difference]: Start difference. First operand 5682 states and 7113 transitions. Second operand 6 states. [2018-11-18 11:49:36,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:36,447 INFO L93 Difference]: Finished difference Result 10869 states and 13942 transitions. [2018-11-18 11:49:36,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 11:49:36,448 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 188 [2018-11-18 11:49:36,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:36,468 INFO L225 Difference]: With dead ends: 10869 [2018-11-18 11:49:36,468 INFO L226 Difference]: Without dead ends: 5298 [2018-11-18 11:49:36,483 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:49:36,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5298 states. [2018-11-18 11:49:36,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5298 to 5298. [2018-11-18 11:49:36,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5298 states. [2018-11-18 11:49:37,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5298 states to 5298 states and 6497 transitions. [2018-11-18 11:49:37,003 INFO L78 Accepts]: Start accepts. Automaton has 5298 states and 6497 transitions. Word has length 188 [2018-11-18 11:49:37,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:37,003 INFO L480 AbstractCegarLoop]: Abstraction has 5298 states and 6497 transitions. [2018-11-18 11:49:37,003 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:49:37,003 INFO L276 IsEmpty]: Start isEmpty. Operand 5298 states and 6497 transitions. [2018-11-18 11:49:37,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-11-18 11:49:37,013 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:37,013 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:37,013 INFO L423 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:37,014 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:37,014 INFO L82 PathProgramCache]: Analyzing trace with hash 593652985, now seen corresponding path program 1 times [2018-11-18 11:49:37,014 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:37,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:37,014 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:37,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:37,015 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:37,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:37,110 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-11-18 11:49:37,110 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:37,110 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:49:37,110 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 189 with the following transitions: [2018-11-18 11:49:37,111 INFO L202 CegarAbsIntRunner]: [32], [34], [37], [43], [49], [51], [57], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [452], [458], [465], [468], [471], [478], [481], [493], [496], [499], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:49:37,115 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:49:37,115 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:49:37,173 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 11:49:37,173 INFO L272 AbstractInterpreter]: Visited 118 different actions 138 times. Merged at 13 different actions 13 times. Never widened. Performed 1283 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1283 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 48 variables. [2018-11-18 11:49:37,175 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:37,175 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 11:49:37,308 INFO L227 lantSequenceWeakener]: Weakened 132 states. On average, predicates are now at 69.89% of their original sizes. [2018-11-18 11:49:37,308 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 11:49:37,959 INFO L415 sIntCurrentIteration]: We unified 187 AI predicates to 187 [2018-11-18 11:49:37,959 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 11:49:37,959 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:49:37,959 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [49] imperfect sequences [6] total 53 [2018-11-18 11:49:37,959 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:37,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-11-18 11:49:37,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-11-18 11:49:37,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=579, Invalid=1773, Unknown=0, NotChecked=0, Total=2352 [2018-11-18 11:49:37,961 INFO L87 Difference]: Start difference. First operand 5298 states and 6497 transitions. Second operand 49 states. [2018-11-18 11:49:43,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:43,800 INFO L93 Difference]: Finished difference Result 10632 states and 13080 transitions. [2018-11-18 11:49:43,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-11-18 11:49:43,801 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 188 [2018-11-18 11:49:43,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:43,816 INFO L225 Difference]: With dead ends: 10632 [2018-11-18 11:49:43,817 INFO L226 Difference]: Without dead ends: 5445 [2018-11-18 11:49:43,827 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 224 GetRequests, 140 SyntacticMatches, 0 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2302 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1711, Invalid=5599, Unknown=0, NotChecked=0, Total=7310 [2018-11-18 11:49:43,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5445 states. [2018-11-18 11:49:44,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5445 to 5421. [2018-11-18 11:49:44,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5421 states. [2018-11-18 11:49:44,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5421 states to 5421 states and 6627 transitions. [2018-11-18 11:49:44,286 INFO L78 Accepts]: Start accepts. Automaton has 5421 states and 6627 transitions. Word has length 188 [2018-11-18 11:49:44,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:44,286 INFO L480 AbstractCegarLoop]: Abstraction has 5421 states and 6627 transitions. [2018-11-18 11:49:44,286 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-11-18 11:49:44,286 INFO L276 IsEmpty]: Start isEmpty. Operand 5421 states and 6627 transitions. [2018-11-18 11:49:44,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-18 11:49:44,292 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:44,293 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:44,293 INFO L423 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:44,293 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:44,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1078039902, now seen corresponding path program 1 times [2018-11-18 11:49:44,293 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:44,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:44,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:44,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:44,294 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:44,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:44,348 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 11 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-11-18 11:49:44,348 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:44,348 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:49:44,349 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 194 with the following transitions: [2018-11-18 11:49:44,349 INFO L202 CegarAbsIntRunner]: [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [448], [452], [458], [461], [465], [468], [478], [481], [493], [496], [499], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:49:44,350 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:49:44,350 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:49:44,385 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 11:49:44,385 INFO L272 AbstractInterpreter]: Visited 125 different actions 142 times. Merged at 10 different actions 10 times. Never widened. Performed 1111 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1111 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 48 variables. [2018-11-18 11:49:44,395 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:44,395 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 11:49:44,477 INFO L227 lantSequenceWeakener]: Weakened 142 states. On average, predicates are now at 71.16% of their original sizes. [2018-11-18 11:49:44,477 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 11:49:45,118 INFO L415 sIntCurrentIteration]: We unified 192 AI predicates to 192 [2018-11-18 11:49:45,119 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 11:49:45,119 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:49:45,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [52] imperfect sequences [4] total 54 [2018-11-18 11:49:45,120 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:45,120 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-11-18 11:49:45,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-11-18 11:49:45,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=564, Invalid=2088, Unknown=0, NotChecked=0, Total=2652 [2018-11-18 11:49:45,121 INFO L87 Difference]: Start difference. First operand 5421 states and 6627 transitions. Second operand 52 states. [2018-11-18 11:49:55,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:49:55,623 INFO L93 Difference]: Finished difference Result 10893 states and 13403 transitions. [2018-11-18 11:49:55,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-11-18 11:49:55,623 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 193 [2018-11-18 11:49:55,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:49:55,639 INFO L225 Difference]: With dead ends: 10893 [2018-11-18 11:49:55,639 INFO L226 Difference]: Without dead ends: 5697 [2018-11-18 11:49:55,650 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 227 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2187 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1504, Invalid=5978, Unknown=0, NotChecked=0, Total=7482 [2018-11-18 11:49:55,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5697 states. [2018-11-18 11:49:55,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5697 to 5675. [2018-11-18 11:49:55,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5675 states. [2018-11-18 11:49:55,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5675 states to 5675 states and 6917 transitions. [2018-11-18 11:49:55,991 INFO L78 Accepts]: Start accepts. Automaton has 5675 states and 6917 transitions. Word has length 193 [2018-11-18 11:49:55,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:49:55,991 INFO L480 AbstractCegarLoop]: Abstraction has 5675 states and 6917 transitions. [2018-11-18 11:49:55,991 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-11-18 11:49:55,991 INFO L276 IsEmpty]: Start isEmpty. Operand 5675 states and 6917 transitions. [2018-11-18 11:49:55,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-11-18 11:49:55,999 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:49:55,999 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:49:56,000 INFO L423 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:49:56,000 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:56,000 INFO L82 PathProgramCache]: Analyzing trace with hash -1341929745, now seen corresponding path program 1 times [2018-11-18 11:49:56,000 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:49:56,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:56,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:49:56,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:49:56,001 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:49:56,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:49:56,065 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-11-18 11:49:56,065 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:49:56,065 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:49:56,065 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 195 with the following transitions: [2018-11-18 11:49:56,066 INFO L202 CegarAbsIntRunner]: [2], [13], [19], [21], [29], [32], [34], [37], [43], [49], [51], [57], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [448], [452], [455], [461], [465], [468], [471], [478], [481], [493], [496], [499], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:49:56,070 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:49:56,070 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:49:56,127 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 11:49:56,127 INFO L272 AbstractInterpreter]: Visited 128 different actions 149 times. Merged at 12 different actions 12 times. Never widened. Performed 1328 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1328 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 2 fixpoints after 2 different actions. Largest state had 48 variables. [2018-11-18 11:49:56,129 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:49:56,129 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 11:49:56,253 INFO L227 lantSequenceWeakener]: Weakened 137 states. On average, predicates are now at 69.25% of their original sizes. [2018-11-18 11:49:56,253 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 11:49:56,859 INFO L415 sIntCurrentIteration]: We unified 193 AI predicates to 193 [2018-11-18 11:49:56,859 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 11:49:56,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:49:56,860 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [52] imperfect sequences [4] total 54 [2018-11-18 11:49:56,860 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:49:56,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-11-18 11:49:56,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-11-18 11:49:56,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=482, Invalid=2170, Unknown=0, NotChecked=0, Total=2652 [2018-11-18 11:49:56,861 INFO L87 Difference]: Start difference. First operand 5675 states and 6917 transitions. Second operand 52 states. [2018-11-18 11:50:04,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:04,214 INFO L93 Difference]: Finished difference Result 9528 states and 11624 transitions. [2018-11-18 11:50:04,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-18 11:50:04,214 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 194 [2018-11-18 11:50:04,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:04,225 INFO L225 Difference]: With dead ends: 9528 [2018-11-18 11:50:04,226 INFO L226 Difference]: Without dead ends: 6726 [2018-11-18 11:50:04,231 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 234 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2540 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1390, Invalid=7166, Unknown=0, NotChecked=0, Total=8556 [2018-11-18 11:50:04,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6726 states. [2018-11-18 11:50:04,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6726 to 6631. [2018-11-18 11:50:04,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6631 states. [2018-11-18 11:50:04,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6631 states to 6631 states and 8018 transitions. [2018-11-18 11:50:04,600 INFO L78 Accepts]: Start accepts. Automaton has 6631 states and 8018 transitions. Word has length 194 [2018-11-18 11:50:04,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:04,600 INFO L480 AbstractCegarLoop]: Abstraction has 6631 states and 8018 transitions. [2018-11-18 11:50:04,600 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-11-18 11:50:04,600 INFO L276 IsEmpty]: Start isEmpty. Operand 6631 states and 8018 transitions. [2018-11-18 11:50:04,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-11-18 11:50:04,609 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:04,609 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:04,609 INFO L423 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:04,609 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:04,609 INFO L82 PathProgramCache]: Analyzing trace with hash -391541420, now seen corresponding path program 1 times [2018-11-18 11:50:04,610 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:04,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:04,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:04,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:04,610 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:04,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:04,682 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-11-18 11:50:04,683 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:04,683 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:04,684 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 197 with the following transitions: [2018-11-18 11:50:04,684 INFO L202 CegarAbsIntRunner]: [2], [13], [19], [21], [29], [32], [34], [37], [43], [49], [51], [57], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [452], [455], [458], [465], [468], [471], [478], [481], [493], [496], [499], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:04,685 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:04,685 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:04,738 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:04,738 INFO L272 AbstractInterpreter]: Visited 130 different actions 204 times. Merged at 17 different actions 32 times. Never widened. Performed 1960 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1960 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 4 fixpoints after 3 different actions. Largest state had 48 variables. [2018-11-18 11:50:04,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:04,751 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:04,751 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:04,751 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:04,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:04,768 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:04,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:04,834 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:04,873 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:50:04,873 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:04,974 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-11-18 11:50:04,991 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:50:04,991 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 4] imperfect sequences [6] total 7 [2018-11-18 11:50:04,991 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:04,991 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:50:04,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:50:04,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:50:04,992 INFO L87 Difference]: Start difference. First operand 6631 states and 8018 transitions. Second operand 3 states. [2018-11-18 11:50:05,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:05,630 INFO L93 Difference]: Finished difference Result 15136 states and 19492 transitions. [2018-11-18 11:50:05,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:50:05,630 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 196 [2018-11-18 11:50:05,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:05,657 INFO L225 Difference]: With dead ends: 15136 [2018-11-18 11:50:05,657 INFO L226 Difference]: Without dead ends: 9949 [2018-11-18 11:50:05,672 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 398 GetRequests, 389 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-18 11:50:05,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9949 states. [2018-11-18 11:50:06,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9949 to 9881. [2018-11-18 11:50:06,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9881 states. [2018-11-18 11:50:06,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9881 states to 9881 states and 12270 transitions. [2018-11-18 11:50:06,330 INFO L78 Accepts]: Start accepts. Automaton has 9881 states and 12270 transitions. Word has length 196 [2018-11-18 11:50:06,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:06,330 INFO L480 AbstractCegarLoop]: Abstraction has 9881 states and 12270 transitions. [2018-11-18 11:50:06,330 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:50:06,330 INFO L276 IsEmpty]: Start isEmpty. Operand 9881 states and 12270 transitions. [2018-11-18 11:50:06,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-11-18 11:50:06,337 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:06,337 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:06,337 INFO L423 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:06,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:06,337 INFO L82 PathProgramCache]: Analyzing trace with hash 838294358, now seen corresponding path program 1 times [2018-11-18 11:50:06,337 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:06,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:06,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:06,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:06,338 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:06,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:06,423 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-11-18 11:50:06,423 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:06,423 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:06,423 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 198 with the following transitions: [2018-11-18 11:50:06,424 INFO L202 CegarAbsIntRunner]: [2], [13], [19], [21], [29], [32], [34], [37], [43], [49], [51], [57], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [110], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [452], [455], [458], [465], [468], [471], [478], [481], [493], [496], [499], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:06,426 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:06,427 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:06,530 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:06,530 INFO L272 AbstractInterpreter]: Visited 131 different actions 227 times. Merged at 17 different actions 42 times. Never widened. Performed 2494 root evaluator evaluations with a maximum evaluation depth of 3. Performed 2494 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 5 fixpoints after 2 different actions. Largest state had 48 variables. [2018-11-18 11:50:06,552 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:06,552 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:06,552 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:06,552 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:06,560 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:06,560 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:06,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:06,620 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:06,704 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 4 proven. 38 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:50:06,704 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:06,813 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-18 11:50:06,830 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:50:06,830 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5, 5] total 9 [2018-11-18 11:50:06,830 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:06,830 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:50:06,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:50:06,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:50:06,831 INFO L87 Difference]: Start difference. First operand 9881 states and 12270 transitions. Second operand 5 states. [2018-11-18 11:50:07,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:07,900 INFO L93 Difference]: Finished difference Result 15723 states and 19854 transitions. [2018-11-18 11:50:07,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:50:07,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 197 [2018-11-18 11:50:07,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:07,920 INFO L225 Difference]: With dead ends: 15723 [2018-11-18 11:50:07,920 INFO L226 Difference]: Without dead ends: 10578 [2018-11-18 11:50:07,930 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 399 GetRequests, 387 SyntacticMatches, 5 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:50:07,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10578 states. [2018-11-18 11:50:08,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10578 to 10509. [2018-11-18 11:50:08,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10509 states. [2018-11-18 11:50:08,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10509 states to 10509 states and 13005 transitions. [2018-11-18 11:50:08,576 INFO L78 Accepts]: Start accepts. Automaton has 10509 states and 13005 transitions. Word has length 197 [2018-11-18 11:50:08,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:08,576 INFO L480 AbstractCegarLoop]: Abstraction has 10509 states and 13005 transitions. [2018-11-18 11:50:08,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:50:08,577 INFO L276 IsEmpty]: Start isEmpty. Operand 10509 states and 13005 transitions. [2018-11-18 11:50:08,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-11-18 11:50:08,583 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:08,583 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:08,584 INFO L423 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:08,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:08,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1734733702, now seen corresponding path program 1 times [2018-11-18 11:50:08,584 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:08,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:08,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:08,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:08,585 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:08,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:08,654 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 18 proven. 12 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-11-18 11:50:08,654 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:08,654 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:08,654 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 213 with the following transitions: [2018-11-18 11:50:08,655 INFO L202 CegarAbsIntRunner]: [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [110], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [448], [452], [458], [461], [465], [468], [471], [478], [481], [487], [493], [496], [499], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:08,656 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:08,656 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:08,783 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:08,784 INFO L272 AbstractInterpreter]: Visited 142 different actions 325 times. Merged at 33 different actions 68 times. Never widened. Performed 2888 root evaluator evaluations with a maximum evaluation depth of 3. Performed 2888 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 10 fixpoints after 6 different actions. Largest state had 48 variables. [2018-11-18 11:50:08,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:08,785 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:08,785 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:08,785 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:08,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:08,792 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:08,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:08,854 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:08,893 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-18 11:50:08,893 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:08,990 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2018-11-18 11:50:09,006 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:50:09,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 3] total 6 [2018-11-18 11:50:09,007 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:09,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:50:09,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:50:09,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:50:09,007 INFO L87 Difference]: Start difference. First operand 10509 states and 13005 transitions. Second operand 3 states. [2018-11-18 11:50:09,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:09,611 INFO L93 Difference]: Finished difference Result 14866 states and 18623 transitions. [2018-11-18 11:50:09,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:50:09,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 212 [2018-11-18 11:50:09,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:09,634 INFO L225 Difference]: With dead ends: 14866 [2018-11-18 11:50:09,634 INFO L226 Difference]: Without dead ends: 9118 [2018-11-18 11:50:09,647 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 428 GetRequests, 424 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:50:09,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9118 states. [2018-11-18 11:50:10,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9118 to 9108. [2018-11-18 11:50:10,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9108 states. [2018-11-18 11:50:10,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9108 states to 9108 states and 11051 transitions. [2018-11-18 11:50:10,267 INFO L78 Accepts]: Start accepts. Automaton has 9108 states and 11051 transitions. Word has length 212 [2018-11-18 11:50:10,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:10,267 INFO L480 AbstractCegarLoop]: Abstraction has 9108 states and 11051 transitions. [2018-11-18 11:50:10,267 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:50:10,268 INFO L276 IsEmpty]: Start isEmpty. Operand 9108 states and 11051 transitions. [2018-11-18 11:50:10,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2018-11-18 11:50:10,276 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:10,276 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:10,276 INFO L423 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:10,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:10,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1472919821, now seen corresponding path program 1 times [2018-11-18 11:50:10,276 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:10,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:10,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:10,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:10,277 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:10,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:10,359 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 20 proven. 12 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-11-18 11:50:10,360 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:10,360 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:10,360 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 269 with the following transitions: [2018-11-18 11:50:10,360 INFO L202 CegarAbsIntRunner]: [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [448], [452], [455], [458], [465], [468], [471], [478], [481], [487], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:10,361 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:10,361 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:10,510 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:10,510 INFO L272 AbstractInterpreter]: Visited 147 different actions 512 times. Merged at 34 different actions 103 times. Never widened. Performed 5267 root evaluator evaluations with a maximum evaluation depth of 3. Performed 5267 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 14 fixpoints after 6 different actions. Largest state had 48 variables. [2018-11-18 11:50:10,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:10,515 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:10,515 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:10,515 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:10,522 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:10,522 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:10,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:10,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:10,621 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-11-18 11:50:10,621 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:10,750 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-11-18 11:50:10,767 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:50:10,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [4] total 4 [2018-11-18 11:50:10,767 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:10,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:50:10,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:50:10,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:50:10,768 INFO L87 Difference]: Start difference. First operand 9108 states and 11051 transitions. Second operand 3 states. [2018-11-18 11:50:11,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:11,595 INFO L93 Difference]: Finished difference Result 21680 states and 27413 transitions. [2018-11-18 11:50:11,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:50:11,595 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 268 [2018-11-18 11:50:11,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:11,621 INFO L225 Difference]: With dead ends: 21680 [2018-11-18 11:50:11,621 INFO L226 Difference]: Without dead ends: 13940 [2018-11-18 11:50:11,634 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 540 GetRequests, 536 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-18 11:50:11,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13940 states. [2018-11-18 11:50:12,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13940 to 13369. [2018-11-18 11:50:12,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13369 states. [2018-11-18 11:50:12,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13369 states to 13369 states and 16711 transitions. [2018-11-18 11:50:12,448 INFO L78 Accepts]: Start accepts. Automaton has 13369 states and 16711 transitions. Word has length 268 [2018-11-18 11:50:12,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:12,448 INFO L480 AbstractCegarLoop]: Abstraction has 13369 states and 16711 transitions. [2018-11-18 11:50:12,448 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:50:12,448 INFO L276 IsEmpty]: Start isEmpty. Operand 13369 states and 16711 transitions. [2018-11-18 11:50:12,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 437 [2018-11-18 11:50:12,463 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:12,464 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:12,464 INFO L423 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:12,464 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:12,464 INFO L82 PathProgramCache]: Analyzing trace with hash 1070371060, now seen corresponding path program 1 times [2018-11-18 11:50:12,464 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:12,465 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:12,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:12,465 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:12,465 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:12,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:12,626 INFO L134 CoverageAnalysis]: Checked inductivity of 557 backedges. 41 proven. 26 refuted. 0 times theorem prover too weak. 490 trivial. 0 not checked. [2018-11-18 11:50:12,627 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:12,627 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:12,627 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 437 with the following transitions: [2018-11-18 11:50:12,627 INFO L202 CegarAbsIntRunner]: [2], [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [96], [98], [101], [105], [106], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [169], [172], [176], [178], [180], [181], [225], [227], [230], [232], [235], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [266], [269], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [334], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [371], [382], [388], [390], [392], [396], [402], [404], [412], [415], [416], [417], [421], [427], [430], [433], [435], [439], [442], [445], [448], [452], [455], [461], [465], [468], [471], [478], [481], [484], [492], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [528], [530], [535], [543], [546], [551], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [572], [573], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [584], [585], [586], [587], [588], [589], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [607], [608], [609], [610], [611], [612], [613], [614], [615], [616], [617], [624], [625], [626], [627], [628] [2018-11-18 11:50:12,629 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:12,629 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:13,152 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:13,152 INFO L272 AbstractInterpreter]: Visited 180 different actions 1844 times. Merged at 64 different actions 349 times. Widened at 1 different actions 2 times. Performed 17498 root evaluator evaluations with a maximum evaluation depth of 3. Performed 17498 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 88 fixpoints after 20 different actions. Largest state had 48 variables. [2018-11-18 11:50:13,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:13,155 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:13,155 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:13,155 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:13,218 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:13,218 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:13,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:13,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:13,402 INFO L134 CoverageAnalysis]: Checked inductivity of 557 backedges. 404 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-11-18 11:50:13,402 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:13,622 INFO L134 CoverageAnalysis]: Checked inductivity of 557 backedges. 125 proven. 0 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2018-11-18 11:50:13,640 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:50:13,640 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 4] imperfect sequences [8] total 10 [2018-11-18 11:50:13,640 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:13,640 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:50:13,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:50:13,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-18 11:50:13,641 INFO L87 Difference]: Start difference. First operand 13369 states and 16711 transitions. Second operand 3 states. [2018-11-18 11:50:14,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:14,550 INFO L93 Difference]: Finished difference Result 27321 states and 35619 transitions. [2018-11-18 11:50:14,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:50:14,550 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 436 [2018-11-18 11:50:14,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:14,580 INFO L225 Difference]: With dead ends: 27321 [2018-11-18 11:50:14,580 INFO L226 Difference]: Without dead ends: 14219 [2018-11-18 11:50:14,608 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 882 GetRequests, 872 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-18 11:50:14,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14219 states. [2018-11-18 11:50:15,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14219 to 14205. [2018-11-18 11:50:15,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14205 states. [2018-11-18 11:50:15,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14205 states to 14205 states and 17176 transitions. [2018-11-18 11:50:15,572 INFO L78 Accepts]: Start accepts. Automaton has 14205 states and 17176 transitions. Word has length 436 [2018-11-18 11:50:15,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:15,572 INFO L480 AbstractCegarLoop]: Abstraction has 14205 states and 17176 transitions. [2018-11-18 11:50:15,573 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:50:15,573 INFO L276 IsEmpty]: Start isEmpty. Operand 14205 states and 17176 transitions. [2018-11-18 11:50:15,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2018-11-18 11:50:15,584 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:15,584 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:15,584 INFO L423 AbstractCegarLoop]: === Iteration 28 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:15,584 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:15,584 INFO L82 PathProgramCache]: Analyzing trace with hash -361520265, now seen corresponding path program 1 times [2018-11-18 11:50:15,585 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:15,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:15,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:15,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:15,585 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:15,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:15,731 INFO L134 CoverageAnalysis]: Checked inductivity of 404 backedges. 42 proven. 26 refuted. 0 times theorem prover too weak. 336 trivial. 0 not checked. [2018-11-18 11:50:15,731 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:15,731 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:15,731 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 383 with the following transitions: [2018-11-18 11:50:15,731 INFO L202 CegarAbsIntRunner]: [2], [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [96], [98], [101], [105], [106], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [435], [439], [445], [452], [455], [461], [465], [468], [471], [478], [481], [484], [492], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [528], [530], [535], [543], [546], [551], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [572], [573], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [607], [608], [609], [610], [611], [612], [613], [614], [615], [616], [617], [624], [625], [626], [627], [628] [2018-11-18 11:50:15,735 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:15,735 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:15,875 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:15,875 INFO L272 AbstractInterpreter]: Visited 159 different actions 663 times. Merged at 43 different actions 108 times. Never widened. Performed 5134 root evaluator evaluations with a maximum evaluation depth of 3. Performed 5134 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 30 fixpoints after 11 different actions. Largest state had 48 variables. [2018-11-18 11:50:15,876 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:15,877 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:15,877 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:15,877 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:15,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:15,883 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:15,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:15,971 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:16,045 INFO L134 CoverageAnalysis]: Checked inductivity of 404 backedges. 227 proven. 0 refuted. 0 times theorem prover too weak. 177 trivial. 0 not checked. [2018-11-18 11:50:16,045 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:16,226 INFO L134 CoverageAnalysis]: Checked inductivity of 404 backedges. 47 proven. 12 refuted. 0 times theorem prover too weak. 345 trivial. 0 not checked. [2018-11-18 11:50:16,242 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:50:16,242 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8, 6] total 12 [2018-11-18 11:50:16,242 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:16,243 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 11:50:16,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 11:50:16,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-11-18 11:50:16,243 INFO L87 Difference]: Start difference. First operand 14205 states and 17176 transitions. Second operand 6 states. [2018-11-18 11:50:16,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:16,888 INFO L93 Difference]: Finished difference Result 22349 states and 27424 transitions. [2018-11-18 11:50:16,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 11:50:16,889 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 382 [2018-11-18 11:50:16,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:16,902 INFO L225 Difference]: With dead ends: 22349 [2018-11-18 11:50:16,902 INFO L226 Difference]: Without dead ends: 8409 [2018-11-18 11:50:16,915 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 776 GetRequests, 758 SyntacticMatches, 6 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-11-18 11:50:16,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8409 states. [2018-11-18 11:50:17,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8409 to 7740. [2018-11-18 11:50:17,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7740 states. [2018-11-18 11:50:17,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7740 states to 7740 states and 9084 transitions. [2018-11-18 11:50:17,393 INFO L78 Accepts]: Start accepts. Automaton has 7740 states and 9084 transitions. Word has length 382 [2018-11-18 11:50:17,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:17,394 INFO L480 AbstractCegarLoop]: Abstraction has 7740 states and 9084 transitions. [2018-11-18 11:50:17,394 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 11:50:17,394 INFO L276 IsEmpty]: Start isEmpty. Operand 7740 states and 9084 transitions. [2018-11-18 11:50:17,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2018-11-18 11:50:17,401 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:17,401 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:17,401 INFO L423 AbstractCegarLoop]: === Iteration 29 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:17,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:17,401 INFO L82 PathProgramCache]: Analyzing trace with hash 1278101191, now seen corresponding path program 1 times [2018-11-18 11:50:17,402 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:17,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:17,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:17,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:17,402 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:17,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:17,523 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 10 proven. 28 refuted. 0 times theorem prover too weak. 142 trivial. 0 not checked. [2018-11-18 11:50:17,523 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:17,523 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:17,523 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 270 with the following transitions: [2018-11-18 11:50:17,524 INFO L202 CegarAbsIntRunner]: [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [452], [455], [458], [465], [468], [471], [478], [481], [487], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:17,525 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:17,525 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:17,631 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:17,631 INFO L272 AbstractInterpreter]: Visited 146 different actions 314 times. Merged at 31 different actions 56 times. Never widened. Performed 2797 root evaluator evaluations with a maximum evaluation depth of 3. Performed 2797 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 10 fixpoints after 5 different actions. Largest state had 48 variables. [2018-11-18 11:50:17,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:17,644 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:17,644 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:17,644 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:17,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:17,652 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:17,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:17,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:17,813 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 97 proven. 38 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-18 11:50:17,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:17,977 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 170 trivial. 0 not checked. [2018-11-18 11:50:17,993 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:50:17,993 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5, 5] total 9 [2018-11-18 11:50:17,993 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:17,994 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-18 11:50:17,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-18 11:50:17,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:50:17,994 INFO L87 Difference]: Start difference. First operand 7740 states and 9084 transitions. Second operand 5 states. [2018-11-18 11:50:18,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:18,748 INFO L93 Difference]: Finished difference Result 14092 states and 16759 transitions. [2018-11-18 11:50:18,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:50:18,748 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 269 [2018-11-18 11:50:18,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:18,762 INFO L225 Difference]: With dead ends: 14092 [2018-11-18 11:50:18,763 INFO L226 Difference]: Without dead ends: 8427 [2018-11-18 11:50:18,771 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 543 GetRequests, 531 SyntacticMatches, 5 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:50:18,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8427 states. [2018-11-18 11:50:19,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8427 to 8147. [2018-11-18 11:50:19,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8147 states. [2018-11-18 11:50:19,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8147 states to 8147 states and 9580 transitions. [2018-11-18 11:50:19,368 INFO L78 Accepts]: Start accepts. Automaton has 8147 states and 9580 transitions. Word has length 269 [2018-11-18 11:50:19,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:19,368 INFO L480 AbstractCegarLoop]: Abstraction has 8147 states and 9580 transitions. [2018-11-18 11:50:19,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-18 11:50:19,368 INFO L276 IsEmpty]: Start isEmpty. Operand 8147 states and 9580 transitions. [2018-11-18 11:50:19,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2018-11-18 11:50:19,372 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:19,372 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:19,372 INFO L423 AbstractCegarLoop]: === Iteration 30 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:19,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:19,373 INFO L82 PathProgramCache]: Analyzing trace with hash 771364490, now seen corresponding path program 1 times [2018-11-18 11:50:19,373 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:19,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:19,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:19,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:19,373 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:19,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:19,470 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 17 proven. 8 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-11-18 11:50:19,470 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:19,470 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:19,470 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 260 with the following transitions: [2018-11-18 11:50:19,472 INFO L202 CegarAbsIntRunner]: [2], [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [452], [455], [465], [468], [478], [481], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:19,473 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:19,474 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:19,531 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-11-18 11:50:19,531 INFO L272 AbstractInterpreter]: Visited 134 different actions 147 times. Merged at 8 different actions 8 times. Never widened. Performed 1135 root evaluator evaluations with a maximum evaluation depth of 3. Performed 1135 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 1 fixpoints after 1 different actions. Largest state had 48 variables. [2018-11-18 11:50:19,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:19,543 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-11-18 11:50:19,663 INFO L227 lantSequenceWeakener]: Weakened 158 states. On average, predicates are now at 70.72% of their original sizes. [2018-11-18 11:50:19,664 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-11-18 11:50:20,408 INFO L415 sIntCurrentIteration]: We unified 258 AI predicates to 258 [2018-11-18 11:50:20,408 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-11-18 11:50:20,408 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-18 11:50:20,408 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [55] imperfect sequences [4] total 57 [2018-11-18 11:50:20,408 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:20,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-11-18 11:50:20,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-11-18 11:50:20,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=511, Invalid=2459, Unknown=0, NotChecked=0, Total=2970 [2018-11-18 11:50:20,410 INFO L87 Difference]: Start difference. First operand 8147 states and 9580 transitions. Second operand 55 states. [2018-11-18 11:50:26,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:26,321 INFO L93 Difference]: Finished difference Result 12377 states and 14533 transitions. [2018-11-18 11:50:26,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-11-18 11:50:26,321 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 259 [2018-11-18 11:50:26,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:26,335 INFO L225 Difference]: With dead ends: 12377 [2018-11-18 11:50:26,335 INFO L226 Difference]: Without dead ends: 8206 [2018-11-18 11:50:26,343 INFO L604 BasicCegarLoop]: 2 DeclaredPredicates, 294 GetRequests, 205 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2392 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1310, Invalid=6880, Unknown=0, NotChecked=0, Total=8190 [2018-11-18 11:50:26,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8206 states. [2018-11-18 11:50:26,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8206 to 8192. [2018-11-18 11:50:26,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8192 states. [2018-11-18 11:50:26,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8192 states to 8192 states and 9628 transitions. [2018-11-18 11:50:26,851 INFO L78 Accepts]: Start accepts. Automaton has 8192 states and 9628 transitions. Word has length 259 [2018-11-18 11:50:26,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:26,851 INFO L480 AbstractCegarLoop]: Abstraction has 8192 states and 9628 transitions. [2018-11-18 11:50:26,851 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-11-18 11:50:26,852 INFO L276 IsEmpty]: Start isEmpty. Operand 8192 states and 9628 transitions. [2018-11-18 11:50:26,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-11-18 11:50:26,857 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:26,857 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:26,857 INFO L423 AbstractCegarLoop]: === Iteration 31 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:26,857 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:26,857 INFO L82 PathProgramCache]: Analyzing trace with hash 1725477032, now seen corresponding path program 1 times [2018-11-18 11:50:26,858 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:26,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:26,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:26,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:26,858 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:26,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:26,929 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-18 11:50:26,929 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:26,929 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:26,930 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 276 with the following transitions: [2018-11-18 11:50:26,930 INFO L202 CegarAbsIntRunner]: [2], [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [415], [416], [417], [421], [427], [430], [433], [439], [445], [452], [455], [461], [465], [468], [471], [478], [481], [487], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [586], [587], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [626], [627], [628] [2018-11-18 11:50:26,932 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:26,932 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:27,055 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:27,055 INFO L272 AbstractInterpreter]: Visited 158 different actions 523 times. Merged at 41 different actions 89 times. Never widened. Performed 4775 root evaluator evaluations with a maximum evaluation depth of 3. Performed 4775 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 24 fixpoints after 11 different actions. Largest state had 48 variables. [2018-11-18 11:50:27,071 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:27,072 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:27,072 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:27,072 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:27,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:27,078 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:27,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:27,146 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:27,262 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2018-11-18 11:50:27,262 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:27,409 INFO L134 CoverageAnalysis]: Checked inductivity of 185 backedges. 28 proven. 8 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2018-11-18 11:50:27,434 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:50:27,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [4, 4] total 8 [2018-11-18 11:50:27,434 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:27,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-18 11:50:27,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-18 11:50:27,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-18 11:50:27,435 INFO L87 Difference]: Start difference. First operand 8192 states and 9628 transitions. Second operand 4 states. [2018-11-18 11:50:28,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:28,520 INFO L93 Difference]: Finished difference Result 19528 states and 23943 transitions. [2018-11-18 11:50:28,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-18 11:50:28,520 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 275 [2018-11-18 11:50:28,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:28,543 INFO L225 Difference]: With dead ends: 19528 [2018-11-18 11:50:28,543 INFO L226 Difference]: Without dead ends: 13460 [2018-11-18 11:50:28,554 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 557 GetRequests, 550 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-11-18 11:50:28,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13460 states. [2018-11-18 11:50:29,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13460 to 12680. [2018-11-18 11:50:29,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12680 states. [2018-11-18 11:50:29,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12680 states to 12680 states and 15444 transitions. [2018-11-18 11:50:29,345 INFO L78 Accepts]: Start accepts. Automaton has 12680 states and 15444 transitions. Word has length 275 [2018-11-18 11:50:29,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:29,345 INFO L480 AbstractCegarLoop]: Abstraction has 12680 states and 15444 transitions. [2018-11-18 11:50:29,345 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-18 11:50:29,345 INFO L276 IsEmpty]: Start isEmpty. Operand 12680 states and 15444 transitions. [2018-11-18 11:50:29,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 451 [2018-11-18 11:50:29,355 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:29,355 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:29,355 INFO L423 AbstractCegarLoop]: === Iteration 32 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:29,355 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:29,356 INFO L82 PathProgramCache]: Analyzing trace with hash 950603867, now seen corresponding path program 1 times [2018-11-18 11:50:29,356 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:29,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:29,356 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:29,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:29,356 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:29,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:29,469 INFO L134 CoverageAnalysis]: Checked inductivity of 578 backedges. 39 proven. 88 refuted. 0 times theorem prover too weak. 451 trivial. 0 not checked. [2018-11-18 11:50:29,469 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:29,469 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-11-18 11:50:29,470 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 451 with the following transitions: [2018-11-18 11:50:29,470 INFO L202 CegarAbsIntRunner]: [2], [4], [7], [13], [19], [21], [23], [25], [29], [32], [34], [37], [43], [49], [51], [57], [60], [62], [65], [71], [77], [79], [81], [83], [87], [88], [93], [96], [98], [101], [105], [106], [107], [110], [113], [115], [117], [119], [121], [122], [127], [133], [139], [145], [151], [157], [163], [165], [166], [176], [178], [180], [181], [225], [227], [232], [235], [238], [240], [243], [246], [248], [251], [254], [256], [258], [260], [261], [264], [266], [271], [276], [281], [283], [284], [289], [295], [301], [307], [313], [319], [325], [327], [328], [331], [334], [336], [338], [340], [342], [343], [346], [352], [358], [364], [368], [371], [373], [376], [382], [388], [390], [392], [396], [402], [404], [412], [415], [416], [417], [421], [427], [430], [433], [435], [439], [442], [445], [452], [455], [461], [465], [468], [474], [478], [481], [484], [492], [493], [496], [499], [501], [503], [505], [507], [508], [509], [518], [524], [526], [528], [530], [535], [543], [546], [551], [556], [560], [561], [562], [563], [564], [566], [567], [568], [569], [570], [572], [573], [574], [575], [576], [577], [578], [579], [580], [581], [582], [583], [584], [585], [586], [587], [588], [589], [590], [591], [592], [593], [594], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [607], [608], [609], [610], [611], [612], [613], [614], [615], [616], [617], [624], [625], [626], [627], [628] [2018-11-18 11:50:29,472 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, ExplicitValueDomain] [2018-11-18 11:50:29,472 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-11-18 11:50:31,124 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-11-18 11:50:31,124 INFO L272 AbstractInterpreter]: Visited 208 different actions 5312 times. Merged at 84 different actions 1043 times. Widened at 1 different actions 2 times. Performed 47919 root evaluator evaluations with a maximum evaluation depth of 3. Performed 47919 inverse root evaluator evaluations with a maximum inverse evaluation depth of 3. Found 319 fixpoints after 26 different actions. Largest state had 48 variables. [2018-11-18 11:50:31,127 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:31,127 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-11-18 11:50:31,127 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-18 11:50:31,127 INFO L192 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-18 11:50:31,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:31,134 INFO L286 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-11-18 11:50:31,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 11:50:31,227 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 11:50:31,299 INFO L134 CoverageAnalysis]: Checked inductivity of 578 backedges. 311 proven. 0 refuted. 0 times theorem prover too weak. 267 trivial. 0 not checked. [2018-11-18 11:50:31,299 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 11:50:31,495 INFO L134 CoverageAnalysis]: Checked inductivity of 578 backedges. 70 proven. 53 refuted. 0 times theorem prover too weak. 455 trivial. 0 not checked. [2018-11-18 11:50:31,511 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-11-18 11:50:31,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [5, 4] total 6 [2018-11-18 11:50:31,511 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-18 11:50:31,512 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 11:50:31,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 11:50:31,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:50:31,512 INFO L87 Difference]: Start difference. First operand 12680 states and 15444 transitions. Second operand 3 states. [2018-11-18 11:50:32,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 11:50:32,364 INFO L93 Difference]: Finished difference Result 23473 states and 29103 transitions. [2018-11-18 11:50:32,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 11:50:32,364 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 450 [2018-11-18 11:50:32,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 11:50:32,385 INFO L225 Difference]: With dead ends: 23473 [2018-11-18 11:50:32,385 INFO L226 Difference]: Without dead ends: 11246 [2018-11-18 11:50:32,400 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 906 GetRequests, 902 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-18 11:50:32,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11246 states. [2018-11-18 11:50:33,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11246 to 10625. [2018-11-18 11:50:33,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10625 states. [2018-11-18 11:50:33,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10625 states to 10625 states and 12448 transitions. [2018-11-18 11:50:33,070 INFO L78 Accepts]: Start accepts. Automaton has 10625 states and 12448 transitions. Word has length 450 [2018-11-18 11:50:33,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 11:50:33,070 INFO L480 AbstractCegarLoop]: Abstraction has 10625 states and 12448 transitions. [2018-11-18 11:50:33,070 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 11:50:33,071 INFO L276 IsEmpty]: Start isEmpty. Operand 10625 states and 12448 transitions. [2018-11-18 11:50:33,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 318 [2018-11-18 11:50:33,077 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 11:50:33,077 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 11:50:33,078 INFO L423 AbstractCegarLoop]: === Iteration 33 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 11:50:33,078 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 11:50:33,078 INFO L82 PathProgramCache]: Analyzing trace with hash -618683431, now seen corresponding path program 1 times [2018-11-18 11:50:33,078 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-18 11:50:33,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:33,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 11:50:33,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-18 11:50:33,079 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-18 11:50:33,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 11:50:33,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-18 11:50:33,193 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-11-18 11:50:33,331 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 11:50:33 BoogieIcfgContainer [2018-11-18 11:50:33,331 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-18 11:50:33,332 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-18 11:50:33,332 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-18 11:50:33,333 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-18 11:50:33,333 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 11:49:09" (3/4) ... [2018-11-18 11:50:33,335 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-18 11:50:33,485 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_972271dc-9d6f-4d65-9498-62873b9ba8f8/bin-2019/utaipan/witness.graphml [2018-11-18 11:50:33,485 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-18 11:50:33,486 INFO L168 Benchmark]: Toolchain (without parser) took 84697.71 ms. Allocated memory was 1.0 GB in the beginning and 3.4 GB in the end (delta: 2.4 GB). Free memory was 954.8 MB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 983.0 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,487 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-18 11:50:33,487 INFO L168 Benchmark]: CACSL2BoogieTranslator took 227.85 ms. Allocated memory is still 1.0 GB. Free memory was 954.8 MB in the beginning and 937.7 MB in the end (delta: 17.2 MB). Peak memory consumption was 17.2 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,488 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.10 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 935.0 MB in the beginning and 1.1 GB in the end (delta: -200.9 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,488 INFO L168 Benchmark]: Boogie Preprocessor took 30.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,488 INFO L168 Benchmark]: RCFGBuilder took 505.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.0 MB). Peak memory consumption was 45.0 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,488 INFO L168 Benchmark]: TraceAbstraction took 83709.46 ms. Allocated memory was 1.2 GB in the beginning and 3.4 GB in the end (delta: 2.2 GB). Free memory was 1.1 GB in the beginning and 2.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 933.6 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,489 INFO L168 Benchmark]: Witness Printer took 153.14 ms. Allocated memory is still 3.4 GB. Free memory was 2.4 GB in the beginning and 2.4 GB in the end (delta: 47.0 MB). Peak memory consumption was 47.0 MB. Max. memory is 11.5 GB. [2018-11-18 11:50:33,490 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 227.85 ms. Allocated memory is still 1.0 GB. Free memory was 954.8 MB in the beginning and 937.7 MB in the end (delta: 17.2 MB). Peak memory consumption was 17.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 67.10 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 935.0 MB in the beginning and 1.1 GB in the end (delta: -200.9 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 505.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.0 MB). Peak memory consumption was 45.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 83709.46 ms. Allocated memory was 1.2 GB in the beginning and 3.4 GB in the end (delta: 2.2 GB). Free memory was 1.1 GB in the beginning and 2.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 933.6 MB. Max. memory is 11.5 GB. * Witness Printer took 153.14 ms. Allocated memory is still 3.4 GB. Free memory was 2.4 GB in the beginning and 2.4 GB in the end (delta: 47.0 MB). Peak memory consumption was 47.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int m_i ; [L24] int t1_i ; [L25] int t2_i ; [L26] int t3_i ; [L27] int M_E = 2; [L28] int T1_E = 2; [L29] int T2_E = 2; [L30] int T3_E = 2; [L31] int E_1 = 2; [L32] int E_2 = 2; [L33] int E_3 = 2; VAL [\old(E_1)=18, \old(E_2)=5, \old(E_3)=21, \old(M_E)=15, \old(m_i)=7, \old(m_pc)=13, \old(m_st)=14, \old(T1_E)=3, \old(t1_i)=17, \old(t1_pc)=9, \old(t1_st)=4, \old(T2_E)=16, \old(t2_i)=6, \old(t2_pc)=10, \old(t2_st)=11, \old(T3_E)=19, \old(t3_i)=20, \old(t3_pc)=8, \old(t3_st)=12, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L687] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L691] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L600] m_i = 1 [L601] t1_i = 1 [L602] t2_i = 1 [L603] RET t3_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L691] init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L692] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L628] int kernel_st ; [L629] int tmp ; [L630] int tmp___0 ; [L634] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L635] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L636] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L271] COND TRUE m_i == 1 [L272] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L276] COND TRUE t1_i == 1 [L277] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L281] COND TRUE t2_i == 1 [L282] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L286] COND TRUE t3_i == 1 [L287] RET t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L636] init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L637] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L408] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L413] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L418] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L423] COND FALSE !(T3_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L428] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L433] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L438] COND FALSE, RET !(E_3 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L637] fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L638] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L187] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L199] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L206] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L218] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L506] EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L225] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L237] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L514] EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L244] COND FALSE !(t3_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L256] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L522] EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE, RET !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L638] activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L639] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L451] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L456] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L461] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L466] COND FALSE !(T3_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L471] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L476] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L481] COND FALSE, RET !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L639] reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L642] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L645] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L646] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L327] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L331] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L296] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L299] COND TRUE m_st == 0 [L300] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L322] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] tmp = exists_runnable_thread() [L336] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1] [L341] COND TRUE m_st == 0 [L342] int tmp_ndt_1; [L343] tmp_ndt_1 = __VERIFIER_nondet_int() [L344] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0] [L355] COND TRUE t1_st == 0 [L356] int tmp_ndt_2; [L357] tmp_ndt_2 = __VERIFIER_nondet_int() [L358] COND TRUE \read(tmp_ndt_2) [L360] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L361] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L84] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L95] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L97] t1_pc = 1 [L98] RET t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L361] transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L369] COND TRUE t2_st == 0 [L370] int tmp_ndt_3; [L371] tmp_ndt_3 = __VERIFIER_nondet_int() [L372] COND TRUE \read(tmp_ndt_3) [L374] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L375] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L119] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L130] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L132] t2_pc = 1 [L133] RET t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L375] transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L383] COND TRUE t3_st == 0 [L384] int tmp_ndt_4; [L385] tmp_ndt_4 = __VERIFIER_nondet_int() [L386] COND TRUE \read(tmp_ndt_4) [L388] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L389] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L154] COND TRUE t3_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L165] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L167] t3_pc = 1 [L168] RET t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L389] transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L331] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L334] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L296] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L299] COND TRUE m_st == 0 [L300] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L322] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L334] EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L334] tmp = exists_runnable_thread() [L336] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L341] COND TRUE m_st == 0 [L342] int tmp_ndt_1; [L343] tmp_ndt_1 = __VERIFIER_nondet_int() [L344] COND TRUE \read(tmp_ndt_1) [L346] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L347] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L43] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L54] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L57] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L58] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND TRUE E_1 == 1 [L208] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND TRUE \read(tmp___0) [L509] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE, RET !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L58] immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L59] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L62] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L64] m_pc = 1 [L65] RET m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L347] master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L355] COND TRUE t1_st == 0 [L356] int tmp_ndt_2; [L357] tmp_ndt_2 = __VERIFIER_nondet_int() [L358] COND TRUE \read(tmp_ndt_2) [L360] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L361] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L84] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L87] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L103] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L104] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L188] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND TRUE E_2 == 1 [L227] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND TRUE \read(tmp___1) [L517] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE, RET !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L104] immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L105] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L95] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L97] t1_pc = 1 [L98] RET t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L361] transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L369] COND TRUE t2_st == 0 [L370] int tmp_ndt_3; [L371] tmp_ndt_3 = __VERIFIER_nondet_int() [L372] COND TRUE \read(tmp_ndt_3) [L374] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L375] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L119] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L122] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L138] E_3 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L139] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L188] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND TRUE E_3 == 1 [L246] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] RET return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit3_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND TRUE \read(tmp___2) [L525] RET t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L139] immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L140] E_3 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L130] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L132] t2_pc = 1 [L133] RET t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L375] transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L383] COND TRUE t3_st == 0 [L384] int tmp_ndt_4; [L385] tmp_ndt_4 = __VERIFIER_nondet_int() [L386] COND TRUE \read(tmp_ndt_4) [L388] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L389] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L154] COND FALSE !(t3_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L157] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L173] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 25 procedures, 206 locations, 1 error locations. UNSAFE Result, 83.6s OverallTime, 33 OverallIterations, 6 TraceHistogramMax, 59.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 9969 SDtfs, 16274 SDslu, 31183 SDs, 0 SdLazy, 17288 SolverSat, 4707 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.8s Time, PredicateUnifierStatistics: 12 DeclaredPredicates, 7285 GetRequests, 6605 SyntacticMatches, 56 SemanticMatches, 624 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12791 ImplicationChecksByTransitivity, 8.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14205occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 3.8s AbstIntTime, 16 AbstIntIterations, 6 AbstIntStrong, 0.991405217837709 AbsIntWeakeningRatio, 0.5720844811753902 AbsIntAvgWeakeningVarsNumRemoved, 15.696969696969697 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 9.6s AutomataMinimizationTime, 32 MinimizatonAttempts, 4040 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 4.0s InterpolantComputationTime, 9101 NumberOfCodeBlocks, 9101 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 11614 ConstructedInterpolants, 0 QuantifiedInterpolants, 4387602 SizeOfPredicates, 15 NumberOfNonLiveVariables, 11460 ConjunctsInSsa, 46 ConjunctsInUnsatCore, 52 InterpolantComputations, 30 PerfectInterpolantSequences, 7160/7573 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...