./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix054_power.oepc_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix054_power.oepc_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cc97011b7b7cc94692df30c60141977f12514077 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 03:59:00,338 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 03:59:00,339 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 03:59:00,347 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 03:59:00,347 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 03:59:00,348 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 03:59:00,349 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 03:59:00,350 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 03:59:00,351 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 03:59:00,352 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 03:59:00,353 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 03:59:00,353 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 03:59:00,353 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 03:59:00,354 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 03:59:00,355 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 03:59:00,355 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 03:59:00,355 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 03:59:00,357 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 03:59:00,358 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 03:59:00,359 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 03:59:00,359 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 03:59:00,360 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 03:59:00,361 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 03:59:00,361 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 03:59:00,361 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 03:59:00,362 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 03:59:00,362 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 03:59:00,363 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 03:59:00,363 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 03:59:00,364 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 03:59:00,364 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 03:59:00,364 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 03:59:00,364 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 03:59:00,364 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 03:59:00,365 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 03:59:00,366 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 03:59:00,366 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-11-23 03:59:00,375 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 03:59:00,375 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 03:59:00,375 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * User list type=DISABLED [2018-11-23 03:59:00,376 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * Explicit value domain=true [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * Octagon Domain=false [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-11-23 03:59:00,376 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-11-23 03:59:00,377 INFO L133 SettingsManager]: * Interval Domain=false [2018-11-23 03:59:00,377 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 03:59:00,377 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 03:59:00,377 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 03:59:00,377 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 03:59:00,377 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 03:59:00,378 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 03:59:00,378 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 03:59:00,379 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-11-23 03:59:00,379 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 03:59:00,380 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 03:59:00,380 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 03:59:00,380 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cc97011b7b7cc94692df30c60141977f12514077 [2018-11-23 03:59:00,403 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 03:59:00,413 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 03:59:00,415 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 03:59:00,416 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 03:59:00,417 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 03:59:00,417 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/../../sv-benchmarks/c/pthread-wmm/mix054_power.oepc_false-unreach-call.i [2018-11-23 03:59:00,459 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/data/c698670eb/af1c3d7274514018a2a1f626fbac2fa4/FLAG15b4b39c5 [2018-11-23 03:59:00,852 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 03:59:00,853 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/sv-benchmarks/c/pthread-wmm/mix054_power.oepc_false-unreach-call.i [2018-11-23 03:59:00,864 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/data/c698670eb/af1c3d7274514018a2a1f626fbac2fa4/FLAG15b4b39c5 [2018-11-23 03:59:01,230 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/data/c698670eb/af1c3d7274514018a2a1f626fbac2fa4 [2018-11-23 03:59:01,232 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 03:59:01,233 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 03:59:01,234 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 03:59:01,234 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 03:59:01,237 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 03:59:01,237 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,239 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@160bb857 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01, skipping insertion in model container [2018-11-23 03:59:01,239 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,247 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 03:59:01,283 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 03:59:01,523 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 03:59:01,533 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 03:59:01,636 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 03:59:01,682 INFO L195 MainTranslator]: Completed translation [2018-11-23 03:59:01,683 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01 WrapperNode [2018-11-23 03:59:01,683 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 03:59:01,683 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 03:59:01,684 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 03:59:01,684 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 03:59:01,691 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,704 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,725 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 03:59:01,725 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 03:59:01,726 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 03:59:01,726 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 03:59:01,734 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,734 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,738 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,738 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,746 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,748 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,749 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... [2018-11-23 03:59:01,752 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 03:59:01,752 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 03:59:01,752 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 03:59:01,752 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 03:59:01,753 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 03:59:01,791 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 03:59:01,791 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 03:59:01,791 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 03:59:01,792 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 03:59:01,792 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 03:59:01,792 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 03:59:01,792 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 03:59:01,792 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 03:59:01,792 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 03:59:01,792 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 03:59:01,792 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 03:59:01,793 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 03:59:02,234 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 03:59:02,234 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 03:59:02,235 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:59:02 BoogieIcfgContainer [2018-11-23 03:59:02,235 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 03:59:02,235 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 03:59:02,236 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 03:59:02,238 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 03:59:02,238 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:59:01" (1/3) ... [2018-11-23 03:59:02,239 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@67b0bc20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:59:02, skipping insertion in model container [2018-11-23 03:59:02,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:59:01" (2/3) ... [2018-11-23 03:59:02,239 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@67b0bc20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:59:02, skipping insertion in model container [2018-11-23 03:59:02,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:59:02" (3/3) ... [2018-11-23 03:59:02,240 INFO L112 eAbstractionObserver]: Analyzing ICFG mix054_power.oepc_false-unreach-call.i [2018-11-23 03:59:02,272 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,273 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,273 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,273 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,273 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,273 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,274 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,274 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,274 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,274 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,275 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,275 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,275 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,275 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,275 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,275 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,276 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,276 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,277 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,277 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,278 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,278 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,279 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,279 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,279 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,279 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,279 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,279 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,280 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,281 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,281 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,281 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,282 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,283 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,283 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,283 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,283 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,283 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,283 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,284 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,284 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,284 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,289 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,289 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,289 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,289 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,289 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,290 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,290 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,290 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,290 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,290 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,290 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,291 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,292 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,292 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,292 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,292 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,292 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,292 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,293 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,294 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,294 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,294 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,294 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,294 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,294 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,295 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,296 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,296 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,296 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,300 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,300 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,301 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,302 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,303 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,304 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,304 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,304 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,305 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,305 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,305 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,305 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,306 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,307 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,308 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,309 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,310 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet39.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 03:59:02,316 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 03:59:02,316 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 03:59:02,322 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 03:59:02,332 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 03:59:02,350 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 03:59:02,350 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 03:59:02,350 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 03:59:02,350 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 03:59:02,351 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 03:59:02,351 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 03:59:02,351 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 03:59:02,351 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 03:59:02,358 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 141places, 179 transitions [2018-11-23 03:59:04,153 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34805 states. [2018-11-23 03:59:04,155 INFO L276 IsEmpty]: Start isEmpty. Operand 34805 states. [2018-11-23 03:59:04,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 03:59:04,161 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:04,162 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:04,164 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:04,168 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:04,169 INFO L82 PathProgramCache]: Analyzing trace with hash 1272153477, now seen corresponding path program 1 times [2018-11-23 03:59:04,171 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:04,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:04,211 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:04,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:04,211 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:04,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:04,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:04,338 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:04,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:04,338 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:04,342 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:04,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:04,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:04,357 INFO L87 Difference]: Start difference. First operand 34805 states. Second operand 4 states. [2018-11-23 03:59:05,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:05,189 INFO L93 Difference]: Finished difference Result 60789 states and 234492 transitions. [2018-11-23 03:59:05,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 03:59:05,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-11-23 03:59:05,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:05,433 INFO L225 Difference]: With dead ends: 60789 [2018-11-23 03:59:05,433 INFO L226 Difference]: Without dead ends: 44269 [2018-11-23 03:59:05,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:05,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44269 states. [2018-11-23 03:59:06,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44269 to 27337. [2018-11-23 03:59:06,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27337 states. [2018-11-23 03:59:06,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27337 states to 27337 states and 105498 transitions. [2018-11-23 03:59:06,507 INFO L78 Accepts]: Start accepts. Automaton has 27337 states and 105498 transitions. Word has length 32 [2018-11-23 03:59:06,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:06,508 INFO L480 AbstractCegarLoop]: Abstraction has 27337 states and 105498 transitions. [2018-11-23 03:59:06,508 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:06,508 INFO L276 IsEmpty]: Start isEmpty. Operand 27337 states and 105498 transitions. [2018-11-23 03:59:06,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 03:59:06,516 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:06,516 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:06,517 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:06,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:06,517 INFO L82 PathProgramCache]: Analyzing trace with hash 1559910934, now seen corresponding path program 1 times [2018-11-23 03:59:06,517 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:06,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:06,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:06,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:06,521 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:06,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:06,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:06,601 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:06,601 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:06,601 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:06,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:06,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:06,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:06,603 INFO L87 Difference]: Start difference. First operand 27337 states and 105498 transitions. Second operand 4 states. [2018-11-23 03:59:06,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:06,730 INFO L93 Difference]: Finished difference Result 8527 states and 28343 transitions. [2018-11-23 03:59:06,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 03:59:06,731 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-11-23 03:59:06,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:06,756 INFO L225 Difference]: With dead ends: 8527 [2018-11-23 03:59:06,756 INFO L226 Difference]: Without dead ends: 7465 [2018-11-23 03:59:06,757 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:06,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7465 states. [2018-11-23 03:59:06,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7465 to 7465. [2018-11-23 03:59:06,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7465 states. [2018-11-23 03:59:06,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7465 states to 7465 states and 24635 transitions. [2018-11-23 03:59:06,892 INFO L78 Accepts]: Start accepts. Automaton has 7465 states and 24635 transitions. Word has length 44 [2018-11-23 03:59:06,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:06,892 INFO L480 AbstractCegarLoop]: Abstraction has 7465 states and 24635 transitions. [2018-11-23 03:59:06,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:06,892 INFO L276 IsEmpty]: Start isEmpty. Operand 7465 states and 24635 transitions. [2018-11-23 03:59:06,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-23 03:59:06,893 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:06,894 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:06,894 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:06,894 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:06,894 INFO L82 PathProgramCache]: Analyzing trace with hash -1459656693, now seen corresponding path program 1 times [2018-11-23 03:59:06,894 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:06,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:06,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:06,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:06,898 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:06,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:06,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:06,977 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:06,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:06,978 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:06,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:06,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:06,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:06,978 INFO L87 Difference]: Start difference. First operand 7465 states and 24635 transitions. Second operand 5 states. [2018-11-23 03:59:07,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:07,280 INFO L93 Difference]: Finished difference Result 13997 states and 45804 transitions. [2018-11-23 03:59:07,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 03:59:07,281 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2018-11-23 03:59:07,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:07,325 INFO L225 Difference]: With dead ends: 13997 [2018-11-23 03:59:07,325 INFO L226 Difference]: Without dead ends: 13929 [2018-11-23 03:59:07,326 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 03:59:07,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13929 states. [2018-11-23 03:59:07,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13929 to 9440. [2018-11-23 03:59:07,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9440 states. [2018-11-23 03:59:07,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9440 states to 9440 states and 30541 transitions. [2018-11-23 03:59:07,602 INFO L78 Accepts]: Start accepts. Automaton has 9440 states and 30541 transitions. Word has length 45 [2018-11-23 03:59:07,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:07,603 INFO L480 AbstractCegarLoop]: Abstraction has 9440 states and 30541 transitions. [2018-11-23 03:59:07,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:07,603 INFO L276 IsEmpty]: Start isEmpty. Operand 9440 states and 30541 transitions. [2018-11-23 03:59:07,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 03:59:07,605 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:07,605 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:07,605 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:07,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:07,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1598559727, now seen corresponding path program 1 times [2018-11-23 03:59:07,606 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:07,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:07,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:07,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:07,609 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:07,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:07,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:07,646 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:07,647 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 03:59:07,647 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:07,647 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 03:59:07,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 03:59:07,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:07,647 INFO L87 Difference]: Start difference. First operand 9440 states and 30541 transitions. Second operand 3 states. [2018-11-23 03:59:07,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:07,723 INFO L93 Difference]: Finished difference Result 13278 states and 42640 transitions. [2018-11-23 03:59:07,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 03:59:07,724 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-11-23 03:59:07,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:07,745 INFO L225 Difference]: With dead ends: 13278 [2018-11-23 03:59:07,745 INFO L226 Difference]: Without dead ends: 13278 [2018-11-23 03:59:07,746 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:07,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13278 states. [2018-11-23 03:59:07,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13278 to 9844. [2018-11-23 03:59:07,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9844 states. [2018-11-23 03:59:07,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9844 states to 9844 states and 31507 transitions. [2018-11-23 03:59:07,895 INFO L78 Accepts]: Start accepts. Automaton has 9844 states and 31507 transitions. Word has length 47 [2018-11-23 03:59:07,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:07,895 INFO L480 AbstractCegarLoop]: Abstraction has 9844 states and 31507 transitions. [2018-11-23 03:59:07,896 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 03:59:07,896 INFO L276 IsEmpty]: Start isEmpty. Operand 9844 states and 31507 transitions. [2018-11-23 03:59:07,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 03:59:07,897 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:07,898 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:07,898 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:07,898 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:07,898 INFO L82 PathProgramCache]: Analyzing trace with hash -108379620, now seen corresponding path program 1 times [2018-11-23 03:59:07,898 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:07,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:07,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:07,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:07,900 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:07,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:07,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:07,990 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:07,991 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 03:59:07,991 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:07,991 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 03:59:07,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 03:59:07,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 03:59:07,991 INFO L87 Difference]: Start difference. First operand 9844 states and 31507 transitions. Second operand 7 states. [2018-11-23 03:59:08,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:08,375 INFO L93 Difference]: Finished difference Result 12284 states and 38672 transitions. [2018-11-23 03:59:08,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 03:59:08,376 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2018-11-23 03:59:08,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:08,398 INFO L225 Difference]: With dead ends: 12284 [2018-11-23 03:59:08,398 INFO L226 Difference]: Without dead ends: 12212 [2018-11-23 03:59:08,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-23 03:59:08,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12212 states. [2018-11-23 03:59:08,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12212 to 10848. [2018-11-23 03:59:08,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10848 states. [2018-11-23 03:59:08,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10848 states to 10848 states and 34562 transitions. [2018-11-23 03:59:08,586 INFO L78 Accepts]: Start accepts. Automaton has 10848 states and 34562 transitions. Word has length 51 [2018-11-23 03:59:08,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:08,587 INFO L480 AbstractCegarLoop]: Abstraction has 10848 states and 34562 transitions. [2018-11-23 03:59:08,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 03:59:08,587 INFO L276 IsEmpty]: Start isEmpty. Operand 10848 states and 34562 transitions. [2018-11-23 03:59:08,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 03:59:08,590 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:08,591 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:08,591 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:08,591 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:08,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1204429704, now seen corresponding path program 1 times [2018-11-23 03:59:08,591 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:08,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:08,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:08,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:08,593 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:08,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:08,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:08,652 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:08,652 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:08,652 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:08,652 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:08,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:08,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:08,652 INFO L87 Difference]: Start difference. First operand 10848 states and 34562 transitions. Second operand 4 states. [2018-11-23 03:59:08,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:08,747 INFO L93 Difference]: Finished difference Result 12395 states and 39571 transitions. [2018-11-23 03:59:08,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 03:59:08,748 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-11-23 03:59:08,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:08,766 INFO L225 Difference]: With dead ends: 12395 [2018-11-23 03:59:08,766 INFO L226 Difference]: Without dead ends: 12395 [2018-11-23 03:59:08,766 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:08,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12395 states. [2018-11-23 03:59:09,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12395 to 11368. [2018-11-23 03:59:09,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11368 states. [2018-11-23 03:59:09,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11368 states to 11368 states and 36235 transitions. [2018-11-23 03:59:09,040 INFO L78 Accepts]: Start accepts. Automaton has 11368 states and 36235 transitions. Word has length 59 [2018-11-23 03:59:09,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:09,041 INFO L480 AbstractCegarLoop]: Abstraction has 11368 states and 36235 transitions. [2018-11-23 03:59:09,041 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:09,041 INFO L276 IsEmpty]: Start isEmpty. Operand 11368 states and 36235 transitions. [2018-11-23 03:59:09,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 03:59:09,045 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:09,045 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:09,045 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:09,046 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:09,046 INFO L82 PathProgramCache]: Analyzing trace with hash 538380631, now seen corresponding path program 1 times [2018-11-23 03:59:09,046 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:09,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:09,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:09,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:09,049 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:09,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:09,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:09,115 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:09,115 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 03:59:09,115 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:09,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 03:59:09,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 03:59:09,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 03:59:09,116 INFO L87 Difference]: Start difference. First operand 11368 states and 36235 transitions. Second operand 6 states. [2018-11-23 03:59:09,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:09,468 INFO L93 Difference]: Finished difference Result 20968 states and 66485 transitions. [2018-11-23 03:59:09,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 03:59:09,469 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2018-11-23 03:59:09,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:09,496 INFO L225 Difference]: With dead ends: 20968 [2018-11-23 03:59:09,496 INFO L226 Difference]: Without dead ends: 20897 [2018-11-23 03:59:09,497 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-23 03:59:09,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20897 states. [2018-11-23 03:59:09,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20897 to 13754. [2018-11-23 03:59:09,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13754 states. [2018-11-23 03:59:09,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13754 states to 13754 states and 43279 transitions. [2018-11-23 03:59:09,706 INFO L78 Accepts]: Start accepts. Automaton has 13754 states and 43279 transitions. Word has length 59 [2018-11-23 03:59:09,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:09,706 INFO L480 AbstractCegarLoop]: Abstraction has 13754 states and 43279 transitions. [2018-11-23 03:59:09,707 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 03:59:09,707 INFO L276 IsEmpty]: Start isEmpty. Operand 13754 states and 43279 transitions. [2018-11-23 03:59:09,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-23 03:59:09,711 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:09,712 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:09,712 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:09,712 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:09,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1067585964, now seen corresponding path program 1 times [2018-11-23 03:59:09,712 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:09,714 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:09,714 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:09,714 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:09,714 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:09,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:09,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:09,770 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:09,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:09,770 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:09,770 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:09,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:09,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:09,771 INFO L87 Difference]: Start difference. First operand 13754 states and 43279 transitions. Second operand 4 states. [2018-11-23 03:59:10,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:10,019 INFO L93 Difference]: Finished difference Result 20200 states and 61902 transitions. [2018-11-23 03:59:10,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 03:59:10,020 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2018-11-23 03:59:10,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:10,043 INFO L225 Difference]: With dead ends: 20200 [2018-11-23 03:59:10,043 INFO L226 Difference]: Without dead ends: 20200 [2018-11-23 03:59:10,043 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:10,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20200 states. [2018-11-23 03:59:10,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20200 to 15792. [2018-11-23 03:59:10,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15792 states. [2018-11-23 03:59:10,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15792 states to 15792 states and 49060 transitions. [2018-11-23 03:59:10,284 INFO L78 Accepts]: Start accepts. Automaton has 15792 states and 49060 transitions. Word has length 63 [2018-11-23 03:59:10,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:10,284 INFO L480 AbstractCegarLoop]: Abstraction has 15792 states and 49060 transitions. [2018-11-23 03:59:10,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:10,284 INFO L276 IsEmpty]: Start isEmpty. Operand 15792 states and 49060 transitions. [2018-11-23 03:59:10,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-23 03:59:10,289 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:10,290 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:10,290 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:10,290 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:10,290 INFO L82 PathProgramCache]: Analyzing trace with hash 1407465811, now seen corresponding path program 1 times [2018-11-23 03:59:10,290 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:10,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:10,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:10,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:10,292 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:10,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:10,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:10,355 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:10,355 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:10,355 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:10,355 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:10,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:10,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:10,356 INFO L87 Difference]: Start difference. First operand 15792 states and 49060 transitions. Second operand 4 states. [2018-11-23 03:59:10,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:10,567 INFO L93 Difference]: Finished difference Result 19959 states and 61084 transitions. [2018-11-23 03:59:10,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 03:59:10,567 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2018-11-23 03:59:10,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:10,595 INFO L225 Difference]: With dead ends: 19959 [2018-11-23 03:59:10,596 INFO L226 Difference]: Without dead ends: 19959 [2018-11-23 03:59:10,596 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:10,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19959 states. [2018-11-23 03:59:10,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19959 to 16086. [2018-11-23 03:59:10,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16086 states. [2018-11-23 03:59:10,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16086 states to 16086 states and 49917 transitions. [2018-11-23 03:59:10,916 INFO L78 Accepts]: Start accepts. Automaton has 16086 states and 49917 transitions. Word has length 63 [2018-11-23 03:59:10,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:10,916 INFO L480 AbstractCegarLoop]: Abstraction has 16086 states and 49917 transitions. [2018-11-23 03:59:10,916 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:10,916 INFO L276 IsEmpty]: Start isEmpty. Operand 16086 states and 49917 transitions. [2018-11-23 03:59:10,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-23 03:59:10,922 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:10,922 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:10,922 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:10,922 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:10,922 INFO L82 PathProgramCache]: Analyzing trace with hash 1152729266, now seen corresponding path program 1 times [2018-11-23 03:59:10,922 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:10,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:10,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:10,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:10,924 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:10,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:10,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:10,968 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:10,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 03:59:10,969 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:10,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 03:59:10,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 03:59:10,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:10,969 INFO L87 Difference]: Start difference. First operand 16086 states and 49917 transitions. Second operand 3 states. [2018-11-23 03:59:11,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:11,127 INFO L93 Difference]: Finished difference Result 16558 states and 51205 transitions. [2018-11-23 03:59:11,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 03:59:11,128 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2018-11-23 03:59:11,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:11,149 INFO L225 Difference]: With dead ends: 16558 [2018-11-23 03:59:11,149 INFO L226 Difference]: Without dead ends: 16558 [2018-11-23 03:59:11,149 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:11,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16558 states. [2018-11-23 03:59:11,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16558 to 16322. [2018-11-23 03:59:11,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16322 states. [2018-11-23 03:59:11,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16322 states to 16322 states and 50541 transitions. [2018-11-23 03:59:11,338 INFO L78 Accepts]: Start accepts. Automaton has 16322 states and 50541 transitions. Word has length 63 [2018-11-23 03:59:11,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:11,339 INFO L480 AbstractCegarLoop]: Abstraction has 16322 states and 50541 transitions. [2018-11-23 03:59:11,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 03:59:11,339 INFO L276 IsEmpty]: Start isEmpty. Operand 16322 states and 50541 transitions. [2018-11-23 03:59:11,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 03:59:11,345 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:11,345 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:11,345 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:11,345 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:11,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1952113636, now seen corresponding path program 1 times [2018-11-23 03:59:11,346 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:11,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:11,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:11,348 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:11,348 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:11,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:11,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:11,446 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:11,446 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 03:59:11,446 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:11,447 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 03:59:11,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 03:59:11,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 03:59:11,447 INFO L87 Difference]: Start difference. First operand 16322 states and 50541 transitions. Second operand 6 states. [2018-11-23 03:59:11,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:11,715 INFO L93 Difference]: Finished difference Result 17646 states and 53545 transitions. [2018-11-23 03:59:11,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 03:59:11,716 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-11-23 03:59:11,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:11,737 INFO L225 Difference]: With dead ends: 17646 [2018-11-23 03:59:11,737 INFO L226 Difference]: Without dead ends: 17646 [2018-11-23 03:59:11,738 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 03:59:11,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17646 states. [2018-11-23 03:59:11,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17646 to 16546. [2018-11-23 03:59:11,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16546 states. [2018-11-23 03:59:11,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16546 states to 16546 states and 50764 transitions. [2018-11-23 03:59:11,933 INFO L78 Accepts]: Start accepts. Automaton has 16546 states and 50764 transitions. Word has length 65 [2018-11-23 03:59:11,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:11,933 INFO L480 AbstractCegarLoop]: Abstraction has 16546 states and 50764 transitions. [2018-11-23 03:59:11,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 03:59:11,933 INFO L276 IsEmpty]: Start isEmpty. Operand 16546 states and 50764 transitions. [2018-11-23 03:59:11,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 03:59:11,940 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:11,940 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:11,940 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:11,940 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:11,940 INFO L82 PathProgramCache]: Analyzing trace with hash -707349155, now seen corresponding path program 1 times [2018-11-23 03:59:11,940 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:11,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:11,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:11,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:11,942 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:11,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:12,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:12,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:12,019 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:12,019 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:12,019 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:12,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:12,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:12,020 INFO L87 Difference]: Start difference. First operand 16546 states and 50764 transitions. Second operand 5 states. [2018-11-23 03:59:12,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:12,406 INFO L93 Difference]: Finished difference Result 21334 states and 64873 transitions. [2018-11-23 03:59:12,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 03:59:12,406 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-23 03:59:12,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:12,434 INFO L225 Difference]: With dead ends: 21334 [2018-11-23 03:59:12,434 INFO L226 Difference]: Without dead ends: 21334 [2018-11-23 03:59:12,434 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 03:59:12,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21334 states. [2018-11-23 03:59:12,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21334 to 19570. [2018-11-23 03:59:12,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19570 states. [2018-11-23 03:59:12,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19570 states to 19570 states and 59494 transitions. [2018-11-23 03:59:12,756 INFO L78 Accepts]: Start accepts. Automaton has 19570 states and 59494 transitions. Word has length 65 [2018-11-23 03:59:12,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:12,757 INFO L480 AbstractCegarLoop]: Abstraction has 19570 states and 59494 transitions. [2018-11-23 03:59:12,757 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:12,757 INFO L276 IsEmpty]: Start isEmpty. Operand 19570 states and 59494 transitions. [2018-11-23 03:59:12,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 03:59:12,764 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:12,764 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:12,764 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:12,765 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:12,765 INFO L82 PathProgramCache]: Analyzing trace with hash -1217883332, now seen corresponding path program 1 times [2018-11-23 03:59:12,765 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:12,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:12,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:12,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:12,767 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:12,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:12,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:12,833 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:12,833 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:12,833 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:12,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:12,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:12,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:12,834 INFO L87 Difference]: Start difference. First operand 19570 states and 59494 transitions. Second operand 5 states. [2018-11-23 03:59:13,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:13,248 INFO L93 Difference]: Finished difference Result 30156 states and 90237 transitions. [2018-11-23 03:59:13,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 03:59:13,249 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-23 03:59:13,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:13,286 INFO L225 Difference]: With dead ends: 30156 [2018-11-23 03:59:13,287 INFO L226 Difference]: Without dead ends: 30156 [2018-11-23 03:59:13,287 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 03:59:13,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30156 states. [2018-11-23 03:59:13,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30156 to 26760. [2018-11-23 03:59:13,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26760 states. [2018-11-23 03:59:13,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26760 states to 26760 states and 80370 transitions. [2018-11-23 03:59:13,625 INFO L78 Accepts]: Start accepts. Automaton has 26760 states and 80370 transitions. Word has length 65 [2018-11-23 03:59:13,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:13,626 INFO L480 AbstractCegarLoop]: Abstraction has 26760 states and 80370 transitions. [2018-11-23 03:59:13,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:13,626 INFO L276 IsEmpty]: Start isEmpty. Operand 26760 states and 80370 transitions. [2018-11-23 03:59:13,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 03:59:13,636 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:13,636 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:13,636 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:13,636 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:13,637 INFO L82 PathProgramCache]: Analyzing trace with hash 1269629501, now seen corresponding path program 1 times [2018-11-23 03:59:13,637 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:13,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:13,638 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:13,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:13,638 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:13,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:13,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:13,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:13,692 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:13,692 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:13,693 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:13,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:13,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:13,693 INFO L87 Difference]: Start difference. First operand 26760 states and 80370 transitions. Second operand 5 states. [2018-11-23 03:59:13,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:13,736 INFO L93 Difference]: Finished difference Result 8084 states and 19691 transitions. [2018-11-23 03:59:13,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 03:59:13,739 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-23 03:59:13,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:13,744 INFO L225 Difference]: With dead ends: 8084 [2018-11-23 03:59:13,745 INFO L226 Difference]: Without dead ends: 6316 [2018-11-23 03:59:13,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 03:59:13,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6316 states. [2018-11-23 03:59:13,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6316 to 4889. [2018-11-23 03:59:13,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4889 states. [2018-11-23 03:59:13,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4889 states to 4889 states and 11646 transitions. [2018-11-23 03:59:13,791 INFO L78 Accepts]: Start accepts. Automaton has 4889 states and 11646 transitions. Word has length 65 [2018-11-23 03:59:13,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:13,791 INFO L480 AbstractCegarLoop]: Abstraction has 4889 states and 11646 transitions. [2018-11-23 03:59:13,791 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:13,791 INFO L276 IsEmpty]: Start isEmpty. Operand 4889 states and 11646 transitions. [2018-11-23 03:59:13,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 03:59:13,795 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:13,795 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:13,795 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:13,795 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:13,795 INFO L82 PathProgramCache]: Analyzing trace with hash -2026999384, now seen corresponding path program 1 times [2018-11-23 03:59:13,796 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:13,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:13,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:13,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:13,797 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:13,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:13,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:13,828 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:13,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 03:59:13,828 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:13,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 03:59:13,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 03:59:13,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:13,829 INFO L87 Difference]: Start difference. First operand 4889 states and 11646 transitions. Second operand 3 states. [2018-11-23 03:59:13,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:13,868 INFO L93 Difference]: Finished difference Result 6692 states and 15894 transitions. [2018-11-23 03:59:13,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 03:59:13,868 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2018-11-23 03:59:13,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:13,873 INFO L225 Difference]: With dead ends: 6692 [2018-11-23 03:59:13,873 INFO L226 Difference]: Without dead ends: 6692 [2018-11-23 03:59:13,873 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:13,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6692 states. [2018-11-23 03:59:13,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6692 to 4832. [2018-11-23 03:59:13,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4832 states. [2018-11-23 03:59:13,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4832 states to 4832 states and 11279 transitions. [2018-11-23 03:59:13,919 INFO L78 Accepts]: Start accepts. Automaton has 4832 states and 11279 transitions. Word has length 65 [2018-11-23 03:59:13,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:13,920 INFO L480 AbstractCegarLoop]: Abstraction has 4832 states and 11279 transitions. [2018-11-23 03:59:13,920 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 03:59:13,920 INFO L276 IsEmpty]: Start isEmpty. Operand 4832 states and 11279 transitions. [2018-11-23 03:59:13,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-23 03:59:13,924 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:13,924 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:13,924 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:13,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:13,925 INFO L82 PathProgramCache]: Analyzing trace with hash -1343049765, now seen corresponding path program 1 times [2018-11-23 03:59:13,925 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:13,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:13,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:13,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:13,927 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:13,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:13,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:13,974 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:13,974 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:13,974 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:13,974 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:13,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:13,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:13,975 INFO L87 Difference]: Start difference. First operand 4832 states and 11279 transitions. Second operand 5 states. [2018-11-23 03:59:14,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:14,102 INFO L93 Difference]: Finished difference Result 5855 states and 13632 transitions. [2018-11-23 03:59:14,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 03:59:14,102 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2018-11-23 03:59:14,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:14,107 INFO L225 Difference]: With dead ends: 5855 [2018-11-23 03:59:14,107 INFO L226 Difference]: Without dead ends: 5855 [2018-11-23 03:59:14,107 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 03:59:14,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5855 states. [2018-11-23 03:59:14,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5855 to 5224. [2018-11-23 03:59:14,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5224 states. [2018-11-23 03:59:14,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5224 states to 5224 states and 12180 transitions. [2018-11-23 03:59:14,153 INFO L78 Accepts]: Start accepts. Automaton has 5224 states and 12180 transitions. Word has length 71 [2018-11-23 03:59:14,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:14,153 INFO L480 AbstractCegarLoop]: Abstraction has 5224 states and 12180 transitions. [2018-11-23 03:59:14,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:14,153 INFO L276 IsEmpty]: Start isEmpty. Operand 5224 states and 12180 transitions. [2018-11-23 03:59:14,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-23 03:59:14,158 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:14,158 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:14,158 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:14,158 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:14,158 INFO L82 PathProgramCache]: Analyzing trace with hash 399760570, now seen corresponding path program 1 times [2018-11-23 03:59:14,159 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:14,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:14,160 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:14,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:14,160 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:14,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:14,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:14,294 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:14,294 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 03:59:14,294 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:14,294 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 03:59:14,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 03:59:14,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-23 03:59:14,295 INFO L87 Difference]: Start difference. First operand 5224 states and 12180 transitions. Second operand 9 states. [2018-11-23 03:59:14,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:14,649 INFO L93 Difference]: Finished difference Result 7087 states and 16418 transitions. [2018-11-23 03:59:14,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 03:59:14,650 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 71 [2018-11-23 03:59:14,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:14,655 INFO L225 Difference]: With dead ends: 7087 [2018-11-23 03:59:14,655 INFO L226 Difference]: Without dead ends: 7032 [2018-11-23 03:59:14,655 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=232, Unknown=0, NotChecked=0, Total=306 [2018-11-23 03:59:14,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7032 states. [2018-11-23 03:59:14,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7032 to 5292. [2018-11-23 03:59:14,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5292 states. [2018-11-23 03:59:14,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5292 states to 5292 states and 12246 transitions. [2018-11-23 03:59:14,700 INFO L78 Accepts]: Start accepts. Automaton has 5292 states and 12246 transitions. Word has length 71 [2018-11-23 03:59:14,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:14,700 INFO L480 AbstractCegarLoop]: Abstraction has 5292 states and 12246 transitions. [2018-11-23 03:59:14,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 03:59:14,700 INFO L276 IsEmpty]: Start isEmpty. Operand 5292 states and 12246 transitions. [2018-11-23 03:59:14,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-23 03:59:14,705 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:14,706 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:14,706 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:14,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:14,706 INFO L82 PathProgramCache]: Analyzing trace with hash -2052149765, now seen corresponding path program 1 times [2018-11-23 03:59:14,706 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:14,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:14,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:14,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:14,708 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:14,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:14,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:14,753 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:14,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 03:59:14,754 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:14,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 03:59:14,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 03:59:14,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:14,754 INFO L87 Difference]: Start difference. First operand 5292 states and 12246 transitions. Second operand 3 states. [2018-11-23 03:59:14,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:14,956 INFO L93 Difference]: Finished difference Result 7021 states and 15768 transitions. [2018-11-23 03:59:14,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 03:59:14,957 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 90 [2018-11-23 03:59:14,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:14,963 INFO L225 Difference]: With dead ends: 7021 [2018-11-23 03:59:14,963 INFO L226 Difference]: Without dead ends: 6693 [2018-11-23 03:59:14,963 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:14,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6693 states. [2018-11-23 03:59:15,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6693 to 6163. [2018-11-23 03:59:15,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6163 states. [2018-11-23 03:59:15,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6163 states to 6163 states and 14048 transitions. [2018-11-23 03:59:15,036 INFO L78 Accepts]: Start accepts. Automaton has 6163 states and 14048 transitions. Word has length 90 [2018-11-23 03:59:15,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:15,036 INFO L480 AbstractCegarLoop]: Abstraction has 6163 states and 14048 transitions. [2018-11-23 03:59:15,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 03:59:15,036 INFO L276 IsEmpty]: Start isEmpty. Operand 6163 states and 14048 transitions. [2018-11-23 03:59:15,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-11-23 03:59:15,041 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:15,041 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:15,041 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:15,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:15,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1511204534, now seen corresponding path program 1 times [2018-11-23 03:59:15,042 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:15,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:15,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:15,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:15,043 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:15,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:15,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:15,105 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:15,105 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:15,106 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:15,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:15,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:15,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:15,106 INFO L87 Difference]: Start difference. First operand 6163 states and 14048 transitions. Second operand 4 states. [2018-11-23 03:59:15,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:15,189 INFO L93 Difference]: Finished difference Result 6551 states and 14955 transitions. [2018-11-23 03:59:15,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 03:59:15,189 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2018-11-23 03:59:15,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:15,196 INFO L225 Difference]: With dead ends: 6551 [2018-11-23 03:59:15,196 INFO L226 Difference]: Without dead ends: 6551 [2018-11-23 03:59:15,196 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:15,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6551 states. [2018-11-23 03:59:15,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6551 to 6087. [2018-11-23 03:59:15,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6087 states. [2018-11-23 03:59:15,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6087 states to 6087 states and 13961 transitions. [2018-11-23 03:59:15,268 INFO L78 Accepts]: Start accepts. Automaton has 6087 states and 13961 transitions. Word has length 90 [2018-11-23 03:59:15,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:15,268 INFO L480 AbstractCegarLoop]: Abstraction has 6087 states and 13961 transitions. [2018-11-23 03:59:15,268 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:15,268 INFO L276 IsEmpty]: Start isEmpty. Operand 6087 states and 13961 transitions. [2018-11-23 03:59:15,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:15,275 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:15,275 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:15,275 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:15,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:15,276 INFO L82 PathProgramCache]: Analyzing trace with hash -1808901631, now seen corresponding path program 1 times [2018-11-23 03:59:15,276 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:15,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:15,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:15,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:15,278 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:15,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:15,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:15,357 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:15,357 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:15,357 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:15,358 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:15,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:15,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:15,358 INFO L87 Difference]: Start difference. First operand 6087 states and 13961 transitions. Second operand 5 states. [2018-11-23 03:59:15,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:15,480 INFO L93 Difference]: Finished difference Result 7052 states and 16062 transitions. [2018-11-23 03:59:15,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 03:59:15,481 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 92 [2018-11-23 03:59:15,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:15,488 INFO L225 Difference]: With dead ends: 7052 [2018-11-23 03:59:15,489 INFO L226 Difference]: Without dead ends: 7052 [2018-11-23 03:59:15,489 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 03:59:15,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7052 states. [2018-11-23 03:59:15,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7052 to 5452. [2018-11-23 03:59:15,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5452 states. [2018-11-23 03:59:15,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5452 states to 5452 states and 12506 transitions. [2018-11-23 03:59:15,598 INFO L78 Accepts]: Start accepts. Automaton has 5452 states and 12506 transitions. Word has length 92 [2018-11-23 03:59:15,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:15,598 INFO L480 AbstractCegarLoop]: Abstraction has 5452 states and 12506 transitions. [2018-11-23 03:59:15,598 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:15,598 INFO L276 IsEmpty]: Start isEmpty. Operand 5452 states and 12506 transitions. [2018-11-23 03:59:15,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:15,604 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:15,604 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:15,604 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:15,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:15,605 INFO L82 PathProgramCache]: Analyzing trace with hash -2063638176, now seen corresponding path program 1 times [2018-11-23 03:59:15,605 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:15,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:15,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:15,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:15,606 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:15,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:15,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:15,698 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:15,698 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:15,698 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:15,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:15,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:15,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:15,699 INFO L87 Difference]: Start difference. First operand 5452 states and 12506 transitions. Second operand 5 states. [2018-11-23 03:59:15,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:15,976 INFO L93 Difference]: Finished difference Result 9104 states and 21056 transitions. [2018-11-23 03:59:15,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 03:59:15,976 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 92 [2018-11-23 03:59:15,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:15,982 INFO L225 Difference]: With dead ends: 9104 [2018-11-23 03:59:15,982 INFO L226 Difference]: Without dead ends: 9088 [2018-11-23 03:59:15,983 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 03:59:15,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9088 states. [2018-11-23 03:59:16,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9088 to 6276. [2018-11-23 03:59:16,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6276 states. [2018-11-23 03:59:16,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6276 states to 6276 states and 14440 transitions. [2018-11-23 03:59:16,048 INFO L78 Accepts]: Start accepts. Automaton has 6276 states and 14440 transitions. Word has length 92 [2018-11-23 03:59:16,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:16,048 INFO L480 AbstractCegarLoop]: Abstraction has 6276 states and 14440 transitions. [2018-11-23 03:59:16,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:16,048 INFO L276 IsEmpty]: Start isEmpty. Operand 6276 states and 14440 transitions. [2018-11-23 03:59:16,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:16,053 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:16,053 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:16,053 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:16,054 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:16,054 INFO L82 PathProgramCache]: Analyzing trace with hash -818873695, now seen corresponding path program 1 times [2018-11-23 03:59:16,054 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:16,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:16,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:16,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:16,055 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:16,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:16,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:16,110 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:16,110 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 03:59:16,111 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:16,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 03:59:16,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 03:59:16,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 03:59:16,111 INFO L87 Difference]: Start difference. First operand 6276 states and 14440 transitions. Second operand 6 states. [2018-11-23 03:59:16,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:16,298 INFO L93 Difference]: Finished difference Result 8414 states and 19086 transitions. [2018-11-23 03:59:16,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 03:59:16,298 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2018-11-23 03:59:16,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:16,304 INFO L225 Difference]: With dead ends: 8414 [2018-11-23 03:59:16,304 INFO L226 Difference]: Without dead ends: 8414 [2018-11-23 03:59:16,305 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-23 03:59:16,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8414 states. [2018-11-23 03:59:16,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8414 to 6415. [2018-11-23 03:59:16,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6415 states. [2018-11-23 03:59:16,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6415 states to 6415 states and 14631 transitions. [2018-11-23 03:59:16,367 INFO L78 Accepts]: Start accepts. Automaton has 6415 states and 14631 transitions. Word has length 92 [2018-11-23 03:59:16,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:16,367 INFO L480 AbstractCegarLoop]: Abstraction has 6415 states and 14631 transitions. [2018-11-23 03:59:16,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 03:59:16,367 INFO L276 IsEmpty]: Start isEmpty. Operand 6415 states and 14631 transitions. [2018-11-23 03:59:16,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:16,372 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:16,373 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:16,373 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:16,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:16,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1620714257, now seen corresponding path program 1 times [2018-11-23 03:59:16,373 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:16,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:16,375 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:16,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:16,375 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:16,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:16,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:16,468 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:16,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 03:59:16,468 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:16,468 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 03:59:16,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 03:59:16,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-23 03:59:16,469 INFO L87 Difference]: Start difference. First operand 6415 states and 14631 transitions. Second operand 8 states. [2018-11-23 03:59:16,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:16,667 INFO L93 Difference]: Finished difference Result 10090 states and 22670 transitions. [2018-11-23 03:59:16,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 03:59:16,668 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2018-11-23 03:59:16,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:16,675 INFO L225 Difference]: With dead ends: 10090 [2018-11-23 03:59:16,675 INFO L226 Difference]: Without dead ends: 10090 [2018-11-23 03:59:16,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-11-23 03:59:16,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10090 states. [2018-11-23 03:59:16,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10090 to 7293. [2018-11-23 03:59:16,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7293 states. [2018-11-23 03:59:16,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7293 states to 7293 states and 16594 transitions. [2018-11-23 03:59:16,750 INFO L78 Accepts]: Start accepts. Automaton has 7293 states and 16594 transitions. Word has length 92 [2018-11-23 03:59:16,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:16,750 INFO L480 AbstractCegarLoop]: Abstraction has 7293 states and 16594 transitions. [2018-11-23 03:59:16,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 03:59:16,751 INFO L276 IsEmpty]: Start isEmpty. Operand 7293 states and 16594 transitions. [2018-11-23 03:59:16,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:16,757 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:16,757 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:16,757 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:16,757 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:16,757 INFO L82 PathProgramCache]: Analyzing trace with hash -557563760, now seen corresponding path program 1 times [2018-11-23 03:59:16,757 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:16,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:16,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:16,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:16,759 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:16,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:16,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:16,867 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:16,867 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 03:59:16,867 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:16,867 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 03:59:16,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 03:59:16,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-23 03:59:16,868 INFO L87 Difference]: Start difference. First operand 7293 states and 16594 transitions. Second operand 9 states. [2018-11-23 03:59:17,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:17,195 INFO L93 Difference]: Finished difference Result 10558 states and 23992 transitions. [2018-11-23 03:59:17,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 03:59:17,196 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2018-11-23 03:59:17,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:17,203 INFO L225 Difference]: With dead ends: 10558 [2018-11-23 03:59:17,203 INFO L226 Difference]: Without dead ends: 10526 [2018-11-23 03:59:17,203 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2018-11-23 03:59:17,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10526 states. [2018-11-23 03:59:17,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10526 to 9413. [2018-11-23 03:59:17,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9413 states. [2018-11-23 03:59:17,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9413 states to 9413 states and 21423 transitions. [2018-11-23 03:59:17,288 INFO L78 Accepts]: Start accepts. Automaton has 9413 states and 21423 transitions. Word has length 92 [2018-11-23 03:59:17,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:17,289 INFO L480 AbstractCegarLoop]: Abstraction has 9413 states and 21423 transitions. [2018-11-23 03:59:17,289 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 03:59:17,289 INFO L276 IsEmpty]: Start isEmpty. Operand 9413 states and 21423 transitions. [2018-11-23 03:59:17,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:17,298 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:17,298 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:17,298 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:17,298 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:17,299 INFO L82 PathProgramCache]: Analyzing trace with hash 1940452177, now seen corresponding path program 1 times [2018-11-23 03:59:17,299 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:17,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:17,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:17,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:17,300 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:17,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:17,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:17,397 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:17,397 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-23 03:59:17,397 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:17,397 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 03:59:17,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 03:59:17,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-23 03:59:17,398 INFO L87 Difference]: Start difference. First operand 9413 states and 21423 transitions. Second operand 8 states. [2018-11-23 03:59:17,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:17,665 INFO L93 Difference]: Finished difference Result 14313 states and 33272 transitions. [2018-11-23 03:59:17,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 03:59:17,666 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2018-11-23 03:59:17,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:17,676 INFO L225 Difference]: With dead ends: 14313 [2018-11-23 03:59:17,676 INFO L226 Difference]: Without dead ends: 14313 [2018-11-23 03:59:17,676 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-23 03:59:17,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14313 states. [2018-11-23 03:59:17,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14313 to 9971. [2018-11-23 03:59:17,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9971 states. [2018-11-23 03:59:17,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9971 states to 9971 states and 22916 transitions. [2018-11-23 03:59:17,778 INFO L78 Accepts]: Start accepts. Automaton has 9971 states and 22916 transitions. Word has length 92 [2018-11-23 03:59:17,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:17,778 INFO L480 AbstractCegarLoop]: Abstraction has 9971 states and 22916 transitions. [2018-11-23 03:59:17,778 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 03:59:17,778 INFO L276 IsEmpty]: Start isEmpty. Operand 9971 states and 22916 transitions. [2018-11-23 03:59:17,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 03:59:17,787 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:17,787 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:17,787 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:17,787 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:17,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1467011438, now seen corresponding path program 1 times [2018-11-23 03:59:17,787 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:17,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:17,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:17,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:17,789 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:17,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:17,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:17,827 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:17,827 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 03:59:17,828 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:17,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 03:59:17,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 03:59:17,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:17,828 INFO L87 Difference]: Start difference. First operand 9971 states and 22916 transitions. Second operand 3 states. [2018-11-23 03:59:17,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:17,857 INFO L93 Difference]: Finished difference Result 9715 states and 22100 transitions. [2018-11-23 03:59:17,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 03:59:17,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-11-23 03:59:17,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:17,865 INFO L225 Difference]: With dead ends: 9715 [2018-11-23 03:59:17,865 INFO L226 Difference]: Without dead ends: 9683 [2018-11-23 03:59:17,865 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 03:59:17,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9683 states. [2018-11-23 03:59:17,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9683 to 7662. [2018-11-23 03:59:17,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7662 states. [2018-11-23 03:59:17,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7662 states to 7662 states and 17304 transitions. [2018-11-23 03:59:17,935 INFO L78 Accepts]: Start accepts. Automaton has 7662 states and 17304 transitions. Word has length 92 [2018-11-23 03:59:17,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:17,935 INFO L480 AbstractCegarLoop]: Abstraction has 7662 states and 17304 transitions. [2018-11-23 03:59:17,935 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 03:59:17,936 INFO L276 IsEmpty]: Start isEmpty. Operand 7662 states and 17304 transitions. [2018-11-23 03:59:17,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-23 03:59:17,944 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:17,944 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:17,944 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:17,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:17,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1410010744, now seen corresponding path program 1 times [2018-11-23 03:59:17,944 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:17,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:17,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:17,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:17,946 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:17,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:17,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:18,000 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:18,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 03:59:18,000 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:18,000 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 03:59:18,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 03:59:18,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 03:59:18,001 INFO L87 Difference]: Start difference. First operand 7662 states and 17304 transitions. Second operand 4 states. [2018-11-23 03:59:18,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:18,297 INFO L93 Difference]: Finished difference Result 8647 states and 19331 transitions. [2018-11-23 03:59:18,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 03:59:18,298 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2018-11-23 03:59:18,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:18,304 INFO L225 Difference]: With dead ends: 8647 [2018-11-23 03:59:18,304 INFO L226 Difference]: Without dead ends: 8531 [2018-11-23 03:59:18,304 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:18,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8531 states. [2018-11-23 03:59:18,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8531 to 7965. [2018-11-23 03:59:18,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7965 states. [2018-11-23 03:59:18,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7965 states to 7965 states and 17865 transitions. [2018-11-23 03:59:18,372 INFO L78 Accepts]: Start accepts. Automaton has 7965 states and 17865 transitions. Word has length 94 [2018-11-23 03:59:18,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:18,372 INFO L480 AbstractCegarLoop]: Abstraction has 7965 states and 17865 transitions. [2018-11-23 03:59:18,372 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 03:59:18,372 INFO L276 IsEmpty]: Start isEmpty. Operand 7965 states and 17865 transitions. [2018-11-23 03:59:18,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-23 03:59:18,378 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:18,378 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:18,378 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:18,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:18,379 INFO L82 PathProgramCache]: Analyzing trace with hash 596396296, now seen corresponding path program 1 times [2018-11-23 03:59:18,379 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:18,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:18,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:18,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:18,380 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:18,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:18,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:18,493 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:18,493 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 03:59:18,493 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:18,493 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 03:59:18,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 03:59:18,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-11-23 03:59:18,494 INFO L87 Difference]: Start difference. First operand 7965 states and 17865 transitions. Second operand 9 states. [2018-11-23 03:59:18,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:18,895 INFO L93 Difference]: Finished difference Result 9894 states and 21848 transitions. [2018-11-23 03:59:18,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 03:59:18,896 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 94 [2018-11-23 03:59:18,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:18,903 INFO L225 Difference]: With dead ends: 9894 [2018-11-23 03:59:18,903 INFO L226 Difference]: Without dead ends: 9894 [2018-11-23 03:59:18,904 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 3 SyntacticMatches, 6 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=320, Unknown=0, NotChecked=0, Total=420 [2018-11-23 03:59:18,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9894 states. [2018-11-23 03:59:18,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9894 to 8424. [2018-11-23 03:59:18,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8424 states. [2018-11-23 03:59:18,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8424 states to 8424 states and 18820 transitions. [2018-11-23 03:59:18,980 INFO L78 Accepts]: Start accepts. Automaton has 8424 states and 18820 transitions. Word has length 94 [2018-11-23 03:59:18,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:18,980 INFO L480 AbstractCegarLoop]: Abstraction has 8424 states and 18820 transitions. [2018-11-23 03:59:18,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 03:59:18,980 INFO L276 IsEmpty]: Start isEmpty. Operand 8424 states and 18820 transitions. [2018-11-23 03:59:18,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-23 03:59:18,987 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:18,987 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:18,987 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:18,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:18,988 INFO L82 PathProgramCache]: Analyzing trace with hash 807747209, now seen corresponding path program 1 times [2018-11-23 03:59:18,988 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:18,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:18,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:18,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:18,989 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:18,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:19,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:19,092 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:19,092 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 03:59:19,092 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:19,092 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 03:59:19,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 03:59:19,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 03:59:19,093 INFO L87 Difference]: Start difference. First operand 8424 states and 18820 transitions. Second operand 5 states. [2018-11-23 03:59:19,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:19,166 INFO L93 Difference]: Finished difference Result 8424 states and 18772 transitions. [2018-11-23 03:59:19,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 03:59:19,167 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2018-11-23 03:59:19,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:19,173 INFO L225 Difference]: With dead ends: 8424 [2018-11-23 03:59:19,174 INFO L226 Difference]: Without dead ends: 8424 [2018-11-23 03:59:19,174 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 03:59:19,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8424 states. [2018-11-23 03:59:19,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8424 to 6247. [2018-11-23 03:59:19,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6247 states. [2018-11-23 03:59:19,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6247 states to 6247 states and 13931 transitions. [2018-11-23 03:59:19,234 INFO L78 Accepts]: Start accepts. Automaton has 6247 states and 13931 transitions. Word has length 94 [2018-11-23 03:59:19,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:19,235 INFO L480 AbstractCegarLoop]: Abstraction has 6247 states and 13931 transitions. [2018-11-23 03:59:19,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 03:59:19,235 INFO L276 IsEmpty]: Start isEmpty. Operand 6247 states and 13931 transitions. [2018-11-23 03:59:19,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-23 03:59:19,240 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:19,240 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:19,240 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:19,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:19,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1695250890, now seen corresponding path program 1 times [2018-11-23 03:59:19,241 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:19,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:19,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:19,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:19,242 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:19,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:59:19,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:59:19,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 03:59:19,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-11-23 03:59:19,449 INFO L256 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-11-23 03:59:19,449 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-23 03:59:19,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-23 03:59:19,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-11-23 03:59:19,450 INFO L87 Difference]: Start difference. First operand 6247 states and 13931 transitions. Second operand 11 states. [2018-11-23 03:59:20,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 03:59:20,407 INFO L93 Difference]: Finished difference Result 12519 states and 28054 transitions. [2018-11-23 03:59:20,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 03:59:20,407 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 94 [2018-11-23 03:59:20,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 03:59:20,413 INFO L225 Difference]: With dead ends: 12519 [2018-11-23 03:59:20,414 INFO L226 Difference]: Without dead ends: 8876 [2018-11-23 03:59:20,414 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-11-23 03:59:20,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8876 states. [2018-11-23 03:59:20,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8876 to 6300. [2018-11-23 03:59:20,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6300 states. [2018-11-23 03:59:20,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6300 states to 6300 states and 13964 transitions. [2018-11-23 03:59:20,476 INFO L78 Accepts]: Start accepts. Automaton has 6300 states and 13964 transitions. Word has length 94 [2018-11-23 03:59:20,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 03:59:20,477 INFO L480 AbstractCegarLoop]: Abstraction has 6300 states and 13964 transitions. [2018-11-23 03:59:20,477 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-23 03:59:20,477 INFO L276 IsEmpty]: Start isEmpty. Operand 6300 states and 13964 transitions. [2018-11-23 03:59:20,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-11-23 03:59:20,481 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 03:59:20,481 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 03:59:20,482 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 03:59:20,482 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:59:20,482 INFO L82 PathProgramCache]: Analyzing trace with hash -520452890, now seen corresponding path program 2 times [2018-11-23 03:59:20,482 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-11-23 03:59:20,483 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:20,483 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 03:59:20,483 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 03:59:20,483 INFO L286 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-11-23 03:59:20,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 03:59:20,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 03:59:20,543 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [478] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [361] L-1-->L671: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [520] L671-->L673: Formula: (= v_~__unbuffered_cnt~0_6 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [388] L673-->L674: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [499] L674-->L675: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [425] L675-->L677: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [488] L677-->L679: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [526] L679-->L680: Formula: (= v_~y~0_11 0) InVars {} OutVars{~y~0=v_~y~0_11} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [457] L680-->L681: Formula: (= v_~y$flush_delayed~0_5 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [394] L681-->L682: Formula: (= v_~y$mem_tmp~0_3 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_3} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [518] L682-->L683: Formula: (= v_~y$r_buff0_thd0~0_2 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [450] L683-->L684: Formula: (= v_~y$r_buff0_thd1~0_14 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [387] L684-->L685: Formula: (= v_~y$r_buff0_thd2~0_43 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_43} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [498] L685-->L686: Formula: (= v_~y$r_buff1_thd0~0_2 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [424] L686-->L687: Formula: (= v_~y$r_buff1_thd1~0_9 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [377] L687-->L688: Formula: (= v_~y$r_buff1_thd2~0_25 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [487] L688-->L689: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [420] L689-->L690: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [525] L690-->L691: Formula: (= v_~y$w_buff0~0_11 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_11} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [456] L691-->L692: Formula: (= v_~y$w_buff0_used~0_55 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_55} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [393] L692-->L693: Formula: (= v_~y$w_buff1~0_10 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_10} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [516] L693-->L694: Formula: (= v_~y$w_buff1_used~0_32 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [449] L694-->L695: Formula: (= v_~weak$$choice0~0_2 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [386] L695-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [517] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [512] L-1-2-->L768: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_1|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_1|, ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_1|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_1|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_1|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_1|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t1443~0.base, ULTIMATE.start_main_~#t1443~0.offset, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t1444~0.offset, ULTIMATE.start_main_~#t1444~0.base, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [470] L768-->L768-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1443~0.base_2| 0)) (= |v_ULTIMATE.start_main_~#t1443~0.offset_2| 0) (= 0 (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1443~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1443~0.base_2| 4)) (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1443~0.base_2| 1) |v_#valid_1|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_2|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1443~0.base, ULTIMATE.start_main_~#t1443~0.offset, #valid, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [473] L768-1-->L769: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1443~0.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1443~0.base_3|) |v_ULTIMATE.start_main_~#t1443~0.offset_3| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_3|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_3|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_3|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_3|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [640] L769-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [528] P0ENTRY-->L4: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~y$w_buff1_used~0_1 v_~y$w_buff0_used~0_2) (= v_~y$w_buff0~0_1 1) (= v_Thread0_P0___VERIFIER_assert_~expression_1 |v_Thread0_P0___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff1~0_1 v_~y$w_buff0~0_2) (= |v_Thread0_P0___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_1 256) 0)) (not (= (mod v_~y$w_buff0_used~0_1 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_1, Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1, ~y$w_buff1~0=v_~y$w_buff1~0_1, ~y$w_buff0~0=v_~y$w_buff0~0_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, Thread0_P0___VERIFIER_assert_#in~expression=|v_Thread0_P0___VERIFIER_assert_#in~expression_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread0_P0___VERIFIER_assert_~expression, Thread0_P0_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, Thread0_P0_~arg.base, Thread0_P0___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [530] L4-->L4-3: Formula: (not (= 0 v_Thread0_P0___VERIFIER_assert_~expression_3)) InVars {Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_3} OutVars{Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [533] L4-3-->L713: Formula: (and (= v_~y$r_buff0_thd1~0_1 1) (= v_~y$r_buff1_thd2~0_1 v_~y$r_buff0_thd2~0_1) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_2) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~x~0_1 1)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_1, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~x~0=v_~x~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff0_thd1~0, ~x~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [534] L713-->L713-5: Formula: (and (not (= (mod v_~y$w_buff0_used~0_3 256) 0)) (= |v_Thread0_P0_#t~ite4_1| v_~y$w_buff0~0_3) (not (= 0 (mod v_~y$r_buff0_thd1~0_3 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_3} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_3} AuxVars[] AssignedVars[Thread0_P0_#t~ite4] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [410] L769-1-->L770: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [510] L770-->L770-1: Formula: (and (= 0 (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1444~0.base_2|)) (= |v_#valid_3| (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1444~0.base_2| 1)) (not (= |v_ULTIMATE.start_main_~#t1444~0.base_2| 0)) (= |v_ULTIMATE.start_main_~#t1444~0.offset_2| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1444~0.base_2| 4))) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#t1444~0.offset, #length, ULTIMATE.start_main_~#t1444~0.base] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [511] L770-1-->L771: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1444~0.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1444~0.base_3|) |v_ULTIMATE.start_main_~#t1444~0.offset_3| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_3|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_3|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_3|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_3|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [641] L771-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [555] P1ENTRY-->L734: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~y$mem_tmp~0_1 v_~y~0_3) (= v_~x~0_2 2) (= v_~weak$$choice0~0_1 (ite (= 0 (+ |v_Thread1_P1_#t~nondet10.base_1| |v_Thread1_P1_#t~nondet10.offset_1|)) 0 1)) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_7) (= v_~weak$$choice2~0_7 (ite (= (+ |v_Thread1_P1_#t~nondet11.offset_1| |v_Thread1_P1_#t~nondet11.base_1|) 0) 0 1))) InVars {Thread1_P1_#t~nondet10.offset=|v_Thread1_P1_#t~nondet10.offset_1|, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_#t~nondet10.base=|v_Thread1_P1_#t~nondet10.base_1|, Thread1_P1_#t~nondet11.base=|v_Thread1_P1_#t~nondet11.base_1|, ~y~0=v_~y~0_3, Thread1_P1_#t~nondet11.offset=|v_Thread1_P1_#t~nondet11.offset_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, Thread1_P1_#t~nondet10.base=|v_Thread1_P1_#t~nondet10.base_2|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, Thread1_P1_#t~nondet10.offset=|v_Thread1_P1_#t~nondet10.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, Thread1_P1_#t~nondet11.base=|v_Thread1_P1_#t~nondet11.base_2|, ~y~0=v_~y~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_7, Thread1_P1_#t~nondet11.offset=|v_Thread1_P1_#t~nondet11.offset_2|, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[Thread1_P1_#t~nondet10.offset, ~weak$$choice0~0, ~y$mem_tmp~0, Thread1_P1_~arg.offset, Thread1_P1_#t~nondet10.base, Thread1_P1_~arg.base, ~y$flush_delayed~0, Thread1_P1_#t~nondet11.base, ~weak$$choice2~0, Thread1_P1_#t~nondet11.offset, ~x~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [556] L734-->L734-5: Formula: (and (= |v_Thread1_P1_#t~ite13_1| v_~y~0_4) (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd2~0_15 256)))) (or (and .cse0 (= (mod v_~y$r_buff1_thd2~0_9 256) 0)) (= 0 (mod v_~y$w_buff0_used~0_26 256)) (and .cse0 (= 0 (mod v_~y$w_buff1_used~0_17 256)))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_26, ~y~0=v_~y~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_26, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_1|, ~y~0=v_~y~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite13] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [536] L713-5-->L714: Formula: (= v_~y~0_2 |v_Thread0_P0_#t~ite4_2|) InVars {Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_2|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_3|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_1|, ~y~0=v_~y~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite4, Thread0_P0_#t~ite3, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [539] L714-->L714-2: Formula: (and (= |v_Thread0_P0_#t~ite5_1| 0) (not (= (mod v_~y$w_buff0_used~0_5 256) 0)) (not (= (mod v_~y$r_buff0_thd1~0_5 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_5} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite5] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [558] L734-5-->L735: Formula: (= v_~y~0_6 |v_Thread1_P1_#t~ite13_2|) InVars {Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_2|} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_1|, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_3|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite12, Thread1_P1_#t~ite13, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [561] L735-->L735-8: Formula: (and (= |v_Thread1_P1_#t~ite16_1| v_~y$w_buff0~0_5) (not (= (mod v_~weak$$choice2~0_8 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff0~0=v_~y$w_buff0~0_5} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_1|, ~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite16] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite16|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [564] L735-8-->L736: Formula: (= v_~y$w_buff0~0_10 |v_Thread1_P1_#t~ite16_2|) InVars {Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_2|} OutVars{Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_1|, Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_3|, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_1|, ~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[~y$w_buff0~0, Thread1_P1_#t~ite14, Thread1_P1_#t~ite16, Thread1_P1_#t~ite15] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [567] L736-->L736-8: Formula: (and (= |v_Thread1_P1_#t~ite19_1| v_~y$w_buff1~0_5) (not (= (mod v_~weak$$choice2~0_10 256) 0))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_5, ~weak$$choice2~0=v_~weak$$choice2~0_10} OutVars{Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_1|, ~y$w_buff1~0=v_~y$w_buff1~0_5, ~weak$$choice2~0=v_~weak$$choice2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite19] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [572] L736-8-->L737: Formula: (= v_~y$w_buff1~0_9 |v_Thread1_P1_#t~ite19_2|) InVars {Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_2|} OutVars{Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_3|, ~y$w_buff1~0=v_~y$w_buff1~0_9, Thread1_P1_#t~ite18=|v_Thread1_P1_#t~ite18_1|, Thread1_P1_#t~ite17=|v_Thread1_P1_#t~ite17_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite19, ~y$w_buff1~0, Thread1_P1_#t~ite18, Thread1_P1_#t~ite17] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [576] L737-->L737-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread1_P1_#t~ite22_1| v_~y$w_buff0_used~0_50)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~weak$$choice2~0=v_~weak$$choice2~0_12} OutVars{Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite22] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [581] L737-8-->L738: Formula: (= v_~y$w_buff0_used~0_15 |v_Thread1_P1_#t~ite22_2|) InVars {Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_2|} OutVars{Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_15, Thread1_P1_#t~ite21=|v_Thread1_P1_#t~ite21_1|, Thread1_P1_#t~ite20=|v_Thread1_P1_#t~ite20_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite21, Thread1_P1_#t~ite20, Thread1_P1_#t~ite22] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [585] L738-->L738-8: Formula: (and (= |v_Thread1_P1_#t~ite25_1| v_~y$w_buff1_used~0_9) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_9} OutVars{Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_1|, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_9} AuxVars[] AssignedVars[Thread1_P1_#t~ite25] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [542] L714-2-->L715: Formula: (= v_~y$w_buff0_used~0_7 |v_Thread0_P0_#t~ite5_3|) InVars {Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_7, Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite5] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [544] L715-->L715-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_5 256) 0) (= (mod v_~y$r_buff1_thd1~0_5 256) 0)) (or (= (mod v_~y$w_buff0_used~0_9 256) 0) (= (mod v_~y$r_buff0_thd1~0_8 256) 0)) (= |v_Thread0_P0_#t~ite6_2| v_~y$w_buff1_used~0_5)) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_8, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [545] L715-2-->L716: Formula: (= v_~y$w_buff1_used~0_6 |v_Thread0_P0_#t~ite6_3|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} OutVars{Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite6, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [547] L716-->L716-2: Formula: (and (= |v_Thread0_P0_#t~ite7_2| v_~y$r_buff0_thd1~0_10) (or (= 0 (mod v_~y$r_buff0_thd1~0_10 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite7] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite7|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [548] L716-2-->L717: Formula: (= v_~y$r_buff0_thd1~0_11 |v_Thread0_P0_#t~ite7_3|) InVars {Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_3|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_4|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd1~0, Thread0_P0_#t~ite7] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [550] L717-->L717-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd1~0_7 256)) (= 0 (mod v_~y$w_buff1_used~0_8 256))) (= |v_Thread0_P0_#t~ite8_2| v_~y$r_buff1_thd1~0_7) (or (= 0 (mod v_~y$w_buff0_used~0_13 256)) (= (mod v_~y$r_buff0_thd1~0_13 256) 0))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_7, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} AuxVars[] AssignedVars[Thread0_P0_#t~ite8] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite8|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [551] L717-2-->L722: Formula: (and (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y$r_buff1_thd1~0_8 |v_Thread0_P0_#t~ite8_3|)) InVars {Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_4|} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite8] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [590] L738-8-->L739: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread1_P1_#t~ite25_2|) InVars {Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_2|} OutVars{Thread1_P1_#t~ite23=|v_Thread1_P1_#t~ite23_1|, Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_3|, Thread1_P1_#t~ite24=|v_Thread1_P1_#t~ite24_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite23, Thread1_P1_#t~ite25, Thread1_P1_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [594] L739-->L739-8: Formula: (and (= |v_Thread1_P1_#t~ite28_1| v_~y$r_buff0_thd2~0_7) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite28] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [599] L739-8-->L740: Formula: (= v_~y$r_buff0_thd2~0_12 |v_Thread1_P1_#t~ite28_2|) InVars {Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_2|} OutVars{Thread1_P1_#t~ite27=|v_Thread1_P1_#t~ite27_1|, Thread1_P1_#t~ite26=|v_Thread1_P1_#t~ite26_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_3|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite27, Thread1_P1_#t~ite26, Thread1_P1_#t~ite28] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [603] L740-->L740-8: Formula: (and (= |v_Thread1_P1_#t~ite31_1| v_~y$r_buff1_thd2~0_6) (not (= 0 (mod v_~weak$$choice2~0_5 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_6, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite31] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [608] L740-8-->L742: Formula: (and (= v_~y$r_buff1_thd2~0_11 |v_Thread1_P1_#t~ite31_2|) (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_5)) InVars {Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_2|, ~y~0=v_~y~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_11, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_3|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_1|, ~y~0=v_~y~0_5, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite31, Thread1_P1_#t~ite30, Thread1_P1_#t~ite29] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [612] L742-->L742-2: Formula: (and (= |v_Thread1_P1_#t~ite32_1| v_~y$mem_tmp~0_2) (not (= 0 (mod v_~y$flush_delayed~0_2 256)))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite32] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite32|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [617] L742-2-->L746: Formula: (and (= v_~y~0_8 |v_Thread1_P1_#t~ite32_3|) (= v_~y$flush_delayed~0_4 0)) InVars {Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~y~0=v_~y~0_8, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite32, ~y$flush_delayed~0, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [620] L746-->L746-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd2~0_24 256)) (= (mod v_~y$w_buff0_used~0_35 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_24} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_24} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [623] L746-2-->L746-4: Formula: (and (or (= (mod v_~y$w_buff1_used~0_22 256) 0) (= (mod v_~y$r_buff1_thd2~0_15 256) 0)) (= |v_Thread1_P1_#t~ite33_3| v_~y~0_9)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_15, ~y~0=v_~y~0_9, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_15, Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_3|, ~y~0=v_~y~0_9, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} AuxVars[] AssignedVars[Thread1_P1_#t~ite33] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [626] L746-4-->L746-5: Formula: (= |v_Thread1_P1_#t~ite34_4| |v_Thread1_P1_#t~ite33_4|) InVars {Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_4|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_4|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite34] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=0, |Thread1_P1_#t~ite34|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [621] L746-5-->L747: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite34_2|) InVars {Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_2|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_1|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_3|, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite33, Thread1_P1_#t~ite34, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [625] L747-->L747-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_28 256)) (= (mod v_~y$w_buff0_used~0_39 256) 0)) (= |v_Thread1_P1_#t~ite35_2| v_~y$w_buff0_used~0_39)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28} AuxVars[] AssignedVars[Thread1_P1_#t~ite35] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite35|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [627] L747-2-->L748: Formula: (= v_~y$w_buff0_used~0_40 |v_Thread1_P1_#t~ite35_3|) InVars {Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_40, Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite35] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [629] L748-->L748-2: Formula: (and (= |v_Thread1_P1_#t~ite36_2| v_~y$w_buff1_used~0_26) (or (= 0 (mod v_~y$r_buff0_thd2~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_44 256))) (or (= 0 (mod v_~y$w_buff1_used~0_26 256)) (= 0 (mod v_~y$r_buff1_thd2~0_19 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [630] L748-2-->L749: Formula: (= v_~y$w_buff1_used~0_27 |v_Thread1_P1_#t~ite36_3|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|} OutVars{Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[Thread1_P1_#t~ite36, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [632] L749-->L749-2: Formula: (and (= |v_Thread1_P1_#t~ite37_2| v_~y$r_buff0_thd2~0_36) (or (= 0 (mod v_~y$r_buff0_thd2~0_36 256)) (= (mod v_~y$w_buff0_used~0_48 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_36} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_36} AuxVars[] AssignedVars[Thread1_P1_#t~ite37] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite37|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [633] L749-2-->L750: Formula: (= v_~y$r_buff0_thd2~0_37 |v_Thread1_P1_#t~ite37_3|) InVars {Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_3|} OutVars{Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_37} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite37] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [635] L750-->L750-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= (mod v_~y$r_buff1_thd2~0_21 256) 0)) (or (= 0 (mod v_~y$r_buff0_thd2~0_39 256)) (= (mod v_~y$w_buff0_used~0_51 256) 0)) (= |v_Thread1_P1_#t~ite38_2| v_~y$r_buff1_thd2~0_21)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_21, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_21, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[Thread1_P1_#t~ite38] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite38|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [636] L750-2-->L755: Formula: (and (= v_~y$r_buff1_thd2~0_22 |v_Thread1_P1_#t~ite38_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_3|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_22, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite38] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [446] L771-1-->L775: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_5 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [367] L775-->L777: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [415] L777-->L777-2: Formula: (or (= (mod v_~y$r_buff0_thd0~0_4 256) 0) (= (mod v_~y$w_buff0_used~0_57 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [419] L777-2-->L777-4: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_4 256)) (= 0 (mod v_~y$w_buff1_used~0_34 256))) (= |v_ULTIMATE.start_main_#t~ite42_3| v_~y~0_12)) InVars {~y~0=v_~y~0_12, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} OutVars{~y~0=v_~y~0_12, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [423] L777-4-->L777-5: Formula: (= |v_ULTIMATE.start_main_#t~ite43_3| |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_3|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [406] L777-5-->L778: Formula: (= v_~y~0_13 |v_ULTIMATE.start_main_#t~ite43_5|) InVars {ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y~0=v_~y~0_13, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [358] L778-->L778-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_59 256) 0)) (= |v_ULTIMATE.start_main_#t~ite44_3| v_~y$w_buff0_used~0_59)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_59, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_59, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [524] L778-2-->L779: Formula: (= v_~y$w_buff0_used~0_60 |v_ULTIMATE.start_main_#t~ite44_5|) InVars {ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_60, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [469] L779-->L779-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_36 256))) (= |v_ULTIMATE.start_main_#t~ite45_3| v_~y$w_buff1_used~0_36) (or (= (mod v_~y$r_buff0_thd0~0_8 256) 0) (= 0 (mod v_~y$w_buff0_used~0_62 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_62, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_36} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_62, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_36} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [454] L779-2-->L780: Formula: (= v_~y$w_buff1_used~0_37 |v_ULTIMATE.start_main_#t~ite45_5|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|} OutVars{ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_37} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [408] L780-->L780-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite46_3| v_~y$r_buff0_thd0~0_10) (or (= 0 (mod v_~y$w_buff0_used~0_64 256)) (= 0 (mod v_~y$r_buff0_thd0~0_10 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [411] L780-2-->L781: Formula: (= v_~y$r_buff0_thd0~0_11 |v_ULTIMATE.start_main_#t~ite46_5|) InVars {ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite46] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [509] L781-->L781-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_13 256) 0) (= (mod v_~y$w_buff0_used~0_66 256) 0)) (= |v_ULTIMATE.start_main_#t~ite47_3| v_~y$r_buff1_thd0~0_8) (or (= 0 (mod v_~y$r_buff1_thd0~0_8 256)) (= 0 (mod v_~y$w_buff1_used~0_39 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_39} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [513] L781-2-->L786: Formula: (and (= v_~y$r_buff1_thd0~0_9 |v_ULTIMATE.start_main_#t~ite47_5|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_2) (= 2 v_~x~0_4))) 1 0) 0) 0 1))) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~x~0=v_~x~0_4} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~x~0=v_~x~0_4, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [364] L786-->L786-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [368] L786-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [405] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [402] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [400] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); srcloc: L768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); srcloc: L768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); srcloc: L770 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); srcloc: L770-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite4;havoc #t~ite3;havoc #t~ite4; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite13;havoc #t~ite12; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite14;havoc #t~ite15;havoc #t~ite16; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite19;havoc #t~ite18;havoc #t~ite17; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite21;havoc #t~ite20;havoc #t~ite22; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite24;havoc #t~ite25;havoc #t~ite23; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite26;havoc #t~ite28;havoc #t~ite27; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite31;havoc #t~ite29;havoc #t~ite30;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite33 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 #t~ite34 := #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |P1_#t~ite34|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite34;havoc #t~ite34;havoc #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite35 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite35|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite35;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite36 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite36;havoc #t~ite36; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite37 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite37|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite37;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite38 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite38|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite38;havoc #t~ite38;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet41;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite42 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite43 := main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite43;havoc main_#t~ite43;havoc main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite44 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite44;havoc main_#t~ite44; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite45 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite45;havoc main_#t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite46;havoc main_#t~ite46; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite47;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); srcloc: L768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); srcloc: L768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); srcloc: L770 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); srcloc: L770-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite4;havoc #t~ite3;havoc #t~ite4; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite13;havoc #t~ite12; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite14;havoc #t~ite15;havoc #t~ite16; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite19;havoc #t~ite18;havoc #t~ite17; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite21;havoc #t~ite20;havoc #t~ite22; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite24;havoc #t~ite25;havoc #t~ite23; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite26;havoc #t~ite28;havoc #t~ite27; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite31;havoc #t~ite29;havoc #t~ite30;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite33 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 #t~ite34 := #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |P1_#t~ite34|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite34;havoc #t~ite34;havoc #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite35 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite35|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite35;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite36 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite36;havoc #t~ite36; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite37 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite37|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite37;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite38 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite38|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite38;havoc #t~ite38;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet41;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite42 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite43 := main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite43;havoc main_#t~ite43;havoc main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite44 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite44;havoc main_#t~ite44; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite45 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite45;havoc main_#t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite46;havoc main_#t~ite46; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite47;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] -1 call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] -1 call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L730] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L731] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L714] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 assume 0 != ~weak$$choice2~0 % 256; [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 assume 0 != ~weak$$choice2~0 % 256; [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 assume 0 != ~weak$$choice2~0 % 256; [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 assume 0 != ~weak$$choice2~0 % 256; [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 assume 0 != ~weak$$choice2~0 % 256; [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 assume 0 != ~y$flush_delayed~0 % 256; [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] -1 call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] -1 call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L730] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L731] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L714] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 assume 0 != ~weak$$choice2~0 % 256; [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 assume 0 != ~weak$$choice2~0 % 256; [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 assume 0 != ~weak$$choice2~0 % 256; [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 assume 0 != ~weak$$choice2~0 % 256; [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 assume 0 != ~weak$$choice2~0 % 256; [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 assume 0 != ~y$flush_delayed~0 % 256; [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0, main_~#t1444~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call main_~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, main_~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call main_~#t1444~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, main_~#t1444~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0, main_~#t1444~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call main_~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, main_~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call main_~#t1444~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, main_~#t1444~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call ~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, ~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc #t~nondet40; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call ~#t1444~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, ~#t1444~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc #t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 #t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 #t~ite43 := #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := #t~ite43; [L777] -1 havoc #t~ite43; [L777] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 #t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := #t~ite44; [L778] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 #t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := #t~ite45; [L779] -1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 #t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := #t~ite46; [L780] -1 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 #t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := #t~ite47; [L781] -1 havoc #t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call ~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, ~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc #t~nondet40; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call ~#t1444~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, ~#t1444~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc #t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 #t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 #t~ite43 := #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := #t~ite43; [L777] -1 havoc #t~ite43; [L777] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 #t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := #t~ite44; [L778] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 #t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := #t~ite45; [L779] -1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 #t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := #t~ite46; [L780] -1 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 #t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := #t~ite47; [L781] -1 havoc #t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L674] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L675] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L677] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L679] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L680] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L681] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L682] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L683] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L684] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L689] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L690] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L691] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L692] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L693] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L694] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L695] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] -1 pthread_t t1443; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] FCALL, FORK -1 pthread_create(&t1443, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] 0 y$w_buff1 = y$w_buff0 [L700] 0 y$w_buff0 = 1 [L701] 0 y$w_buff1_used = y$w_buff0_used [L702] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L705] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L706] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L707] 0 y$r_buff0_thd1 = (_Bool)1 [L710] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L770] -1 pthread_t t1444; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L771] FCALL, FORK -1 pthread_create(&t1444, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 x = 2 [L730] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L731] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L732] 1 y$flush_delayed = weak$$choice2 [L733] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L714] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L735] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L736] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L737] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L738] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L714] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L720] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L739] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L740] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L741] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y = y$flush_delayed ? y$mem_tmp : y [L743] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L747] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L748] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L748] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L749] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L749] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L750] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L750] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L753] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L778] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L779] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L780] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L781] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L784] -1 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-23 03:59:22,480 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-23 03:59:22,481 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 03:59:22 BasicIcfg [2018-11-23 03:59:22,482 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 03:59:22,482 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 03:59:22,482 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 03:59:22,482 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 03:59:22,483 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:59:02" (3/4) ... [2018-11-23 03:59:22,485 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [478] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [361] L-1-->L671: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [520] L671-->L673: Formula: (= v_~__unbuffered_cnt~0_6 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [388] L673-->L674: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [499] L674-->L675: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [425] L675-->L677: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [488] L677-->L679: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [526] L679-->L680: Formula: (= v_~y~0_11 0) InVars {} OutVars{~y~0=v_~y~0_11} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [457] L680-->L681: Formula: (= v_~y$flush_delayed~0_5 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [394] L681-->L682: Formula: (= v_~y$mem_tmp~0_3 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_3} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [518] L682-->L683: Formula: (= v_~y$r_buff0_thd0~0_2 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [450] L683-->L684: Formula: (= v_~y$r_buff0_thd1~0_14 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [387] L684-->L685: Formula: (= v_~y$r_buff0_thd2~0_43 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_43} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [498] L685-->L686: Formula: (= v_~y$r_buff1_thd0~0_2 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [424] L686-->L687: Formula: (= v_~y$r_buff1_thd1~0_9 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [377] L687-->L688: Formula: (= v_~y$r_buff1_thd2~0_25 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [487] L688-->L689: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [420] L689-->L690: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [525] L690-->L691: Formula: (= v_~y$w_buff0~0_11 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_11} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [456] L691-->L692: Formula: (= v_~y$w_buff0_used~0_55 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_55} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [393] L692-->L693: Formula: (= v_~y$w_buff1~0_10 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_10} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [516] L693-->L694: Formula: (= v_~y$w_buff1_used~0_32 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [449] L694-->L695: Formula: (= v_~weak$$choice0~0_2 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_2} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [386] L695-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [517] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [512] L-1-2-->L768: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_1|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_1|, ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_1|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_1|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_1|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_1|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t1443~0.base, ULTIMATE.start_main_~#t1443~0.offset, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t1444~0.offset, ULTIMATE.start_main_~#t1444~0.base, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [470] L768-->L768-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1443~0.base_2| 0)) (= |v_ULTIMATE.start_main_~#t1443~0.offset_2| 0) (= 0 (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1443~0.base_2|)) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1443~0.base_2| 4)) (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1443~0.base_2| 1) |v_#valid_1|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_2|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1443~0.base, ULTIMATE.start_main_~#t1443~0.offset, #valid, #length] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [473] L768-1-->L769: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1443~0.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1443~0.base_3|) |v_ULTIMATE.start_main_~#t1443~0.offset_3| 0))) InVars {#memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_3|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_3|} OutVars{#memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1443~0.base=|v_ULTIMATE.start_main_~#t1443~0.base_3|, ULTIMATE.start_main_~#t1443~0.offset=|v_ULTIMATE.start_main_~#t1443~0.offset_3|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [640] L769-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [528] P0ENTRY-->L4: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~y$w_buff1_used~0_1 v_~y$w_buff0_used~0_2) (= v_~y$w_buff0~0_1 1) (= v_Thread0_P0___VERIFIER_assert_~expression_1 |v_Thread0_P0___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff1~0_1 v_~y$w_buff0~0_2) (= |v_Thread0_P0___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_1 256) 0)) (not (= (mod v_~y$w_buff0_used~0_1 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_1, Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1, ~y$w_buff1~0=v_~y$w_buff1~0_1, ~y$w_buff0~0=v_~y$w_buff0~0_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, Thread0_P0___VERIFIER_assert_#in~expression=|v_Thread0_P0___VERIFIER_assert_#in~expression_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread0_P0___VERIFIER_assert_~expression, Thread0_P0_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, Thread0_P0_~arg.base, Thread0_P0___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [530] L4-->L4-3: Formula: (not (= 0 v_Thread0_P0___VERIFIER_assert_~expression_3)) InVars {Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_3} OutVars{Thread0_P0___VERIFIER_assert_~expression=v_Thread0_P0___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [533] L4-3-->L713: Formula: (and (= v_~y$r_buff0_thd1~0_1 1) (= v_~y$r_buff1_thd2~0_1 v_~y$r_buff0_thd2~0_1) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_2) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~x~0_1 1)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_1, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~x~0=v_~x~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff0_thd1~0, ~x~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [534] L713-->L713-5: Formula: (and (not (= (mod v_~y$w_buff0_used~0_3 256) 0)) (= |v_Thread0_P0_#t~ite4_1| v_~y$w_buff0~0_3) (not (= 0 (mod v_~y$r_buff0_thd1~0_3 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_3} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_3} AuxVars[] AssignedVars[Thread0_P0_#t~ite4] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [410] L769-1-->L770: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [510] L770-->L770-1: Formula: (and (= 0 (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1444~0.base_2|)) (= |v_#valid_3| (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1444~0.base_2| 1)) (not (= |v_ULTIMATE.start_main_~#t1444~0.base_2| 0)) (= |v_ULTIMATE.start_main_~#t1444~0.offset_2| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t1444~0.base_2| 4))) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#t1444~0.offset, #length, ULTIMATE.start_main_~#t1444~0.base] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [511] L770-1-->L771: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1444~0.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1444~0.base_3|) |v_ULTIMATE.start_main_~#t1444~0.offset_3| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_3|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_3|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1444~0.offset=|v_ULTIMATE.start_main_~#t1444~0.offset_3|, ULTIMATE.start_main_~#t1444~0.base=|v_ULTIMATE.start_main_~#t1444~0.base_3|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [641] L771-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [555] P1ENTRY-->L734: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~y$mem_tmp~0_1 v_~y~0_3) (= v_~x~0_2 2) (= v_~weak$$choice0~0_1 (ite (= 0 (+ |v_Thread1_P1_#t~nondet10.base_1| |v_Thread1_P1_#t~nondet10.offset_1|)) 0 1)) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_7) (= v_~weak$$choice2~0_7 (ite (= (+ |v_Thread1_P1_#t~nondet11.offset_1| |v_Thread1_P1_#t~nondet11.base_1|) 0) 0 1))) InVars {Thread1_P1_#t~nondet10.offset=|v_Thread1_P1_#t~nondet10.offset_1|, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_#t~nondet10.base=|v_Thread1_P1_#t~nondet10.base_1|, Thread1_P1_#t~nondet11.base=|v_Thread1_P1_#t~nondet11.base_1|, ~y~0=v_~y~0_3, Thread1_P1_#t~nondet11.offset=|v_Thread1_P1_#t~nondet11.offset_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, Thread1_P1_#t~nondet10.base=|v_Thread1_P1_#t~nondet10.base_2|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, Thread1_P1_#t~nondet10.offset=|v_Thread1_P1_#t~nondet10.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, Thread1_P1_#t~nondet11.base=|v_Thread1_P1_#t~nondet11.base_2|, ~y~0=v_~y~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_7, Thread1_P1_#t~nondet11.offset=|v_Thread1_P1_#t~nondet11.offset_2|, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[Thread1_P1_#t~nondet10.offset, ~weak$$choice0~0, ~y$mem_tmp~0, Thread1_P1_~arg.offset, Thread1_P1_#t~nondet10.base, Thread1_P1_~arg.base, ~y$flush_delayed~0, Thread1_P1_#t~nondet11.base, ~weak$$choice2~0, Thread1_P1_#t~nondet11.offset, ~x~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [556] L734-->L734-5: Formula: (and (= |v_Thread1_P1_#t~ite13_1| v_~y~0_4) (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd2~0_15 256)))) (or (and .cse0 (= (mod v_~y$r_buff1_thd2~0_9 256) 0)) (= 0 (mod v_~y$w_buff0_used~0_26 256)) (and .cse0 (= 0 (mod v_~y$w_buff1_used~0_17 256)))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_26, ~y~0=v_~y~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_26, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_1|, ~y~0=v_~y~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite13] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite4|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [536] L713-5-->L714: Formula: (= v_~y~0_2 |v_Thread0_P0_#t~ite4_2|) InVars {Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_2|} OutVars{Thread0_P0_#t~ite4=|v_Thread0_P0_#t~ite4_3|, Thread0_P0_#t~ite3=|v_Thread0_P0_#t~ite3_1|, ~y~0=v_~y~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite4, Thread0_P0_#t~ite3, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [539] L714-->L714-2: Formula: (and (= |v_Thread0_P0_#t~ite5_1| 0) (not (= (mod v_~y$w_buff0_used~0_5 256) 0)) (not (= (mod v_~y$r_buff0_thd1~0_5 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_5} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite5] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [558] L734-5-->L735: Formula: (= v_~y~0_6 |v_Thread1_P1_#t~ite13_2|) InVars {Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_2|} OutVars{Thread1_P1_#t~ite12=|v_Thread1_P1_#t~ite12_1|, Thread1_P1_#t~ite13=|v_Thread1_P1_#t~ite13_3|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite12, Thread1_P1_#t~ite13, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [561] L735-->L735-8: Formula: (and (= |v_Thread1_P1_#t~ite16_1| v_~y$w_buff0~0_5) (not (= (mod v_~weak$$choice2~0_8 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff0~0=v_~y$w_buff0~0_5} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_1|, ~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite16] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite16|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [564] L735-8-->L736: Formula: (= v_~y$w_buff0~0_10 |v_Thread1_P1_#t~ite16_2|) InVars {Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_2|} OutVars{Thread1_P1_#t~ite14=|v_Thread1_P1_#t~ite14_1|, Thread1_P1_#t~ite16=|v_Thread1_P1_#t~ite16_3|, Thread1_P1_#t~ite15=|v_Thread1_P1_#t~ite15_1|, ~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[~y$w_buff0~0, Thread1_P1_#t~ite14, Thread1_P1_#t~ite16, Thread1_P1_#t~ite15] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [567] L736-->L736-8: Formula: (and (= |v_Thread1_P1_#t~ite19_1| v_~y$w_buff1~0_5) (not (= (mod v_~weak$$choice2~0_10 256) 0))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_5, ~weak$$choice2~0=v_~weak$$choice2~0_10} OutVars{Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_1|, ~y$w_buff1~0=v_~y$w_buff1~0_5, ~weak$$choice2~0=v_~weak$$choice2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite19] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [572] L736-8-->L737: Formula: (= v_~y$w_buff1~0_9 |v_Thread1_P1_#t~ite19_2|) InVars {Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_2|} OutVars{Thread1_P1_#t~ite19=|v_Thread1_P1_#t~ite19_3|, ~y$w_buff1~0=v_~y$w_buff1~0_9, Thread1_P1_#t~ite18=|v_Thread1_P1_#t~ite18_1|, Thread1_P1_#t~ite17=|v_Thread1_P1_#t~ite17_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite19, ~y$w_buff1~0, Thread1_P1_#t~ite18, Thread1_P1_#t~ite17] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [576] L737-->L737-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread1_P1_#t~ite22_1| v_~y$w_buff0_used~0_50)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~weak$$choice2~0=v_~weak$$choice2~0_12} OutVars{Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite22] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [581] L737-8-->L738: Formula: (= v_~y$w_buff0_used~0_15 |v_Thread1_P1_#t~ite22_2|) InVars {Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_2|} OutVars{Thread1_P1_#t~ite22=|v_Thread1_P1_#t~ite22_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_15, Thread1_P1_#t~ite21=|v_Thread1_P1_#t~ite21_1|, Thread1_P1_#t~ite20=|v_Thread1_P1_#t~ite20_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite21, Thread1_P1_#t~ite20, Thread1_P1_#t~ite22] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [585] L738-->L738-8: Formula: (and (= |v_Thread1_P1_#t~ite25_1| v_~y$w_buff1_used~0_9) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_9} OutVars{Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_1|, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_9} AuxVars[] AssignedVars[Thread1_P1_#t~ite25] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite5|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [542] L714-2-->L715: Formula: (= v_~y$w_buff0_used~0_7 |v_Thread0_P0_#t~ite5_3|) InVars {Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_7, Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite5] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [544] L715-->L715-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_5 256) 0) (= (mod v_~y$r_buff1_thd1~0_5 256) 0)) (or (= (mod v_~y$w_buff0_used~0_9 256) 0) (= (mod v_~y$r_buff0_thd1~0_8 256) 0)) (= |v_Thread0_P0_#t~ite6_2| v_~y$w_buff1_used~0_5)) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_8, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [545] L715-2-->L716: Formula: (= v_~y$w_buff1_used~0_6 |v_Thread0_P0_#t~ite6_3|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} OutVars{Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite6, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [547] L716-->L716-2: Formula: (and (= |v_Thread0_P0_#t~ite7_2| v_~y$r_buff0_thd1~0_10) (or (= 0 (mod v_~y$r_buff0_thd1~0_10 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite7] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite7|=1, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [548] L716-2-->L717: Formula: (= v_~y$r_buff0_thd1~0_11 |v_Thread0_P0_#t~ite7_3|) InVars {Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_3|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_4|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd1~0, Thread0_P0_#t~ite7] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [550] L717-->L717-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd1~0_7 256)) (= 0 (mod v_~y$w_buff1_used~0_8 256))) (= |v_Thread0_P0_#t~ite8_2| v_~y$r_buff1_thd1~0_7) (or (= 0 (mod v_~y$w_buff0_used~0_13 256)) (= (mod v_~y$r_buff0_thd1~0_13 256) 0))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_7, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} AuxVars[] AssignedVars[Thread0_P0_#t~ite8] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite8|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [551] L717-2-->L722: Formula: (and (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y$r_buff1_thd1~0_8 |v_Thread0_P0_#t~ite8_3|)) InVars {Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_4|} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite8] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [590] L738-8-->L739: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread1_P1_#t~ite25_2|) InVars {Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_2|} OutVars{Thread1_P1_#t~ite23=|v_Thread1_P1_#t~ite23_1|, Thread1_P1_#t~ite25=|v_Thread1_P1_#t~ite25_3|, Thread1_P1_#t~ite24=|v_Thread1_P1_#t~ite24_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread1_P1_#t~ite23, Thread1_P1_#t~ite25, Thread1_P1_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [594] L739-->L739-8: Formula: (and (= |v_Thread1_P1_#t~ite28_1| v_~y$r_buff0_thd2~0_7) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite28] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [599] L739-8-->L740: Formula: (= v_~y$r_buff0_thd2~0_12 |v_Thread1_P1_#t~ite28_2|) InVars {Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_2|} OutVars{Thread1_P1_#t~ite27=|v_Thread1_P1_#t~ite27_1|, Thread1_P1_#t~ite26=|v_Thread1_P1_#t~ite26_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, Thread1_P1_#t~ite28=|v_Thread1_P1_#t~ite28_3|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite27, Thread1_P1_#t~ite26, Thread1_P1_#t~ite28] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [603] L740-->L740-8: Formula: (and (= |v_Thread1_P1_#t~ite31_1| v_~y$r_buff1_thd2~0_6) (not (= 0 (mod v_~weak$$choice2~0_5 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_6, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite31] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [608] L740-8-->L742: Formula: (and (= v_~y$r_buff1_thd2~0_11 |v_Thread1_P1_#t~ite31_2|) (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_5)) InVars {Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_2|, ~y~0=v_~y~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_11, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_3|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_1|, ~y~0=v_~y~0_5, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite31, Thread1_P1_#t~ite30, Thread1_P1_#t~ite29] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [612] L742-->L742-2: Formula: (and (= |v_Thread1_P1_#t~ite32_1| v_~y$mem_tmp~0_2) (not (= 0 (mod v_~y$flush_delayed~0_2 256)))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite32] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite32|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [617] L742-2-->L746: Formula: (and (= v_~y~0_8 |v_Thread1_P1_#t~ite32_3|) (= v_~y$flush_delayed~0_4 0)) InVars {Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~y~0=v_~y~0_8, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite32, ~y$flush_delayed~0, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [620] L746-->L746-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd2~0_24 256)) (= (mod v_~y$w_buff0_used~0_35 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_24} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_24} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [623] L746-2-->L746-4: Formula: (and (or (= (mod v_~y$w_buff1_used~0_22 256) 0) (= (mod v_~y$r_buff1_thd2~0_15 256) 0)) (= |v_Thread1_P1_#t~ite33_3| v_~y~0_9)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_15, ~y~0=v_~y~0_9, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_15, Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_3|, ~y~0=v_~y~0_9, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} AuxVars[] AssignedVars[Thread1_P1_#t~ite33] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [626] L746-4-->L746-5: Formula: (= |v_Thread1_P1_#t~ite34_4| |v_Thread1_P1_#t~ite33_4|) InVars {Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_4|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_4|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite34] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=0, |Thread1_P1_#t~ite34|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [621] L746-5-->L747: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite34_2|) InVars {Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_2|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_1|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_3|, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite33, Thread1_P1_#t~ite34, ~y~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [625] L747-->L747-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_28 256)) (= (mod v_~y$w_buff0_used~0_39 256) 0)) (= |v_Thread1_P1_#t~ite35_2| v_~y$w_buff0_used~0_39)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_39, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28} AuxVars[] AssignedVars[Thread1_P1_#t~ite35] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite35|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [627] L747-2-->L748: Formula: (= v_~y$w_buff0_used~0_40 |v_Thread1_P1_#t~ite35_3|) InVars {Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_40, Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite35] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [629] L748-->L748-2: Formula: (and (= |v_Thread1_P1_#t~ite36_2| v_~y$w_buff1_used~0_26) (or (= 0 (mod v_~y$r_buff0_thd2~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_44 256))) (or (= 0 (mod v_~y$w_buff1_used~0_26 256)) (= 0 (mod v_~y$r_buff1_thd2~0_19 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [630] L748-2-->L749: Formula: (= v_~y$w_buff1_used~0_27 |v_Thread1_P1_#t~ite36_3|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|} OutVars{Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[Thread1_P1_#t~ite36, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [632] L749-->L749-2: Formula: (and (= |v_Thread1_P1_#t~ite37_2| v_~y$r_buff0_thd2~0_36) (or (= 0 (mod v_~y$r_buff0_thd2~0_36 256)) (= (mod v_~y$w_buff0_used~0_48 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_36} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_36} AuxVars[] AssignedVars[Thread1_P1_#t~ite37] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite37|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [633] L749-2-->L750: Formula: (= v_~y$r_buff0_thd2~0_37 |v_Thread1_P1_#t~ite37_3|) InVars {Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_3|} OutVars{Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_37} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite37] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [635] L750-->L750-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= (mod v_~y$r_buff1_thd2~0_21 256) 0)) (or (= 0 (mod v_~y$r_buff0_thd2~0_39 256)) (= (mod v_~y$w_buff0_used~0_51 256) 0)) (= |v_Thread1_P1_#t~ite38_2| v_~y$r_buff1_thd2~0_21)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_21, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_21, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[Thread1_P1_#t~ite38] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite38|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [636] L750-2-->L755: Formula: (and (= v_~y$r_buff1_thd2~0_22 |v_Thread1_P1_#t~ite38_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_3|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_22, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite38] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [446] L771-1-->L775: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_5 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [367] L775-->L777: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [415] L777-->L777-2: Formula: (or (= (mod v_~y$r_buff0_thd0~0_4 256) 0) (= (mod v_~y$w_buff0_used~0_57 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [419] L777-2-->L777-4: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_4 256)) (= 0 (mod v_~y$w_buff1_used~0_34 256))) (= |v_ULTIMATE.start_main_#t~ite42_3| v_~y~0_12)) InVars {~y~0=v_~y~0_12, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} OutVars{~y~0=v_~y~0_12, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_34} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [423] L777-4-->L777-5: Formula: (= |v_ULTIMATE.start_main_#t~ite43_3| |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_3|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [406] L777-5-->L778: Formula: (= v_~y~0_13 |v_ULTIMATE.start_main_#t~ite43_5|) InVars {ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y~0=v_~y~0_13, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [358] L778-->L778-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_59 256) 0)) (= |v_ULTIMATE.start_main_#t~ite44_3| v_~y$w_buff0_used~0_59)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_59, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_59, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [524] L778-2-->L779: Formula: (= v_~y$w_buff0_used~0_60 |v_ULTIMATE.start_main_#t~ite44_5|) InVars {ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_60, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [469] L779-->L779-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_36 256))) (= |v_ULTIMATE.start_main_#t~ite45_3| v_~y$w_buff1_used~0_36) (or (= (mod v_~y$r_buff0_thd0~0_8 256) 0) (= 0 (mod v_~y$w_buff0_used~0_62 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_62, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_36} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_62, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_36} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [454] L779-2-->L780: Formula: (= v_~y$w_buff1_used~0_37 |v_ULTIMATE.start_main_#t~ite45_5|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|} OutVars{ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_37} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ~y$w_buff1_used~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [408] L780-->L780-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite46_3| v_~y$r_buff0_thd0~0_10) (or (= 0 (mod v_~y$w_buff0_used~0_64 256)) (= 0 (mod v_~y$r_buff0_thd0~0_10 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [411] L780-2-->L781: Formula: (= v_~y$r_buff0_thd0~0_11 |v_ULTIMATE.start_main_#t~ite46_5|) InVars {ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|} OutVars{ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite46] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [509] L781-->L781-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_13 256) 0) (= (mod v_~y$w_buff0_used~0_66 256) 0)) (= |v_ULTIMATE.start_main_#t~ite47_3| v_~y$r_buff1_thd0~0_8) (or (= 0 (mod v_~y$r_buff1_thd0~0_8 256)) (= 0 (mod v_~y$w_buff1_used~0_39 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_39} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_66, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [513] L781-2-->L786: Formula: (and (= v_~y$r_buff1_thd0~0_9 |v_ULTIMATE.start_main_#t~ite47_5|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_2) (= 2 v_~x~0_4))) 1 0) 0) 0 1))) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~x~0=v_~x~0_4} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~x~0=v_~x~0_4, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [364] L786-->L786-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [368] L786-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [405] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [402] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [400] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0___VERIFIER_assert_~expression=1, Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0___VERIFIER_assert_#in~expression|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); srcloc: L768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); srcloc: L768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); srcloc: L770 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); srcloc: L770-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite4;havoc #t~ite3;havoc #t~ite4; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite13;havoc #t~ite12; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite14;havoc #t~ite15;havoc #t~ite16; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite19;havoc #t~ite18;havoc #t~ite17; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite21;havoc #t~ite20;havoc #t~ite22; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite24;havoc #t~ite25;havoc #t~ite23; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite26;havoc #t~ite28;havoc #t~ite27; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite31;havoc #t~ite29;havoc #t~ite30;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite33 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 #t~ite34 := #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |P1_#t~ite34|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite34;havoc #t~ite34;havoc #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite35 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite35|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite35;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite36 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite36;havoc #t~ite36; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite37 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite37|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite37;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite38 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite38|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite38;havoc #t~ite38;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet41;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite42 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite43 := main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite43;havoc main_#t~ite43;havoc main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite44 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite44;havoc main_#t~ite44; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite45 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite45;havoc main_#t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite46;havoc main_#t~ite46; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite47;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); srcloc: L768 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); srcloc: L768-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd1~0 := 1;~x~0 := 1; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite4 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); srcloc: L770 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); srcloc: L770-1 VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1);havoc #t~nondet10.base, #t~nondet10.offset;~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1);havoc #t~nondet11.base, #t~nondet11.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256);#t~ite13 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite4|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite4;havoc #t~ite3;havoc #t~ite4; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256;#t~ite5 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite13|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite13;havoc #t~ite13;havoc #t~ite12; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite16 := ~y$w_buff0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite16|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite16;havoc #t~ite14;havoc #t~ite15;havoc #t~ite16; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite19 := ~y$w_buff1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite19|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite19;havoc #t~ite19;havoc #t~ite18;havoc #t~ite17; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite22 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite22|=1, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite22;havoc #t~ite21;havoc #t~ite20;havoc #t~ite22; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite25 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite5|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff0_used~0 := #t~ite5;havoc #t~ite5; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite6 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite6;havoc #t~ite6; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256);#t~ite7 := ~y$r_buff0_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite7|=1, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd1~0 := #t~ite7;havoc #t~ite7; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256));#t~ite8 := ~y$r_buff1_thd1~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite8|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd1~0 := #t~ite8;havoc #t~ite8;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite25|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite25;havoc #t~ite24;havoc #t~ite25;havoc #t~ite23; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite28 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite28|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite28;havoc #t~ite26;havoc #t~ite28;havoc #t~ite27; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite31|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite31;havoc #t~ite31;havoc #t~ite29;havoc #t~ite30;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite32 := ~y$mem_tmp~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite32|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite32;havoc #t~ite32;~y$flush_delayed~0 := 0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite33 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 #t~ite34 := #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=0, |P1_#t~ite34|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite34;havoc #t~ite34;havoc #t~ite33; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite35 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite35|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite35;havoc #t~ite35; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite36 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite36;havoc #t~ite36; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite37 := ~y$r_buff0_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite37|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd2~0 := #t~ite37;havoc #t~ite37; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite38 := ~y$r_buff1_thd2~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite38|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd2~0 := #t~ite38;havoc #t~ite38;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet41;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite42 := ~y~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite43 := main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_#t~ite43|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite43;havoc main_#t~ite43;havoc main_#t~ite42; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite44 := ~y$w_buff0_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite44|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite44;havoc main_#t~ite44; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite45 := ~y$w_buff1_used~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite45;havoc main_#t~ite45; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite46|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite46;havoc main_#t~ite46; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite47|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite47;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0___VERIFIER_assert_~expression=1, P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0___VERIFIER_assert_#in~expression|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1443~0.base|=5, |ULTIMATE.start_main_~#t1443~0.offset|=0, |ULTIMATE.start_main_~#t1444~0.base|=6, |ULTIMATE.start_main_~#t1444~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] -1 call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] -1 call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L730] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L731] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L714] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 assume 0 != ~weak$$choice2~0 % 256; [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 assume 0 != ~weak$$choice2~0 % 256; [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 assume 0 != ~weak$$choice2~0 % 256; [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 assume 0 != ~weak$$choice2~0 % 256; [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 assume 0 != ~weak$$choice2~0 % 256; [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 assume 0 != ~y$flush_delayed~0 % 256; [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0.base, main_~#t1443~0.offset, main_~#t1444~0.base, main_~#t1444~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] -1 call main_~#t1443~0.base, main_~#t1443~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 call write~int(0, main_~#t1443~0.base, main_~#t1443~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] -1 call main_~#t1444~0.base, main_~#t1444~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 call write~int(1, main_~#t1444~0.base, main_~#t1444~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10.base + #t~nondet10.offset then 0 else 1); [L730] 1 havoc #t~nondet10.base, #t~nondet10.offset; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11.base + #t~nondet11.offset then 0 else 1); [L731] 1 havoc #t~nondet11.base, #t~nondet11.offset; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256); [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256; [L714] 0 #t~ite5 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 assume 0 != ~weak$$choice2~0 % 256; [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 assume 0 != ~weak$$choice2~0 % 256; [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 assume 0 != ~weak$$choice2~0 % 256; [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 assume 0 != ~weak$$choice2~0 % 256; [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256); [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)); [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 assume 0 != ~weak$$choice2~0 % 256; [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 assume 0 != ~weak$$choice2~0 % 256; [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 assume 0 != ~y$flush_delayed~0 % 256; [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0.base=5, main_~#t1443~0.offset=0, main_~#t1444~0.base=6, main_~#t1444~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0, main_~#t1444~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call main_~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, main_~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call main_~#t1444~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, main_~#t1444~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet40, main_#t~nondet41, main_#t~ite43, main_#t~ite42, main_#t~ite44, main_#t~ite45, main_#t~ite46, main_#t~ite47, main_~#t1443~0, main_~#t1444~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call main_~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, main_~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L703] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L703] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc main_#t~nondet40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call main_~#t1444~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, main_~#t1444~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite4=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite5=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite7=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc main_#t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 main_#t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 main_#t~ite43 := main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_#t~ite43=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := main_#t~ite43; [L777] -1 havoc main_#t~ite43; [L777] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 main_#t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite44=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := main_#t~ite44; [L778] -1 havoc main_#t~ite44; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 main_#t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := main_#t~ite45; [L779] -1 havoc main_#t~ite45; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 main_#t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite46=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := main_#t~ite46; [L780] -1 havoc main_#t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 main_#t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite47=0, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := main_#t~ite47; [L781] -1 havoc main_#t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L786] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t1443~0!base=5, main_~#t1443~0!offset=0, main_~#t1444~0!base=6, main_~#t1444~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call ~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, ~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc #t~nondet40; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call ~#t1444~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, ~#t1444~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc #t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 #t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 #t~ite43 := #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := #t~ite43; [L777] -1 havoc #t~ite43; [L777] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 #t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := #t~ite44; [L778] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 #t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := #t~ite45; [L779] -1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 #t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := #t~ite46; [L780] -1 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 #t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := #t~ite47; [L781] -1 havoc #t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L671] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0] [L674] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0] [L675] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L677] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L679] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L680] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L681] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L689] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L691] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L693] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L695] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L768] FCALL -1 call ~#t1443~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FCALL -1 call write~int(0, ~#t1443~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696-L723] 0 ~arg := #in~arg; [L699] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L700] 0 ~y$w_buff0~0 := 1; [L701] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L702] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L704] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L705] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L706] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L707] 0 ~y$r_buff0_thd1~0 := 1; [L710] 0 ~x~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L713] 0 #t~ite4 := ~y$w_buff0~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] -1 havoc #t~nondet40; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] FCALL -1 call ~#t1444~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FCALL -1 call write~int(1, ~#t1444~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724-L756] 1 ~arg := #in~arg; [L727] 1 ~x~0 := 2; [L730] 1 ~weak$$choice0~0 := (if 0 == #t~nondet10!base + #t~nondet10!offset then 0 else 1); [L730] 1 havoc #t~nondet10; [L731] 1 ~weak$$choice2~0 := (if 0 == #t~nondet11!base + #t~nondet11!offset then 0 else 1); [L731] 1 havoc #t~nondet11; [L732] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L733] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256) [L734] 1 #t~ite13 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L713] 0 ~y~0 := #t~ite4; [L713] 0 havoc #t~ite3; [L713] 0 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L714] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256 [L714] 0 #t~ite5 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L734] 1 ~y~0 := #t~ite13; [L734] 1 havoc #t~ite13; [L734] 1 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L735] 1 #t~ite16 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L735] 1 ~y$w_buff0~0 := #t~ite16; [L735] 1 havoc #t~ite14; [L735] 1 havoc #t~ite15; [L735] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L736] 1 #t~ite19 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite19=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L736] 1 ~y$w_buff1~0 := #t~ite19; [L736] 1 havoc #t~ite19; [L736] 1 havoc #t~ite18; [L736] 1 havoc #t~ite17; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L737] 1 #t~ite22 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite22=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L737] 1 ~y$w_buff0_used~0 := #t~ite22; [L737] 1 havoc #t~ite21; [L737] 1 havoc #t~ite20; [L737] 1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L738] 1 #t~ite25 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L714] 0 ~y$w_buff0_used~0 := #t~ite5; [L714] 0 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L715] 0 #t~ite6 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L715] 0 ~y$w_buff1_used~0 := #t~ite6; [L715] 0 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) [L716] 0 #t~ite7 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 0 ~y$r_buff0_thd1~0 := #t~ite7; [L716] 0 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd1~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd1~0 % 256)) [L717] 0 #t~ite8 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 0 ~y$r_buff1_thd1~0 := #t~ite8; [L717] 0 havoc #t~ite8; [L720] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L738] 1 ~y$w_buff1_used~0 := #t~ite25; [L738] 1 havoc #t~ite24; [L738] 1 havoc #t~ite25; [L738] 1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L739] 1 #t~ite28 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite28=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L739] 1 ~y$r_buff0_thd2~0 := #t~ite28; [L739] 1 havoc #t~ite26; [L739] 1 havoc #t~ite28; [L739] 1 havoc #t~ite27; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L740] 1 #t~ite31 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L740] 1 ~y$r_buff1_thd2~0 := #t~ite31; [L740] 1 havoc #t~ite31; [L740] 1 havoc #t~ite29; [L740] 1 havoc #t~ite30; [L741] 1 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L742] 1 #t~ite32 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite32=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 1 ~y~0 := #t~ite32; [L742] 1 havoc #t~ite32; [L743] 1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] COND FALSE 1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L746] 1 #t~ite33 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 #t~ite34 := #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=0, #t~ite34=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L746] 1 ~y~0 := #t~ite34; [L746] 1 havoc #t~ite34; [L746] 1 havoc #t~ite33; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L747] 1 #t~ite35 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite35=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L747] 1 ~y$w_buff0_used~0 := #t~ite35; [L747] 1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L748] 1 #t~ite36 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L748] 1 ~y$w_buff1_used~0 := #t~ite36; [L748] 1 havoc #t~ite36; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] COND FALSE 1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L749] 1 #t~ite37 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite37=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L749] 1 ~y$r_buff0_thd2~0 := #t~ite37; [L749] 1 havoc #t~ite37; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] COND FALSE 1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L750] 1 #t~ite38 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite38=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L750] 1 ~y$r_buff1_thd2~0 := #t~ite38; [L750] 1 havoc #t~ite38; [L753] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] -1 havoc #t~nondet41; [L773] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L775] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L777] -1 #t~ite42 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 #t~ite43 := #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L777] -1 ~y~0 := #t~ite43; [L777] -1 havoc #t~ite43; [L777] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L778] -1 #t~ite44 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L778] -1 ~y$w_buff0_used~0 := #t~ite44; [L778] -1 havoc #t~ite44; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L779] -1 #t~ite45 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L779] -1 ~y$w_buff1_used~0 := #t~ite45; [L779] -1 havoc #t~ite45; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L780] -1 #t~ite46 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L780] -1 ~y$r_buff0_thd0~0 := #t~ite46; [L780] -1 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L781] -1 #t~ite47 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L781] -1 ~y$r_buff1_thd0~0 := #t~ite47; [L781] -1 havoc #t~ite47; [L784] -1 ~main$tmp_guard1~0 := (if 0 == (if !(2 == ~x~0 && 0 == ~__unbuffered_p1_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p1_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=1, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L674] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L675] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L677] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L679] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L680] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L681] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L682] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L683] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L684] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L689] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L690] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L691] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L692] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L693] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L694] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L695] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] -1 pthread_t t1443; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] FCALL, FORK -1 pthread_create(&t1443, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] 0 y$w_buff1 = y$w_buff0 [L700] 0 y$w_buff0 = 1 [L701] 0 y$w_buff1_used = y$w_buff0_used [L702] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L705] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L706] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L707] 0 y$r_buff0_thd1 = (_Bool)1 [L710] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L770] -1 pthread_t t1444; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L771] FCALL, FORK -1 pthread_create(&t1444, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 x = 2 [L730] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L731] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L732] 1 y$flush_delayed = weak$$choice2 [L733] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L714] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L735] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L736] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L737] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L738] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L714] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L720] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L739] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L740] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L741] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y = y$flush_delayed ? y$mem_tmp : y [L743] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L747] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L748] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L748] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L749] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L749] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L750] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L750] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L753] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L778] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L779] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L780] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L781] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L784] -1 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-23 03:59:27,133 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_6665b402-5fe6-41c5-acfb-4e82ea26dd42/bin-2019/utaipan/witness.graphml [2018-11-23 03:59:27,134 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 03:59:27,134 INFO L168 Benchmark]: Toolchain (without parser) took 25901.69 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 955.5 MB in the beginning and 1.5 GB in the end (delta: -591.4 MB). Peak memory consumption was 993.0 MB. Max. memory is 11.5 GB. [2018-11-23 03:59:27,135 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 03:59:27,136 INFO L168 Benchmark]: CACSL2BoogieTranslator took 449.32 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 955.5 MB in the beginning and 1.1 GB in the end (delta: -165.3 MB). Peak memory consumption was 35.2 MB. Max. memory is 11.5 GB. [2018-11-23 03:59:27,136 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.79 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 03:59:27,136 INFO L168 Benchmark]: Boogie Preprocessor took 26.30 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 03:59:27,136 INFO L168 Benchmark]: RCFGBuilder took 482.90 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. [2018-11-23 03:59:27,137 INFO L168 Benchmark]: TraceAbstraction took 20246.11 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: -607.9 MB). Peak memory consumption was 833.4 MB. Max. memory is 11.5 GB. [2018-11-23 03:59:27,137 INFO L168 Benchmark]: Witness Printer took 4651.86 ms. Allocated memory is still 2.6 GB. Free memory was 1.7 GB in the beginning and 1.5 GB in the end (delta: 130.3 MB). Peak memory consumption was 130.3 MB. Max. memory is 11.5 GB. [2018-11-23 03:59:27,138 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 449.32 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.1 MB). Free memory was 955.5 MB in the beginning and 1.1 GB in the end (delta: -165.3 MB). Peak memory consumption was 35.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.79 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.30 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 482.90 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 48.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20246.11 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: -607.9 MB). Peak memory consumption was 833.4 MB. Max. memory is 11.5 GB. * Witness Printer took 4651.86 ms. Allocated memory is still 2.6 GB. Free memory was 1.7 GB in the beginning and 1.5 GB in the end (delta: 130.3 MB). Peak memory consumption was 130.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L674] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L675] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L677] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L679] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L680] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L681] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L682] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L683] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L684] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L689] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L690] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L691] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L692] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L693] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L694] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L695] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L768] -1 pthread_t t1443; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] FCALL, FORK -1 pthread_create(&t1443, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L699] 0 y$w_buff1 = y$w_buff0 [L700] 0 y$w_buff0 = 1 [L701] 0 y$w_buff1_used = y$w_buff0_used [L702] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L704] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L705] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L706] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L707] 0 y$r_buff0_thd1 = (_Bool)1 [L710] 0 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L770] -1 pthread_t t1444; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L771] FCALL, FORK -1 pthread_create(&t1444, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 x = 2 [L730] 1 weak$$choice0 = __VERIFIER_nondet_pointer() [L731] 1 weak$$choice2 = __VERIFIER_nondet_pointer() [L732] 1 y$flush_delayed = weak$$choice2 [L733] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L713] 0 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L714] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L735] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L736] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L737] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L738] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L714] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L715] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L716] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L717] EXPR 0 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 0 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L720] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L739] EXPR 1 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L739] 1 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L740] EXPR 1 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L741] 1 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y = y$flush_delayed ? y$mem_tmp : y [L743] 1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L746] EXPR 1 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=0] [L746] 1 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L747] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L748] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L748] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L749] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L749] 1 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L750] EXPR 1 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L750] 1 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L753] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L773] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L778] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L778] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L779] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L780] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L780] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L781] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L784] -1 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 221 locations, 3 error locations. UNSAFE Result, 20.1s OverallTime, 31 OverallIterations, 1 TraceHistogramMax, 8.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7620 SDtfs, 7752 SDslu, 17628 SDs, 0 SdLazy, 7281 SolverSat, 385 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 313 GetRequests, 80 SyntacticMatches, 31 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 276 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=34805occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.0s AutomataMinimizationTime, 30 MinimizatonAttempts, 79291 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 2287 NumberOfCodeBlocks, 2287 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 2163 ConstructedInterpolants, 0 QuantifiedInterpolants, 444821 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...